Low dropout regulator and electronic equipment
By introducing a sampling feedback branch into the low dropout linear regulator, the control voltage is dynamically adjusted to achieve real-time tracking of the target voltage, thus solving the problem of low output voltage accuracy and avoiding increases in circuit structure and cost.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- UNITED NOVA TECH - XIANFENG (SHAOXING) CORP
- Filing Date
- 2026-01-28
- Publication Date
- 2026-05-01
AI Technical Summary
Low-power, low-dropout linear regulators suffer from low output voltage accuracy, and existing solutions increase circuit structure and cost by increasing the size of the power transistor.
In a low-dropout linear regulator, a sampling feedback branch is introduced. By sampling the load current of the main power transistor and converting it into a feedback current, the output node is injected. The transconductance amplifier dynamically adjusts the control voltage to maintain the target voltage consistent with the reference voltage.
It achieves real-time tracking of the target voltage when the load changes, suppresses output voltage fluctuations, and avoids the cost increase caused by increasing the size of the main power transistor.
Smart Images
Figure CN121957261A_ABST
Abstract
Description
A low dropout linear regulator and electronic equipment Technical Field
[0001] This application relates to the field of integrated circuit technology, and more specifically to a low dropout linear regulator and electronic device. Background Technology
[0002] Low-power, low-dropout linear regulators (LDOs) are widely used in the internal power supplies of electronic products due to their low quiescent current.
[0003] However, low-power, low-dropout linear regulators generally suffer from low output voltage accuracy. Currently, the main approach to address this is to increase the size of their power transistors. This solution leads to an increase in the overall circuit area and cost. Summary of the Invention
[0004] The summary section introduces a series of simplified concepts, which will be further explained in detail in the detailed description section. This summary section is not intended to limit the key and essential technical features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.
[0005] To address the existing problems, this application provides a low-dropout linear regulator, comprising: a transconductance amplifier, a reference branch, a main branch, and a sampling feedback branch. One input terminal of the transconductance amplifier is connected to a reference voltage, and the other input terminal is connected to the output node of the reference branch, used to output a control voltage based on the input voltage difference. The reference branch includes a reference transistor, whose control terminal is connected to the output terminal of the transconductance amplifier, whose input terminal is connected to a power supply, and whose output terminal serves as an output node to provide a reference voltage. The main branch includes a main power transistor, whose control terminal is connected to the output terminal of the transconductance amplifier, whose input terminal is connected to a power supply, and whose output terminal is used to output a target voltage. The sampling feedback branch is connected to the output nodes of both the main branch and the reference branch, used to sample the load current of the main power transistor and convert the sampled current into a feedback current, which is then injected into the output node, causing the target voltage to follow the reference voltage.
[0006] In one embodiment, the sampling feedback branch includes: a sampling module, whose input is coupled to the output of the main power transistor, for sampling the load current of the main power transistor and outputting the sampled current; and a current transmission module, connected to the sampling module and the reference branch, for converting the sampled current into a feedback current and transmitting it to be injected into the output node so that the target voltage follows the reference voltage.
[0007] In one embodiment, the sampling module includes a sampling transistor, the control terminal of which is connected to the output terminal of the transconductance amplifier, the first terminal of which serves as an input terminal coupled to the output terminal of the main power transistor, and the second terminal of which serves as an output terminal to output a sampling current.
[0008] In one embodiment, the size of the main power transistor is 10 to 100 times the size of the reference transistor, and the size of the sampling transistor is the same as the size of the reference transistor.
[0009] In one embodiment, the current transfer module includes: a current transfer unit connected to the output terminal of the sampling module, used to transfer the sampling current in the high-voltage operating domain where the main power transistor is located; and a current injection unit connected to the current transfer unit and the reference branch respectively, used to receive the current output by the current transfer unit and generate a feedback current proportional to the sampling current in the low-voltage operating domain where the output node is located, so as to inject it into the output node so that the target voltage follows the reference voltage; wherein, both the current transfer unit and the current injection unit are composed of current mirrors.
[0010] In one embodiment, the current transfer unit includes a first PMOS transistor and a second PMOS transistor; the gate of the first PMOS transistor is connected to the gate of the second PMOS transistor, the source of the first PMOS transistor and the source of the second PMOS transistor are respectively connected to a power supply, the gate of the first PMOS transistor is short-circuited to the drain of the first PMOS transistor, the drain of the first PMOS transistor is connected to the output terminal of the sampling module, and the drain of the second PMOS transistor is the output terminal of the current transfer unit.
[0011] In one embodiment, the size of the first PMOS transistor is 1 to 20 times the size of the second PMOS transistor.
[0012] In one embodiment, the current injection unit includes a first NMOS transistor and a second NMOS transistor; the gate of the first NMOS transistor is connected to the gate of the second NMOS transistor, the source of the first NMOS transistor and the source of the second NMOS transistor are respectively grounded, the gate of the first NMOS transistor is shorted to the drain of the first NMOS transistor, the drain of the first NMOS transistor is connected to the current transfer unit, and the drain of the second NMOS transistor is connected to the output node. The ratio of the feedback current to the sampling current is related to the size of the power transistor constituting the current mirror.
[0013] In one embodiment, the size of the first NMOS transistor is 1 to 20 times the size of the second NMOS transistor.
[0014] Another aspect of this application provides an electronic device, including the aforementioned low-dropout linear regulator.
[0015] The low-dropout linear regulator and electronic device of this application embodiment sample the load current of the main power transistor by adding a sampling feedback branch, and converts it into a feedback current injected into the output node. For the output node, the injected feedback current can change the current balance of the node, causing a small change in the node voltage. The transconductance amplifier can detect this change and dynamically adjust its output control voltage. That is, when the load current increases, the output voltage of the main power transistor tends to decrease. At this time, the feedback current generated by the sampling feedback branch increases accordingly, the current injected into the output node increases, and the node voltage tends to increase. In order to maintain the node voltage consistent with the reference voltage, the transconductance amplifier will reduce the control voltage, which increases the gate-source voltage of the main power transistor, thereby driving the main power transistor to provide a larger output current to compensate for the voltage drop caused by the increase in load current. This adjustment process enables the target voltage of the main power transistor to follow the reference voltage set by the reference branch in real time, which greatly suppresses the output voltage fluctuation caused by load changes. Compared with traditional solutions, this solution does not require increasing the size of the main power transistor, which can save costs. Attached Figure Description
[0016] The following drawings, which are incorporated herein by reference and are used to understand this application, illustrate embodiments of the invention and their descriptions to explain the principles of the invention.
[0017] In the accompanying drawings: Figure 1 shows a circuit diagram of a low dropout linear regulator of the related art; Figure 2 shows a circuit diagram of a low dropout linear regulator according to a specific embodiment of this application. Detailed Implementation
[0018] The present application will now be described more fully with reference to the accompanying drawings, in which embodiments of the present application are illustrated. However, the present application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present application to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout.
[0019] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as the second element, component, area, layer, or portion.
[0020] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “under” the other element or feature will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.
[0021] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms as defined in commonly used dictionaries shall be interpreted as having a meaning consistent with their meaning in the relevant field and / or the context of this specification, and not as in an ideal or overly formal sense, unless expressly defined herein.
[0022] To fully understand this application, a detailed structure will be presented in the following description to illustrate the technical solutions proposed in this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.
[0023] Low-power, low-dropout linear regulators (LDOs) are widely used in the internal power supplies of electronic products due to their low quiescent current.
[0024] As shown in Figure 1, an existing low-power, low-dropout linear regulator includes a transconductance amplifier, a reference branch, and a main branch. One end of the transconductance amplifier is connected to a reference voltage, and the other end is connected to the output node of the reference branch to output a control voltage based on the input voltage difference.
[0025] The reference branch includes a reference transistor. The control terminal of the reference transistor is connected to the output of the transconductance amplifier to receive the control voltage. Its input is connected to the power supply, and its output is connected to a load resistor. The free end of the load resistor is grounded. The output of the reference transistor serves as the output node, providing a reference voltage.
[0026] The main branch includes the main power transistor. The control terminal of the main power transistor is connected to the output of the transconductance amplifier to receive the control voltage; its input terminal is connected to the power supply; and its output terminal is connected to the load capacitor. The free end of the load capacitor is grounded. The output terminal of the main power transistor is used to output the target voltage.
[0027] The aforementioned circuit structure primarily utilizes a transconductance amplifier to calibrate the output node voltage in the reference branch to the reference voltage. Then, by constructing the main branch, it replicates the operating environment of the reference transistor, ensuring that the target voltage output by the main power transistor matches both the reference and the reference voltage. Furthermore, since the main power transistor is not within the loop containing the transconductance amplifier, it operates in an open-loop manner. Therefore, even with a large capacitor connected to the output, it will not affect the loop and no compensation is required.
[0028] However, while such a circuit structure avoids stability issues in the closed-loop case by controlling the main power transistor through an open-loop transconductance amplifier, according to the square-law formula for the saturation region of the power transistor (see the following formula): When the output load current I of the main power transistor increases, the gate-source voltage Vgs of the main power transistor increases, which causes the target voltage VOUT to decrease. That is, the output target voltage VOUT changes with the load, resulting in poor accuracy.
[0029] The current main solution to this problem is to increase the size of the power transistor. By increasing the size of the main power transistor, the target voltage can be prevented from dropping too much when the output load current increases, thus avoiding impacting the operation of subsequent modules.
[0030] However, this solution leads to an increase in the overall area of the circuit structure and an increase in cost.
[0031] Therefore, in view of the aforementioned technical problems, this application proposes a low-dropout linear regulator, which includes: a transconductance amplifier, a reference branch, a main branch, and a sampling feedback branch; one input terminal of the transconductance amplifier is used to connect to a reference voltage, and the other input terminal is connected to the output node of the reference branch, for outputting a control voltage according to the input voltage difference; the reference branch includes a reference transistor, the control terminal of which is connected to the output terminal of the transconductance amplifier, the input terminal of which is used to connect to a power supply, and the output terminal of which serves as the output node to provide a reference voltage; the main branch includes a main power transistor, the control terminal of which is connected to the output terminal of the transconductance amplifier, the input terminal of which is used to connect to the power supply, and the output terminal of which is used to output a target voltage; the sampling feedback branch is connected to the output nodes of the main branch and the reference branch respectively, for sampling the load current of the main power transistor and converting the sampled current into a feedback current to be injected into the output node, so that the target voltage follows the reference voltage.
[0032] The low-dropout linear regulator of this application adds a sampling feedback branch to sample the load current of the main power transistor and convert it into a feedback current injected into the output node. For the output node, the injected feedback current alters the current balance, causing a slight change in the node voltage. The transconductance amplifier detects this change and dynamically adjusts its output control voltage. Specifically, when the load current increases, the output voltage of the main power transistor tends to decrease. At this time, the feedback current generated by the sampling feedback branch increases accordingly, increasing the current injected into the output node and causing the node voltage to tend to increase. To maintain the node voltage consistent with the reference voltage, the transconductance amplifier lowers the control voltage, increasing the gate-source voltage of the main power transistor, thereby driving the main power transistor to provide a larger output current to compensate for the voltage drop caused by the increased load current. This adjustment process allows the target voltage of the main power transistor to follow the reference voltage set by the reference branch in real time, significantly suppressing output voltage fluctuations caused by load changes. Compared to traditional solutions, this solution does not require increasing the size of the main power transistor, saving costs.
[0033] The low-dropout linear regulator of this application will now be described in detail with reference to FIG2, wherein FIG2 shows a circuit diagram of a specific embodiment of the low-dropout linear regulator of this application.
[0034] As shown in Figure 2, the low dropout linear regulator of this application includes a transconductance amplifier OTA, a reference branch, a main branch, and a sampling feedback branch 21.
[0035] Specifically, one input terminal of the transconductance amplifier OTA is used to connect to the reference voltage, and the other input terminal is connected to the output node of the reference branch to output the control voltage according to the input voltage difference.
[0036] The reference voltage is the reference value of the voltage output by the main branch.
[0037] In some embodiments, the inverting input of the transconductance amplifier OTA can be used to connect to a reference voltage, and its non-inverting input can be connected to the output node of the reference branch.
[0038] The reference branch includes a reference transistor Mn2 and a load resistor. The control terminal of the reference transistor Mn2 is connected to the output of the transconductance amplifier OTA to receive the control voltage. The input terminal of the reference transistor Mn2 is used to connect to the power supply, and its output terminal is connected to the load resistor, with the free end of the load resistor grounded. The output terminal of the reference transistor Mn2 serves as the output node to provide the reference voltage.
[0039] In this context, the gate voltage of the reference transistor Mn2 is the control voltage, which can be used to control the drain current of the reference transistor Mn2. By dynamically adjusting the drain current of the reference transistor Mn2 through the transconductance amplifier OTA, the voltage at the output of the reference transistor Mn2 can be made to match the reference voltage.
[0040] In some embodiments, the reference transistor Mn2 can be an NMOS transistor. That is, the gate of the NMOS transistor Mn2 is connected to the output of the transconductance amplifier OTA, its drain is connected to the power supply, its source is connected to the load resistor, and it serves as the output node to provide a reference voltage. The reference voltage is consistent with the reference voltage.
[0041] The main branch includes the main power transistor Mpass and the load capacitor. The control terminal of the main power transistor Mpass is connected to the output terminal of the transconductance amplifier OTA to receive the control voltage. The input terminal of the main power transistor Mpass is used to connect to the power supply, and its output terminal is connected to the load capacitor, with the free end of the load capacitor grounded. The output terminal of the main power transistor Mpass is used to output the target voltage.
[0042] The gate voltage of the main power transistor Mpass is the control voltage, which can be used to control the drain current of the main power transistor Mpass.
[0043] In some embodiments, the main power transistor Mpass is the same as the reference transistor Mn2, or it can be an NMOS transistor. The gate of the NMOS transistor Mpass is connected to the output of the transconductance amplifier OTA, its drain is used to connect to the power supply, and its source is connected to the load capacitor and used to output the target voltage. By dynamically adjusting the drain current of the main power transistor Mpass simultaneously through the transconductance amplifier OTA, the voltage at the output of the main power transistor Mpass can be made to match the reference voltage. Since the gate and drain of the NMOS transistor Mpass are the same as those of the reference transistor Mn2, that is, the operating environment of the NMOS transistor Mpass and the reference transistor Mn2 is the same, the voltage output from the source of the NMOS transistor Mpass should be the same as the voltage output from the source of the reference transistor Mn2, that is, the target voltage matches the reference voltage.
[0044] The circuit structure thus formed is a traditional low-power, low-dropout linear regulator. Its working principle can be referred to the previous description, and will not be repeated here. In order to solve the problem of low accuracy in traditional low-power, low-dropout linear regulators, this application adds a sampling feedback branch 21 to the original structure.
[0045] The sampling feedback branch 21 is connected to the output nodes of the main branch and the reference branch respectively. It is used to sample the load current of the main power transistor Mpass and convert the sampled current into a feedback current to be injected into the output node so that the target voltage follows the reference voltage.
[0046] In some embodiments, the sampling feedback branch 21 may include a sampling module 22 and a current transmission module.
[0047] The input terminal of the sampling module 22 is coupled to the output terminal of the main power transistor Mpass. The sampling module 22 is used to sample the load current of the main power transistor Mpass and output the sampled current.
[0048] The current transmission module is connected to the sampling module 22 and the reference branch to receive the sampled current, which is used to convert the sampled current into a feedback current and transmit it to be injected into the output node so that the target voltage follows the reference voltage.
[0049] In some embodiments, the sampling module 22 may include a sampling transistor Mn1. The control terminal of the sampling transistor Mn1 is connected to the output terminal of the transconductance amplifier OTA, its first terminal serves as an input terminal coupled to the output terminal of the main power transistor Mpass, and its second terminal serves as an output terminal outputting the sampling current. As an example, the sampling transistor Mn1 and the main power transistor Mpass are identical, both being NMOS transistors. Accordingly, the first terminal of the sampling transistor Mn1 is the source, and the second terminal is the drain.
[0050] It should be understood that since the source of the sampling transistor Mn1 is coupled to the output of the main power transistor Mpass, the load current output by the sampling transistor Mn1 and the load current output by the main power transistor Mpass constitute the total load current. That is, when using the sampling transistor Mn1 to sample the load current of the main power transistor Mpass, there is no load current loss, resulting in the advantage of low quiescent current consumption.
[0051] The sampling ratio of the sampling transistor Mn1 depends on the size of the sampling transistor Mn1 and the size of the main power transistor Mpass. In some embodiments, the size of the main power transistor Mpass is 10 to 100 times the size of the reference transistor Mn2, and the size of the sampling transistor Mn1 is the same as the size of the reference transistor Mn2. As an example, the size of the main power transistor Mpass is 100 times the size of the reference transistor Mn2.
[0052] In some embodiments, the sampling module 22 may also be implemented using other circuit structures.
[0053] Furthermore, in some embodiments, the current transmission module may include a current transfer unit 23 and a current injection unit 24. The current transfer unit 23 is connected to the output terminal of the sampling module 22 to receive the sampling current, which is used to transfer the sampling current in the high-voltage operating domain of the main power transistor Mpass.
[0054] The current injection unit 24 is connected to the current transfer unit 23 and the reference branch respectively. It is used to receive the current output by the current transfer unit 23 and generate a feedback current proportional to the sampling current in the low-voltage operating domain where the output node is located, so as to inject it into the output node and make the target voltage follow the reference voltage.
[0055] In some embodiments, both the current transfer unit 23 and the current injection unit 24 can be composed of a current mirror.
[0056] As an example, the current transfer unit 23 includes a first PMOS transistor Mp1 and a second PMOS transistor Mp2. The gate of the first PMOS transistor Mp1 is connected to the gate of the second PMOS transistor Mp2, and the sources of the first PMOS transistor Mp1 and the second PMOS transistor Mp2 are respectively connected to a power supply. The gate of the first PMOS transistor Mp1 is shorted to its drain, and its drain is connected to the output terminal of the sampling module 22. The drain of the second PMOS transistor Mp2 is the output terminal of the current transfer unit 23.
[0057] It is understandable that, since the gate and source of the first PMOS transistor Mp1 are the same as those of the second PMOS transistor Mp2, meaning that the first PMOS transistor Mp1 and the second PMOS transistor Mp2 are in the same working environment, the ratio of the drain current in the first PMOS transistor Mp1 to the current in the second PMOS transistor Mp2 is related to the size ratio of the first PMOS transistor Mp1 and the second PMOS transistor Mp2.
[0058] In some embodiments, the size of the first PMOS transistor Mp1 is 1 to 20 times the size of the second PMOS transistor Mp2. As an example, the size of the first PMOS transistor Mp1 is 1 times the size of the second PMOS transistor Mp2.
[0059] As an example, the current injection unit 24 includes a first NMOS transistor Mn3 and a second NMOS transistor Mn4. The gate of the first NMOS transistor Mn3 is connected to the gate of the second NMOS transistor Mn4, and the sources of the first NMOS transistor Mn3 and the second NMOS transistor Mn4 are grounded. The gate of the first NMOS transistor Mn3 is shorted to its drain, and its drain is connected to the drain of the second PMOS transistor Mp2 (current transfer unit 23). The drain of the second NMOS transistor Mn4 is connected to the output node.
[0060] It is understandable that, since the gate and source of the first NMOS transistor Mn3 are the same as those of the second NMOS transistor Mn4, meaning that the first NMOS transistor Mn3 and the second NMOS transistor Mn4 are in the same operating environment, the ratio of the drain current in the first NMOS transistor Mn3 to the current in the second NMOS transistor Mn4 is related to the size ratio of the first NMOS transistor Mn3 and the second NMOS transistor Mn4.
[0061] In some embodiments, the size of the first NMOS transistor Mn3 is 1 to 20 times the size of the second NMOS transistor Mn4. As an example, the size of the first NMOS transistor Mn3 is 1 time the size of the second NMOS transistor Mn4.
[0062] Meanwhile, the ratio of feedback current to sampling current is also related to the size of the power transistors constituting the current mirror. Specifically, the ratio of sampling current to feedback current is the product of the ratio of the size of the first PMOS transistor Mp1 to the size of the second PMOS transistor Mp2 and the ratio of the size of the first NMOS transistor Mn3 to the size of the second NMOS transistor Mn4.
[0063] As shown in Figure 2, in a specific example, assume W / L(Mpass):W / L(Mn1):W / L(Mn2)=100:1:1, W / L(Mn2)=W1 / L1, W / L(Mp1):W / L(Mp2)=1:1, W / L(Mn3):W / L(Mn4)=1:1. When the load current IL=100mA, Mn1 samples approximately 0.99mA of current, which is then mirrored through Mp1, Mp2, Mn3, and Mn4, resulting in Mn2 receiving 0.99mA of current.
[0064] In some embodiments, the current transfer unit 23 and the current injection unit 24 may also be implemented using other circuit structures.
[0065] The working process of the aforementioned low-dropout linear regulator will be explained below with a specific example.
[0066] As shown in Figure 2, in a specific example, assuming the circuit is already operating in a steady state, if the load current increases, the main power transistor Mpass needs to provide more drain current, causing its target output voltage VOUT to decrease. When the drain current of the main power transistor Mpass increases, the current of the sampling transistor Mn1 also increases proportionally. The sampling current is converted into a feedback current proportional to this current through current mirrors Mp1, Mp2, Mn3, and Mn4 and injected into the output node. During this process, the feedback current also increases with the increase in the sampling current. Due to the increased feedback current injected into the output node, the reference voltage of the output node tends to rise. Since the transconductance amplifier needs to force the reference voltage of the output node to be the reference voltage, the control voltage output by the transconductance amplifier will decrease to reduce the current of the reference transistor Mn2, thereby offsetting the increase in the feedback current and maintaining the reference voltage of the output node at the reference voltage. Simultaneously, the gate voltage of the main power transistor Mpass also decreases. However, to provide a larger load current, the main power transistor Mpass requires a larger gate-source voltage, which will further decrease the target output voltage. However, due to the adjustment of the reference transistor Mn2, the drop in gate voltage is optimized, and the change in the final target voltage is smaller than that in open loop. Therefore, the target voltage can follow the reference voltage and is not affected by the load, thus achieving higher accuracy.
[0067] In some embodiments, the size ratio of the second PMOS transistor Mp2, the first NMOS transistor Mn3, and the second NMOS transistor Mn4 can be adjusted to further reduce the static power consumption of the first NMOS transistor Mn3 and the second NMOS transistor Mn4.
[0068] This concludes the description of the low dropout linear regulator of this application. The complete chip package structure may also include other components, which will not be elaborated here.
[0069] In summary, the low-dropout linear regulator of this application adds a sampling feedback branch to sample the load current of the main power transistor and convert it into a feedback current injected into the output node. For the output node, the injected feedback current alters the current balance, causing a slight change in the node voltage. The transconductance amplifier detects this change and dynamically adjusts its output control voltage. Specifically, when the load current increases, the output voltage of the main power transistor tends to decrease. At this time, the feedback current generated by the sampling feedback branch increases accordingly, increasing the current injected into the output node and causing the node voltage to tend to increase. To maintain the node voltage consistent with the reference voltage, the transconductance amplifier lowers the control voltage, increasing the gate-source voltage of the main power transistor, thereby driving the main power transistor to provide a larger output current to compensate for the voltage drop caused by the increased load current. This adjustment process allows the target voltage of the main power transistor to follow the reference voltage set by the reference branch in real time, significantly suppressing output voltage fluctuations caused by load changes. Compared to traditional solutions, this approach does not require a large W / L ratio to ensure that the output voltage decreases with increasing load.
[0070] This application also provides an electronic device that includes a low-dropout linear regulator. The low-dropout linear regulator can be the same as the low-dropout linear regulator described in the foregoing embodiments. Because the electronic device has the aforementioned low-dropout linear regulator, it has the same advantages as the aforementioned low-dropout linear regulator.
[0071] Although several embodiments have been described herein, it should be understood that many other modifications and embodiments will arise in the mind of those skilled in the art, all of which will fall within the spirit and scope of the concept disclosed herein. More specifically, various modifications and changes may be made in terms of the arrangement and / or components of the subject matter within the scope of this disclosure, the drawings, and the appended claims. In addition to modifications and changes in the components and / or arrangement, the use of alternative methods will also be obvious to those skilled in the art.
Claims
1. A low-dropout linear regulator, characterized in that, The low-dropout linear regulator includes a transconductance amplifier, a reference branch, a main branch, and a sampling feedback branch; one input terminal of the transconductance amplifier is used to connect to a reference voltage, and the other input terminal is connected to the output node of the reference branch, for outputting a control voltage according to the input voltage difference; The reference branch includes a reference transistor, the control terminal of which is connected to the output terminal of the transconductance amplifier, the input terminal of which is connected to a power supply, and the output terminal of which serves as the output node to provide a reference voltage; the main branch includes a main power transistor, the control terminal of which is connected to the output terminal of the transconductance amplifier, the input terminal of which is connected to the power supply, and the output terminal of which is used to output a target voltage. The sampling feedback branch is connected to the output nodes of the main branch and the reference branch respectively. It is used to sample the load current of the main power transistor and convert the sampled current into a feedback current to be injected into the output node, so that the target voltage follows the reference voltage.
2. The low-dropout linear regulator as described in claim 1, characterized in that, The sampling feedback branch includes: a sampling module, whose input terminal is coupled to the output terminal of the main power transistor, for sampling the load current of the main power transistor and outputting a sampling current; and a current transmission module, connected to the sampling module and the reference branch, for converting the sampling current into a feedback current and transmitting it to be injected into the output node so that the target voltage follows the reference voltage.
3. The low-dropout linear regulator as described in claim 2, characterized in that, The sampling module includes a sampling transistor. The control terminal of the sampling transistor is connected to the output terminal of the transconductance amplifier. The first terminal of the sampling transistor serves as an input terminal and is coupled to the output terminal of the main power transistor. The second terminal of the sampling transistor serves as an output terminal to output a sampling current.
4. The low-dropout linear regulator as described in claim 3, characterized in that, The size of the main power transistor is 10 to 100 times that of the reference transistor, and the size of the sampling transistor is the same as that of the reference transistor.
5. The low-dropout linear regulator as described in claim 2, characterized in that, The current transmission module includes: a current transmission unit connected to the output terminal of the sampling module, used to transmit the sampling current in the high-voltage operating domain where the main power transistor is located; and a current injection unit connected to the current transmission unit and the reference branch, used to receive the current output by the current transmission unit and generate a feedback current proportional to the sampling current in the low-voltage operating domain where the output node is located, so as to inject it into the output node, making the target voltage follow the reference voltage; wherein, both the current transmission unit and the current injection unit are composed of current mirrors.
6. The low-dropout linear regulator as described in claim 5, characterized in that, The current transfer unit includes a first PMOS transistor and a second PMOS transistor; the gate of the first PMOS transistor is connected to the gate of the second PMOS transistor, the source of the first PMOS transistor and the source of the second PMOS transistor are respectively connected to the power supply, the gate of the first PMOS transistor is shorted to the drain of the first PMOS transistor, the drain of the first PMOS transistor is connected to the output terminal of the sampling module, and the drain of the second PMOS transistor is the output terminal of the current transfer unit.
7. The low-dropout linear regulator as described in claim 6, characterized in that, The size of the first PMOS transistor is 1 to 20 times the size of the second PMOS transistor.
8. The low-dropout linear regulator as described in claim 5, characterized in that, The current injection unit includes a first NMOS transistor and a second NMOS transistor; the gate of the first NMOS transistor is connected to the gate of the second NMOS transistor, the source of the first NMOS transistor and the source of the second NMOS transistor are respectively grounded, the gate of the first NMOS transistor is shorted to the drain of the first NMOS transistor, the drain of the first NMOS transistor is connected to the current transfer unit, and the drain of the second NMOS transistor is connected to the output node. The ratio of the feedback current to the sampling current is related to the size of the power transistor constituting the current mirror.
9. The low-dropout linear regulator as described in claim 8, characterized in that, The size of the first NMOS transistor is 1 to 20 times the size of the second NMOS transistor.
10. An electronic device, characterized in that, Including the low-dropout linear regulator as described in any one of claims 1-9.