Method and device for determining power consumption of chip, storage medium and electronic equipment

Abstract

The invention discloses a method and a device for determining power consumption of a chip, a storage medium and electronic equipment. The method comprises the following steps: determining a target load parameter of the chip in a running state; and determining a target load parameter of the chip in the operation state and an actual junction temperature of the chip in the operation state, and adjusting a target cooling temperature corresponding to the cooling equipment in response to the fact that a temperature difference between the actual junction temperature and a preset target junction temperature is greater than a temperature difference threshold value until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold value, and then, in response to the fact that the temperature difference between the actual junction temperature and the target junction temperature is smaller than or equal to a temperature difference threshold value, determining a power supply parameter of the chip so as to obtain a corresponding power supply parameter of the chip in a target junction temperature state, and then, based on the power supply parameter of the chip, determining a corresponding power consumption value of the chip in an operation state of a target load parameter. According to the embodiment of the invention, the real power consumption value of the chip running in the target equipment can be obtained, and the accuracy of the chip power consumption test is greatly improved.

Description

Technical Field

[0001] This disclosure relates to the field of chip technology, and in particular to a method, apparatus, storage medium, and electronic device for determining chip power consumption. Background Technology

[0002] During the chip development and testing phase, it is necessary to test the chip's power consumption under rated load to determine its power consumption value. However, in related technologies, the accuracy of chip power consumption testing is relatively low, making it difficult to obtain the chip's true power consumption when operating in the target device. Summary of the Invention

[0003] To address the aforementioned technical problems, this disclosure provides a method, apparatus, storage medium, and electronic device for determining chip power consumption, which can obtain the actual power consumption value of the chip operating in the target device and improve the accuracy of chip power consumption testing.

[0004] The first aspect of this disclosure provides a method for determining the power consumption of a chip, the chip being disposed on a circuit board, the circuit board being disposed within a housing, and a cooling device being installed in the housing. The method includes: determining a target load parameter of the chip in an operating state; determining an actual junction temperature of the chip in an operating state; adjusting a target cooling temperature of the cooling device in response to a temperature difference between the actual junction temperature and a preset target junction temperature being greater than a temperature difference threshold, until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold; determining power supply parameters of the chip in response to a temperature difference between the actual junction temperature and the target junction temperature being less than or equal to the temperature difference threshold; and determining a power consumption value of the chip in an operating state with the target load parameter based on the power supply parameters of the chip.

[0005] A second aspect of this disclosure provides an apparatus for determining the power consumption of a chip, the chip being disposed on a circuit board, the circuit board being disposed within a housing, and a cooling device being installed in the housing. The apparatus includes: a first determining module for determining target load parameters of the chip in an operating state; a second determining module for determining the actual junction temperature of the chip in an operating state; an adjusting module for adjusting a target cooling temperature corresponding to the cooling device in response to a temperature difference between the actual junction temperature and a preset target junction temperature being greater than a temperature difference threshold, until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold; a third determining module for determining power supply parameters of the chip in response to a temperature difference between the actual junction temperature and the target junction temperature being less than or equal to the temperature difference threshold; and a fourth determining module for determining the power consumption value of the chip in an operating state with the target load parameters based on the power supply parameters of the chip.

[0006] A third aspect of this disclosure provides a computer-readable storage medium storing a computer program that is executed by a processor for performing the method for determining chip power consumption as described in any of the above embodiments.

[0007] A fourth aspect of this disclosure provides an electronic device, comprising: a processor; a memory for storing executable instructions of the processor; the processor being configured to read the executable instructions from the memory and execute the instructions to implement the method for determining chip power consumption as described in any of the preceding embodiments.

[0008] A fifth aspect of this disclosure provides a computer program product that, when instructions in the computer program product are executed by a processor, performs the method for determining chip power consumption provided in any of the above embodiments of this disclosure.

[0009] The method, apparatus, storage medium, and electronic device for determining chip power consumption provided in the above embodiments of this disclosure include a chip disposed on a circuit board, the circuit board disposed within a housing, and a cooling device installed within the housing. The chip is in an operating state within a target device. Based on this, the target load parameters and the actual junction temperature of the chip in the operating state are determined. In response to a temperature difference between the actual junction temperature and a preset target junction temperature exceeding a temperature difference threshold, the target cooling temperature of the cooling device is adjusted until the temperature difference between the actual and target junction temperatures is less than or equal to the temperature difference threshold. Then, in response to a temperature difference between the actual and target junction temperatures being less than or equal to the temperature difference threshold, the power supply parameters of the chip are determined, thereby obtaining the power supply parameters corresponding to the chip at the target junction temperature. Finally, based on the chip's power supply parameters, the power consumption value corresponding to the chip's operating state under the target load parameters is determined. The technical solution provided in the above embodiments of this disclosure can obtain the true power consumption value of a chip operating in a target device, greatly improving the accuracy of chip power consumption testing. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of a test scenario for determining chip power consumption provided by an exemplary embodiment of this disclosure.

[0011] Figure 2 This is a first flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure.

[0012] Figure 3 This is a flowchart illustrating step 203 of a method for determining chip power consumption provided in an exemplary embodiment of this disclosure.

[0013] Figure 4 This is a flowchart illustrating step 204 of a method for determining chip power consumption provided in an exemplary embodiment of this disclosure.

[0014] Figure 5 This is a flowchart illustrating step 205 of a method for determining chip power consumption provided in an exemplary embodiment of this disclosure.

[0015] Figure 6 This is a flowchart illustrating step 2054 of a method for determining chip power consumption provided in an exemplary embodiment of this disclosure.

[0016] Figure 7 This is a second flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure.

[0017] Figure 8 This is a third flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure.

[0018] Figure 9 This is a fourth flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure.

[0019] Figure 10 This is a fifth flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure.

[0020] Figure 11 This is a schematic diagram of a device for determining chip power consumption provided in an exemplary embodiment of the present disclosure.

[0021] Figure 12 This is another schematic diagram of a device for determining chip power consumption provided in an exemplary embodiment of the present disclosure.

[0022] Figure 13 This is a structural diagram of an electronic device provided in an embodiment of the present disclosure. Detailed Implementation

[0023] To explain this disclosure, exemplary embodiments of the disclosure will now be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the disclosure, and not all of them. It should be understood that the disclosure is not limited to exemplary embodiments.

[0024] It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of this disclosure.

[0025] It should also be understood that the description of the various embodiments in this disclosure emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.

[0026] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0027] Application Overview

[0028] During chip development or testing, it is necessary to test the chip's power consumption under rated load to determine its power consumption value. However, when related technologies perform power consumption testing on chips, the chip's operating state during the test differs significantly from its operating state in the target device. For example, the target device could be an automotive domain controller. Taking a chip within an automotive domain controller as an example, the chip's operating state within the controller refers to its state during power-on after the circuit board containing the chip is assembled with the controller's housing and the assembled controller is installed in the vehicle.

[0029] Therefore, the power consumption value obtained by power consumption testing of a chip differs significantly from the power consumption value of the chip when it is running in the target device. In other words, the accuracy of chip power consumption testing in related technologies is low, and it is difficult to obtain the true power consumption of the chip when it is running in the target device.

[0030] Exemplary System

[0031] Figure 1 This is a schematic diagram of a test scenario for determining chip power consumption provided by an exemplary embodiment of this disclosure. Figure 1 As shown, in some embodiments, the chip to be tested can be disposed on a circuit board 110, which is disposed within a housing 120, and a cooling device 130 is installed in the housing 120. Exemplarily, the circuit board 110 can be a printed circuit board assembly (PCBA).

[0032] In some embodiments, the chip under test can be any chip 140 on the circuit board 110 that is to be tested for power consumption. Taking an automotive domain controller as an example, the chip under test can be a system-on-chip (SoC) chip and / or other chips on the circuit board of the automotive domain controller, such as a central processing unit (CPU) chip, a graphics processing unit (GPU) chip, etc.

[0033] In some embodiments, the housing 120 can be any structure capable of accommodating the circuit board 110. Exemplarily, the housing 120 may include a cavity in which the circuit board 110 is disposed. Exemplarily, the housing 120 may be a closed structure, i.e., the cavity of the housing 120 is isolated from the external environment; alternatively, the housing 120 may be a non-closed structure, i.e., the cavity of the housing 120 is connected to the external environment. Exemplarily, a fixing structure for the circuit board 110 may be provided within the housing 120, such as threaded holes, clips, etc., and the circuit board 110 can be fixed within the housing 120 by the fixing structure. Taking the determination of the power consumption of the chip in the vehicle domain controller as an example, the housing 120 may be the outer shell of the vehicle domain controller.

[0034] In some embodiments, the cooling device 130 may be a device for cooling and dissipating heat from the chip 140, such as a liquid cooling device or an air cooling device. Taking the determination of the power consumption of the chip in the vehicle domain controller as an example, the cooling device 130 may be a liquid cooling device disposed on the housing 120 of the vehicle domain controller.

[0035] In some embodiments, sampling resistors are connected in series on one or more target power rails on the circuit board 110. The target power rails refer to the power rails on the circuit board 110 that supply power to the chip 140. For example, a sampling resistor can be connected in series at one end of the inductance of the power rail. For instance, the solder joint between one end of the inductor and the pad can be disconnected, one end of the sampling resistor can be soldered to one end of the inductor, and the other end of the sampling resistor can be soldered to the pad, thereby achieving a series connection of the sampling resistor between the inductor and the pad.

[0036] In some embodiments, Figure 1 The test scenario shown also includes a temperature chamber 150. Circuit board 110 and housing 120 can be housed within the temperature chamber 150. The temperature chamber 150 is used to create an adjustable ambient temperature within itself using heating equipment and fans, ensuring that circuit board 110 and housing 120 are within a specific ambient temperature range. Taking the determination of the power consumption of a chip in an automotive domain controller as an example, the temperature chamber 150 can provide the ambient temperature at which the automotive domain controller operates in a vehicle. This improves the accuracy of the chip power consumption test for the automotive domain controller, obtaining the true power consumption of the chip 140 of the automotive domain controller operating in the target device.

[0037] In some embodiments, Figure 1 The test scenario shown also includes a sampling device 160 and an electronic device 170. For example, the sampling device 160 and the electronic device 170 can be located outside the temperature chamber 150, with the sampling device 160 and the electronic device 170 electrically connected to achieve signal transmission.

[0038] For example, the sampling device 160 is connected to the sampling resistors on each target power rail via wires. For instance, a wire can be soldered to each end of each sampling resistor and connected to the sampling device 160. This allows the sampling device 160 to acquire the voltage difference across the sampling resistor and transmit it to the electronic device 170. For example, the sampling device 160 can be an ADC sampling device 160, which performs analog-to-digital conversion on the voltage difference across the sampling resistor to obtain a corresponding digital signal and transmits it to the electronic device 170. For example, the electronic device 170 can be a terminal device, such as a computer, mobile terminal, industrial control computer, etc., or a server device, etc. This embodiment does not specifically limit its capabilities. For example, the electronic device 170 can be electrically connected to the circuit board 110. The electronic device 170 can be used to monitor the junction temperature of the chip 140, adjust the load parameters of the chip 140, monitor the load of the chip 140, and adjust the power supply parameters of the chip 140, etc. The power supply parameters of the chip 140 can include the voltage and current values ​​of each target power rail.

[0039] In some embodiments, the electronic device 170 may be used to perform the method for determining chip power consumption provided in the embodiments of this disclosure, so as to determine the power consumption value corresponding to the chip 140 operating under the target load parameters.

[0040] In some embodiments, the test scenario may further include an external device 180 electrically connected to the circuit board 110. The external device 180 may be located outside or inside the temperature chamber 150, and the external device 180 and the circuit board 110 may be electrically connected via cables. Taking the determination of the power consumption of the chip in the vehicle domain controller as an example, the external device 180 may be a vehicle camera 181, radar 182, CAN device 183, etc. In this way, the configuration of the external device 180 when the vehicle domain controller is running in the vehicle can be simulated, improving the accuracy of the chip power consumption test of the vehicle domain controller and obtaining the actual power consumption of the chip of the vehicle domain controller when running in the target device.

[0041] Exemplary methods

[0042] Figure 2 This is a first flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure. This embodiment can be applied to electronic devices, such as... Figure 2 As shown, it includes the following steps:

[0043] Step 201: Determine the target load parameters of the chip in its operating state.

[0044] In some embodiments, the target load parameter may be the chip's rated load parameter or a pre-set load parameter. The chip's load parameter may include chip utilization, data throughput, etc., which are not limited in this disclosure. For example, chip utilization refers to the percentage of time the chip spends executing non-idle tasks within a specific time interval. Taking a CPU as an example, CPU utilization refers to the percentage of time the CPU spends running applications within a specific time interval relative to the total time spent running operating system kernel code (such as system calls and interrupt handling) within that specific time interval. For example, taking chip utilization as a load parameter, the target load parameter may include a target utilization rate of the chip in its operating state, such as 80%, 85%, 90%, etc.

[0045] Step 202: Determine the actual junction temperature of the chip during operation.

[0046] Junction temperature refers to the actual temperature of the chip during operation. The junction temperature of the chip is usually higher than the temperature of the chip's package.

[0047] In some embodiments, the chip can be controlled to operate based on target load parameters, and the actual junction temperature of the chip under the operating state of the target load parameters can be determined.

[0048] In some embodiments, temperature values ​​measured by one or more temperature sensors in the chip can be acquired, and the actual junction temperature of the chip under the target load parameters can be determined based on the temperature values ​​measured by the one or more temperature sensors in the chip. For example, the actual junction temperature of the chip under the target load parameters is equal to the maximum value among the temperature values ​​measured by the one or more temperature sensors.

[0049] In some embodiments, the target cooling temperature of the cooling device can be determined based on the actual cooling temperature of the cooling device during the operation of the target device. For example, the target cooling temperature is equal to the actual cooling temperature of the cooling device during the operation of the target device, and the cooling device is operated based on the target cooling temperature. Similarly, the target ambient temperature of the temperature chamber is determined based on the actual ambient temperature during the operation of the target device. For example, the target ambient temperature is equal to the actual ambient temperature during the operation of the target device, and the temperature chamber is operated based on the target ambient temperature. Then, the control chip operates based on the target load parameters, thereby determining the actual junction temperature of the chip under the operating conditions of the target load parameters, the target cooling temperature, and the target ambient temperature.

[0050] Taking an in-vehicle domain controller as an example, if the actual cooling temperature of the in-vehicle domain controller's cooling equipment during the operation of the target device is 65℃, then the target cooling temperature can be 65℃. If the actual ambient temperature during the operation of the target device is 85℃, then the target ambient temperature is 85℃.

[0051] In this embodiment, since the cooling equipment operates based on the target cooling temperature and the temperature chamber operates based on the target ambient temperature, it simulates the actual operating state of the chip in the target device. Therefore, it can accurately obtain the actual junction temperature of the chip assembled in the target device under the target load parameters, thereby improving the accuracy of chip power consumption testing.

[0052] Step 203: In response to the temperature difference between the actual junction temperature and the preset target junction temperature being greater than the temperature difference threshold, adjust the target cooling temperature of the cooling equipment until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold.

[0053] In some embodiments, the target junction temperature can be determined based on the chip's operating temperature range. For example, the target junction temperature may be less than or equal to the upper limit of the chip's operating temperature range. Taking a chip in an automotive domain controller as an example, the chip's operating temperature range is -40 to 125°C, meaning the upper limit of the operating temperature range is 125°C. Optionally, the target junction temperature could be 120°C, etc.

[0054] Generally, due to the temperature characteristics of semiconductor materials, the power consumption of a chip is related to its junction temperature under the same load parameters. Typically, under the same load parameters, the higher the junction temperature, the higher the power consumption, and vice versa. Therefore, in some embodiments, power consumption testing of a chip can specifically involve testing the power consumption of the chip under target load parameters and target junction temperature to determine the thermal design power (TDP) of the chip under extreme high temperature and rated load.

[0055] Because the chip's temperature fluctuates during operation, directly comparing the actual junction temperature with the target junction temperature will lead to constantly changing comparison results. Therefore, in some embodiments, a temperature difference threshold can be preset, for example, 0.5°C, and the temperature difference between the actual and target junction temperatures can be determined. This temperature difference is then compared to the temperature difference threshold. If the temperature difference between the actual and target junction temperatures exceeds the preset target junction temperature, the chip's actual junction temperature does not meet the conditions for power consumption testing. Therefore, the target cooling temperature of the cooling equipment is adjusted to reduce the temperature difference between the actual and target junction temperatures until it is less than or equal to the temperature difference threshold.

[0056] Step 204: In response to the temperature difference between the actual junction temperature and the target junction temperature being less than or equal to the temperature difference threshold, determine the power supply parameters of the chip.

[0057] The power supply parameters of the chip can include the voltage values ​​and current values ​​corresponding to the multiple target power rails that power the chip.

[0058] In some embodiments, if the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to a temperature difference threshold, it indicates that the actual junction temperature of the chip fluctuates near the target junction temperature. Therefore, the actual junction temperature of the chip meets the conditions for power consumption testing, and the power supply parameters of the chip can be determined. For example, if the target junction temperature is 120°C and the temperature difference threshold is 0.5°C, then if the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold, it indicates that the actual junction temperature fluctuates within the range of 120 ± 0.5°C. This allows for accurate determination of the power supply parameters corresponding to the chip's operating state under target load parameters and target junction temperature, which is beneficial for accurately determining the TDP (Total Power Required) of the chip under extreme high temperatures and rated loads.

[0059] Step 205: Based on the chip's power supply parameters, determine the power consumption value corresponding to the chip's operating state under the target load parameters.

[0060] In some embodiments, the power consumption value corresponding to the chip's operating state under target load parameters and target junction temperature can be determined based on the chip's power supply parameters, i.e., the chip's TDP power consumption value can be determined. For example, the chip's power consumption value can be determined based on the voltage values ​​and current values ​​corresponding to the multiple target power rails supplying power to the chip.

[0061] The implementation of step 205 will be further explained below with reference to the accompanying drawings.

[0062] The method for determining chip power consumption provided in this disclosure involves determining the target load parameters of the chip during operation, enabling the chip to operate based on these parameters, and determining the actual junction temperature of the chip under the target load parameters. Then, in response to a temperature difference between the actual junction temperature and a preset target junction temperature exceeding a temperature difference threshold, the target cooling temperature of the cooling device is adjusted until the temperature difference between the actual and target junction temperatures is less than or equal to the temperature difference threshold. This causes the actual junction temperature of the chip to fluctuate near the target junction temperature, thus meeting the conditions for power consumption testing. Finally, in response to a temperature difference between the actual and target junction temperatures being less than or equal to the temperature difference threshold, the power supply parameters corresponding to the chip's operation under the target load parameters and target junction temperature are accurately obtained. Based on these power supply parameters, the power consumption value corresponding to the chip's operation under the target load parameters can be accurately determined. Therefore, the method for determining chip power consumption provided in this disclosure improves the accuracy of chip power consumption testing and obtains the true power consumption of the chip operating in the target device.

[0063] Figure 3This is a flowchart illustrating step 203 of a method for determining chip power consumption provided in an exemplary embodiment of this disclosure. In some embodiments, such as Figure 3 As shown above, in the above Figure 2 Based on the illustrated embodiment, step 203 may include the following steps:

[0064] Step 2031: In response to the temperature difference between the actual junction temperature and the target junction temperature being greater than the temperature difference threshold, determine the temperature adjustment amount based on the magnitude of the temperature difference between the actual junction temperature and the target junction temperature.

[0065] In some embodiments, if the actual junction temperature is lower than the target junction temperature, the temperature adjustment amount for increasing the target cooling temperature can be determined based on the temperature difference between the actual and target junction temperatures. If the actual junction temperature is higher than the target junction temperature, the temperature adjustment amount for decreasing the target cooling temperature can be determined based on the temperature difference between the actual and target junction temperatures. Exemplarily, the temperature difference between the actual and target junction temperatures is correlated with the temperature adjustment amount; for example, the larger the temperature difference, the larger the temperature adjustment amount, and vice versa.

[0066] In some embodiments, the difference between the actual junction temperature and the target junction temperature can be used as the temperature difference between the actual junction temperature and the target junction temperature. Alternatively, the difference between the target junction temperature and the actual junction temperature can also be used as the temperature difference between the actual junction temperature and the target junction temperature. Of course, the absolute value of the difference between the actual junction temperature and the target junction temperature or the absolute value of the difference between the target junction temperature and the actual junction temperature can also be used as the temperature difference between the actual junction temperature and the target junction temperature. This disclosure does not limit this aspect.

[0067] In some embodiments, a correspondence between multiple temperature differences and multiple temperature adjustment amounts can be preset, and based on the correspondence, a temperature adjustment amount corresponding to the temperature difference between the actual junction temperature and the target junction temperature can be determined.

[0068] Step 2032: Based on the temperature adjustment amount, adjust the target cooling temperature until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold.

[0069] In some embodiments, the target cooling temperature can be adjusted based on the current target cooling temperature and the temperature adjustment amount to determine the adjusted target cooling temperature, and the cooling device can be operated based on the adjusted target cooling temperature. Then, steps 2031 and 2032 are iteratively executed until the temperature difference between the actual junction temperature of the chip and the target junction temperature is less than or equal to a temperature difference threshold.

[0070] In some embodiments, the current target cooling temperature can be increased or decreased by a temperature adjustment amount to obtain the adjusted target cooling temperature. For example, if the temperature adjustment amount is an increase of 5°C, the current target cooling temperature can be increased by 5°C to obtain the adjusted target cooling temperature. If the temperature adjustment amount is a decrease of 5°C, the current target cooling temperature can be decreased by 5°C to obtain the adjusted target cooling temperature.

[0071] For example, taking a liquid cooling device as an example, operating the cooling device based on a target cooling temperature means controlling the coolant temperature of the liquid cooling device to the target cooling temperature. Accordingly, adjusting the target cooling temperature is equivalent to adjusting the coolant temperature of the liquid cooling device.

[0072] In this embodiment, a temperature adjustment amount is determined based on the temperature difference between the actual junction temperature and the target junction temperature. Based on the temperature adjustment amount, the target cooling temperature is adjusted until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to a temperature difference threshold. This allows the actual junction temperature of the chip to fluctuate near the target junction temperature, meeting the conditions for power consumption testing of the chip, improving the accuracy of chip power consumption testing, and obtaining the true power consumption of the chip operating in the target device.

[0073] Figure 4 This is a flowchart illustrating step 204 of a method for determining chip power consumption provided in an exemplary embodiment of this disclosure. In some embodiments, such as Figure 4 As shown above, in the above Figure 2 Based on the illustrated embodiment, step 204 may include the following steps:

[0074] Step 2041: In response to the temperature difference between the actual junction temperature and the target junction temperature being less than or equal to the temperature difference threshold, the voltage difference across the sampling resistors connected to each of the multiple target power rails and the corresponding voltage values ​​of each of the multiple target power rails are collected.

[0075] The target power rail refers to the power rail on the circuit board that supplies power to the chip.

[0076] In some embodiments, the voltage difference across the sampling resistor connected to each target power rail can be acquired using a sampling device. For example, the sampling device can be an ADC sampling device, which can perform analog-to-digital conversion on the acquired voltage differences to obtain the digital signal corresponding to the voltage difference, and then transmit the digital signal to an electronic device.

[0077] In some embodiments, the voltage values ​​corresponding to each of the multiple target power rails can be acquired from the power supply devices corresponding to the multiple target power rails. For example, the power supply devices can be electrically connected to electronic devices, and the electronic devices can obtain the voltage values ​​corresponding to each of the multiple target power rails from the power supply devices.

[0078] Step 2042: Based on the voltage difference across the sampling resistors connected to each of the multiple target power rails and the resistance value of the sampling resistors connected to each of the multiple target power rails, determine the current value corresponding to each of the multiple target power rails.

[0079] Since resistors have specific specifications, the resistance value and other parameters of each specification are known. Therefore, the resistance value of the sampling resistor can be determined based on the specifications of the sampling resistor. That is, the resistance values ​​of the sampling resistors connected to each of the multiple target power rails are known.

[0080] In some embodiments, for each sampling resistor, the current value corresponding to the target power rail where the sampling resistor is located can be determined based on the voltage difference across the sampling resistor and the resistance value of the sampling resistor. For example, the current value corresponding to the target power rail where the sampling resistor is located can be obtained by dividing the voltage difference across the sampling resistor by the resistance value of the sampling resistor.

[0081] The chip's power supply parameters include the voltage values ​​and current values ​​corresponding to each of the multiple target power rails.

[0082] The method provided in this disclosure can collect the voltage difference across multiple target power rails by setting sampling resistors on multiple target power rails. In this way, the current value corresponding to each of the multiple target power rails can be accurately calculated based on the voltage difference across each of the multiple sampling resistors and the resistance value of the multiple sampling resistors. This allows for a more accurate determination of the chip's power supply parameters, improves the accuracy of chip power consumption testing, and obtains the chip's actual power consumption when operating in the target device.

[0083] Figure 5 This is a flowchart illustrating step 205 of a method for determining chip power consumption provided in an exemplary embodiment of this disclosure. In some embodiments, such as Figure 5 As shown above, in the above Figure 4 Based on the illustrated embodiment, step 205 may include the following steps:

[0084] Step 2051: Based on the voltage values ​​and current values ​​corresponding to the multiple target power rails in the chip's power supply parameters, determine the power consumption values ​​corresponding to the multiple target power rails.

[0085] In some embodiments, for any target power rail i among a plurality of target power rails, the power consumption value Pi corresponding to target power rail i can be determined based on the product of the voltage value Vi corresponding to target power rail i and the current value Ii corresponding to target power rail i. For example, Pi = Vi × Ii.

[0086] Step 2052: Based on the power consumption values ​​corresponding to each of the multiple target power rails, determine the measurable power consumption value corresponding to the chip's operating state under the target load parameters.

[0087] In some embodiments, the power consumption of a chip may include measurable power consumption and non-measurable power consumption. Measurable power consumption refers to power consumption that can be measured by means of measurement, such as the power consumption of each functional module in the chip powered by a target power rail connected in series with a sampling resistor. Non-measurable power consumption refers to power consumption that cannot be measured by means of measurement, such as the power consumption of each functional module in the chip powered by other power rails, where other power rails refer to power rails without a connected sampling resistor.

[0088] In some embodiments, the measurable power consumption value corresponding to the chip's operating state under target load parameters can be determined based on the sum of the power consumption values ​​corresponding to each of the multiple target power rails. For example, for target power rails 1 to n, where n is an integer greater than 1, the measurable power consumption value...

[0089] Step 2053: Based on the power consumption simulation results of the chip, determine the unmeasurable power consumption value corresponding to the chip operating under the target load parameters.

[0090] In some embodiments, a chip power consumption simulation tool can be used to establish a power consumption simulation model for the chip, and simulation parameters such as the chip's load and junction temperature can be set. Based on the power consumption simulation model and simulation parameters, the chip's power consumption is simulated and analyzed to obtain the chip's power consumption simulation results. Based on the power consumption simulation results, the power consumption values ​​of each functional module in the chip powered by a power rail without a sampling resistor in series are determined, which are used as the unmeasurable power consumption values ​​corresponding to the chip's operating state under the target load parameters.

[0091] Step 2054: Based on the measurable power consumption value and the non-measurable power consumption value, determine the power consumption value corresponding to the chip's operating state under the target load parameters.

[0092] In some embodiments, the power consumption value P corresponding to the chip's operating state under the target load parameters can be determined based on the sum of the measurable power consumption value Pc and the non-measurable power consumption value Pk. For example,

[0093] The method provided in this disclosure not only determines the measurable power consumption value of the chip under the target load parameters based on the power consumption values ​​corresponding to each of the multiple target power rails, but also determines the unmeasurable power consumption value of the chip under the target load parameters based on the power consumption simulation results of the chip. Then, based on the measurable and unmeasurable power consumption values, the power consumption value of the chip under the target load parameters is determined more accurately, thereby improving the accuracy of chip power consumption testing and obtaining the actual power consumption of the chip in the target device.

[0094] Figure 6 This is a flowchart illustrating step 2054 of a method for determining chip power consumption provided in an exemplary embodiment of this disclosure. In some embodiments, such as Figure 6 As shown above, in the above Figure 5 Based on the illustrated embodiment, step 2054 may include the following steps:

[0095] Step 20541: Based on the preset target sampling frequency, sample the measurable power consumption value to obtain multiple measurable power consumption sample values ​​corresponding to the measurable power consumption value within the target sampling time.

[0096] Since the power consumption of a chip may fluctuate in real time during operation, a higher target sampling frequency within the target sampling duration is more conducive to obtaining multiple measurable power consumption values, thereby accurately reflecting the power consumption changes during chip operation. Therefore, in some embodiments, a higher target sampling frequency can be set, for example, setting the target sampling frequency to be greater than or equal to a preset frequency threshold. For example, the frequency threshold can be 1000Hz, and the target sampling frequency can be 5000Hz.

[0097] In some embodiments, the target sampling duration can be a preset value or flexibly set according to the target sampling frequency. Where the target sampling frequency is fixed, a longer target sampling duration results in a greater number of measurable power consumption samples collected, thus accurately reflecting power consumption changes during chip operation. Therefore, a longer target sampling duration can be set, for example, a target sampling duration greater than or equal to a preset duration threshold, such as 60 seconds. Exemplarily, the target sampling duration can be 60 seconds, 90 seconds, etc.

[0098] In some embodiments, the electronic device may, based on step 2052, continuously determine the measurable power consumption value of the chip within a target sampling duration, and sample the continuously determined measurable power consumption value of the chip based on a preset target sampling frequency, so as to obtain multiple measurable power consumption sample values ​​corresponding to the measurable power consumption value within the target sampling duration.

[0099] In some embodiments, the sampling device can sample and perform analog-to-digital conversion on the voltage difference across a sampling resistor connected in series on a target power rail based on a target sampling frequency to obtain a voltage difference sample value corresponding to the target sampling frequency, and transmit the voltage difference sample value to the electronic device. The electronic device can determine a current sample value corresponding to the target sampling frequency based on the voltage difference sample value and the resistance value of the sampling resistor, and then determine a power consumption sample value corresponding to the target sampling frequency based on the voltage and current sample values ​​of the target power rail. Based on the power consumption sample values ​​corresponding to each of the multiple target power rails, a measurable power consumption sample value is determined.

[0100] Step 20542: Determine the average measurable power consumption value of the multiple measurable power consumption samples.

[0101] In some embodiments, the average value of multiple measurable power consumption samples within a target sampling period can be calculated, and the average value of the multiple measurable power consumption samples can be used as the average measurable power consumption value.

[0102] Step 20543: Based on the average measurable power consumption value and the unmeasurable power consumption value, determine the power consumption value corresponding to the chip's operating state under the target load parameters.

[0103] In some embodiments, the sum of the average measurable power consumption and the unmeasurable power consumption can be calculated. Based on this sum, the power consumption value corresponding to the chip's operating state under the target load parameters can be determined. For example, the sum of the average measurable power consumption and the unmeasurable power consumption can be used as the power consumption value corresponding to the chip's operating state under the target load parameters. Alternatively, the sum of the average measurable power consumption and the unmeasurable power consumption can be compensated using a preset compensation coefficient or compensation value to obtain the power consumption value corresponding to the chip's operating state under the target load parameters.

[0104] The method provided in this disclosure sampled measurable power consumption values ​​based on a preset target sampling frequency to obtain multiple measurable power consumption sample values, and determined the average measurable power consumption value of the multiple measurable power consumption sample values. This average measurable power consumption value can reflect the true measurable power consumption value of the chip under the target load parameters within the target sampling time. Based on this, and using the average measurable power consumption value and the non-measurable power consumption value, the power consumption value corresponding to the chip under the target load parameters can be determined more accurately, thereby improving the accuracy of the chip power consumption measurement results.

[0105] Figure 7 This is a second flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure. In some embodiments, such as Figure 7 As shown above, in the above Figure 2 Based on the illustrated embodiment, the following steps may be included before step 201:

[0106] Step 701: Perform thermal simulation on multiple electrical components on the circuit board, excluding the chip, to identify the first electrical component with an over-temperature risk.

[0107] Among them, electrical component overheating refers to the temperature value of an electrical component during operation exceeding its corresponding upper limit of operating temperature.

[0108] In some embodiments, thermal simulation software can be used to perform thermal simulations on multiple electrical components on a circuit board, excluding the chip. For example, the thermal simulation software can be used to simulate the operating state of a chip in an automotive domain controller, such as simulating the installation state of the circuit board and housing, simulating an ambient temperature greater than or equal to the target ambient temperature during the operation of the target device, simulating a cooling temperature of the cooling device greater than or equal to the target cooling temperature, simulating the electrical and thermal performance of each electrical component on the circuit board, and simulating the operation of the chip in the target device under target load parameters and target junction temperature conditions, to obtain thermal simulation results for multiple electrical components. The thermal simulation results for multiple electrical components may include the maximum thermal simulation temperature value corresponding to each of the multiple electrical components during the thermal simulation.

[0109] In some embodiments, if the maximum thermal simulation temperature value of an electrical component is greater than its corresponding upper limit of operating temperature, it can be determined that the electrical component has an over-temperature risk, and thus the electrical component can be identified as the first electrical component.

[0110] Step 702: Based on the relative distance between the first electrical component and the housing, determine the heat dissipation method corresponding to the first electrical component. The heat dissipation method includes at least: setting a thermally conductive metal between the first electrical component and the housing, and / or adjusting the thermal conductivity of the interface material between the first electrical component and the housing.

[0111] In some embodiments, a distance threshold can be set, for example, a distance threshold of 0.8 mm, and the heat dissipation method corresponding to the first electrical component can be determined based on the relationship between the relative distance between the first electrical component and the housing and the distance threshold. For example, if the relative distance between the first electrical component and the housing is greater than the distance threshold, the heat dissipation method is determined to be to place a thermally conductive metal between the first electrical component and the housing; if the relative distance between the first electrical component and the housing is greater than or equal to the distance threshold, the thermal conductivity of the interface material between the first electrical component and the housing is adjusted.

[0112] For example, the way to provide heat-conducting metal between the first electrical component and the housing is to provide a metal boss at the position of the housing relative to the first electrical component, so as to reduce the relative distance between the first electrical component and the housing, thereby improving the heat transfer efficiency between the first electrical component and the housing.

[0113] For example, adjusting the thermal conductivity of the interface material between the first electrical component and the housing can increase the thermal conductivity of the interface material between the first electrical component and the housing, thereby improving the heat transfer efficiency between the first electrical component and the housing.

[0114] In this embodiment of the disclosure, the heat dissipation method corresponding to the first electrical component is determined based on the relative distance between the first electrical component and the housing, which can improve the heat conduction efficiency between the first electrical component and the housing, thereby reducing the operating temperature of the first electrical component and eliminating the risk of overheating of the first electrical component.

[0115] Figure 8 This is a third flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure. In some embodiments, such as Figure 8 As shown above, in the above Figure 2 Based on the illustrated embodiment, the following steps may be included before step 201:

[0116] Step 801: Based on the electrical design parameters of the chip, determine the maximum allowable current value for each of the multiple target power rails.

[0117] The electrical design parameters of the chip can be determined during the chip design phase. These parameters may include the maximum current values ​​corresponding to each of the multiple target power rails.

[0118] Step 802: Based on the distances between the housing and the respective target power rails, determine the maximum size of the sampling resistors connected to each of the multiple target power rails.

[0119] In some embodiments, the size of the free space between the housing and the multiple target power rails can be determined based on the distances between the housing and each of the multiple target power rails, and the maximum size of the sampling resistor connected to each of the multiple target power rails can be determined based on the size of the free space between the housing and the multiple target power rails. For example, for any target power rail, the maximum size of the sampling resistor connected to that target power rail is less than or equal to the size of the free space between the housing and that target power rail.

[0120] Step 803: Based on the maximum allowable current value of each of the multiple target power rails and the maximum size of the sampling resistors connected to each of the multiple target power rails, determine the specifications of the sampling resistors connected to each of the multiple target power rails.

[0121] The specifications of the sampling resistor may include at least the rated current, resistance value, and size.

[0122] In some embodiments, for any target power rail, the rated current of the sampling resistor can be determined based on the maximum current value allowed to pass through the target power rail. For example, the rated current of the sampling resistor is greater than or equal to the aforementioned maximum current value.

[0123] In some embodiments, for any target power rail, the size of the sampling resistor can be determined based on the maximum size of the sampling resistor connected to the target power rail. For example, the size of the sampling resistor is less than or equal to the aforementioned maximum size.

[0124] In some embodiments, a resistor with a rated current greater than or equal to the aforementioned maximum current value and a size less than or equal to the aforementioned maximum size can be selected from existing resistor specifications as the sampling resistor.

[0125] In some embodiments, if the dimensions of all resistors whose rated current is greater than or equal to the aforementioned maximum current value are greater than the aforementioned maximum size, then the resistor with the smallest size is selected from the resistors whose rated current is greater than or equal to the aforementioned maximum current value as the sampling resistor.

[0126] In some embodiments, the specifications of the sampling resistor may also include resistance accuracy, temperature coefficient, etc. Accordingly, a resistor with a rated current greater than or equal to the aforementioned maximum current value, a size less than or equal to the aforementioned maximum size, a resistance accuracy higher than a preset accuracy threshold (or the highest resistance accuracy) and a temperature coefficient lower than a preset coefficient threshold (or the lowest temperature coefficient) can be selected from resistors with existing specifications as the sampling resistor.

[0127] The method provided in this disclosure determines the specifications of the sampling resistors connected to the target power rails based on the maximum allowable current value of each target power rail and the maximum size of the sampling resistors connected to each target power rail. This ensures that the sampling resistors can be connected to the corresponding target power rails and that the sampling resistors will not be damaged during chip operation, thereby improving the accuracy of chip power consumption testing and obtaining the actual power consumption of the chip when it is running in the target device.

[0128] Figure 9 This is a fourth flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure. In some embodiments, such as Figure 9 As shown above, in the above Figure 8 Based on the illustrated embodiment, the following steps may be included after step 803:

[0129] Step 901: Based on the specifications of the sampling resistors connected to each of the multiple target power rails, determine the actual size of the sampling resistors connected to each of the multiple target power rails.

[0130] Since each type of resistor has a corresponding size, the actual size of the sampling resistor can be determined by determining its specifications.

[0131] Step 902: Based on the actual dimensions of the sampling resistors connected to each of the multiple target power rails and the corresponding distances between the housing and the multiple target power rails, determine the structural adjustment method of the housing.

[0132] In some embodiments, the area and amount of positional interference between the housing and the sampling resistor can be determined based on the actual size of the sampling resistor connected to each of the multiple target power rails and the distance between the housing and the multiple target power rails respectively. Based on the area and amount of positional interference between the housing and the sampling resistor, the adjustment method of the housing structure can be determined.

[0133] The adjustment method of the shell structure may include at least: based on the amount of interference in the area on the shell that interferes with the sampling resistor, removing the shell structure in the area that interferes with the sampling resistor to eliminate the position interference.

[0134] The method provided in this disclosure determines the structural adjustment method of the housing based on the actual size of the sampling resistors connected to each of the multiple target power rails and the corresponding distances between the housing and the multiple target power rails. This eliminates positional interference between the sampling resistors and the housing, allowing the sampling resistors to be connected in series with the corresponding target power rails when the circuit board is placed inside the housing. This ensures that power consumption testing of the chip can be performed when the circuit board is placed inside the housing, thereby improving the accuracy of the chip's power consumption test results.

[0135] Figure 10 This is a fifth flowchart illustrating a method for determining chip power consumption provided in an exemplary embodiment of this disclosure. In some embodiments, such as Figure 10 As shown above, in the above Figure 8 Based on the illustrated embodiment, the following steps may be included after step 803:

[0136] Step 1001: Based on the positional relationship between the sampling resistors connected to each of the multiple target power rails and multiple electrical components on the circuit board (excluding the chip), identify the second electrical component among the multiple electrical components that poses an electrical insulation risk.

[0137] Among them, the electrical insulation risk of electrical components refers to the unexpected electrical connection or current leakage between the electrical components and the sampling resistor when the components are energized.

[0138] In some embodiments, based on the positional relationship between the sampling resistors connected to the target power rails and multiple electrical components on the circuit board other than the chip, electrical components that have positional interference with the sampling resistors, physical contact with the sampling resistors, or whose distance from the sampling resistors is less than a corresponding threshold can be identified as second electrical components.

[0139] Step 1002: Based on the type of the second electrical component, determine the electrical insulation method corresponding to the second electrical component, wherein the electrical insulation method includes at least: removing the second electrical component, and / or, providing an insulating medium between the sampling resistor and the second electrical component.

[0140] Different types of second electrical components can correspond to different electrical insulation connection methods. For example, if the type of the second electrical component is a capacitor, the corresponding electrical insulation method may be to remove the second electrical component; if the type of the second electrical component is other than a capacitor, the corresponding electrical insulation method may be to provide an insulating medium between the sampling resistor and the second electrical component.

[0141] The method provided in this disclosure determines the electrical insulation method corresponding to the second electrical component based on the type of the second electrical component that has an electrical insulation risk. This can eliminate the electrical insulation risk of the second electrical component, ensure the accuracy of various measurement results during chip operation, improve the accuracy of chip power consumption testing, and obtain the actual power consumption of the chip when it is running in the target device.

[0142] Exemplary device

[0143] Figure 11 This is a schematic diagram of an apparatus for determining chip power consumption provided in an exemplary embodiment of this disclosure. The apparatus 1100 of this embodiment can be used to implement the corresponding method embodiments of this disclosure. Figure 11 As shown, the device 1100 may include:

[0144] The first determining module 1110 is used to determine the target load parameters of the chip in its operating state.

[0145] The second determining module 1120 is used to determine the actual junction temperature of the chip during operation.

[0146] The adjustment module 1130 is used to adjust the target cooling temperature of the cooling device in response to the temperature difference between the actual junction temperature and the preset target junction temperature being greater than the temperature difference threshold, until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold.

[0147] The third determining module 1140 is used to determine the power supply parameters of the chip in response to the temperature difference between the actual junction temperature and the target junction temperature being less than or equal to a temperature difference threshold.

[0148] The fourth determining module 1150 is used to determine the power consumption value corresponding to the chip's operating state under the target load parameters based on the chip's power supply parameters.

[0149] Figure 12 This is another schematic diagram of a device for determining chip power consumption provided in an exemplary embodiment of the present disclosure.

[0150] like Figure 12 As shown above, in the above Figure 11Based on the illustrated embodiment, the adjustment module 1130 includes: a first determining unit 1131, configured to determine a temperature adjustment amount based on the magnitude of the temperature difference between the actual junction temperature and the target junction temperature in response to a temperature difference threshold between the actual junction temperature and the target junction temperature; and a first adjusting unit 1132, configured to adjust the target cooling temperature based on the temperature adjustment amount until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold.

[0151] like Figure 12 As shown above, in the above Figure 11 Based on the illustrated embodiment, the third determining module 1140 includes: a first acquisition unit 1141, configured to acquire the voltage difference across the sampling resistors connected to each of the multiple target power rails and the corresponding voltage value of each of the multiple target power rails in response to a temperature difference between the actual junction temperature and the target junction temperature being less than or equal to a temperature difference threshold, wherein the target power rails refer to the power rails on the circuit board that supply power to the chip. A second determining unit 1142 is configured to determine the corresponding current value of each of the multiple target power rails based on the voltage difference across the sampling resistors connected to each of the multiple target power rails and the resistance value of the sampling resistors connected to each of the multiple target power rails. The chip's power supply parameters include the corresponding voltage value and the corresponding current value of each of the multiple target power rails.

[0152] like Figure 12 As shown above, in the above Figure 11 Based on the illustrated embodiment, the fourth determining module 1150 includes: a third determining unit 1151, used to determine the power consumption value corresponding to each of the multiple target power rails based on the voltage value and current value corresponding to each of the multiple target power rails in the chip's power supply parameters; a fourth determining unit 1152, used to determine the measurable power consumption value corresponding to the chip under the target load parameters based on the power consumption value corresponding to each of the multiple target power rails; a fifth determining unit 1153, used to determine the unmeasurable power consumption value corresponding to the chip under the target load parameters based on the power consumption simulation results of the chip; and a sixth determining unit 1154, used to determine the power consumption value corresponding to the chip under the target load parameters based on the measurable and unmeasurable power consumption values.

[0153] like Figure 12 As shown above, in the above Figure 11 Based on the illustrated embodiment, the sixth determining unit 1154 is specifically configured to: sample the measurable power consumption value based on a preset target sampling frequency to obtain multiple measurable power consumption sample values ​​corresponding to the measurable power consumption value within a target sampling duration; determine the average measurable power consumption value of the multiple measurable power consumption sample values; and determine the power consumption value corresponding to the chip operating under the target load parameters based on the average measurable power consumption value and the non-measurable power consumption value.

[0154] like Figure 12 As shown above, in the above Figure 11 Based on the illustrated embodiment, the device 1100 further includes: a simulation module 1160, used to perform thermal simulation on multiple electrical components on the circuit board excluding the chip, and to identify a first electrical component among the multiple electrical components that has an overheating risk. A fifth determination module 1170 is used to determine the heat dissipation method corresponding to the first electrical component based on the relative distance between the first electrical component and the housing. The heat dissipation method includes at least: providing a thermally conductive metal between the first electrical component and the housing, and / or adjusting the thermal conductivity of the interface material between the first electrical component and the housing.

[0155] like Figure 12 As shown above, in the above Figure 11 Based on the embodiment shown, the device 1100 further includes: a sixth determining module 1180, used to determine the maximum allowable current value of each of the multiple target power rails based on the electrical design parameters of the chip, to determine the maximum size of the sampling resistors connected to each of the multiple target power rails based on the distance between the housing and each of the multiple target power rails, and to determine the specifications of the sampling resistors connected to each of the multiple target power rails based on the maximum allowable current value of each of the multiple target power rails and the maximum size of the sampling resistors connected to each of the multiple target power rails.

[0156] like Figure 12 As shown above, in the above Figure 11 Based on the embodiment shown, the device 1100 further includes: a seventh determining module 1185, used to determine the actual size of the sampling resistors connected to the multiple target power rails based on the specifications of the sampling resistors connected to the multiple target power rails, and to determine the structural adjustment method of the housing based on the actual size of the sampling resistors connected to the multiple target power rails and the distance between the housing and the multiple target power rails respectively.

[0157] like Figure 12 As shown above, in the above Figure 11 Based on the embodiment shown, the device 1100 further includes: an eighth determining module 1190, used to determine a second electrical component with electrical insulation risk among the multiple electrical components based on the positional relationship between the sampling resistors connected to the multiple target power rails and the multiple electrical components on the circuit board excluding the chip; and to determine the electrical insulation method corresponding to the second electrical component based on the type of the second electrical component, wherein the electrical insulation method includes at least: removing the second electrical component, and / or providing an insulating medium between the sampling resistor and the second electrical component.

[0158] The beneficial technical effects corresponding to the exemplary embodiments of this device can be found in the corresponding beneficial technical effects of the exemplary method section above, and will not be repeated here.

[0159] Exemplary electronic devices

[0160] Figure 13 A structural diagram of an electronic device provided in an embodiment of this disclosure includes at least one processor 171 and a memory 172.

[0161] The processor 171 may be a central processing unit (CPU) or other form of processing unit with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 170 to perform desired functions.

[0162] The memory 172 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 171 may execute one or more computer program instructions to implement the methods for determining chip power consumption and / or other desired functions of the various embodiments of this disclosure described above.

[0163] In one example, the electronic device 170 may also include an input device 173 and an output device 174, which are interconnected via a bus system and / or other forms of connection mechanism (not shown).

[0164] The input device 173 may also include, for example, a keyboard, a mouse, etc.

[0165] The output device 174 can output various information to the outside, including, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0166] Of course, for the sake of simplicity, Figure 13 Only some of the components of the electronic device 170 relevant to this disclosure are shown, omitting components such as buses, input / output interfaces, etc. In addition, the electronic device 170 may include any other suitable components depending on the specific application.

[0167] Exemplary computer program products and computer-readable storage media

[0168] In addition to the methods and apparatus described above, embodiments of this disclosure may also provide a computer program product, including computer program instructions that, when executed by a processor, cause the processor to perform steps in the methods for determining chip power consumption described in the various embodiments of this disclosure in the "Exemplary Methods" section above.

[0169] Computer program products can be written in any combination of one or more programming languages ​​to perform the operations of embodiments of this disclosure. These programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on a user's computing device, partially on a user's computing device, as a standalone software package, partially on a user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0170] Furthermore, embodiments of this disclosure may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform steps in the methods for determining chip power consumption described in the various embodiments of this disclosure in the "Exemplary Methods" section above.

[0171] Computer-readable storage media may take the form of any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may include, but is not limited to, systems, apparatuses, or devices that are electrical, magnetic, optical, electromagnetic, infrared, or semiconductor, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0172] The basic principles of this disclosure have been described above with reference to specific embodiments. However, the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.

[0173] Various modifications and variations can be made to this disclosure without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include such modifications and variations.

Claims

1. A method for determining the power consumption of a chip, wherein the chip is disposed on a circuit board, the circuit board is disposed within a housing, and a cooling device is installed in the housing, the method comprising: Determine the target load parameters of the chip during operation; Determine the actual junction temperature of the chip during operation; In response to the temperature difference between the actual junction temperature and the preset target junction temperature being greater than a temperature difference threshold, the target cooling temperature corresponding to the cooling device is adjusted until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold. In response to the temperature difference between the actual junction temperature and the target junction temperature being less than or equal to the temperature difference threshold, the power supply parameters of the chip are determined; Based on the power supply parameters of the chip, the power consumption value corresponding to the chip under the operating state of the target load parameters is determined.

2. The method according to claim 1, wherein, The step of adjusting the target cooling temperature of the cooling device in response to a temperature difference greater than a preset target junction temperature exceeding a temperature difference threshold, until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold, includes: In response to the temperature difference between the actual junction temperature and the target junction temperature being greater than the temperature difference threshold, a temperature adjustment amount is determined based on the magnitude of the temperature difference between the actual junction temperature and the target junction temperature; Based on the temperature adjustment amount, the target cooling temperature is adjusted until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold.

3. The method according to claim 1, wherein, The step of determining the power supply parameters of the chip in response to a temperature difference between the actual junction temperature and the target junction temperature being less than or equal to the temperature difference threshold includes: In response to the temperature difference between the actual junction temperature and the target junction temperature being less than or equal to the temperature difference threshold, the voltage difference across the sampling resistors connected to each of the multiple target power rails and the corresponding voltage values ​​of each of the multiple target power rails are collected, wherein the target power rails refer to the power rails on the circuit board that supply power to the chip. Based on the voltage difference across the sampling resistor connected to each of the multiple target power rails and the resistance value of the sampling resistor connected to each of the multiple target power rails, the current value corresponding to each of the multiple target power rails is determined. The power supply parameters of the chip include the voltage values ​​and current values ​​corresponding to each of the multiple target power rails.

4. The method according to claim 3, wherein, Determining the power consumption value of the chip under the target load parameters based on the chip's power supply parameters includes: Based on the voltage values ​​and current values ​​corresponding to each of the multiple target power rails in the power supply parameters of the chip, the power consumption value corresponding to each of the multiple target power rails is determined. Based on the power consumption values ​​corresponding to each of the multiple target power rails, the measurable power consumption value corresponding to the chip under the operating state of the target load parameters is determined; Based on the power consumption simulation results of the chip, the unmeasurable power consumption value corresponding to the chip under the operating state of the target load parameters is determined; Based on the measurable power consumption value and the non-measurable power consumption value, the power consumption value corresponding to the chip under the operating state of the target load parameters is determined.

5. The method according to claim 4, wherein, Determining the power consumption value of the chip under the target load parameters based on the measurable power consumption value and the non-measurable power consumption value includes: Based on a preset target sampling frequency, the measurable power consumption value is sampled to obtain multiple measurable power consumption sample values ​​corresponding to the measurable power consumption value within the target sampling duration. Determine the average measurable power consumption value of the plurality of measurable power consumption samples; Based on the average measurable power consumption value and the unmeasurable power consumption value, the power consumption value corresponding to the chip under the operating state of the target load parameters is determined.

6. The method according to claim 1, further comprising, before determining the target load parameters of the chip in its operating state: Thermal simulation was performed on multiple electrical components on the circuit board, excluding the chip, to identify the first electrical component among the multiple electrical components that has an over-temperature risk; Based on the relative distance between the first electrical component and the housing, a heat dissipation method corresponding to the first electrical component is determined. The heat dissipation method includes at least: providing a thermally conductive metal between the first electrical component and the housing, and / or adjusting the thermal conductivity of the interface material between the first electrical component and the housing.

7. The method according to claim 3, further comprising, before determining the target load parameters of the chip in its operating state: Based on the electrical design parameters of the chip, determine the maximum allowable current value for each of the plurality of target power rails; Based on the distances between the housing and the respective target power rails, the maximum size of the sampling resistors connected to the respective target power rails is determined. The specifications of the sampling resistors connected to the target power rails are determined based on the maximum allowable current value of each of the target power rails and the maximum size of the sampling resistors connected to each of the target power rails.

8. The method according to claim 7, further comprising, after determining the specifications of the sampling resistors connected to the plurality of target power rails based on the maximum allowable current value of each of the plurality of target power rails and the maximum size of the sampling resistors connected to each of the plurality of target power rails: Based on the specifications of the sampling resistors connected to each of the multiple target power rails, determine the actual size of the sampling resistors connected to each of the multiple target power rails; Based on the actual dimensions of the sampling resistors connected to the plurality of target power rails and the distances between the housing and the plurality of target power rails respectively, the structural adjustment method of the housing is determined.

9. The method according to claim 7, further comprising, after determining the specifications of the sampling resistors connected to the plurality of target power rails based on the maximum allowable current value of each of the plurality of target power rails and the maximum size of the sampling resistors connected to each of the plurality of target power rails: Based on the positional relationship between the sampling resistors connected to the plurality of target power rails and the plurality of electrical components on the circuit board other than the chip, a second electrical component with electrical insulation risk is identified among the plurality of electrical components; Based on the type of the second electrical component, the corresponding electrical insulation method is determined, wherein the electrical insulation method includes at least: removing the second electrical component, and / or providing an insulating medium between the sampling resistor and the second electrical component.

10. An apparatus for determining the power consumption of a chip, the chip being disposed on a circuit board, the circuit board being disposed within a housing, and a cooling device being installed in the housing, the apparatus comprising: The first determining module is used to determine the target load parameters of the chip in its operating state; The second determining module is used to determine the actual junction temperature of the chip during operation. The adjustment module is used to adjust the target cooling temperature of the cooling device in response to the temperature difference between the actual junction temperature and the preset target junction temperature being greater than the temperature difference threshold, until the temperature difference between the actual junction temperature and the target junction temperature is less than or equal to the temperature difference threshold. The third determining module is used to determine the power supply parameters of the chip in response to the temperature difference between the actual junction temperature and the target junction temperature being less than or equal to the temperature difference threshold. The fourth determining module is used to determine the power consumption value of the chip under the operating state of the target load parameters based on the power supply parameters of the chip.

11. A computer-readable storage medium storing a computer program that is executed by a processor for performing the method for determining chip power consumption as described in any one of claims 1-9.

12. An electronic device, the electronic device comprising: processor; Memory used to store the processor's executable instructions; The processor is configured to read the executable instructions from the memory and execute the instructions to implement the method for determining chip power consumption as described in any one of claims 1-9.

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