Battery protection chip, charging and discharging management circuit, battery protection board and electronic equipment

Abstract

The invention discloses a battery protection chip, a charging and discharging management circuit, a battery protection board and electronic equipment. The battery protection chip comprises a voltage detection pin, a discharging control pin, a mode control pin, a pull-up circuit, a charger detection circuit and a logic control circuit, detection and control logic are integrated in the battery protection chip, so that high-precision charger identification and state management are realized. Moreover, a peripheral circuit only needs the most basic MOS tubes and resistors, so that the system design is greatly simplified, the cost and the area are reduced, and meanwhile, the problem of detection precision caused by parameter deviation of discrete components and the problem of heating of a diode charging path in a traditional scheme are avoided.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to a battery protection chip, a charge / discharge management circuit, a battery protection board, and an electronic device. Background Technology

[0002] With the increasing popularity of portable electronic devices, the protection functions of battery management systems are becoming increasingly important. Among these, preventing the battery from discharging simultaneously while charging is a critical protection requirement, as this abnormal operating state can seriously affect battery life and pose safety hazards.

[0003] Existing technologies for implementing charge-discharge isolation control generally have some shortcomings. For example, they rely on a large number of external discrete components, making the detection accuracy susceptible to the influence of component parameters, resulting in high system costs, and causing problems such as high power consumption and severe heat generation along the charging path.

[0004] Therefore, how to achieve reliable charge and discharge isolation control through a simpler and more efficient solution has become a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0005] This invention provides a battery protection chip, a charge / discharge management circuit, a battery protection board, and an electronic device to solve the problems of high cost and low accuracy in existing battery protection solutions.

[0006] A battery protection chip includes a voltage detection pin, a discharge control pin, a mode control pin, a pull-up circuit, a charger detection circuit, and a logic control circuit; The pull-up circuit is connected between the internal power supply and the voltage detection pin. The control terminal of the pull-up circuit is connected to the mode control pin and is used to turn on or off according to the level of the mode control pin. The input terminal of the charger detection circuit is connected to the voltage detection pin, and is used to output a charger connection status signal according to the voltage status of the voltage detection pin; The logic control circuit is connected to the output terminal of the charger detection circuit and the mode control pin. When the charger connection status signal indicates that the charger is connected, it outputs a first control level through the mode control pin and outputs a shutdown signal through the discharge control pin to shut down the external discharge circuit. The first control level is used to shut down the pull-up circuit and simultaneously turn on the external charging circuit.

[0007] Furthermore, the charger detection circuit includes a first comparator and a second comparator; The non-inverting input of the first comparator is connected to the voltage detection pin, the inverting input of the first comparator is connected to the first positive reference voltage, and the output of the first comparator is connected to the logic control circuit. The inverting input of the second comparator is connected to the voltage detection pin, the non-inverting input of the second comparator is connected to the first negative reference voltage, and the output of the second comparator is connected to the logic control circuit.

[0008] Furthermore, the logic control circuit is used to determine that the charger connection status signal indicates that the charger has been connected when the first comparator outputs a low level and the second comparator outputs a high level.

[0009] Furthermore, the battery protection chip also includes a current detection pin, a signal switching circuit, and a current detection module; The signal switching circuit is connected to the mode control pin, the voltage detection pin, and the current detection pin, respectively. The input terminal of the current detection module is connected to the signal switching circuit, and the output terminal of the current detection module is connected to the logic control circuit. The signal switching circuit is used to selectively connect the input terminal of the current detection module to the voltage detection pin or the current detection pin according to the level of the mode control pin.

[0010] Furthermore, the current detection module includes a third comparator; The first input terminal of the third comparator is selectively connected to the voltage detection pin or the current detection pin through the signal switching circuit. The second input terminal of the third comparator is used to receive the second negative reference voltage. The output terminal of the third comparator is connected to the logic control circuit.

[0011] Furthermore, the logic control circuit is configured to maintain the output of the first control level by the mode control pin after the first control level is output by the mode control pin, if the third comparator outputs a first current signal. Specifically, when the voltage at the first input terminal of the third comparator is less than the second negative reference voltage, the third comparator outputs the first current signal.

[0012] A charge / discharge management circuit includes a charge-discharge inhibiting MOSFET, a charge control MOSFET, a discharge control MOSFET, and the aforementioned battery protection chip. The control terminal of the charge-discharge-inhibit MOS transistor is connected to the mode control pin of the battery protection chip; The control terminal of the charging control MOS transistor is connected to the charging control pin of the battery protection chip; The control terminal of the discharge control MOS transistor is connected to the discharge control pin of the battery protection chip. The charging-discharge-inhibiting MOSFET and the charging-control MOSFET are connected in series between the negative terminal of the battery module and the negative terminal of the charging module to form the external charging circuit. One end of the discharge control MOS transistor is coupled to the negative terminal of the battery module, and the other end is connected to the negative terminal of the charging terminal to form the external discharge circuit.

[0013] Furthermore, the charge / discharge management circuit also includes a first current-sensing resistor; The first end of the first current sensing resistor is connected to the negative terminal of the battery module, and the second end of the first current sensing resistor is connected to the source of the charge-discharge-inhibiting MOS transistor and the source of the discharge-controlling MOS transistor. The current detection pin of the battery protection chip is connected to the source of the discharge control MOSFET and the source of the charge-discharge inhibit MOSFET.

[0014] A battery protection board includes a substrate and the aforementioned charge / discharge management circuit.

[0015] An electronic device includes the above-described charge / discharge management circuit.

[0016] This invention provides a battery protection chip, a charge / discharge management circuit, a battery protection board, and electronic equipment. By integrating detection and control logic within the battery protection chip, high-precision charger identification and status management are achieved. Furthermore, the peripheral circuitry requires only basic MOSFETs and resistors, greatly simplifying system design, reducing cost and area, and avoiding detection accuracy issues caused by discrete component parameter deviations and heat generation problems in the diode charging path, which are common in traditional solutions. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of a battery protection chip 1 in one embodiment of the present invention.

[0019] In the diagram: 1. Battery protection chip; 11. Pull-up circuit; 12. Charger detection circuit; 13. Logic control circuit; 14. Current detection module. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] It should be understood that the invention can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0022] To fully understand this invention, detailed structures and steps will be presented in the following description to illustrate the technical solution proposed by this invention. Preferred embodiments of the invention are described in detail below; however, in addition to these detailed descriptions, the invention may have other embodiments.

[0023] like Figure 1 As shown, this embodiment provides a battery protection chip 1, applied in a charge / discharge management circuit. The charge / discharge management circuit includes a charge / discharge control circuit, the battery protection chip 1, a first current sensing resistor R2, and a first voltage sensing resistor R3. The charge / discharge control circuit includes a charge-inhibit-discharge MOSFET NM1, a charge-control MOSFET NM3, and a discharge-control MOSFET NM2. The battery protection chip 1 includes a voltage detection pin VM, a mode control pin CHCT, a charge control pin CO, a discharge control pin DO, and a current sensing pin RSP.

[0024] For example, a charge-discharge inhibit MOSFET NM1 and a charge control MOSFET NM3 are connected in series between the negative terminal of the battery module and the negative charging terminal CH- to form an external charging circuit; a discharge control MOSFET NM2 is connected between the second end of the first current sensing resistor R2 and the negative discharge terminal P- to form an external discharge circuit, i.e., one end of the discharge control MOSFET NM2 is coupled to the negative terminal of the battery module through the first current sensing resistor R2, and the other end is connected to the negative charging terminal P-. The first current sensing resistor R2 is connected in series between the negative terminal of the battery module and the source of the charge-discharge inhibit MOSFET NM1; the current sensing pin RSP of the battery protection chip 1 is connected to the source of the discharge control MOSFET NM2 and the source of the charge-discharge inhibit MOSFET NM1, so that the battery protection chip 1 obtains the charging current or the discharging current through the current sensing pin RSP. A first voltage sensing resistor R3 is connected in series between the voltage detection pin VM of the battery protection chip 1 and the negative charging terminal CH-.

[0025] The mode control pin CHCT of battery protection chip 1 is connected to the control terminal of charging-discharging-inhibiting MOSFET NM1; the charging control pin CO of battery protection chip 1 is connected to the control terminal of charging-control MOSFET NM3; the discharging control pin DO of battery protection chip 1 is connected to the control terminal of discharging-control MOSFET NM2; and the current detection pin RSP of battery protection chip 1 is connected to the source of charging-discharging-inhibiting MOSFET NM1.

[0026] In one embodiment, the battery protection chip 1 includes a pull-up circuit 11, a charger detection circuit 12, and a logic control circuit 13. The pull-up circuit 11 is connected between the internal power supply and the voltage detection pin VM. The control terminal of the pull-up circuit 11 is connected to the mode control pin CHCT and is used to turn on or off according to the level of the mode control pin CHCT. The input terminal of the charger detection circuit 12 is connected to the voltage detection pin VM and is used to output a charger connection status signal according to the voltage state of the voltage detection pin VM. The logic control circuit 13 is connected to the output terminal of the charger detection circuit 12 and the mode control pin CHCT. When the charger connection status signal indicates that the charger is connected, it outputs a first control level through the mode control pin CHCT and outputs a shutdown signal through the discharge control pin DO to shut down the external discharge circuit. The first control level is used to shut down the pull-up circuit 11 and simultaneously turn on the external charging circuit.

[0027] As an example, pull-up circuit 11 includes a PMOS transistor PM1 and a pull-up resistor R1; PMOS transistor PM1 and pull-up resistor R1 are connected in series between the internal power supply and the voltage detection pin VM. The gate of PMOS transistor PM1 is connected to the mode control pin CHCT, and the voltage detection pin VM is changed by turning on or off according to the level of the mode control pin CHCT. Understandably, this internal power supply is the DC power supply inside the battery protection chip 1, for example, a 4V power supply.

[0028] Specifically, in the initial state, the logic control circuit 13 outputs a second control level on the control mode control pin CHCT. At this level, the pull-up circuit 11 is turned on, thereby pulling the voltage detection pin VM up to the internal power supply voltage through the pull-up resistor R1, forming an initial high potential. On the other hand, the second control level turns off the external charging / discharging inhibit MOSFET NM1 to ensure a smooth discharge circuit. At this time, the charger detection circuit 12 outputs a charger connection status signal indicating that the charger is not connected based on the high potential of the voltage detection pin VM. Optionally, this second control level is the opposite of the first control level; for example, if the first control level is high, the second control level is low.

[0029] When an external charger is connected, the negative potential at the charger's negative terminal forcibly pulls the voltage of the voltage detection pin VM down from a high potential through the first voltage detection resistor R3. The charger detection circuit 12 captures this voltage change in real time and outputs a charger connection status signal indicating that the charger is connected.

[0030] After receiving a charger connection status signal indicating that the charger is connected, the logic control circuit 13, on the one hand, outputs a shutdown signal through the discharge control pin DO to directly shut down the external discharge control MOSFET NM2, thereby cutting off the discharge circuit. On the other hand, it outputs a first control level through the mode control pin CHCT. The first control level triggers two parallel actions: firstly, it shuts down the pull-up circuit 11, removing the clamping of the internal power supply on the voltage detection pin VM, allowing the potential of the voltage detection pin VM to be released and completely determined by the external charger, thus ensuring the accuracy of subsequent detection; secondly, it turns on the external charging disable discharge MOSFET NM1. Simultaneously, the battery protection chip 1 turns on the charging control MOSFET NM3 through the charging control pin CO, thereby establishing a complete charging circuit.

[0031] In this embodiment, high-precision charger identification and status management are achieved by integrating detection and control logic within the battery protection chip 1. Furthermore, the peripheral circuit only requires the most basic MOSFETs and resistors, which greatly simplifies the system design, reduces cost and area, and avoids the detection accuracy problems and heat generation problems of the diode charging path caused by parameter deviations of discrete components in traditional solutions.

[0032] In one embodiment, the charger detection circuit 12 includes a first comparator I1 and a second comparator I2. The non-inverting input of the first comparator I1 is connected to a voltage detection pin VM, the inverting input of the first comparator I1 is connected to a first positive reference voltage, and the output of the first comparator I1 is connected to a logic control circuit 13. The inverting input of the second comparator I2 is connected to the voltage detection pin VM, the non-inverting input of the second comparator I2 is connected to a first negative reference voltage, and the output of the second comparator I2 is connected to the logic control circuit 13. The logic control circuit 13 is used to determine that the charger connection status signal indicates that the charger is connected when the first comparator I1 outputs a low level and the second comparator I2 outputs a high level.

[0033] For example, the first positive reference voltage is +250mV and the first negative reference voltage is -100mV.

[0034] Specifically, in the initial state, the voltage detection pin VM is pulled up to a high potential of approximately 4V. At this time, the voltage at the non-inverting input of the first comparator I1 is greater than the first positive reference voltage, and the first comparator I1 outputs a high level. The voltage at the inverting input of the second comparator I2 is greater than the first negative reference voltage, and the second comparator I2 outputs a low level. When the charger is connected and the voltage detection pin VM is pulled down to a negative voltage, the first comparator I1 outputs a low level because the voltage at its non-inverting input is less than the first positive reference voltage, and the second comparator I2 outputs a high level because the voltage at its inverting input is less than the first negative reference voltage. The logic control circuit 13 only determines that the charger is reliably connected when it simultaneously receives a low level from the first comparator I1 and a high level from the second comparator I2.

[0035] In this embodiment, by setting two reference voltages, positive and negative, the connection between the charger and a normal load or voltage disturbance is effectively distinguished. The +250mV threshold ensures that the voltage detection pin VM must drop significantly from a high potential, while the -100mV threshold confirms the negative voltage characteristic. The combined effect of these two criteria significantly improves the system's anti-interference capability and detection accuracy.

[0036] In one embodiment, the battery protection chip 1 further includes a current detection pin RSP, a signal switching circuit (not shown in the figure), and a current detection module 14; the signal switching circuit is connected to the mode control pin CHCT, the voltage detection pin VM, and the current detection pin RSP, respectively; the input terminal of the current detection module 14 is connected to the signal switching circuit, and the output terminal of the current detection module 14 is connected to the logic control circuit 13; wherein, the signal switching circuit is used to selectively connect the input terminal of the current detection module 14 to the voltage detection pin VM or the current detection pin RSP according to the level of the mode control pin CHCT.

[0037] As an example, the current detection module 14 includes a third comparator I3; the first input of the third comparator I3 is selectively connected to the voltage detection pin VM or the current detection pin RSP through a signal switching circuit, the second input of the third comparator I3 is used to receive a second negative reference voltage, and the output of the third comparator I3 is connected to the logic control circuit 13.

[0038] For example, the signal switching circuit acts as a two-to-one analog switch. Its control terminal is controlled by the mode control pin CHCT level, its two input terminals are connected to the voltage detection pin VM and the current detection pin RSP, respectively, and its output terminal is connected to the input terminal of the current detection module 14. The second negative reference voltage is -2.5mV.

[0039] In this embodiment, when the mode control pin CHCT is at the second control level, the signal switching circuit connects the third comparator I3 to the voltage detection pin VM, at which point the third comparator I3 participates in the initial state detection. When the mode control pin CHCT is at the first control level, the signal switching circuit switches it to connect to the current detection pin RSP, at which point the third comparator I3 is used to monitor the charging current. Thus, by multiplexing the function of a single third comparator I3 in different operating modes, the optimized configuration of the internal resources of the battery protection chip 1 is achieved. This dynamic signal path switching mechanism ensures the integrity of the initial detection and provides real-time current monitoring during the charging process, significantly improving the chip's integration and functional diversity.

[0040] In one embodiment, the logic control circuit 13 is used to maintain the first control level output by the mode control pin CHCT after the mode control pin CHCT outputs the first control level and the third comparator I3 outputs the first current signal; wherein, when the voltage at the first input terminal of the third comparator I3 is less than the second negative reference voltage, it enters the charging state and the third comparator I3 outputs the first current signal.

[0041] In this embodiment, after the system enters the charging state, i.e., after the mode control pin CHCT outputs the first control level, when there is a sufficiently large charging current, the current flows through the first current sensing resistor and the internal resistance of the charging-discharge-inhibiting MOSFET NM1 and the charging control MOSFET NM3, and the voltage is lower than the second negative reference voltage. At this time, the third comparator I3 outputs a first current signal, such as a high-level signal. After receiving the first current signal, the logic control circuit 13 maintains the mode control pin CHCT continuously outputting the first control level, thereby maintaining the stable conduction of the charging circuit. When the charging current is relatively small, the current flows through the first current sensing resistor and the internal resistance of the charging-discharge-inhibiting MOSFET NM1 and the charging control MOSFET NM3, and the voltage is higher than the second negative reference voltage. At this time, the third comparator I3 outputs a second current signal, such as a low-level signal. After receiving the first current signal, the logic control circuit 13 controls the CHCT pin to output a low level, and simultaneously connects the third comparator I3 to the current sensing pin RSP via the signal switching circuit. If the voltage across the current sensing resistor RSP is lower than the second negative reference voltage after the current is increased, the third comparator I3 outputs a first current signal, such as a high-level signal, which controls CHCT to output a high level, turns on the charging-discharging MOSFET NM1, and at the same time, the current sampling of the third comparator I3 is switched to the VM pin.

[0042] In one embodiment, the logic control circuit 13 includes a first delay module I4, a second delay module I5, an AND gate circuit I6, an OR gate circuit I7, a register I8, and a charging-prohibition-discharging logic processing module I9. These modules work together to achieve precise timing control and state management.

[0043] Specifically, the output of the first comparator I1 is connected to the inputs of both the first delay module I4 and the second delay module I5. The first delay module I4 provides a fast response; its output is directly connected to the charging-discharge-prohibition logic processing module I9, ensuring that the discharge circuit is immediately shut down upon detecting charger access. The second delay module I5 provides a longer delay; its output is connected to the first input of the AND gate circuit I6, used to implement a confirmation mechanism for stable charger access.

[0044] The second input of AND gate I6 is connected to the output of the second comparator I2. This connection method constitutes a double confirmation logic, that is, AND gate I6 will only output a valid signal, indicating that the charger has been stably connected, if the low-level signal output by the first comparator I1 is still maintained after being delayed by the second delay module I5, and the second comparator I2 simultaneously outputs a high level.

[0045] The first input of OR gate I7 ​​is connected to the output of AND gate I6, and the second input is connected to the output of third comparator I3, thereby realizing intelligent state maintenance. Whether it is a signal of stable charging or a signal of charging current, the charging state of the system can be maintained by OR gate I7, thus ensuring the continuity of the process.

[0046] Register I8 is connected between the output of OR gate I7 ​​and the charging disable / discharge logic processing module I9. It is used to latch the current charging state and prevent the state from becoming unstable due to signal jitter.

[0047] The charging-discharging-prohibition logic processing module I9 serves as the final decision-making unit. It comprehensively processes the fast shutdown signal from the first delay module I4 and the state maintenance signal from the register I8, and outputs the final control signals for the mode control pin CHCT and the charging control pin CO.

[0048] In this embodiment, the coordinated use of multi-level delay modules precisely meets the requirements for different response speeds, ensuring both the timeliness of the discharge circuit shutdown and the stability of the charging state establishment. Combined with gate circuits I6 and I7, a reliable signal confirmation and state maintenance mechanism is constructed, effectively preventing malfunctions. The state latching function provided by register I8 further enhances the system's anti-interference capability, thereby ensuring the reliable operation of the battery protection system under various complex operating conditions.

[0049] like Figure 1 As shown, the overall workflow of this invention is as follows: In the initial state, the CHCT control pin of the charging prohibition and discharging logic processing module I9 outputs a low level. At this time, the pull-up circuit 11 is turned on, and the voltage detection pin VM is pulled up to the internal power supply voltage. The first comparator I1 outputs a high level, and the second comparator I2 outputs a low level. The discharge control pin DO outputs a high level, allowing discharge.

[0050] When the charger is connected, the negative terminal CH- is pulled low to a negative voltage, which in turn pulls the voltage detection pin VM low through the first voltage detection resistor R3. When the voltage on the voltage detection pin VM is simultaneously lower than both the first positive reference voltage and the first negative reference voltage, the first comparator I1 outputs a low level, and the second comparator I2 outputs a high level. The low level of the first comparator I1 quickly triggers the logic processing module through the first delay module I4, setting the discharge control pin DO to a low level, immediately turning off the discharge control MOSFET NM2, and preventing discharge.

[0051] To establish a charging state, the low level of the first comparator I1 is delayed by the second delay module I5, and then logically ANDed with the high level of the second comparator I2 using an AND gate I6, outputting a high level to an OR gate I7. This signal is latched by register I8, triggering the logic processing module to set the mode control pin CHCT to a high level. This high level turns off the pull-up circuit 11, releases the voltage detection pin VM, and turns on the external charging-discharging-inhibiting MOSFET NM1. Combined with the control of the charging control MOSFET NM3 by the charging control pin CO, a complete charging circuit is established.

[0052] During charging, the third comparator I3 monitors the charging current through the voltage detection pin VM. When the charging current is large enough, the voltage on the voltage detection pin VM is lower than the second negative reference voltage, and the third comparator I3 outputs a high level. This high level is maintained by the OR gate I7 ​​and the register I8, ensuring that the mode control pin CHCT remains high, thus ensuring continuous charging.

[0053] When the battery is nearly fully charged, the charging current decreases, and the voltage at the voltage detection pin VM is higher than the second negative reference voltage, causing the third comparator I3 to output a low level. After an appropriate delay, the logic processing module sets the mode control pin CHCT to a low level and simultaneously switches the charging current sampling signal at the input of the third comparator I3 to the current sensing pin RSP. When the user increases the charging current, the negative voltage at the current sensing pin RSP becomes even greater, causing the third comparator I3 to output a high level. After processing by the logic processing module, the mode control pin CHCT is set to a high level again.

[0054] In this embodiment, through the complex logic collaboration within the battery protection chip 1, automatic identification, rapid switching, and intelligent maintenance of the charging and discharging states are achieved, providing comprehensive and reliable protection for the battery system while greatly simplifying the external circuit design.

[0055] This embodiment provides an electronic device, including the above-described charge and discharge management circuit.

[0056] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A battery protection chip, characterized in that, It includes voltage detection pins, discharge control pins, mode control pins, pull-up circuits, charger detection circuits, and logic control circuits; The pull-up circuit is connected between the internal power supply and the voltage detection pin. The control terminal of the pull-up circuit is connected to the mode control pin and is used to turn on or off according to the level of the mode control pin. The input terminal of the charger detection circuit is connected to the voltage detection pin, and is used to output a charger connection status signal according to the voltage status of the voltage detection pin; The logic control circuit is connected to the output terminal of the charger detection circuit and the mode control pin. When the charger connection status signal indicates that the charger is connected, it outputs a first control level through the mode control pin and outputs a shutdown signal through the discharge control pin to shut down the external discharge circuit. The first control level is used to shut down the pull-up circuit and simultaneously turn on the external charging circuit.

2. The battery protection chip according to claim 1, characterized in that, The charger detection circuit includes a first comparator and a second comparator; The non-inverting input of the first comparator is connected to the voltage detection pin, the inverting input of the first comparator is connected to the first positive reference voltage, and the output of the first comparator is connected to the logic control circuit. The inverting input of the second comparator is connected to the voltage detection pin, the non-inverting input of the second comparator is connected to the first negative reference voltage, and the output of the second comparator is connected to the logic control circuit.

3. The battery protection chip according to claim 2, characterized in that, The logic control circuit is used to determine that the charger connection status signal indicates that the charger has been connected when the first comparator outputs a low level and the second comparator outputs a high level.

4. The battery protection chip according to claim 1, characterized in that, The battery protection chip also includes a current detection pin, a signal switching circuit, and a current detection module; The signal switching circuit is connected to the mode control pin, the voltage detection pin, and the current detection pin, respectively. The input terminal of the current detection module is connected to the signal switching circuit, and the output terminal of the current detection module is connected to the logic control circuit. The signal switching circuit is used to selectively connect the input terminal of the current detection module to the voltage detection pin or the current detection pin according to the level of the mode control pin.

5. The battery protection chip according to claim 4, characterized in that, The current detection module includes a third comparator; The first input terminal of the third comparator is selectively connected to the voltage detection pin or the current detection pin through the signal switching circuit. The second input terminal of the third comparator is used to receive the second negative reference voltage. The output terminal of the third comparator is connected to the logic control circuit.

6. The battery protection chip according to claim 5, characterized in that, The logic control circuit is used to maintain the output of the first control level of the mode control pin after the first control level is output on the mode control pin, if the third comparator outputs a first current signal. Specifically, when the voltage at the first input terminal of the third comparator is less than the second negative reference voltage, the third comparator outputs the first current signal.

7. A charge / discharge management circuit, characterized in that, Includes a charge-discharge-inhibiting MOSFET, a charge-control MOSFET, a discharge-control MOSFET, and a battery protection chip as described in any one of claims 1 to 6; The control terminal of the charge-discharge-inhibit MOS transistor is connected to the mode control pin of the battery protection chip; The control terminal of the charging control MOS transistor is connected to the charging control pin of the battery protection chip; The control terminal of the discharge control MOS transistor is connected to the discharge control pin of the battery protection chip. The charging-discharge-inhibiting MOSFET and the charging-control MOSFET are connected in series between the negative terminal of the battery module and the negative terminal of the charging module to form the external charging circuit. One end of the discharge control MOS transistor is coupled to the negative terminal of the battery module, and the other end is connected to the negative terminal of the charging terminal to form the external discharge circuit.

8. The charge / discharge management circuit according to claim 7, characterized in that, The charge / discharge management circuit also includes a first current-sensing resistor; The first end of the first current sensing resistor is connected to the negative terminal of the battery module, and the second end of the first current sensing resistor is connected to the source of the charge-discharge-inhibiting MOS transistor and the source of the discharge-controlling MOS transistor. The current detection pin of the battery protection chip is connected to the source of the discharge control MOSFET and the source of the charge-discharge inhibit MOSFET.

9. A battery protection board, characterized in that, It includes a substrate and the charge / discharge management circuit as described in claim 7.

10. An electronic device, characterized in that, Includes the battery protection board as described in claim 9.

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