High-frequency starting oscillating circuit, control method thereof and air conditioning system

Abstract

The invention discloses a high-frequency starting oscillation circuit, a control method thereof and an air conditioning system. The high-frequency starting oscillation circuit comprises a surge suppression circuit connected between an input voltage and a high-voltage bus capacitor. The surge suppression circuit is at least provided with a power switch tube which is connected between input voltage and a high-voltage bus capacitor in series, the capacitance value of a grid driving capacitor of the power switch tube is adjustable, and when the capacitance value of the grid driving capacitor of the power switch tube changes, the conduction time of the power switch tube changes to suppress surge current. Compared with the prior art, the surge suppression circuit has the advantages that the voltage on the high-voltage bus capacitor can be slowly increased by changing the conduction time of the power switch tube in the surge suppression circuit, so that the problem of magnetic saturation or device stress exceeding caused by overhigh surge current is avoided.

Description

Technical Field

[0001] This invention relates to the field of surge suppression technology, and in particular to a high-frequency start-up oscillation circuit and its control method, as well as an air conditioning system. Background Technology

[0002] In high-frequency switching power supplies and power electronic converters, the CLLC resonant topology is widely used in DC / DC converters due to its high efficiency, soft-switching characteristics, and good dynamic response. However, the CLLC topology still faces several technical challenges in practical operation. In scenarios where the voltage difference between 400V and 48V is reduced, the high-voltage bus capacitor generates an excessively large inrush current upon power-up, causing oscillation spikes in the switching waveform of the rectifier bridge. Traditional NTC solutions cannot meet the requirements of frequent start-stop operations, fixed resistor solutions suffer from high losses, and the CLLC resonant cavity is prone to magnetic saturation or excessive device stress due to surges before establishing a steady state.

[0003] To address drive oscillation and surge issues, existing DC / DC topologies employ protection circuits and strategies in both hardware and software to reduce current oscillations caused by high-frequency startup. Patent CN206422685U discloses a soft-start protection circuit for suppressing surge current. This circuit incorporates an RC loop and a transient voltage suppressor diode (TVS), enabling effective control of surge current and surge time to varying degrees through parameter adjustment. However, precise matching of the RC charging time and TVS response time is required; parameter mismatch can lead to voltage gaps (risk of clamping failure).

[0004] Patent CN111431155B discloses a peak current limiting charging surge current suppression circuit, which can suppress surge current normally under a wide temperature range and wide input voltage conditions. It uses a switching transistor to control current limiting charging, and is less affected by the size of the back-end capacitor. However, its MOSFET is frequently turned on, resulting in large losses. It also relies too much on the MCU. Algorithm failure may lead to bypass failure, requiring additional protection circuitry.

[0005] None of the above solutions can effectively solve the impact of surge current. Therefore, how to design a high-frequency starting oscillation circuit and its control method, as well as an air conditioning system, to reduce the driving oscillation caused by surge current and excessive bus voltage is a technical problem that the industry urgently needs to solve. Summary of the Invention

[0006] In response to the problem in the prior art that the surge current of the high-voltage bus capacitor is too high at the moment of power-on, which leads to the oscillation and thermal failure of the switching transistor drive, this invention proposes a high-frequency start-up oscillation circuit and its control method, as well as an air conditioning system.

[0007] The technical solution of the present invention is to propose a high-frequency starting oscillation circuit, including a transformer, a primary circuit and a first resonant circuit connected between the transformer and the high-voltage bus capacitor, a secondary circuit and a second resonant circuit connected between the transformer and the low-voltage bus capacitor, and a surge suppression circuit connected between the input voltage and the high-voltage bus capacitor.

[0008] The surge suppression circuit has at least one power switch connected in series between the input voltage and the high-voltage bus capacitor. The gate drive capacitor of the power switch is adjustable, and when the gate drive capacitor of the power switch changes, the on-time of the power switch changes to suppress surge current.

[0009] Furthermore, the surge suppression circuit includes at least a fixed capacitor and a varactor diode connected in parallel between the gate and source of the power switch, which together serve as the gate drive capacitor of the power switch.

[0010] The cathode of the varactor diode is connected to a reverse bias voltage. When the reverse bias voltage changes, the capacitance of the varactor diode changes, thereby changing the capacitance of the gate drive capacitor of the power switch.

[0011] Furthermore, the surge suppression circuit includes: a power switch Q1, a resistor Rg, a fixed capacitor Cg, and a varactor diode D_var;

[0012] The drain of the power switch Q1 is connected to the positive terminal of the input voltage, the source of the power switch Q1 is connected to the high voltage bus capacitor, and the gate of the power switch Q1 is connected to the gate drive voltage after being connected to the resistor Rg.

[0013] One end of the fixed capacitor Cg is connected between the resistor Rg and the gate of the power switch Q1, and the other end of the fixed capacitor Cg is connected to the source of the power switch Q1.

[0014] The cathode of the varactor diode D_var is connected to the reverse bias voltage, and the anode of the varactor diode D_var is connected to the source of the power switch Q1.

[0015] Furthermore, before the power switch enters the Miller platform, the power switch is in a first conduction phase, and in the first conduction phase, the reverse bias voltage is set to 0 so that the power switch is turned on slowly.

[0016] Furthermore, when the power switch enters the Miller plateau, the power switch is in the second conduction phase, and in the second conduction phase, the reverse bias voltage is set to the maximum value to shorten the time for the power switch to cross the Miller plateau.

[0017] Furthermore, after the power switch passes the Miller plateau, the power switch is in the third conduction phase, and in the third conduction phase, the reverse bias voltage is set to an intermediate value between 0 and the maximum value, so that the power switch is turned on at a medium speed.

[0018] The present invention also proposes a control method using the above-mentioned high-frequency start-up oscillation circuit, comprising:

[0019] When the high-frequency start-up oscillation circuit is started, the voltage parameters of the high-voltage bus capacitor are detected;

[0020] Based on the voltage range in which the voltage parameter is located, a preset control strategy corresponding to the voltage range is executed.

[0021] Furthermore, a preset control strategy corresponding to the voltage range is executed, including:

[0022] When the voltage parameter is between the start-up voltage and the first threshold voltage, the high-voltage bus capacitor is charged by the input voltage, and a fault shutdown is triggered when the power switch tube current or temperature is abnormal.

[0023] When the voltage parameter is between the first threshold voltage and the second threshold voltage, the duty cycle of the switching transistors in the primary circuit and the secondary circuit is controlled to rise to a preset duty cycle with a first preset slope, and the switching frequency of the switching transistors in the primary circuit and the secondary circuit is controlled to decrease to a preset switching frequency with a second preset slope.

[0024] When the voltage parameter is between the second threshold voltage and the upper limit of voltage protection, the duty cycle of the switching transistors in the primary circuit and the secondary circuit is maintained at a preset duty cycle, and the switching frequency of the switching transistors in the primary circuit and the secondary circuit is adjusted by a PID strategy.

[0025] Furthermore, the first threshold voltage is set to 70% of the rated bus voltage of the high-voltage bus capacitor.

[0026] The present invention also proposes an air conditioning system having the above-mentioned high-frequency start-up oscillation circuit.

[0027] Compared with the prior art, the present invention has at least the following beneficial effects:

[0028] 1. This invention can control the power switching transistor to turn on slowly, thereby causing the voltage of the high-voltage bus capacitor to rise slowly, reducing the surge current and the driving oscillation caused by excessive bus voltage.

[0029] 2. This invention can dynamically adjust the capacitance value of the gate drive capacitor and enable the power switch to quickly pass through the Miller plateau, significantly reducing the turn-on loss of the power switch and improving efficiency. At the same time, it suppresses gate-source voltage overshoot, reduces ringing, and improves system stability.

[0030] 3. This invention implements a soft-start strategy when the voltage parameters of the high-voltage bus capacitor are between the first threshold voltage and the second threshold voltage, thereby improving the reliability and availability of the system. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a schematic diagram of the circuit topology of the high-frequency start-up oscillation circuit in this invention;

[0033] Figure 2 This is a schematic diagram of the circuit topology of the surge suppression circuit in this invention;

[0034] Figure 3 This is the control logic of the control method for the high-frequency start-up oscillation circuit in this invention;

[0035] Figure 4 This is a schematic diagram illustrating the specific control flow of the control method for the high-frequency start-up oscillation circuit in this invention. Detailed Implementation

[0036] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and are not intended to limit the present invention.

[0037] Therefore, a feature pointed out in this specification is used to describe one feature of one embodiment of the invention, and does not imply that every embodiment of the invention must have the described feature. Furthermore, it should be noted that this specification describes many features. Although certain features may be combined to illustrate possible system designs, these features may also be used in other combinations not explicitly stated. Therefore, unless otherwise stated, the described combinations are not intended to be limiting.

[0038] The principles and structure of the present invention will be described in detail below with reference to the accompanying drawings and embodiments.

[0039] When the CLLC resonant topology is applied to a 400V to 48V voltage differential scenario, the high-voltage bus capacitor generates an excessive surge current upon power-up, causing oscillation spikes in the switching waveform of the rectifier bridge. Traditional NTC solutions cannot meet the requirements of frequent start-stop operations, fixed resistor solutions have high losses, and the CLLC resonant cavity is prone to magnetic saturation or excessive device stress due to surges before it reaches a steady state.

[0040] Based on the above problems, the design idea of ​​this invention is to add a varactor diode between the gate and the source of the power switch, which together with the fixed capacitor serves as the gate drive capacitor. Then, by applying a reverse bias voltage to the varactor diode to change its capacitance value, the capacitance value of the gate drive capacitor is changed, allowing the power switch to turn on slowly.

[0041] The existence of surge current is due to the fact that when a 400V voltage is applied to the 0V high-voltage bus capacitor at the moment of power-on, a large current is generated, which damages the circuit. The present invention uses the above-mentioned scheme to allow the power switch to turn on slowly, which actually allows the voltage on the high-voltage bus capacitor to rise slowly to 400V, rather than to surge to 400V instantly, thereby suppressing surge current.

[0042] Based on the above design concept, this invention proposes a high-frequency start-up oscillation circuit, which adopts a CLLC resonant topology. Please refer to [link to relevant documentation]. Figure 1 The high-frequency starting oscillation circuit includes a transformer T, a primary circuit and a first resonant circuit connected between the transformer T and the high-voltage bus capacitor Cin, and a secondary circuit and a second resonant circuit connected between the transformer T and the low-voltage bus capacitor Co.

[0043] Both the primary and secondary circuits use full-bridge circuits. The primary circuit consists of switches S1, S2, S3, and S4, while the secondary circuit consists of switches S5, S6, S7, and S8.

[0044] The first resonant circuit is set between the primary circuit and the primary side of transformer T1, and it consists of inductor Lr1, inductor Lm and capacitor Cr1. The second resonant circuit is set between the secondary circuit and the secondary side of transformer T1, and it consists of inductor Lr2 and capacitor Cr2.

[0045] The aforementioned transformer, primary circuit, secondary circuit, first resonant circuit, and second resonant circuit constitute a CLLC resonant topology, which can be used for voltage conversion from 400V to 48V.

[0046] The high-frequency start-up oscillation circuit proposed in this invention also includes a surge suppression circuit connected in series between the input voltage Vin and the high-voltage bus capacitor Cin;

[0047] Since the surge suppression circuit is connected in series between the input voltage Vin and the high-voltage bus capacitor Cin, the conduction state of the surge suppression circuit directly affects the charging of the high-voltage bus capacitor Cin by the input voltage Vin.

[0048] The surge suppression circuit of this invention has at least one power switch connected in series between the input voltage Vin and the high-voltage bus capacitor Cin, and the value of the gate drive capacitor of the power switch is adjustable.

[0049] Here, the power switch can be a MOSFET or an IGBT. In this invention, a MOSFET is preferred. When its gate drive capacitance increases, the time constant also increases, and the conduction time increases. Conversely, when the gate drive capacitance decreases, the time constant decreases, and the conduction time decreases.

[0050] Based on this principle, the present invention can suppress surge current by changing the gate drive capacitor of the power switch. Under this design, the present invention can control the power switch to turn on slowly, thereby causing the voltage of the high voltage bus capacitor to rise slowly, reducing surge current and drive oscillation caused by excessive bus voltage.

[0051] The design principle of the surge suppression circuit in this invention is as follows: the surge suppression circuit includes at least a fixed capacitor and a varactor diode connected in parallel between the gate G and the source S of the power switch, which together serve as the gate drive capacitor of the power switch.

[0052] The cathode of the varactor diode is connected to a reverse bias voltage Vbias. When the reverse bias voltage Vbias changes, the capacitance of the varactor diode changes, thereby changing the capacitance of the gate drive capacitor of the power switch.

[0053] The characteristic of a varactor diode is that its capacitance can be changed by the reverse bias voltage Vbias applied to its negative terminal. The larger the reverse bias voltage Vbias, the smaller the capacitance of the varactor diode; the smaller the reverse bias voltage Vbias, the larger the capacitance of the varactor diode.

[0054] The gate drive capacitor consists of a fixed capacitor and a varactor diode. Since the capacitance of the fixed capacitor does not change, the capacitance of the gate drive capacitor is completely affected by the capacitance of the varactor diode, that is, by the reverse bias voltage Vbias.

[0055] Based on this design principle, the present invention can convert the capacitance value of the gate drive capacitor, which is originally difficult to adjust, into an easily adjustable reverse bias voltage Vbias. Accordingly, the capacitance value of the gate drive capacitor can be flexibly adjusted according to actual needs, thereby achieving the purpose of suppressing surge current.

[0056] Please see Figure 2The surge suppression circuit proposed in this invention specifically includes: a power switch Q1, a resistor Rg, a fixed capacitor Cg, and a varactor diode D_var;

[0057] The drain of power switch Q1 is connected to the positive terminal of the input voltage, the source of power switch Q1 is connected to the high voltage bus capacitor, and the gate of power switch Q1 is connected to the gate drive voltage after the resistor Rg.

[0058] One end of the fixed capacitor Cg is connected between the resistor Rg and the gate of the power switch Q1, and the other end of the fixed capacitor Cg is connected to the source of the power switch Q1.

[0059] The cathode of the varactor diode D_var is connected to a reverse bias voltage Vbias, and the anode of the varactor diode D_var is connected to the source of the power switch Q1.

[0060] In this design, the varactor diode D_var and the fixed capacitor Cg are electrically connected in parallel between the gate G and the source S of the power switch Q1, forming the gate drive capacitor Cgs = Cg + C_var. The reverse bias voltage Vbias of the varactor diode D_var is controlled by the MCU through a voltage regulation circuit, thereby changing the capacitance value C_var of the varactor diode D_var, and thus controlling the conduction time of the power switch Q1.

[0061] The above configuration is also the specific circuit topology of the surge suppression circuit in this invention. Based on this configuration, this invention can control the power switch to turn on slowly, thereby causing the voltage of the high-voltage bus capacitor to rise slowly, reducing the surge current and the driving oscillation caused by excessively high bus voltage.

[0062] It should be noted that in other embodiments of the present invention, the above-mentioned varactor diode D_var can also be replaced by a voltage-controlled capacitor chip or a digital potentiometer, which can also realize the dynamic adjustment of the gate drive capacitor Cgs.

[0063] In this invention, the power switch is preferably set as a MOSFET. The conduction stage of the MOSFET is divided into three stages: before the MOSFET enters the Miller plateau, when it enters the Miller plateau, and after it crosses the Miller plateau. In the stage before entering the Miller plateau, the MOSFET has just been powered on and the voltage difference across the high voltage bus capacitor is large. In this stage, the gate-source voltage Vgs needs to rise slowly so that the MOSFET can be turned on slowly and the voltage on the high voltage bus capacitor can rise slowly.

[0064] When entering the Miller plateau stage, the presence of the Miller plateau will prolong the switching time, increase switching losses, and reduce efficiency. Therefore, in order to optimize the circuit, it is necessary to minimize its negative impact on the circuit. Thus, the time of the Miller plateau needs to be shortened. Therefore, this stage needs to be passed quickly. At this time, the gate-source voltage Vgs is allowed to rise rapidly, so that the MOSFET is turned on quickly, thereby shortening the time for the MOSFET to pass through the Miller plateau.

[0065] After crossing the Miller plateau, the voltage on the high-voltage bus capacitor is already quite high, and the voltage difference between it and the 400V voltage is not very large. Therefore, it is not necessary to conduct slowly as before entering the Miller plateau, but it is also not necessary to conduct quickly as before entering the Miller plateau. Therefore, a moderate value needs to be set to allow the MOSFET to conduct until it is fully turned on.

[0066] This invention divides the aforementioned stages before entering the Miller platform, the stages during entering the Miller platform, and the stages after crossing the Miller platform into a first conduction stage, a second conduction stage, and a third conduction stage. Corresponding controls are then implemented for each conduction stage, specifically:

[0067] Before the MOSFET reaches the Miller plateau, it is in the first conduction phase, and in the first conduction phase, the reverse bias voltage Vbias is set to 0 so that the MOSFET turns on slowly.

[0068] During this stage, the gate-source voltage Vgs of the MOSFET rises from 0V to the threshold voltage Vth (when the gate-source voltage Vgs exceeds the threshold voltage Vth, the drain-source voltage Vds begins to decrease, and when the drain-source voltage Vds decreases to a sufficiently low level, the Miller plateau disappears). The MCU sets the reverse bias voltage Vbias of the varactor diode D_var to 0V, so that the capacitance C_var of the varactor diode D_var is at its maximum capacitance C_var_max. At this time, the gate drive capacitance Cgs = Cg + C_var_max reaches its maximum, and the time constant τ = Rg * Cgs also becomes very large. The gate-source voltage Vgs slowly rises from 0 until it reaches the threshold voltage Vth.

[0069] Once the threshold voltage Vth is reached, the MOSFET enters the Miller plateau, at which point it enters the second conduction phase. The control method at this stage is as follows:

[0070] When the MOSFET enters the Miller plateau, it is in the second conduction phase, and in the second conduction phase, the reverse bias voltage Vbias is set to its maximum value to shorten the time it takes for the MOSFET to cross the Miller plateau.

[0071] During this stage, the gate-source voltage Vgs ≥ threshold voltage Vth, entering the Miller plateau. The MCU starts to detect the rate of change of the gate-source voltage Vgs, dVgs / dt, to determine whether to exit the Miller plateau. Here, dVgs / dt = (Vgs_current - Vgs_previous) / Δt, where Vgs_current is the current gate-source voltage value, Vgs_previous is the gate-source voltage value at the previous time point, and Δt is the time difference between the current and the previous time point. When dVgs / dt < dVgs / dt_threshold1, the MOSFET is in the Miller plateau. At this time, the MCU increases the reverse bias voltage Vbias to its maximum value, the capacitance C_var of the varactor diode D_var is at its minimum value C_var_min, the gate drive capacitance Cgs = Cg + C_var_min reaches its minimum, the time constant τ is very small, and the gate-source voltage Vgs rises rapidly and quickly passes through the Miller plateau.

[0072] When dVgs / dt > dVgs / dt_threshold2 is detected, it indicates that the MOSFET has crossed the Miller plateau. The control method at this time is:

[0073] After the MOSFET crosses the Miller plateau, it enters the third conduction phase. During this phase, the reverse bias voltage Vbias is set to an intermediate value between 0 and its maximum value to enable the MOSFET to conduct at a medium speed.

[0074] During this stage, the MCU fine-tunes the reverse bias voltage Vbias on the varactor diode D_var, increasing the capacitance C_var of the varactor diode D_var to a moderate value. At this time, the time constant τ is moderate, so as to slightly slow down the rise rate of the gate-source voltage Vgs. When the gate-source voltage Vgs reaches the target value, the control ends until the MOSFET is fully turned on.

[0075] Based on the above control scheme, the present invention can slowly turn on the MOSFET during the first conduction stage, thus avoiding surge current.

[0076] It can quickly pass through the Miller platform during the second conduction phase, avoiding switching losses and reducing efficiency;

[0077] It can turn on the MOSFET at a moderate speed during the third conduction stage, ensuring the normal conduction of the MOSFET;

[0078] Simultaneously, based on the control of the three conduction stages, the present invention can achieve the beneficial effects described above:

[0079] This invention can dynamically adjust the capacitance of the gate drive capacitor and enable the power switch to quickly pass through the Miller plateau, significantly reducing the turn-on loss of the power switch and improving efficiency. At the same time, it suppresses gate-source voltage overshoot, reduces ringing, and improves system stability.

[0080] The high-frequency start-up oscillation circuit described above can be applied in DC / DC converters to avoid problems such as magnetic saturation or excessive device stress caused by surge current. In addition, based on the high-frequency start-up oscillation circuit described above, this invention also proposes a control method for the high-frequency start-up oscillation circuit to further improve the reliability and availability of the system.

[0081] Please participate Figure 3 The control method for the high-frequency start-up oscillation circuit provided by the present invention specifically includes:

[0082] When the high-frequency start-up oscillation circuit starts, the voltage parameters of the high-voltage bus capacitor are detected;

[0083] Based on the voltage range in which the voltage parameter is located, execute the preset control strategy corresponding to the voltage range.

[0084] It executes a corresponding preset control strategy by controlling the voltage parameters of the high-voltage bus capacitor, which can achieve the requirements of soft start and avoid oscillations that occur when the resonant cavity has not been established.

[0085] Its specific control logic is as follows:

[0086] When the voltage parameter is between the start-up voltage and the first threshold voltage, the high-voltage bus capacitor is charged by the input voltage, and a fault shutdown is triggered when the power switch voltage or temperature is abnormal.

[0087] When the voltage parameter is between the first threshold voltage and the second threshold voltage, the duty cycle of the switching transistors in the primary circuit and the secondary circuit is increased to a preset duty cycle with a first preset slope, and the switching frequency of the switching transistors in the primary circuit and the secondary circuit is decreased to a preset switching frequency with a second preset slope.

[0088] When the voltage parameter is between the second threshold voltage and the upper limit of voltage protection, the duty cycle of the switching transistors in the primary and secondary circuits is maintained at the preset duty cycle, and the switching frequency of the switching transistors in the primary and secondary circuits is adjusted by the PID strategy.

[0089] Please see Figure 4 This is the control flowchart corresponding to the control method of the above-mentioned high-frequency start-up oscillation circuit. After the system starts up and is initialized, the control MOS transistor (that is, the power switch transistor mentioned above) is turned on to charge the high-voltage bus capacitor.

[0090] It first determines whether the voltage on the high-voltage bus capacitor is greater than the starting voltage. If the determination is no, the system enters standby mode.

[0091] If the judgment is yes, then it is further judged whether the voltage on the high-voltage bus capacitor is less than the first threshold voltage. If yes, it means that the voltage on the high-voltage bus capacitor is between the start-up voltage and the first threshold voltage. At this time, the input voltage is the high-voltage bus capacitor continuously charging, and the upper limit of current I_lim and the junction temperature of the MOSFET are monitored in real time. If the limit is exceeded, that is, when the current or temperature is abnormal, the fault shutdown of the MOSFET is triggered.

[0092] If it is determined that the voltage on the high-voltage bus capacitor is greater than the first threshold voltage, then it is further determined whether the voltage on the high-voltage bus capacitor is less than the second threshold voltage. If so, it means that the voltage on the high-voltage bus capacitor is between the first threshold voltage and the second threshold voltage. At this time, the CLLC soft start mode is entered, and variable frequency duty cycle control is executed. At this time, the duty cycle of the switching transistors in the primary circuit and the secondary circuit is controlled to rise to the preset duty cycle with the first preset slope, and the switching frequency of the switching transistors in the primary circuit and the secondary circuit is controlled to decrease to the preset switching frequency with the second preset slope.

[0093] Here, the first preset slope is 0.1% / μs, the second preset slope is 0.5kHz / μs, the preset duty cycle is 50%, and the preset switching frequency is 100kHz;

[0094] The control of the reverse bias voltage mentioned above is also performed during this stage to avoid damage to the circuit caused by excessive surge current.

[0095] If it is determined that the voltage on the high-voltage bus capacitor is greater than the second threshold voltage, it means that the voltage on the high-voltage bus capacitor is between the second threshold voltage and the upper limit of voltage protection. At this time, it enters the CLLC full power mode, maintains efficient operation through dual closed-loop frequency conversion PWM, maintains the duty cycle of the switching transistors in the primary and secondary circuits at the preset duty cycle, and adjusts the switching frequency of the switching transistors in the primary and secondary circuits through PID strategy to maximize voltage gain.

[0096] Here, the default duty cycle is 50%;

[0097] When an abnormal current or voltage is detected, the protection mechanism is triggered, and the drive signal is shut off.

[0098] Based on the above control scheme, the voltage gain of the CLLC resonant topology can be maximized while avoiding the occurrence of surge current.

[0099] The first threshold voltage and the second threshold voltage can be selected according to actual needs. The setting of the first threshold voltage should ensure that the resonator of the CLLC resonant topology can enter the continuous conduction mode, and the setting of the second threshold voltage should ensure that the MOSFET has completely passed the Miller plateau.

[0100] In a preferred embodiment of the present invention, the first threshold voltage is set to 70% of the rated bus voltage of the high-voltage bus capacitor.

[0101] Under this setting, the CLLC resonant topology only initiates soft start after the high-voltage bus capacitance has reached 70%, thus avoiding oscillations before the resonant cavity has been established.

[0102] Furthermore, the present invention also proposes an air conditioning system having the aforementioned high-frequency start-up oscillation circuit.

[0103] In summary, compared with the prior art, the present invention has at least the following beneficial effects:

[0104] 1. This invention can control the power switching transistor to turn on slowly, thereby causing the voltage of the high-voltage bus capacitor to rise slowly, reducing the surge current and the driving oscillation caused by excessive bus voltage.

[0105] 2. This invention can dynamically adjust the capacitance value of the gate drive capacitor and enable the power switch to quickly pass through the Miller plateau, significantly reducing the turn-on loss of the power switch and improving efficiency. At the same time, it suppresses gate-source voltage overshoot, reduces ringing, and improves system stability.

[0106] 3. This invention implements a soft-start strategy when the voltage parameters of the high-voltage bus capacitor are between the first threshold voltage and the second threshold voltage, thereby improving the reliability and availability of the system.

[0107] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high-frequency starting oscillation circuit, comprising a transformer, a primary circuit and a first resonant circuit connected between the transformer and a high-voltage bus capacitor, and a secondary circuit and a second resonant circuit connected between the transformer and a low-voltage bus capacitor, characterized in that, It also includes a surge suppression circuit connected between the input voltage and the high-voltage bus capacitor; The surge suppression circuit has at least one power switch connected in series between the input voltage and the high-voltage bus capacitor. The gate drive capacitor of the power switch is adjustable, and when the gate drive capacitor of the power switch changes, the on-time of the power switch changes to suppress surge current.

2. The high-frequency start-up oscillation circuit according to claim 1, characterized in that, The surge suppression circuit includes at least a fixed capacitor and a varactor diode connected in parallel between the gate and source of the power switch, which together serve as the gate drive capacitor of the power switch. The cathode of the varactor diode is connected to a reverse bias voltage. When the reverse bias voltage changes, the capacitance of the varactor diode changes, thereby changing the capacitance of the gate drive capacitor of the power switch.

3. The high-frequency start-up oscillation circuit according to claim 2, characterized in that, The surge suppression circuit includes: a power switch Q1, a resistor Rg, a fixed capacitor Cg, and a varactor diode D_var; The drain of the power switch Q1 is connected to the positive terminal of the input voltage, the source of the power switch Q1 is connected to the high voltage bus capacitor, and the gate of the power switch Q1 is connected to the gate drive voltage after being connected to the resistor Rg. One end of the fixed capacitor Cg is connected between the resistor Rg and the gate of the power switch Q1, and the other end of the fixed capacitor Cg is connected to the source of the power switch Q1. The cathode of the varactor diode D_var is connected to the reverse bias voltage, and the anode of the varactor diode D_var is connected to the source of the power switch Q1.

4. The high-frequency start-up oscillation circuit according to claim 3, characterized in that, Before the power switch enters the Miller platform, the power switch is in a first conduction phase, and in the first conduction phase, the reverse bias voltage is set to 0 so that the power switch is turned on slowly.

5. The high-frequency start-up oscillation circuit according to claim 3, characterized in that, When the power switch enters the Miller plateau, the power switch is in the second conduction phase, and in the second conduction phase, the reverse bias voltage is set to the maximum value to shorten the time for the power switch to cross the Miller plateau.

6. The high-frequency start-up oscillation circuit according to claim 3, characterized in that, After the power switch passes the Miller plateau, the power switch is in the third conduction phase, and in the third conduction phase, the reverse bias voltage is set to an intermediate value between 0 and the maximum value so that the power switch conducts at a medium speed.

7. A control method employing the high-frequency start-up oscillation circuit as described in any one of claims 1 to 6, characterized in that, include: When the high-frequency start-up oscillation circuit is started, the voltage parameters of the high-voltage bus capacitor are detected; Based on the voltage range in which the voltage parameter is located, a preset control strategy corresponding to the voltage range is executed.

8. The control method for the high-frequency start-up oscillation circuit according to claim 7, characterized in that, Execute a preset control strategy corresponding to the voltage range, including: When the voltage parameter is between the start-up voltage and the first threshold voltage, the high-voltage bus capacitor is charged by the input voltage, and a fault shutdown is triggered when the power switch tube current or temperature is abnormal. When the voltage parameter is between the first threshold voltage and the second threshold voltage, the duty cycle of the switching transistors in the primary circuit and the secondary circuit is controlled to rise to a preset duty cycle with a first preset slope, and the switching frequency of the switching transistors in the primary circuit and the secondary circuit is controlled to decrease to a preset switching frequency with a second preset slope. When the voltage parameter is between the second threshold voltage and the upper limit of voltage protection, the duty cycle of the switching transistors in the primary circuit and the secondary circuit is maintained at a preset duty cycle, and the switching frequency of the switching transistors in the primary circuit and the secondary circuit is adjusted by a PID strategy.

9. The control method for the high-frequency start-up oscillation circuit according to claim 8, characterized in that, The first threshold voltage is set to 70% of the rated bus voltage of the high-voltage bus capacitor.

10. An air conditioning system, characterized in that, The air conditioning system has a high-frequency start-up oscillation circuit as described in any one of claims 1 to 6.

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