An event-triggered super-torsional composite control system for high-order DC-DC converters

Abstract

This invention discloses an event-triggered super-torsional composite control system for high-order DC-DC converters, relating to the field of intelligent control technology for high-order DC-DC boost converters. It includes a converter main circuit, a signal acquisition module, a digital controller (DSP), and a PWM drive module. The DSP comprises a general model building module, a power feedforward compensation module, a super-torsional sliding mode control module, an event triggering discrimination module, and a signal synthesis and drive module. In the design of the data controller, this invention abandons the traditional dual-closed-loop cascaded control architecture and adopts a flattened composite control strategy: using a power feedforward path based on physical energy conservation as the main force for fast response to overcome the undershoot problem of non-minimum phase systems; using a sliding mode feedback loop based on the standard super-torsional algorithm as the core of high-precision adjustment to eliminate steady-state errors and chattering; and supplemented by a hybrid event triggering mechanism to resist deadlock, achieving zero steady-state error tracking while reducing computational resource consumption.

Description

Technical Field

[0001] This invention relates to the field of intelligent control technology for high-order DC-DC boost converters, and more specifically, to an event-triggered super-torsional composite control system for high-order DC-DC converters. Background Technology

[0002] In current applications of new energy such as photovoltaic power generation, fuel cell grid connection, and electric vehicle on-board power supplies, the power transmission from low-voltage DC power supply to high-voltage DC bus is a crucial core link, placing extremely high demands on the boost capability and conversion efficiency of DC-DC converters. To overcome the efficiency drop and diode reverse recovery problems of traditional Boost converters at extremely high duty cycles, multi-stage high-order DC-DC boost converters based on switched inductor and switched capacitor networks have emerged. These converters, with their high voltage gain coefficient and low switching voltage stress characteristics, have become a research hotspot and preferred topology in this field. However, these converters contain multiple inductor and capacitor energy storage elements, exhibiting typical high-order systems in their mathematical models. More challenging is the energy transfer lag effect caused by the inductor current's inability to change abruptly, resulting in a common zero point in the right half-plane of the complex plane in their open-loop transfer function, exhibiting strong non-minimum phase characteristics. This characteristic causes the transient response of the output voltage to exhibit an undershoot phenomenon of "first falling in the reverse direction, then slowly recovering" when facing disturbances such as load step jumps, significantly limiting the dynamic performance and stability margin of the control system.

[0003] For the control problem of such high-order non-minimum phase converters, existing technologies mainly employ traditional linear PID control or conventional first-order sliding mode control, but both reveal significant limitations in practical engineering applications. Firstly, for traditional linear PID control strategies, due to the non-minimum phase characteristics of the controlled object, designers must set the cutoff frequency of the control loop extremely low to ensure the stability of the closed-loop system, typically much lower than the zero-point frequency of the right half-plane. This extreme compression of bandwidth directly leads to a severe deficiency in the system's dynamic adjustment capability. When faced with significant load disturbances, the voltage recovery time is too long, and the voltage drop is enormous, making it difficult to meet the power quality requirements of precision loads. To alleviate this contradiction, some existing technical solutions attempt to introduce a dynamic feedforward control strategy based on the differential of the load current, trying to adjust the duty cycle in advance by detecting the rate of change of the load current. However, differential operations are essentially high-pass filtering in the frequency domain, and their inherent characteristics determine that they will severely amplify the unavoidable high-frequency switching noise and electromagnetic interference in the sampling circuit. This amplification of noise not only causes severe non-physical jitter in the control signal, but also increases the risk of malfunction of power switching devices, and may even cause serious electromagnetic compatibility problems, leading to hardware damage.

[0004] On the other hand, sliding mode control, due to its inherent robustness to system parameter perturbations and external disturbances, is considered an effective means of solving nonlinear converter control problems. However, traditional first-order sliding mode control theory relies on high-frequency switching of the sign function on both sides of the sliding surface to force the system state to converge. This discontinuous switching characteristic leads to high-frequency chattering in the control quantity in physical implementation. For power electronic converters, chattering not only degrades the ripple quality of the output voltage and increases the burden on the filter circuit, but also causes the power switches to operate frequently under non-ideal conditions, significantly increasing switching losses and heat generation, and seriously affecting the system's operating efficiency and device lifespan.

[0005] With the development of digital control technology, event-triggered mechanisms have been gradually introduced into control system design to reduce the computational load of digital signal processors and achieve multitasking. However, most existing event-triggered control strategies follow the traditional zero-order hold logic, meaning that the controller's input signal and internal operating state are completely frozen during the non-triggered period. For controllers containing integral elements used to eliminate steady-state errors, this freezing means the interruption of the integral accumulation process. When the system state is near steady state and the deviation is less than the trigger threshold, the event-triggered mechanism no longer updates the control quantity, causing the integrator to be unable to utilize the cumulative effect of time to eliminate residual small errors. This phenomenon is called integral deadlock. It results in a constant steady-state error determined by the trigger threshold in the system at steady state, making it impossible to achieve theoretically zero steady-state error tracking.

[0006] In summary, existing technologies struggle to simultaneously achieve fast and undershoot-free dynamic response, smooth and chatter-free steady-state output, and efficient and deadlock-free computational execution when controlling high-order boost converters. A novel composite control scheme is urgently needed that can physically cancel out non-minimum phase effects, eliminate sliding mode chattering at the algorithmic level, and resolve integral deadlock at the mechanistic level. Summary of the Invention

[0007] To address the aforementioned problems, the present invention aims to provide an event-triggered super-torsional composite control system for high-order DC-DC converters, which solves the problems of slow dynamic response, severe sliding mode chattering, and easy deadlock in event triggering in the control of high-order DC-DC boost converters in the prior art.

[0008] To achieve the above technical objectives, this application provides an event-triggered super-torsional composite control system for high-order DC-DC converters. The system consists of a converter main circuit, a signal acquisition module, a digital controller (DSP), and a PWM drive module.

[0009] Digital controllers (DSPs), including:

[0010] A general model building module is used to build the state-space model of a high-order converter;

[0011] The power feedforward compensation module is used to calculate the load current feedforward based on energy conservation according to the constructed state space model.

[0012] The super-torsional sliding mode control module is used to calculate the feedback adjustment of the voltage loop based on the obtained load current feedforward.

[0013] The event triggering and discrimination module is used to determine whether to update the controller's error input based on the feedback adjustment amount by constructing a hybrid event triggering mechanism that resists Zeno phenomenon and deadlock.

[0014] The signal synthesis and driving module is used to synthesize the final duty cycle and generate a PWM wave by combining a discretization algorithm with interleaved modulation technology.

[0015] Preferably, the general model building module is used to uniformly describe the dynamic behavior of higher-order converters using the state-space averaging method.

[0016] Preferably, the general model building module must include a zero in the transfer function from the control input to the output voltage, located in the right half of the complex plane. This is used to construct a parallel channel at the physical level during power feedforward, so that the zero of its transfer function is located in the left half of the plane, and the superposition effect cancels out the influence of non-minimum phase characteristics.

[0017] Preferably, the power feedforward compensation module is used to overcome the non-minimum phase characteristics of the high-order converter caused by the right half-plane zero by designing a power balance-based feedforward compensation path. The path can directly predict the required inductor current increment based on load changes, thereby achieving "delay-free" compensation for load disturbances.

[0018] Preferably, the power feedforward compensation module is used to pre-determine the efficiency data of the converter under different load conditions based on the established nonlinear function mapping model of the efficiency coefficient with respect to the load current, obtain the efficiency characteristic curve by fitting it using the least squares method, and establish a real-time correction function of the efficiency coefficient inside the controller. The real-time correction function can be expressed as a polynomial form or a piecewise interpolation form with respect to the load current.

[0019] Preferably, the power feedforward compensation module is also used to connect a first-order low-pass filter in series in the feedforward path.

[0020] Preferably, the super-torsional sliding mode control module is used to overcome the non-minimum phase characteristics of high-order DC-DC boost converters through second-order super-torsional sliding mode control with integral compensation characteristics and anti-saturation mechanism.

[0021] Preferably, the event triggering discrimination module is used to construct a hybrid event triggering mechanism that resists Zeno phenomena and deadlocks, thereby reducing computational and communication loads while ensuring that the system does not exhibit Zeno behavior and completely eliminating steady-state errors.

[0022] Preferably, the signal synthesis and driving module is used to perform discrete synthesis and multiphase interleaved modulation driving of the control signal.

[0023] Preferably, the signal synthesis and driving module adopts a phase-shifting interleaved modulation strategy to address the situation where high-order converters typically contain multiple interleaved parallel branches, thus avoiding the situation where a simple single-channel PWM cannot achieve its performance. In this case, by driving each phase switch to conduct at different phases, the inductor current ripple is effectively canceled, making the output voltage ripple frequency N times the switching frequency, thereby further reducing the requirements for the output filter capacitor. N represents the number of PWM generator modules.

[0024] The present invention discloses the following technical effects:

[0025] 1. This invention balances rapid, undershoot-free dynamic response with smooth, chatter-free steady-state output: It resolves the contradictions inherent in traditional control through the complementary combination of "power feedforward" and "super-torsional sliding mode." Dynamically, it utilizes a feedforward path based on energy conservation and adaptive efficiency correction to directly offset the voltage undershoot of non-minimum phase systems at the physical level, reducing the voltage drop during load abrupt changes. Steady-state, it employs a standard super-torsional algorithm with continuous integral terms, completely eliminating high-frequency chattering in the control quantity while maintaining strong robustness, significantly improving power quality and extending device lifespan.

[0026] 2. This invention solves the "integral deadlock" problem of traditional event-triggered control: Addressing the issue of integral stagnation caused by traditional zero-order hold mechanisms, a hybrid triggering mechanism is proposed that allows for input freezing while maintaining state evolution. This reduces the computational load on the digital controller and significantly lowers the steady-state update frequency, while ensuring continuous operation of the controller's internal integral channel. This enables the system to eliminate steady-state error with low computational power consumption, achieving theoretically zero-error tracking.

[0027] 3. This invention achieves high signal-to-noise ratio and high engineering reliability: The entire process eliminates differential operations, fundamentally avoiding high-frequency noise amplification through integral sliding mode law and algebraic feedforward. Combined with Lyapunov stability parameter criteria, minimum event interval guarantee, and anti-integral saturation design, it effectively prevents Zeno phenomenon (infinitely fast switching) and overshoot risk in engineering applications. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is an overall block diagram of the control system described in this invention;

[0030] Figure 2 This is a flowchart of the control method described in this invention. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0032] like Figures 1-2 As shown, this invention provides an event-triggered super-torsional composite control system for high-order DC-DC converters, including a converter main circuit, a signal acquisition module (voltage / current sensor), a digital controller (DSP), and a PWM drive module. The internal logic of the digital controller is divided into five core step modules:

[0033] General model building module: Establishes the state-space model of the high-order transformer;

[0034] Power feedforward compensation module: Calculates the load current feedforward based on energy conservation;

[0035] Super-torsional sliding mode control module: calculates the feedback adjustment of the voltage loop;

[0036] Event-triggered judgment module: determines whether to update the controller's error input;

[0037] Signal synthesis and driving module: synthesizes the final duty cycle and generates a PWM wave.

[0038] Figure 1The proposed composite control system architecture is demonstrated. The core lies in the parallel architecture employed within the digital controller: an event-triggered closed-loop sliding mode feedback path at the top, and an open-loop feedforward path based on a physical model at the bottom, with the two ultimately synthesized to output the duty cycle.

[0039] Figure 2 The execution flow of the digital controller within a sampling period is demonstrated. The focus is on how the event-triggered logic determines error updates, and the deadlock-resistant logic that ensures the integral term is continuously calculated regardless of whether an event triggers.

[0040] The specific module functions of the digital controller are designed as follows:

[0041] 1. For the general model building module, a design of the generalized state-space average equation was established:

[0042] For any inclusion A high-order converter with energy storage elements (inductors / capacitors), defining a state vector. Input vector (duty cycle) ), and output variables Using the state-space averaging method, the dynamic behavior of the system can be uniformly described as follows:

[0043] ;

[0044] in: The system matrix is ​​the one for the switching transistor in the on state. The system matrix is ​​the one for the switch transistor in the off state. This represents the periodic average value of the state variable; This is the input voltage.

[0045] Addressing the core pain point solved by this invention, the above system controls the input... To output voltage transfer function The complex plane must contain zeros located in the right half-plane of the complex plane. Its transfer function can be expressed as:

[0046] ;

[0047] in, This refers to the right-half-plane zero. From the perspective of time-domain response, when a positive control input is applied, according to the initial value theorem, the initial derivative of the output voltage is related to the direct feedthrough term. The existence of the right-half-plane zero causes the system to exhibit undershoot in the initial stage of the step response.

[0048] Traditional PID control requires drastically reducing bandwidth to suppress this undershoot, resulting in excessively long settling times. The power feedforward introduced in this invention essentially constructs a parallel channel at the physical level, with its transfer function zero located in the left half-plane. This superposition effect cancels out the non-minimum phase characteristics of the original system.

[0049] 2. For the power feedforward compensation module, a feedforward compensation path based on power balance was designed:

[0050] To overcome the non-minimum phase characteristic of high-order converters caused by the right-half-plane zero (i.e., the voltage drops before rising when the load suddenly increases), a parallel feedforward path based on the physical law of conservation of energy is constructed outside the voltage feedback loop. This path can predict the required inductor current increment directly based on load changes without relying on error integration, achieving "delay-free" compensation for load disturbances.

[0051] Treating the topology as a black box, based on the law of conservation of energy, the input power... With output power equal:

[0052] ;

[0053] Right now:

[0054] ;

[0055] In the formula, This represents the efficiency coefficient.

[0056] From this, the static feedforward reference value of the first-stage inductor current can be derived:

[0057] ;

[0058] in, The target output voltage; The input voltage is collected in real time; This is the load current.

[0059] To eliminate the feedforward calculation error introduced by the non-ideal characteristics of the converter, this invention constructs an efficiency coefficient... Regarding load current A nonlinear function mapping model is used. Efficiency data of the converter under different load conditions are pre-determined, and the efficiency characteristic curve is obtained by fitting using the least squares method. An efficiency curve is then established within the controller. The real-time correction function. This function can be expressed as a polynomial or piecewise interpolation form with respect to the load current:

[0060] ;

[0061] in, This represents a preset nonlinear mapping relationship. During system operation, it is based on the real-time collected load current. The current efficiency coefficient is dynamically calculated using the above function. Then substitute that value into the aforementioned formula.

[0062] Directly sampled load current The signal contains abundant high-frequency noise. If directly used in the feedforward calculation, this noise will be introduced into the inner current loop. In this embodiment, a first-order low-pass filter is connected in series in the feedforward path, and its transfer function is:

[0063] ;

[0064] Wherein, time constant The selection is not arbitrary; it must satisfy the time-scale separation principle of singular perturbation theory. Specifically, to ensure that the feedforward signal does not introduce additional phase lag that affects the voltage loop stability, and to effectively filter out switching noise, the cutoff frequency... The following bandwidth constraints must be met:

[0065] ;

[0066] in, The cutoff frequency is designed for the voltage loop to ensure that the feedforward is faster than the feedback. The PWM switching frequency is used to ensure the filtering of switching noise. Furthermore, considering the resonant characteristics of high-order systems, the filter cutoff frequency should avoid the natural resonant frequency of the converter's LC network. This is to prevent the induction of resonant amplification in the feedforward channel.

[0067] 3. For the super-torsional sliding mode control module, a sliding mode controller based on the super-torsional algorithm is constructed:

[0068] To address the non-minimum phase characteristics of high-order DC-DC boost converters and the chattering problem inherent in traditional sliding mode control, this invention designs a second-order super-torsional sliding mode controller with integral compensation characteristics and an anti-saturation mechanism.

[0069] To achieve accurate voltage tracking, a sliding mode variable is defined. For output voltage error:

[0070] ;

[0071] Because the converter contains a multi-stage inductor-capacitor filter network, the duty cycle of the control input is... First derivatives that cannot appear directly in sliding mode variables In, it appears explicitly in its second derivative. Therefore, this system is defined as a nonlinear system with a relative order of 2.

[0072] The second-order dynamic equations of the system can be uniformly described in the following differential inclusion form:

[0073] ;

[0074] Where x is the system state vector, Represents the nonlinear drift term within the system and external disturbances. This represents the control gain term.

[0075] To ensure the robustness of the controller, precise knowledge is not required. and The specific analytical expression only requires determining its physical boundaries. Assume the system satisfies the following global Lipschitz bounded conditions within its operating range:

[0076] ;

[0077] ;

[0078] in, All are known positive real constants, representing the upper bound of the disturbance, the lower bound of the control gain, and the upper bound of the control gain, respectively.

[0079] Based on the above second-order model, a continuous torsional control law is constructed. Control output. It consists of two parts: a "nonlinear proportional term" and a "continuous integral term," and its mathematical expression is as follows:

[0080] ;

[0081] ;

[0082] ;

[0083] Will Expanded into integral form:

[0084] ;

[0085] in: For control parameters; For strongly convergent terms, use power functions. It provides high gain when far from the equilibrium point, forcing the state trajectory to reach the sliding surface quickly through the "reaching law" in a finite time. The smoothing term is a pure integral term, which is used for discontinuous sign functions. By performing integration, a continuous and smooth control signal is obtained. In steady state, it automatically approximates the equivalent control quantity, thereby physically eliminating switching chatter.

[0086] To ensure system state tracking This invention, based on Lyapunov stability theory, provides control parameters that can strictly converge to zero within a finite time. The selection criteria are as follows. Candidate functions are constructed in the form of: :

[0087] ;

[0088] Wherein, the state vector ,matrix It is a symmetric positive definite matrix:

[0089] ;

[0090] According to Lyapunov's stability theorem, a stability condition is met if and only if the control parameters satisfy the following algebraic inequality. For a negative definite system, the following conditions must be met for strong robust stability:

[0091] ;

[0092] Considering the duty cycle of the actual physical system Received The physical constraints of the interval are to prevent the integral term in the over-twist algorithm from being affected. To address the "integral saturation" phenomenon that occurs at startup or under large disturbances, dynamic truncation logic is introduced:

[0093] When the calculated total control quantity Stop immediately if it exceeds the physical boundary. The points update, that is .

[0094] The revised rule for updating integral terms is as follows:

[0095] ;

[0096] This mechanism ensures that the controller can maintain rapid desaturation capability even under physically constrained conditions, preventing the system from experiencing significant overshoot.

[0097] 4. For the event triggering judgment module, construct a hybrid event triggering mechanism that resists Zeno phenomenon and deadlock:

[0098] To reduce computational and communication load while ensuring the system does not exhibit Zeno behavior (i.e., infinitely fast switching) and completely eliminates steady-state errors, this invention designs a hybrid event-triggered strategy. This strategy comprises two aspects: the construction of triggering criteria and a guarantee of minimum event interval.

[0099] Define the voltage error value locked at the previous trigger moment as follows: The voltage error sampled in real time at the current moment is That is, the sliding mode variable defined in step 3, defining the measurement deviation. for:

[0100] ;

[0101] Set dynamic trigger threshold Triggering time sequence Determined by the following rules:

[0102] ;

[0103] in, To design trigger factors, This represents the maximum allowable steady-state ripple tolerance of the system.

[0104] when At that time, the controller input remains Unchanged, no more complex error update calculations are performed; when At that time, the system triggered an update, causing Reset measurement deviation .

[0105] Traditional event-triggered control typically employs a "zero-order hold" model, meaning the output is controlled while in the hold state. If the condition remains completely unchanged, the integrator stops accumulating, resulting in a steady-state error (i.e., deadlock). During the trigger interval... Inside, although the error signal input to the controller is frozen... However, the integral term in step 3 It does not stop updating, but continues to evolve according to the following formula:

[0106] ;

[0107] because The integral, being a non-zero constant within the trigger interval, will accumulate linearly over time. This mechanism, where the input is frozen but the internal state continues to evolve, forces the system to eventually eliminate steady-state errors, thus resolving the deadlock problem.

[0108] To demonstrate that the triggering mechanism of this invention will not cause damage to the switching devices due to excessively high frequency operation, a minimum event interval analysis is introduced.

[0109] To prove the physical feasibility of this mechanism (i.e., it will not burn out the switching device), based on the theory of periodic event triggering, this invention guarantees the time interval between two adjacent triggers. There exists a strict positive lower bound:

[0110] ;

[0111] in, The Lipschitz constant of the system, i.e., the system matrix. norm ; To output the norm of the matrix; These are positive constants related to the perturbation boundary and the initial state.

[0112] The above inequality shows that, There exists a strictly greater than zero lower bound. This eliminates the Zeno phenomenon from the perspective of inequality theory, thus verifying the safety and stable operation of the control strategy in its physical implementation.

[0113] 5. For the signal synthesis and driving module, discrete synthesis and polyphase interleaved modulation driving of the control signal were designed:

[0114] The final calculation of the control law, signal synthesis, and generation of pulse width modulation (PWM) waveforms are completed in a digital signal processor (DSP). To meet the multi-drive requirements of high-order converters, an implementation scheme combining discretization algorithms and interleaved modulation techniques is adopted.

[0115] Since the control algorithms in the torsional sliding mode control module and the event triggering discrimination module are based on continuous-time models, they need to be transformed into difference equations using the Euler method in the DSP. Let the system sampling period be... In the In each control cycle:

[0116] Perform sliding surface calculations:

[0117] ;

[0118] Differential term calculate:

[0119] ;

[0120] The integration term is calculated based on the event triggering status in the event triggering discrimination module. Deadlock prevention update:

[0121] ;

[0122] In the formula, This is the error value that triggers the mechanism to lock. The formula shows that even if the input is locked, the integral output... Still moving with time Cumulative evolution.

[0123] The output of the super torsion sliding mode control module This refers to the duty cycle adjustment amount, while the feedforward amount output by the power feedforward compensation module is... This refers to the physical quantity of electric current. To achieve superposition, gain scaling and normalization are required.

[0124] ;

[0125] In the formula, Total duty cycle instruction; This is the feedforward scaling factor, used to convert the predicted load current into a corresponding duty cycle compensation amount, which can be determined based on the converter's input voltage. Make dynamic adjustments:

[0126] ;

[0127] To ensure the safety of the physical implementation, the total duty cycle of the synthesized data needs to be limited:

[0128] ;

[0129] In the formula, This is the final duty cycle; Minimum duty cycle; This is the maximum duty cycle. Simultaneously, the limiting status is fed back to the integrator of the super-torsional sliding mode control module, pausing when limiting occurs. The accumulation (i.e., anti-integral saturation) prevents overshoot after the system exits saturation.

[0130] High-order converters typically contain multiple interleaved parallel branches, and a simple single-channel PWM cannot fully utilize their performance. This invention employs a phase-shifted interleaved modulation strategy. The calculated... Simultaneously superimposed to One PWM generator module, among which This represents the number of phases in the converter. Each phase carrier signal... phase difference between Set as:

[0131] ;

[0132] By driving the switching transistors of each phase to conduct at different phases, the inductor current ripple is effectively canceled out, thereby increasing the output voltage ripple frequency to match the switching frequency. This doubles the requirement for output filter capacitors, thus further reducing the demand on output filter capacitors.

[0133] In summary, this invention adopts a flattened parallel strategy of "power feedforward + sliding mode feedback": the feedforward path is constructed based on the physical law of conservation of energy, and adaptive correction is achieved by establishing a nonlinear mapping function of efficiency with respect to load current, and a time-scale separation filter is connected in series, so as to directly cancel the voltage undershoot caused by the zero point of the right half plane from the physical level without introducing differential noise.

[0134] This invention constructs a control law consisting of a superposition of a "square root nonlinear term" and a "continuous integral term," and uses an integral element to smooth the discontinuous sign function. This method ensures that the system satisfies the Lyapunov stability criterion and achieves finite-time convergence, while completely eliminating the chattering phenomenon of traditional sliding mode, and can achieve derivative-free control without the need to introduce a differentiator or observer.

[0135] This invention adopts an innovative logic of "input freeze but state evolution": when the system is in a non-triggered hold state, the controller stops sampling and updating the external error signal, but forces the internal integral channel of the controller to continuously perform time accumulation calculation using the locked error value; this mechanism, together with minimum event interval guarantee and anti-integral saturation design, effectively solves the steady-state deadlock problem and Zeno phenomenon in traditional event-triggered control.

[0136] In summary, this invention solves the problems of dynamic response hysteresis and feedforward noise interference caused by the non-minimum phase characteristics of high-order converters: without introducing differential operation noise, it overcomes the non-minimum phase characteristics of high-order systems, achieves fast and undershoot-free compensation for load disturbances, and significantly improves the transient response speed of the system.

[0137] This invention solves the inherent high-frequency chattering problem in traditional first-order sliding mode control: while retaining the strong robustness of sliding mode control to parameter perturbations, it completely eliminates high-frequency chattering of the control signal, obtains a time-continuous and smooth control output, thereby optimizing power quality and extending device life.

[0138] This invention solves the problems of "integral deadlock" and steady-state error in traditional event-triggered control: it designs a mechanism that can reduce the computational load of the digital controller while preventing the integrator from getting stuck, ensuring that the system can still achieve accurate tracking of the output voltage without steady-state error by utilizing the cumulative effect of time under low-frequency update conditions.

[0139] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0140] In the description of this invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0141] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. An event-triggered super-torsional composite control system for high-order DC-DC converters, comprising a converter main circuit, a signal acquisition module, a digital controller (DSP), and a PWM drive module, characterized in that... The digital controller DSP includes: A general model building module is used to build the state-space model of a high-order converter; The power feedforward compensation module is used to calculate the load current feedforward based on energy conservation according to the constructed state space model. The super-torsional sliding mode control module is used to calculate the feedback adjustment of the voltage loop based on the obtained load current feedforward. The event triggering discrimination module is used to determine whether to update the controller's error input based on the feedback adjustment amount by constructing a hybrid event triggering mechanism that resists Zeno phenomenon and deadlock. The signal synthesis and driving module is used to synthesize the final duty cycle and generate a PWM wave by combining discretization algorithms and interleaved modulation techniques. The event triggering discrimination module constructs a hybrid event triggering mechanism that resists the Zeno phenomenon and deadlock, including two aspects: triggering criterion construction and minimum event interval guarantee. Using the voltage error sampled in real time at the current moment Voltage error value locked at the previous trigger moment The difference between them is used to calculate the measurement deviation. ; Based on the rules of the trigger time sequence, obtain the design trigger factor. and the system's maximum allowable steady-state ripple tolerance ; when At that time, the controller input remains Unchanged; when At that time, the system triggered an update, causing Reset measurement deviation ; During the trigger interval Inside, the error signal input to the controller is frozen. However, the integral term It continues to evolve according to the following formula: In the formula, Indicates control parameters; Based on the theory of periodic event triggering, the time interval between two adjacent triggers is guaranteed. There exists a positive lower bound: ;in, The Lipschitz constant of the system, i.e., the system matrix. norm ; To output the norm of the matrix; These are positive constants related to the perturbation boundary and the initial state.

2. The event-triggered super-torsional composite control system for high-order DC-DC converters according to claim 1, characterized in that: The general model construction module is used to uniformly describe the dynamic behavior of high-order converters using the state-space averaging method.

3. The event-triggered super-torsional composite control system for high-order DC-DC converters according to claim 2, characterized in that: The general model construction module must contain a zero in the transfer function from the control input to the output voltage, located in the right half of the complex plane. This is used to construct a parallel channel at the physical level during power feedforward, so that the zero of its transfer function is located in the left half of the plane, and the superposition effect cancels out the influence of non-minimum phase characteristics.

4. The event-triggered super-torsional composite control system for high-order DC-DC converters according to claim 3, characterized in that: The power feedforward compensation module is used to overcome the non-minimum phase characteristics of high-order converters caused by the right half-plane zero by designing a feedforward compensation path based on power balance. The path can directly predict the required inductor current increment based on load changes, thereby achieving "delay-free" compensation for load disturbances.

5. The event-triggered super-torsional composite control system for high-order DC-DC converters according to claim 4, characterized in that: The power feedforward compensation module is used to pre-determine the efficiency data of the converter under different load conditions based on the established nonlinear function mapping model of the efficiency coefficient with respect to the load current, obtain the efficiency characteristic curve by fitting it with the least squares method, and establish a real-time correction function of the efficiency coefficient inside the controller. The real-time correction function can be expressed as a polynomial form or a piecewise interpolation form with respect to the load current.

6. The event-triggered super-torsional composite control system for high-order DC-DC converters according to claim 5, characterized in that: The power feedforward compensation module is also used to connect a first-order low-pass filter in series in the feedforward path.

7. The event-triggered super-torsional composite control system for high-order DC-DC converters according to claim 6, characterized in that: The super-torsional sliding mode control module is used to overcome the non-minimum phase characteristics of high-order DC-DC boost converters through second-order super-torsional sliding mode control with integral compensation characteristics and anti-saturation mechanism.

8. The event-triggered super-torsional composite control system for high-order DC-DC converters according to claim 7, characterized in that: The event triggering discrimination module is used to construct a hybrid event triggering mechanism that resists Zeno phenomena and deadlocks, thereby reducing computational and communication loads while ensuring that the system does not exhibit Zeno behavior and completely eliminating steady-state errors.

9. The event-triggered super-torsional composite control system for high-order DC-DC converters according to claim 8, characterized in that: The signal synthesis and driving module is used to perform discrete synthesis and multiphase interleaved modulation driving of the control signal.

10. The event-triggered super-torsional composite control system for high-order DC-DC converters according to claim 9, characterized in that: The signal synthesis and driving module adopts a phase-shifting interleaved modulation strategy to address the situation where high-order converters typically contain multiple interleaved parallel branches, thus avoiding the situation where a simple single-channel PWM cannot achieve its performance. Specifically, by driving each phase switch to conduct at different phases, the inductor current ripple is effectively canceled, making the output voltage ripple frequency N times the switching frequency, thereby further reducing the requirements for the output filter capacitor. N represents the number of PWM generator modules.

Images