Time division multiplexing reading circuit for superconducting detector array and reading method thereof

Abstract

The invention provides a time division multiplexing readout circuit for a superconducting detector array and a readout method thereof, the circuit comprises detection pixel units, at least two row gating control lines and a column readout channel, and each row gating control line is at least connected with two detection pixel units; each detection pixel unit comprises a detector bias branch, an LC filtering isolation network, a Josephson junction switch module and a signal transmission branch which are connected in sequence; each row gating control line is connected to the control end of the Josephson junction; a common input signal line connected with the output end of each signal transmission branch is connected in series with at least two input inductors Lin, and a corresponding reading SQUID is arranged beside each input inductor Lin for magnetic coupling, so that a primary direct reading structure is formed; the read-out SQUIDs are also connected in series with one another to form a read-out SQUID column series array, and a column read-out channel is jointly formed; a time division multiplexing readout method is also provided.

Description

Technical fields:

[0001] This invention belongs to the field of superconducting electronics and weak signal detection technology, specifically relating to a time-division multiplexing readout circuit and its readout method for a superconducting detector array. Background technology:

[0002] Superconducting detectors, with their extremely high energy resolution, extremely low dark count rate, and wide spectral response, have become a core detector technology in fields such as X-ray spectroscopy and astronomical observation (e.g., cosmic microwave background radiation, CMB detection). With the increasing demands of scientific observation, the size of detector arrays is expanding from hundreds of pixels to thousands or even millions of pixels. This poses a significant challenge to the performance of readout circuits. Currently, the most widely used and technologically mature readout solution is time-division multiplexing (TDM), with the mainstream approach based on superconducting quantum interference devices (SQUIDs) as switching elements. For example... Figure 7 A schematic diagram of a typical two-stage SQUID time-division multiplexing readout circuit architecture in the prior art is shown. Figure 7 As shown, in this local circuit architecture, the signal current generated by the superconducting detector is first coupled to SQ1 (the first-stage readout SQUID). In this architecture, SQ1 serves as both a first-stage readout device and a gating switch. The system controls the row gating current to switch SQ1 between a "zero-resistance superconducting state" and a "finite-resistance state," thereby enabling the gating of specific row signals. The output signals of SQ1 in the same column converge to a common transmission line, through which the signal flux is magnetically coupled to SQ2 (the second-stage readout SQUID). After secondary amplification by SQ2, the signal is then output to the room-temperature circuit via a series array of SQUIDs.

[0003] Although the aforementioned SQUID switch-based architecture has been widely used, its inherent limitations restrict the further development of large-scale arrays. First, SQ1, as a switching element, is essentially a magnetic flux interference loop, which is susceptible to interference from ambient magnetic fields and suffers from inter-pixel crosstalk. Second, the multi-stage cascaded structure of "SQ1-summing coil-SQ2" requires complex feedback and bias circuitry in low-temperature regions, increasing the system's thermal load, wiring complexity, and operational difficulty.

[0004] Therefore, it is necessary to further study a novel superconducting switch and readout circuit architecture that is simple in structure, can avoid the complex control problems caused by multi-stage cascading, and has smaller size and faster response speed. Summary of the Invention:

[0005] The technical problem to be solved by the present invention is to provide a time-division multiplexing readout circuit and readout method for a superconducting detector array.

[0006] This invention relates to a novel time-division multiplexing readout circuit and method for a superconducting detector array based on a Josephson junction as a switching element. The readout circuit utilizes the current-voltage characteristics of a single Josephson junction to achieve signal on / off control, offering advantages such as compact structure, strong resistance to magnetic interference, fast switching speed, and high turn-off isolation.

[0007] To solve the above-mentioned technical problems and achieve the above-mentioned and other related objectives, the present invention provides a technical solution for a time-division multiplexing readout circuit for a superconducting detector array as follows:

[0008] A time-division multiplexing readout circuit for a superconducting detector array is characterized by comprising detector pixel units, row gating control lines, and column readout channels. The row gating control lines are at least two in number, each connected to at least two detector pixel units. Each detector pixel unit comprises a detector bias branch, an LC filter isolation network, a Josephson junction switching module, and a signal transmission branch connected in sequence. Each row gating control line is connected to the control terminal of a Josephson junction in the Josephson junction switching module, used to apply a row gating current to the at least two connected Josephson junctions. The output terminal of the signal transmission branch of each detector pixel unit is connected to a common input signal line (5), and at least two input inductors L are connected in series on the common input signal line. in Each input inductor L in A corresponding readout SQUID is provided next to each of the input inductors L. in The corresponding readout squuids are magnetically coupled to form a single-stage direct readout structure; each readout squuid is also connected in series to form a series array of readout squuid columns, and the common input signal line (5) and its series input inductor L in The column readout channel is formed by the serial array of SQUID columns.

[0009] A further technical solution of the time-division multiplexing readout circuit for a superconducting detector array according to the present invention is as follows:

[0010] Furthermore, in the constituent units of the detection pixel unit, the detector bias module includes one superconducting detector R. TES The superconducting detector is connected to a bias resistor Rs and a choke inductor L. Choke The choke inductor L Choke The bias resistor R connected in series in the superconducting detector sThe bias branch presents high impedance to high-frequency AC signals, thereby preventing the detector signal current from flowing back to the bias circuit; the LC filter isolation network includes an LC signal transmission branch; the LC signal transmission branch includes a capacitor C and an inductor L connected in series, and this branch is connected between the superconducting detector and the Josephson junction switching module, configured to allow the detection signal of a specific frequency band to pass through, while isolating the DC bias voltage of the detector from the switching circuit at the back end.

[0011] Furthermore, in the constituent units of the detection pixel unit, the Josephson junction switch module (3) is connected between the output terminal of the filter isolation network and ground; the switch module includes at least one Josephson junction, and each Josephson junction is connected in parallel with a shunt resistor; the signal transmission branch and the Josephson junction switch module form a parallel shunt structure; the signal transmission branch includes a series-connected input resistor Rin, which is used to guide the detection signal current to the column readout channel.

[0012] Furthermore, the Josephson junction switch module (3) is configured to be in the same low-temperature zone as the detector bias module in order to reduce the length of the interconnect leads and parasitic parameters between the modules.

[0013] Furthermore, the Josephson junction switching module (3) is configured to include at least one Josephson junction; the parallel shunt resistor R in the Josephson junction switching module (3) JJ The resistance value makes the hysteresis parameter βC of the Josephson junction < 1.

[0014] Furthermore, the inductance value of the input inductor Lin in the signal transmission branch is matched with the input impedance of the SQUID array, or the total series inductance value of Lin is configured to meet the system bandwidth requirements.

[0015] To solve the above-mentioned technical problems, the readout method for the time-division multiplexing readout circuit of the superconducting detector array of the present invention is as follows:

[0016] A time-division multiplexing readout method for a superconducting detector array, implemented based on the circuit described above, is characterized by comprising the following steps:

[0017] Step 1: System initialization. Apply DC bias current to the superconducting detectors RTES in all detector pixel units to put them into working state. In the initial state, no current is applied to all row gating control lines or a low-level current is applied, and the Josephson junction switching modules in all detector pixel units are in a zero-resistance superconducting state.

[0018] Step 2, row gating: Apply row gating current to the row gating control line corresponding to row N;

[0019] Step 3, Current guidance and readout: The Josephson junction in the Nth row of the detector pixel unit switches its state due to the row selection current, guiding the detector's signal current to the column readout channel and driving the SQUID series array output.

[0020] Step 4: Row reset, remove the row selection current on the row selection control line of row N, restore the Josephson junction of row N to the zero-resistance superconducting state, and cut off the transmission of the row signal to the column readout channel;

[0021] Step 5: Cyclic scan. Repeat steps 2 to 4 for the N+1th row in sequence until all rows are scanned. This process is repeated to achieve time-division multiplexing readout of the detector array.

[0022] A further technical solution of the readout method for the time-division multiplexing readout circuit of the present invention is as follows:

[0023] Furthermore, in steps two and three, the amplitude of the row selection current is configured to be greater than the critical current I of the Josephson junction in the Josephson junction switching module. c Driven by this current, the Josephson junction switches from a zero-resistance superconducting state to a finite-resistance state, thereby impeding the signal current of the detector and guiding it to the signal transmission branch connected in parallel with the switch.

[0024] Furthermore, the shunted signal current converges and flows into the common input signal line of the column readout channel, passing through the series-connected input inductor unit L. in The signal current drives the SQUID series array through mutual inductance coupling, and the SQUID series array converts the induced magnetic flux signal into a voltage signal and outputs it.

[0025] Furthermore, in step four, after canceling the row selection current of row N, the system also enters an isolation wait state; the system maintains a preset isolation time to wait for the current to flow through the common input signal line and the input inductor unit (L). in The residual signal current decays to below a preset threshold, and then the next row gating in step five is executed.

[0026] This invention provides a time-division multiplexing readout circuit and method for a superconducting transition edge sensor array using a current-controlled Josephson junction as a switching element. Compared with the prior art, it has the following characteristics and advantages:

[0027] 1. This invention utilizes Josephson junctions as superconducting switches, eliminating the magnetic flux quantum interference loop structure relied upon by traditional SQUID switches. From a physical perspective, this eliminates the device's sensitivity to ambient background magnetic fields and the magnetic flux of adjacent channels, thus optimizing the inter-switch crosstalk problem caused by magnetic field coupling in large-scale arrays.

[0028] 2. Traditional time-division multiplexing technology typically employs a multi-stage SQUID readout architecture, with each stage requiring independent bias and feedback control, leading to complex low-temperature wiring and complex inter-stage impedance matching. This invention achieves direct single-stage amplification and readout of the detector signal through a structure where a common input signal line is directly coupled to a SQUID series array via a series inductor. This not only reduces the number of active devices and leads at low temperatures but also improves the operational complexity of multi-stage cascading, enhancing system reliability.

[0029] 3. The superconducting switch of the present invention has a flexible structural configuration for each part, that is, the performance of the superconducting switch such as area, transmission speed, power consumption and noise can be adjusted by adjusting the parameters of the RL transmission module, the number of Josephson junctions and the number of readout SQUIDs.

[0030] 4. By eliminating magnetic flux coupling loops and multi-stage cascade structures, the circuit size of a single pixel unit is reduced, which is beneficial for achieving higher density pixel integration on a limited wafer area. Attached Figure Description

[0031] Figure 1 This is a detailed circuit connection diagram based on a 3×2 array according to an embodiment of the present invention (Note: This diagram is only a basic local array of the circuit in the embodiment. The architecture of the present invention can be extended to any M×N scale, where M and N are both natural numbers of at least 2).

[0032] Figure 2 This is a schematic diagram of the overall functional modules of the time-division multiplexing readout circuit of a superconducting detector array based on a 2×2 array according to an embodiment of the present invention.

[0033] Figure 3 This is the equivalent circuit diagram of the Josephson junction switching unit in this invention, along with its current-voltage (IV) characteristics and operating point principle schematic diagram.

[0034] Figure 4 The single-channel Josephson junction switching unit in this invention is used in different input resistances R in A schematic diagram of the signal transmission simulation waveform under the specified parameters.

[0035] Figure 5 This is a schematic diagram of the flow steps of the time-division multiplexing readout method implemented in this invention.

[0036] Figure 6 This is a schematic diagram of the timing control and signal output waveform of the time-division multiplexing readout method implemented in this invention.

[0037] Figure 7 A schematic diagram of a typical two-stage SQUID time-division multiplexing readout circuit architecture in the prior art is shown.

[0038] The parts indicated by the labels in each figure are:

[0039] 1. Detector bias module; 2. LC filter isolation network; 3. Josephson junction switch module; 4. Signal transmission branch; 5. Common input signal line; 6. Detector pixel unit; 7. Column readout channel; 8. SQUID cascade array; 9. Row gating control line. Detailed Implementation

[0040] The present invention will be further described in detail below with reference to the accompanying drawings.

[0041] This invention relates to a time-division multiplexing readout circuit for a superconducting detector array, such as... Figure 1 As shown, the system includes detector pixel units 6, row selection control lines 9, and column readout channels 7. There are at least two row selection control lines 9, each connected to at least two detector pixel units 6. Each detector pixel unit 6 includes a detector bias branch 1, an LC filter isolation network 2, a Josephson junction switching module 3, and a signal transmission branch 4, connected in sequence. Each row selection control line 9 is connected to the control terminal of the Josephson junction in the Josephson junction switching module 3, used to apply a row selection current to the at least two connected Josephson junctions. The signal transmission of each detector pixel unit 6... The output of the transmission branch 4 is connected to the common input signal line (5). At least two input inductors Lin are connected in series on the common input signal line 5. Each input inductor Lin is accompanied by a corresponding readout SQUID. Each input inductor Lin is magnetically coupled to its corresponding readout SQUID to form a first-level direct readout structure. Each readout SQUID is also connected in series to form a readout SQUID column array 8. The common input signal line (5) and its connected input inductors Lin and the readout SQUID column array 8 together form a column readout channel 7.

[0042] like Figure 1 As shown, in the constituent units of the detection pixel unit 6, the detector bias module 1 includes a superconducting detector RTES, which is connected to a bias resistor Rs and a choke inductor LChoke. The choke inductor LChoke is connected in series in the bias branch where the bias resistor Rs of the superconducting detector is located, presenting a high impedance to high-frequency AC signals, thereby preventing the detector signal current from flowing back to the bias circuit. The LC filter isolation network 2 includes an LC signal transmission branch. The LC signal transmission branch includes a capacitor C and an inductor L connected in series. This branch is connected between the superconducting detector and the Josephson junction switching module, configured to allow detection signals of a specific frequency band to pass through, while isolating the DC bias voltage of the detector from the downstream switching circuit.

[0043] like Figure 1As shown, in the constituent units of the detection pixel unit 6, the Josephson junction switch module (3) is connected between the output of the filter isolation network and ground; the switch module contains at least one Josephson junction, and each Josephson junction is connected in parallel with a shunt resistor; the signal transmission branch 4 and the Josephson junction switch module 3 form a parallel shunt structure; the signal transmission branch 4 contains an input resistor Rin connected in series, which is used to guide the detection signal current to the column readout channel 7.

[0044] like Figure 1 As shown, the Josephson junction switch module (3) is configured to be in the same low-temperature zone as the detector bias module 1 to reduce the length of the interconnect leads and parasitic parameters between the modules. The Josephson junction switch module (3) is configured to include at least one Josephson junction; the resistance value of the parallel shunt resistor RJJ in the Josephson junction switch module (3) makes the hysteresis parameter βC of the Josephson junction < 1. The inductance value of the input inductor Lin in the signal transmission branch 4 is matched with the input impedance of the SQUID array, or the total series inductance value of Lin is configured to meet the system bandwidth requirements.

[0045] like Figure 5 As shown, the time-division multiplexing readout method for superconducting detector arrays of the present invention is implemented based on the circuit described above and includes the following steps:

[0046] Step 1: System initialization. Apply DC bias current to the superconducting detectors RTES in all detector pixel units 6 to put them into working state. In the initial state, no current is applied to all row selection control lines 9 or a low-level current is applied, and the Josephson junction switch modules 3 in all detector pixel units are in a zero-resistance superconducting state.

[0047] Step 2, row gating: Apply row gating current to the row gating control line 9 corresponding to row N.

[0048] Step 3, Current Guidance and Readout: The Josephson junction in the Nth row of the detector pixel unit 6 switches its state due to the row selection current, guiding the detector's signal current to the column readout channel 7 and driving the SQUID serial array output.

[0049] Step 4: Row reset, remove the row selection current on row selection control line 9 of row N, restore the Josephson junction of row N to the zero-resistance superconducting state, and cut off the transmission of the row signal to column readout channel 7.

[0050] Step 5: Cyclic scan. Repeat steps 2 to 4 for the N+1th row in sequence until all rows are scanned. This process is repeated to achieve time-division multiplexing readout of the detector array.

[0051] In steps two and three, the amplitude of the row selection current is configured to be greater than the critical current Ic of the Josephson junction in the Josephson junction switching module 3. Driven by this current, the Josephson junction switches from a zero-resistance superconducting state to a finite-resistance state, thereby hindering the signal current of the detector and guiding it to the signal transmission branch 4 connected in parallel with the switch.

[0052] Furthermore, the shunted signal current converges into the common input signal line of the column readout channel 7, and flows through the series-connected input inductor unit Lin; the signal current drives the SQUID series array through mutual inductance coupling, and the SQUID series array converts the induced magnetic flux signal into a voltage signal and outputs it.

[0053] Furthermore, in step four, after canceling the row selection current of the Nth row, the system also enters an isolation waiting state; the system maintains a preset isolation time to wait for the residual signal current flowing through the common input signal line and the input inductor unit (Lin) to decay to below a preset threshold before executing the next row selection in step five.

[0054] This invention relates to a time-division multiplexing readout circuit for superconducting detector arrays, applicable to TES (Transition Edge Sensor), a thermal detector based on the extreme sensitivity of superconducting materials to heat near their phase transition critical temperature. The core working principle of a TES is to bias a superconducting thin film at the transition edge near its superconducting transition temperature. When it absorbs photons or radiant energy, a slight increase in film temperature causes a dramatic change in resistance, allowing for precise inference of the incident energy by measuring this resistance change. However, this readout circuit is also applicable to other superconducting detectors, such as MMC.

[0055] The following implementation is described using a superconducting detector (TES) as an example.

[0056] like Figure 1 and Figure 2 As shown in the figure, this diagram illustrates the overall architecture principle of the time-division multiplexing readout circuit for a superconducting detector array based on a Josephson junction switch provided in an embodiment of the present invention. For clarity and ease of understanding, an appendix is ​​attached. Figure 1 The image shows a 3x2 array structure as an example, with attached... Figure 2The diagram illustrates a 2x2 array structure as an example. However, it's important to note that the circuit architecture and readout method provided by this invention are fully scalable and not limited to the specific number of rows and columns shown. In practical applications, this array can be expanded to any size of M rows and N columns (where M and N are integers greater than or equal to 2) according to detection requirements. Regardless of the array size, the cell connection relationships, row gating logic, and column readout principles remain consistent with those described in this embodiment. Structurally, the circuit mainly consists of detection pixel units, row gating control lines, and column readout channels. Specific module connections and functional descriptions are as follows:

[0057] Detector bias module 1 (corresponding to dashed box 1 in the figure): This module is located at the very front of the pixel unit and is used to generate the detection signal. The bias current input terminal (IB) is connected to one end of the shunt resistor (Rs) and the choke inductor (L). choke One end of the shunt resistor (Rs) is grounded. The other end of the choke inductor (L) is grounded. choke The other end of the sensor is connected to the superconducting transition edge R. TES Series connection. R TES The other end is grounded. The common connection point between the choke inductor and the sensor constitutes the signal output terminal of this module, which is connected to the subsequent module. Shunt resistor (R) s The resistance of ) is much smaller than that of R. TES This provides a stable voltage bias for the detector. Choke inductor (L choke It is used to block high-frequency AC signals and prevent the signal current generated by the detector from flowing back to the DC bias circuit.

[0058] LC filter isolation module 2 (corresponding to dashed box 2 in the figure): This module connects between the sensing module and the switching module, and consists of an isolation capacitor (C) and a filter inductor (L) connected in series. The front end of the capacitor (C) is connected to the output node of the front-end detector bias module (dashed box 1). The rear end of the capacitor (C) is connected to the inductor (L). in The front end of the inductor (L) is connected to the core control node (marked as Ctrl in the diagram). This module is used to isolate the detector module and the Josephson junction switch module. The capacitor (C) blocks the DC bias voltage, and the inductor (L) limits the signal bandwidth; together, they form a bandpass filter network.

[0059] Josephson junction switching module (corresponding to dashed box 3 in the figure): This module is the core component for implementing time-division multiplexing control. The module contains a Josephson junction (JJ) and a shunt resistor (R). JJ The two are connected in parallel. One end of the parallel connection is connected to the core control node (Ctrl), and the other end is directly grounded. The Josephson junction is controlled by the row strobe control lines (ISW1, ISW2, ISW3). Figure 1As shown, the first row control line (I) SW1 Connect or couple to all pixels in the first row (R) TES11 ,R TES12 The Josephson junction in the device is used to control the switching between the "superconducting state" and the "resistive state".

[0060] Off state (OFF): When the switch is in the zero-resistance superconducting state, the signal of node Ctrl is directly short-circuited to ground to achieve signal cutoff.

[0061] ON state: When the switch is in the resistive state, it presents high impedance, forcing the signal current to flow to the subsequent readout branch, thereby enabling signal selection.

[0062] Signal transmission branch 4 (corresponding to dashed box 4 in the diagram): This module is used to export and converge the selected signal. This module contains an input resistor (Rin). One end of the resistor is connected to the core control node (Ctrl) in parallel with the switch module, and the other end is connected to the common convergence node (labeled Add in the diagram). This serves as a signal guiding path, transmitting the detector's signal to the common column line.

[0063] Column readout channel 7 (corresponding to dashed box 7 in the figure): This module demonstrates the readout structure after signal convergence. The convergence nodes (Add) of all pixel units in the same column (e.g., the first column) are connected to the same vertical common conductor. Multiple input inductors (L...) are connected in series on this common conductor. in As shown in the figure, the signal current (Δi) flows sequentially through these series-connected inductors. The column readout device consists of multiple readout squiids connected in series. Each input inductor (L) on the common line... in ) respectively with the corresponding read SQUID through mutual inductance (M i Magnetic coupling is performed. The top of the SQUID series array is connected to a room temperature preamplifier, which outputs an amplified voltage signal.

[0064] The circuit structure is described in detail below, following the direction of signal flow from generation to readout:

[0065] 1. Signal Generation and Bias Stage: Each detector pixel unit contains a superconducting transition edge sensor (R) at its front end. TES Bias circuit: R TES With a shunt resistor R s Parallel connection, consisting of constant current source I B A bias current is provided to enable the detector to operate on the steep edge of the superconducting transition. Choke design: A choke inductor L is connected in series in the bias branch. choke The inductor presents zero impedance to DC bias but high impedance to high-frequency detection signals, thereby forcing the AC signal current generated by the detector to flow to the transmission stage at the back end, preventing signal backflow and leakage into the bias circuit.

[0066] 2. The signal output from the detector in the filtering and isolation stage enters an LC filtering and isolation network composed of an inductor L and a capacitor C connected in series. DC blocking function: Capacitor C blocks the DC bias voltage, ensuring that the downstream switching circuit is not affected by the detector bias point. Bandwidth limitation: L and C form a series resonant circuit, setting a specific passband frequency, allowing only valid detection signals to pass through, and suppressing out-of-band noise.

[0067] 3. The filtered signal from the switch control stage reaches the core switch node. Here, the Josephson junction switch module of this invention is connected. Device structure: The switch module includes a Josephson junction with a shunt resistor R connected in parallel across its two ends. JJ The shunt resistor is configured such that the hysteresis parameter βc of the Josephson junction is less than 1, ensuring the device has hysteresis-free overdamped IV characteristics. Connections: The Josephson junction is connected between the signal path and ground. Its control terminal is connected to the horizontal strobe control line, receiving the horizontal strobe current I. SW .

[0068] 4. The signal shunt and transmission stage is connected in parallel with the Josephson junction switching module to form the signal transmission branch. Branch structure: This branch mainly includes an input resistor R. in Current conduction mechanism: R in Together with the Josephson junction, they form a current shunt network. When the switch is in the off state (superconducting state), the signal current preferentially flows to ground through the zero-resistance Josephson junction; when the switch is in the on state (resistive state), the Josephson junction exhibits high impedance, and the signal current is "squeezed" and guided through R. in Proceed to the next level.

[0069] 5. Convergence and First-Level Direct Readout Stage: The signal transmission branches of all pixel units are connected at the input resistance R. in The back end converges and connects to a common input signal line. Multiple input inductor units (L...) are connected in series on this common input signal line. in These inductors no longer belong to individual pixels, but are part of the common transmission line load. Column readout devices directly employ a SQUID series array (SSA) consisting of multiple DC-SQUIDs connected in series. Each input inductor L on the common line... in Each is connected to a corresponding SQUID in the SSA via mutual inductance M iMagnetic coupling is achieved. In its working mechanism, the converged signal current flows through a series inductor chain, simultaneously modulating all the SQUIDs in the array to achieve in-phase superposition of signal voltages. Since the signal is transmitted via "current-guided" rather than the "multi-stage flux amplification" of traditional techniques, the system no longer requires multi-stage SQUID readout, thus eliminating the bias lines, feedback lines, and summing coils associated with SQ1. This architectural innovation based on device physical characteristics makes "single-stage direct drive" possible. This structure eliminates the independent first-stage SQUID (SQ1) in traditional architectures, forming a simple and efficient single-stage direct amplification and readout architecture.

[0070] To further explain the physical control mechanism of the switching module in the above architecture, combined with Figure 3 Please provide an explanation. Figure 3 a shows the equivalent circuit of a single-channel switch. Figure 3 b shows its current-voltage (IV) characteristic curve.

[0071] like Figure 3 As shown in Figure a, this diagram illustrates the circuit connections and signal flow of a single-channel switching unit. The left side shows two parallel current sources. ISig represents the analog signal current (sine wave schematic) from the detector. ISW represents the control current (square wave schematic) from the row gating control line, used to control the switch state. The middle section is the core switching assembly, consisting of a Josephson junction (JJ) and a shunt resistor (RJJ) connected in parallel. This parallel combination is connected between the signal path and ground. The right side shows the signal transmission and readout branch, containing a series input resistor and input inductor. The input inductor is coupled to the readout on the right side via mutual inductance, and the SQUID output is connected to the preamplifier.

[0072] IV characteristics and working principle as follows Figure 3 As shown in figure b, the vertical axis represents the total current flowing through the Josephson junction, and the horizontal axis represents the voltage across the junction. The I-axis is labeled in the figure. c This is the critical current of the Josephson junction. This is the current threshold that distinguishes between the "superconducting state" and the "resistive state". Operating state one: The off state corresponds to I in the diagram. low Region Identification. When the row select control current is low (or zero), causing the total current flowing through the junction to be less than the critical current, the operating point is located on the vertical axis, corresponding to a horizontal axis voltage V = 0. This means the Josephson junction is in a zero-resistance superconducting state. Back Figure 3 a. Since the junction resistance is zero, it acts like an ideal wire, directly short-circuiting the signal path to ground. Detector signal I Sig The entire flow will pass through the Josephson junction and into ground, and will not flow to the right where there is resistance R. inThe readout branch. At this time, the readout SQUID cannot detect a signal, and the channel is in the closed state. Working state two: Open state corresponds to I in the figure. high Region identification. When a high-level current is applied to the row select control line, causing the total current flowing through the junction to exceed the critical current, the operating point transitions, moving along the curve to the right-hand sloping region. A finite voltage V is generated across the junction. JJ This means that the Josephson junction has lost its superconductivity and exhibits a finite dynamic resistance. Since the Josephson junction has become a resistor, it no longer short-circuits the signal. Detector signal I Sig Obstructed and forced to split, most of the current flows to the parallel signal transmission branch, flowing through R in and L in Read the response: Flowing through L in The signal current passes through the mutual inductor M i The driver reads the SQUID, the preamplifier outputs a signal waveform, and the channel is in the open state.

[0073] To verify the signal transmission capability of the above switching principle and to determine the key component R in the signal transmission branch. in To determine the optimal value, a single-channel simulation analysis was performed in this embodiment. For example... Figure 4 As shown, the simulation illustrates the dynamic process of the switch. The top curve represents the total drive current (generated by a 40MHz sinusoidal signal I). sig and a square wave bias I with a period of 100ns Bias (Overlay). The curves below show different R values. in Output current response under resistance. Within the 0-50ns time period, I... Bias When the signal is high, the total bias current of JJ exceeds its critical current, putting the switch in a "gated" state. In this state, the signal can be transmitted effectively. At 50ns, I... Bias When the voltage drops to low, JJ enters the superconducting state, and the switch is "turned off".

[0074] In the on state, since JJ is in a finite resistance state, R in There are two effects on transmission characteristics. (1) R in As R increases, the oscillation frequency of the Josephson junction rises, the cutoff frequency of the RL transmission low-pass filter decreases, suppressing high-frequency noise and reducing overall noise. (2) With R in As R increases, the signal amplitude decreases, and the signal transmission ratio decreases. In the off state, the output current of all three curves rapidly decays to near zero, indicating that the signal is effectively isolated. With R... in As the current decays, the time required for the current to decay becomes shorter. This is because the turn-off time constant τ = Lin / Rin of the circuit decreases, which helps to improve the response speed of the switch.

[0075] Table 1 Different Rin Transmission attenuation and switching speed

[0076] Table 1 Different R in Transmission attenuation and switching speed

[0077]

[0078] As shown in Table 1, different R values ​​are calculated. in The signal transmission ratio is reduced. Increasing R... in This leads to a decrease in the signal-to-transmission ratio, meaning the effective signal is attenuated, thus accelerating the turn-off speed. Therefore, a trade-off must be struck between the signal-to-transmission ratio and the switching speed when selecting the value of Rin. Overall, when Rin = 2.5Ω, although the signal amplitude is slightly reduced, the turn-off speed is the fastest, making it suitable for applications requiring high switching speeds. If high switching speeds are not a priority, a smaller Rin value should be selected. in To improve the signal transmission ratio.

[0079] To more clearly illustrate the working logic of this invention, Figure 5 The detailed steps of this method are shown, and Figure 6 This corresponds to displaying the control waveforms and signal output results of the process on the time axis.

[0080] Method flow description as follows Figure 5 As shown:

[0081] The readout method provided in this embodiment includes the following closed-loop steps:

[0082] System initialization: First, apply a DC bias to all detector RTES in the array and ensure that all row gating control lines are low and all Josephson junction switches are in the zero-resistance superconducting state (OFF). Set the scan index N = 1.

[0083] Row gating and current guidance: According to the procedure, a row gating current ISW (ISW>Ic) is applied to the Nth row. At this time, the row switch turns to a resistive state, the detection signal flows to the signal transmission branch, and drives the SQUID array to output a voltage signal through the common input signal line.

[0084] Row reset and isolation wait: These are the key steps of this invention. After reading is complete, a "row reset" is first performed, canceling the selection current of the Nth row and allowing the switch to quickly return to the superconducting state. Subsequently, it enters the "isolation wait" state. During this period, the system remains silent, waiting for the residual current on the common input signal line caused by the inductive effect to naturally decay below the threshold.

[0085] Loop scanning: Determine if all rows have been scanned. If not, set N = N + 1 and repeat the above process; if completed, reset N = 1 and begin scanning the next frame.

[0086] Timing diagram as follows Figure 6 As shown:

[0087] This diagram illustrates the time logic of three rows (Row 1, Row 2, Row 3) of pixel units:

[0088] During the t1-t2 period: a high-level current (ON) is applied only to the first row, while the second and third rows remain low (OFF). Signal output: The bottom Vout waveform outputs the signal from the first row detector. At this time, the Josephson junction is in a resistive state, and the signal transmission path is open. (Sig 1, representing a sine wave)

[0089] Switching at time t2: At time t2, the current in the first row is removed. Due to the hysteresis-free nature of the Josephson junction, it quickly returns to a zero-resistance superconducting state, cutting off signal transmission. There is an extremely short switching dead zone between t2 and the next row being turned on. The residual signal from the previous row decays rapidly within the dead zone, without causing superposition interference to subsequent signals.

[0090] During the t2-t3 period: A high-level current (ON) is applied to the second row. The readout channel seamlessly switches to outputting the signal from the second row detector. (Sig 2, schematically a triangular wave)

[0091] During the t3-t4 period: Similarly, a high-level current (ON) is applied to the third row, and the third row signal (Sig 3, which is represented by a square wave) is output.

[0092] Combination Figure 5 and Figure 6 As can be seen, this invention achieves non-overlapping time between signals in each row through "gating-reading-reset-isolation" timing control. The ultra-fast switching speed of the Josephson junction at the nanosecond level results in a short dead time between rows, thereby achieving time-division multiplexing readout with high duty cycle and high isolation.

[0093] Quantitative analysis of key circuit parameters was conducted, the impact of channel number expansion on signal shunting was studied, and design constraints were given.

[0094] 1. Construction of equivalent circuit model

[0095] To analyze the distribution of signal current in the transmission loop, the following equivalent circuit model is established:

[0096] Taking Channel 1 as an example, enabling the channel includes the detector signal source current I. sig A Josephson junction switch in the open (resistive) state has an equivalent resistance of R. d ; and the input resistance R of the signal transmission branch. in .

[0097] Channels 2 through N are closed: Assuming a total of N channels, N-1 channels are in the closed state. Since the Josephson junctions of the closed channels are in a zero-resistance superconducting state, the R0 of these channels is reduced. in The input terminals are directly short-circuited to ground. These disable the R channels. in The output terminals are all connected to a common convergence node (i.e., a common input signal line). Therefore, these N-1 resistors are equivalent to parallel resistors to ground in the circuit.

[0098] Load impedance: N input inductors L are connected in series on the common input signal line. in Its total inductance is NL in .

[0099] 2. Signal transmission efficiency

[0100] Based on the above model, the signal current I sig The circuit undergoes two main shunting processes:

[0101] • Equivalent bypass resistance R of the convergence node shunt :

[0102] R of all closed channels in After parallel connection, the equivalent ground resistance formed at the common convergence node is:

[0103]

[0104] It can be seen that as the number of multiplexed channels N increases, the parallel resistor R... shunt It will gradually decrease, thereby increasing the risk of signal leakage.

[0105] • First shunt (switching node):

[0106] Current in the switching resistor R d Distribution between the total impedance of the transmission branch and the total impedance of the transmission branch Z. branCh For R in The sum of the impedances of the subsequent loads (the subsequent loads are determined by Z). L With R shunt (Constructed in parallel). The current I entering the transmission branch. branCh for:

[0107]

[0108] • Secondary traffic split (public convergence node):

[0109] This is crucial in determining readout efficiency. The current I entering the transmission branch... branCh In "Reading Inductance Z" L "and equivalent bypass resistance R" shuntThe current is allocated between the two. The current flows to the readout inductor (i.e., the effective current detected by SQUID) I. readout for:

[0110]

[0111] Substituting into the above formula, we can obtain the transmission efficiency formula:

[0112]

[0113] 3. Design Boundaries of Large Arrays

[0114] According to the transmission efficiency formula, in order to ensure that the signal can be effectively transmitted to the readout SQUID without being blocked by the bypass resistor R shunt For traffic splitting, the system design must meet the following conditions:

[0115] Right now:

[0116]

[0117] Case 1 (Typical Parameters): Setting R in =25Ω, L in =1nH, signal frequency f = 1MHz. At this time, Z L ≈0.006Ω. For a small-scale array with N=4, the equivalent bypass resistance R is approximately 0.006Ω. shunt ≈8.3Ω. Since 0.006Ω << 8.3Ω, the current flows to the readout inductor with almost no loss, and the shunt effect is negligible.

[0118] • Scenario 2 (Large-scale array risk): If the number of channels N expands to 1000 channels, then R shunt It drops to approximately 0.025Ω, compared to Z. L At the same order of magnitude, significant signal leakage will occur.

[0119] This embodiment proves through theoretical derivation that, in conventional application scenarios (such as N<100), by reasonably selecting R... in and L in The circuit architecture of this invention enables efficient signal readout. For very large-scale arrays, this can be achieved by increasing R... in Resistance value or decrease L in The sensitivity is used to satisfy the above design boundary conditions and ensure system performance.

[0120] In summary, this invention provides a time-division multiplexing readout circuit and method for a superconducting detector array based on a Josephson junction switch. In terms of circuit architecture, this invention mainly includes detector pixel units arranged in an array, row gating control lines, and column readout channels. The row gating control lines act as a control source, applying square wave pulse current to the Josephson junction switch to precisely control its switching between a "zero-resistance superconducting state" and a "resistive state," thereby enabling the gating of signals from the detector pixel units. The signal transmission branch inside the detector pixel unit forms a parallel shunt structure with the Josephson junction switch, and this branch includes an input resistance R. in This reduces the circuit area of ​​a single pixel. The column readout channel adopts a single-stage direct-drive architecture, where signals from all pixels in the same column converge onto a common input signal line, which is composed of multiple input inductors L. in These are connected in series. The converged signal current flows through these input inductors and directly drives the SQUID series array for a first-stage amplification through mutual inductance.

[0121] Compared with existing technologies, this invention offers several advantages: Stronger resistance to magnetic interference; by using a current-controlled Josephson junction to replace the traditional flux-controlled SQUID switch, the magnetic interference loop is completely eliminated, thus physically removing the device's sensitivity to ambient magnetic fields and adjacent channel flux. Simplified circuit structure; through a topology of "intra-pixel resistance shunt + common-line inductor direct drive," the independent first-stage SQUID (SQ1) and its complex bias and feedback circuits in traditional multi-stage readout architectures are removed, significantly reducing wiring difficulty and thermal load in low-temperature regions. Faster switching speed and higher isolation; the Josephson junction has nanosecond-level response speed and zero-resistance turn-off characteristics. Combined with reasonable impedance design, it can achieve extremely short row switching dead time and excellent turn-off isolation. High integration; by eliminating the large-volume inductor of the SQUID switch, the size of a single pixel unit is significantly reduced, facilitating high-density integration of large-scale arrays. Therefore, this invention improves upon some shortcomings of existing superconducting detector readout technologies and has industrial application value.

[0122] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A time-division multiplexing readout circuit for a superconducting detector array, characterized in that, It includes a detection pixel unit (6), a row gating control line (9) and a column readout channel (7). There are at least two row gating control lines (9), and at least two detection pixel units (6) are connected to each row gating control line (9). Each of the detector pixel units (6) includes a detector bias branch (1), an LC filter isolation network (2), a Josephson junction switch module (3), and a signal transmission branch (4) connected in sequence; Each of the row selection control lines (9) is connected to the control terminal of the Josephson junction in the Josephson junction switching module (3) for applying row selection current to at least two connected Josephson junctions; The output of the signal transmission branch (4) of each of the detection pixel units (6) is connected to a common input signal line (5), and at least two input inductors L are connected in series on the common input signal line (5). in Each input inductor L in A corresponding readout SQUID is provided next to each of the input inductors L. in The corresponding readout SQUIDs are magnetically coupled to form a single-stage direct readout structure; each readout SQUID is also connected in series to form a readout SQUID column array (8), and the common input signal line (5) and its series-connected input inductor L in The SQUID column serial array (8) together form the column readout channel (7).

2. The time-division multiplexing readout circuit as described in claim 1, characterized in that, Among the constituent units of the detection pixel unit (6), the detector bias module (1) includes one superconducting detector. R TES The superconducting detector is connected to a bias resistor. R s Choke inductor L Choke The choke inductor L Choke The bias resistor R connected in series in the superconducting detector s The bias branch presents a high impedance to high-frequency AC signals, thereby preventing the detector signal current from flowing back to the bias circuit. The LC filter isolation network (2) includes an LC signal transmission branch; the LC signal transmission branch includes a capacitor C and an inductor L connected in series. The branch is connected between the superconducting detector and the Josephson junction switching module and is configured to allow the detection signal of a specific frequency band to pass through while isolating the DC bias voltage of the detector from the switching circuit at the back end.

3. The time-division multiplexing readout circuit as described in claim 1, characterized in that, In the constituent units of the detection pixel unit (6), the Josephson junction switch module (3) is connected between the output terminal of the filter isolation network and ground; the switch module contains at least one Josephson junction, and each Josephson junction is connected in parallel with a shunt resistor; The signal transmission branch (4) and the Josephson junction switch module (3) form a parallel shunt structure; the signal transmission branch (4) includes an input resistor connected in series. R in , used to guide the probe signal current to the column readout channel (7).

4. The time-division multiplexing readout circuit as described in claim 1, characterized in that, The Josephson junction switch module (3) is configured to be in the same low temperature zone as the detector bias module (1) in order to reduce the length of the interconnecting leads and parasitic parameters between the modules.

5. The time-division multiplexing readout circuit as described in claim 1, characterized in that, The Josephson junction switching module (3) is configured to include at least one Josephson junction; the resistance value of the parallel shunt resistor RJJ in the Josephson junction switching module (3) makes the hysteresis parameter βC of the Josephson junction < 1.

6. The time-division multiplexing readout circuit as described in claim 1, characterized in that, The input inductor in the signal transmission branch (4) L in The inductance value is matched to the input impedance of the SQUID array, or L in The total series inductance is configured to meet the system bandwidth requirements.

7. A time-division multiplexing readout method for a superconducting detector array, implemented based on the circuit described in any one of claims 1 to 6, characterized in that, Includes the following steps: Step 1: System initialization. Apply DC bias current to the superconducting detectors (RTES) in all detector pixel units (6) to put them into working state. In the initial state, no current is applied to all row selection control lines (9) or a low-level current is applied, and the Josephson junction switch modules (3) in all detector pixel units are in a zero-resistance superconducting state. Step 2, row gating: Apply row gating current to the row gating control line (9) corresponding to the Nth row; Step 3, current guidance and readout: The Josephson junction in the Nth row of the detector pixel unit (6) switches its state due to the row selection current, guiding the detector's signal current to the column readout channel (7) and driving the SQUID serial array output. Step 4: Row reset, remove the row selection current on the row selection control line (9) of the Nth row, restore the Josephson junction of the Nth row to the zero resistance superconducting state, and cut off the transmission of the row signal to the column readout channel (7); Step 5: Cyclic scan. Repeat steps 2 to 4 for the N+1th row in sequence until all rows are scanned. This process is repeated to achieve time-division multiplexing readout of the detector array.

8. The time-division multiplexing readout method as described in claim 7, characterized in that, In steps two and three, the amplitude of the row selection current is configured to be greater than the critical current of the Josephson junction in the Josephson junction switching module (3). I c Driven by this current, the Josephson junction switches from a zero-resistance superconducting state to a finite-resistance state, thereby hindering the signal current of the detector and guiding it to the signal transmission branch (4) connected in parallel with the switch.

9. The time-division multiplexing readout method as described in claim 7, characterized in that, In step three, the shunted signal current converges and flows into the common input signal line of the column readout channel (7), and flows through the series-connected input inductor unit. L in The signal current drives the SQUID series array through mutual inductance coupling, and the SQUID series array converts the induced magnetic flux signal into a voltage signal and outputs it.

10. The time-division multiplexing readout method as described in claim 7, characterized in that, In step four, after canceling the row selection current of row N, the system further includes entering an isolation wait state; the system maintains a preset isolation time to wait for the current to flow through the common input signal line and the input inductor unit. L in The residual signal current decays to below a preset threshold, and then the next row gating in step five is executed.

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