SiC-based AlN epitaxial layer structure and vertical power device
By combining SiC-based AlN epitaxial layer structures with conductive SiC substrates, the problems of lattice mismatch and thermal mismatch in wide bandgap semiconductor materials are solved, enabling the preparation of high-quality AlN single crystals and improving device performance. This is suitable for low-cost, large-scale production of high-reliability power devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
- Filing Date
- 2025-12-26
- Publication Date
- 2026-05-01
AI Technical Summary
In the existing technology, there is a lack of large-size, low-cost single-crystal bulk material preparation methods for wide bandgap semiconductor materials, which leads to serious problems of lattice mismatch and thermal mismatch. The epitaxial layer material has a high defect density, which affects device performance, and the buffer layer has poor conductivity.
By employing a SiC-based AlN epitaxial layer structure, including a SiC substrate, a nucleation layer, and an N-AlN drift region, and combining a conductive SiC substrate with polarization doping technology, the buffer layer structure is optimized to achieve the epitaxy of high-quality single-crystal AlN materials and simplify device fabrication.
The fabrication of large-size AlN single-crystal thin films has been achieved, reducing manufacturing costs, improving device performance and cost-effectiveness, and providing high power and high-frequency performance, making them suitable for large-scale production.
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Figure CN121968667A_ABST
Abstract
Description
SiC-based AlN epitaxial structure and vertical power devices Technical Field
[0001] This invention belongs to the field of semiconductor materials and power devices, and specifically relates to a SiC-based AlN epitaxial layer structure and a vertical power device. Background Technology
[0002] Currently, wide-bandgap semiconductors, represented by GaN and SiC, have become the mainstream in the development of power semiconductors. However, their performance still falls short of meeting the extreme requirements for power capacity, integration, and reliability in a series of emerging scenarios, such as smart grids, rail transportation (requiring ultra-high voltages above 10 kV), deep space / deep sea exploration (with extremely stringent requirements on size and weight), high-end military equipment (requiring megawatt-level instantaneous power), and high-temperature, high-radiation environments (such as oil and gas drilling and nuclear power plants). Against this backdrop, aluminum nitride (AlN), as an ultra-wide-bandgap semiconductor, exhibits significant advantages. Its bandgap is 1.82 times that of GaN and 1.90 times that of 4H-SiC, respectively, and its breakdown field strength can reach 5 times that of GaN. It also possesses high electron mobility and saturation velocity, and an extremely high Baliga figure of merit (BFOM), which helps to achieve high power and high-frequency performance far exceeding that of third-generation semiconductors. This not only significantly improves the power density of power systems but also strongly supports the miniaturization, lightweighting, and high reliability of equipment. However, wide bandgap semiconductor materials generally lack large-size, low-cost single-crystal bulk fabrication methods. The prepared single-crystal materials are characterized by small size and high price, which seriously restricts their application and development in the field of power electronics.
[0003] To improve material size and adapt to large-scale integrated circuit fabrication processes while reducing manufacturing costs, heteroepitaxial growth of wide-bandgap and ultra-wide-bandgap thin film materials on mature, large-size substrates is a potential solution. However, heteroepitaxial growth faces challenges related to lattice and thermal mismatch between the substrate material and the epitaxial layer. This leads to high defect density in the epitaxial layer, wafer warping, and even the risk of cracking. Therefore, producing high-quality, thick-film single-crystal materials through heteroepitaxial growth remains a significant challenge. Furthermore, a buffer layer often exists between the single-crystal material and the heteroepitaxial substrate to release lattice and thermal stress. This buffer layer typically contains numerous deep-level defects and has poor conductivity, severely impacting device performance. Therefore, selecting a suitable epitaxial substrate, optimizing the buffer layer structure, and obtaining high-quality single-crystal AlN material through epitaxy are crucial for the development of ultra-wide-bandgap semiconductor power devices. Summary of the Invention
[0004] The purpose of this invention is to provide a SiC-based AlN epitaxial layer structure and a vertical power device to solve the problems of lattice mismatch and thermal mismatch between the substrate material and the epitaxial layer, as well as the problem that the buffer layer between the substrate material and the epitaxial layer has many deep energy level defects and poor conductivity, which seriously affect the performance of the device.
[0005] This invention provides a SiC-based AlN epitaxial layer structure, which includes a SiC substrate, a nucleation layer, and an N2 layer stacked from bottom to top. - AlN drift region.
[0006] Preferably, the SiC substrate can be 6H-SiC or 4H-SiC, and the doping type is N-type heavily doped low-resistance conductive type.
[0007] Preferably, the material of the nucleation layer is conductive AlN, which is fully or partially N-type doped, and the doping element includes, but is not limited to, at least one of Si or Ge; the thickness of the nucleation layer is ≤100 nm.
[0008] Preferably, the N - The doping concentration range of the AlN drift region is 10. 15 -10 18 cm -3 The doping can be uniform or gradient doping with decreasing concentration from bottom to top, and the doping element includes, but is not limited to, at least one of Si or Ge; the N - The thickness of the AlN drift region is ≤50um.
[0009] Preferably, the nucleation layer and N are determined according to the actual material requirements. - There is a buffer layer between the AlN drift regions, which can be an AlN / GaN superlattice structure, where AlN / GaN is an N-type doped conductivity type.
[0010] Preferably, the N - The upper surface of the AlN drift region has a P-type blocking region.
[0011] Preferably, the P-type blocking region is divided into two layers from bottom to top: the lower layer is a distributed polarized P-type doped region with decreasing Al composition from AlN to GaN; the upper layer is Mg-doped P-type GaN with a doping concentration ranging from 10. 16 -10 19 cm -3 The thickness of the P-type blocking region is 100 nm-3 μm.
[0012] Preferably, the upper surface of the P-type blocking region has N + Active region.
[0013] Preferably, the N+ The active region is N-type heavily doped GaN, with doping elements including but not limited to Si, and a doping concentration range of 10. 18 -10 20 cm -3 The N + The active region thickness is 50 nm-1 μm.
[0014] This invention provides a SiC-based vertical AlN Schottky diode (SBD), comprising the aforementioned SiC-based AlN epitaxial layer structure, wherein from bottom to top are a SiC substrate, a nucleation layer, a buffer layer, and an N-type substrate. - AlN drift region; the N - A first metal is deposited on the upper surface of the AlN drift region and annealed to form a Schottky contact; a second metal is deposited on the back side of the SiC substrate and annealed to form an ohmic contact.
[0015] Preferably, the first metal includes, but is not limited to, any one of stacked Ni / Au, stacked Ti / Al / Ni / Au, single-layer Pt, or single-layer Pd; the second metal includes, but is not limited to, any one of single-layer Ni or stacked Ni / Au.
[0016] This invention provides a SiC-based vertical AlN PN diode (PND), comprising the aforementioned SiC-based AlN epitaxial layer structure, wherein from bottom to top are a SiC substrate, a nucleation layer, a buffer layer, and an N-type PND. - AlN drift region and P-type blocking region; a first metal is deposited on the upper surface of the P-type blocking region and annealed to form an ohmic contact; a second metal is deposited on the back side of the SiC substrate and annealed to form an ohmic contact.
[0017] The present invention also provides a SiC-based vertical AlN Trench-MOSFET, comprising the above-mentioned SiC-based AlN epitaxial layer structure, wherein from bottom to top are a SiC substrate, a nucleation layer, a buffer layer, and an N-type substrate. - AlN drift region, P-type blocking region and N + Active region; from the N + Trenches are formed by etching the surface of the active region downwards, with the trenches reaching a depth of N. - AlN drift region; the N + A gate dielectric is deposited on the surface of the active region and the surface of the groove; a first metal is deposited on the surface of the gate dielectric to form a gate electrode (G); the surface of the P-type blocking region is in direct contact with the first metal formed by etching and deposition to form an ohmic contact-type body contact (B); the N + A third metal is deposited on the surface of the active region to form a source ohmic contact (S), which is connected to the body contact to form a source electrode; a second metal is deposited on the back side of the SiC substrate to form a drain electrode (D), which forms an ohmic contact with the SiC substrate.
[0018] Preferably, the gate dielectric material includes, but is not limited to, any one of Al2O3, AlN, SiO2, or a multilayer dielectric.
[0019] Preferably, the third metal includes, but is not limited to, any one of the stacked Ti / Al / Ni / Au or the stacked Ti / Al / W.
[0020] Beneficial effects
[0021] (1) The SiC-based AlN epitaxial layer structure and vertical device proposed in this invention can utilize the mature SiC substrate technology in the current industry to directly increase the size of AlN single crystal thin film to 8-12 inches, overcoming the problem of small AlN wafer size.
[0022] (2) In the SiC-based AlN epitaxial layer structure proposed in this invention, the SiC material and the AlN crystal material have good parameter matching, and the lattice mismatch and thermal mismatch are both within 5%. This can simplify the buffer layer structure, improve the thickness and quality of the epitaxial film, and thus obtain high-quality thick film single crystal AlN material, providing a basis for the preparation of high voltage-resistant AlN power devices.
[0023] (3) This invention uses conductive SiC substrate and polarization doping technology to solve the problems of heavy doping and ohmic contact of AlN material, and realizes the device structure in which AlN material is only used as the drift region. This not only gives full play to the advantages of AlN material, but also simplifies the subsequent device process.
[0024] (4) The SiC-based vertical AlN power device of this invention achieves a fully vertical conductive device structure through the design of a conductive nucleation layer and a buffer layer. Compared with SiC power devices, the substrate and epitaxial costs are comparable, and the process cost of III-V group devices is relatively lower than that of SiC. Therefore, AlN power devices have a cost advantage in fabrication. At the same time, the Baliga figure of merit (BFOM) of AlN material is 54 times that of SiC material. AlN power devices at the same voltage level have lower on-resistance, which helps to achieve more efficient energy conversion. Therefore, the SiC-based vertical AlN power device proposed in this invention has a higher cost performance than SiC power devices and has strong market potential.
[0025] (5) The SiC-based AlN epitaxial layer structure and vertical device proposed in this invention are fully compatible with the current GaN production line epitaxial and device processes, and have favorable conditions for large-scale production. Attached Figure Description
[0026] Figure 1 is a schematic diagram of a SiC-based AlN epitaxial layer structure according to the present invention.
[0027] Figure 2 is a schematic diagram of the structure of a SiC-based vertical AlN Schottky diode (SBD) according to the present invention.
[0028] Figure 3 is a schematic diagram of the structure of a SiC-based vertical AlN PN diode (PND) of the present invention.
[0029] Figure 4 is a schematic diagram of the structure of a SiC-based vertical AlN Trench-MOSFET in this invention.
[0030] Figure 5 is a schematic diagram of the SiC-based AlN epitaxial layer structure in Example 1.
[0031] Figure 6 is a schematic diagram of the structure of the SiC-based vertical AlN Schottky diode in Example 2.
[0032] Figure 7 is a schematic diagram of the structure of the SiC-based vertical AlN PN diode in Example 3.
[0033] Figure 8 is a schematic diagram of the structure of the SiC-based vertical AlN Trench-MOSFET in Example 4. Detailed Implementation
[0034] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be understood that after reading the teachings of this invention, those skilled in the art can make various alterations or modifications to the invention, and these equivalent forms also fall within the scope defined by the appended claims.
[0035] The SiC-based AlN epitaxial layer structure in this invention includes a SiC substrate, a nucleation layer, and an N2 layer stacked from bottom to top. - AlN drift region; the nucleation layer and N are determined according to the actual material requirements. - A buffer layer may also exist between the AlN drift regions; the N - A P-type blocking region can be provided on the upper surface of the AlN drift region; an N-type blocking region can also be provided on the upper surface of the P-type blocking region. + Active region.
[0036] As an example, one type of SiC-based AlN epitaxial layer structure is shown in Figure 1. From bottom to top, it consists of a SiC substrate, a nucleation layer, a buffer layer, and an N2 layer. - AlN drift region, P-type blocking region and N + Active region.
[0037] This invention also relates to vertical power devices based on SiC-based AlN epitaxial layer structures.
[0038] As an example, Figure 2 shows a SiC-based vertical AlN Schottky diode (SBD), which, from bottom to top, consists of a SiC substrate, a nucleation layer, a buffer layer, and an N2O layer. - AlN drift region; the N - A first metal is deposited on the upper surface of the AlN drift region and annealed to form a Schottky contact; a second metal is deposited on the back side of the SiC substrate and annealed to form an ohmic contact.
[0039] As an example, Figure 3 shows a SiC-based vertical AlN PN diode (PND), which, from bottom to top, consists of a SiC substrate, a nucleation layer, a buffer layer, and an N-type N-type diode. - AlN drift region and P-type blocking region; a first metal is deposited on the upper surface of the P-type blocking region and annealed to form an ohmic contact; a second metal is deposited on the back side of the SiC substrate and annealed to form an ohmic contact.
[0040] As an example, Figure 4 shows a SiC-based vertical AlN Trench-MOSFET, from bottom to top consisting of a SiC substrate, a nucleation layer, a buffer layer, and an N-type substrate. - AlN drift region, P-type blocking region and N + Active region; from the N + Trenches are formed by etching the surface of the active region downwards, with the trenches reaching a depth of N. - AlN drift region; the N + A gate dielectric is deposited on the surface of the active region and the surface of the groove; a first metal is deposited on the surface of the gate dielectric to form a gate electrode (G); the surface of the P-type blocking region is in direct contact with the first metal formed by etching and deposition to form an ohmic contact-type body contact (B); the N + A third metal is deposited on the surface of the active region to form a source ohmic contact (S), which is connected to the body contact to form a source electrode; a second metal is deposited on the back side of the SiC substrate to form a drain electrode (D), which forms an ohmic contact with the SiC substrate.
[0041] Example 1
[0042] This embodiment provides a SiC-based AlN epitaxial layer structure, as shown in Figure 5. From bottom to top, the structure consists of a SiC substrate, a nucleation layer, a buffer layer, and an N layer. - AlN drift region, P-type blocking region and N + The characteristics of each layer in the active region are as follows:
[0043] (1) SiC substrate: crystal form is 4H-SiC, doping type is N-type heavily doped low resistance conductivity, doping concentration is 10 19 cm -3 The thickness is 500 μm.
[0044] (2) Nucleation layer: The material is conductive AlN, which is N-type doped with Si as the doping element and the doping concentration is 10. 18 cm -3 The thickness is 100 nm.
[0045] (3) Buffer layer: It is an AlN / GaN superlattice structure, in which AlN / GaN is an N-type doped conductive type with a thickness of 1 μm.
[0046] (4) N - AlN drift region: doped with Si, doping concentration of 10 17 cm -3 It is uniformly doped with a thickness of 5 μm.
[0047] (5) P-type blocking region: It is divided into two layers from bottom to top. The lower layer is a distributed polarized P-type doped region with decreasing Al composition from AlN to GaN. The upper layer is Mg-doped P-type GaN with a doping concentration range of 10. 16 -10 19 cm -3 The total thickness is 200 nm.
[0048] (6) N + Active region: N-type heavily doped GaN, with Si as the dopant element and a doping concentration of 10. 19 cm -3 The thickness is 100 nm.
[0049] Example 2
[0050] This embodiment provides a SiC-based vertical AlN Schottky diode, the structure of which is shown in Figure 6. From bottom to top, the diode consists of a SiC substrate, a nucleation layer, a buffer layer, and an N-type substrate. - AlN drift region (each layer has the same structural characteristics as in Example 1); the N - A stacked Ni / Au layer is deposited on the upper surface of the AlN drift region and annealed to form a Schottky contact; a stacked Ni / Au layer is deposited on the back side of the SiC substrate and annealed to form an ohmic contact.
[0051] Example 3
[0052] This invention provides a SiC-based vertical AlN PN diode, the structure of which is shown in Figure 7. From bottom to top, it consists of a SiC substrate, a nucleation layer, a buffer layer, and an N-type N-type diode. - AlN drift region and P-type blocking region (the structural characteristics of each layer are the same as in Example 1); the upper surface of the P-type blocking region is deposited with a stacked Ni / Au layer, which is annealed to form an ohmic contact; the back side of the SiC substrate is deposited with a stacked Ni / Au layer, which is annealed to form an ohmic contact.
[0053] Example 4
[0054] This embodiment provides a SiC-based vertical AlN Trench-MOSFET, the structure of which is shown in Figure 8. From bottom to top, the layers are a SiC substrate, a nucleation layer, a buffer layer, and an N-type MOSFET. - AlN drift region, P-type blocking region and N + Active region (each layer structure characteristics are the same as in Example 1); the SiC-based vertical AlN Trench-MOSFET also includes N + The active region surface is etched downwards to form a groove, the groove having a depth of N. - AlN drift region; the N + The active region surface and the groove surface are deposited with gate dielectric Al2O3; a stacked Ni / Au layer is deposited on the gate dielectric surface to form the gate electrode; the surface of the P-type blocking region is in direct contact with the Ni / Au formed by etching and deposition to form an ohmic contact-type body contact; the N + The active region surface has a stacked Ti / Al / Ni / Au source ohmic contact, which is connected to the body contact to form a source electrode; the back side of the SiC substrate has a stacked Ni / Au deposited to form a drain electrode, which forms an ohmic contact with the SiC substrate.
Claims
1. A SiC-based AlN epitaxial layer structure, characterized in that, The SiC-based AlN epitaxial layer structure includes a SiC substrate, a nucleation layer, and an N2 layer stacked from bottom to top. - AlN drift region.
2. The SiC-based AlN epitaxial layer structure according to claim 1, characterized in that, The SiC substrate has a crystal form of 6H-SiC or 4H-SiC and is doped with N-type heavy doping and low resistance conductivity. The nucleation layer is made of conductive AlN, which is fully or partially N-type doped, and the doping element includes at least one of Si or Ge. The thickness of the nucleation layer is ≤100 nm. - The doping concentration range of the AlN drift region is 10. 15 -10 18 cm -3 The doping is uniform or gradient doping with decreasing concentration from bottom to top, and the doping element includes at least one of Si or Ge, wherein the N - The thickness of the AlN drift region is ≤50 μm.
3. The SiC-based AlN epitaxial layer structure according to claim 2, characterized in that, The nucleation layer and N - There is a buffer layer between the AlN drift regions, forming an AlN / GaN superlattice structure, where AlN / GaN is N-type doped and conductive.
4. The SiC-based AlN epitaxial layer structure according to any one of claims 1 to 3, characterized in that, The N - The upper surface of the AlN drift region has a P-type blocking region.
5. The SiC-based AlN epitaxial layer structure according to claim 4, characterized in that, The P-type blocking region is divided into two layers from bottom to top. The lower layer is a distributed polarized P-type doped region with decreasing Al composition from AlN to GaN. The upper layer is Mg-doped P-type GaN with a doping concentration ranging from 10. 16 -10 19 cm -3 The thickness of the P-type blocking region is 100 nm-3 μm.
6. The SiC-based AlN epitaxial layer structure according to claim 4, characterized in that, The upper surface of the P-type blocking region has N + Active region.
7. The SiC-based AlN epitaxial layer structure according to claim 6, characterized in that, The N + The active region is N-type heavily doped GaN, with Si as the doping element and a doping concentration ranging from 10. 18 -10 20 cm -3 The N + The active region thickness is 50 nm-1 μm.
8. A SiC-based vertical AlN Schottky diode, comprising the SiC-based AlN epitaxial layer structure as described in any one of claims 1 to 3, characterized in that, The N - A first metal is deposited on the upper surface of the AlN drift region and annealed to form a Schottky contact; a second metal is deposited on the back side of the SiC substrate and annealed to form an ohmic contact; the first metal includes any one of stacked Ni / Au, stacked Ti / Al / Ni / Au, monolayer Pt, or monolayer Pd; the second metal includes any one of monolayer Ni or stacked Ni / Au.
9. A SiC-based vertical AlN PN diode, comprising the SiC-based AlN epitaxial layer structure as described in claim 4, characterized in that, The upper surface of the P-type blocking region is deposited with a first metal, which is then annealed to form an ohmic contact; the back side of the SiC substrate is deposited with a second metal, which is then annealed to form an ohmic contact.
10. A SiC-based vertical AlN Trench-MOSFET, comprising the SiC-based AlN epitaxial layer structure as described in claim 6, characterized in that, From the N + The surface of the active region is etched downwards to form a groove, the groove having a depth of N. - AlN drift region; the N + A gate dielectric is deposited on the surface of the active region and the surface of the groove; a first metal is deposited on the surface of the gate dielectric to form a gate electrode; the surface of the P-type blocking region is in direct contact with the first metal formed by etching and deposition to form an ohmic contact-type body contact; the N + A third metal is deposited on the surface of the active region to form a source ohmic contact, which is connected to the body contact to form a source electrode; a second metal is deposited on the back side of the SiC substrate to form a drain electrode, which forms an ohmic contact with the SiC substrate; the third metal includes any one of a stacked Ti / Al / Ni / Au or a stacked Ti / Al / W.