Plasma processing method
By separating the plasma processing chamber within a vacuum container using a separation plate, and employing an upper and lower plasma processing method, the problem of metal contamination on the back of the wafer was solved, achieving damage-free wafer processing and improving processing efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HITACHI HIGH TECH CORP
- Filing Date
- 2024-08-28
- Publication Date
- 2026-05-01
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Figure CN121970531A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to plasma treatment methods. Background Technology
[0002] In semiconductor devices, the demand for low power consumption and increased storage capacity drives further miniaturization and three-dimensional device fabrication. Furthermore, with the increasing functionality of advanced devices, the management standards for metal contamination on wafers are becoming more stringent, and these standards are expected to become even more stringent in the future. Moreover, these contamination standards apply not only to the surface of patterned wafers but also to the back side, requiring technologies to reduce back-side contamination.
[0003] In the manufacture of these semiconductor devices, semiconductor chips are fabricated by repeatedly using multiple semiconductor manufacturing equipment, such as exposure equipment, thermal processing equipment, dry etching equipment, wet cleaning equipment, film deposition equipment, and CMP (Chemical Mechanical Polishing) equipment, to form target patterns on the entire surface of a wafer. In particular, plasma methods are widely used in dry etching equipment, including anisotropic processing equipment that actively utilizes ions and free radicals in plasma, and isotropic processing equipment that actively utilizes free radicals in plasma. Furthermore, in monolithic equipment where each wafer is subjected to a given process by placing it on a wafer stage, the pattern formed on the wafer surface is precisely processed by controlling the temperature of the wafer stage surface. However, to adjust the wafer temperature, the back side of the wafer needs to be in contact with the wafer stage. Metal contamination, caused by metal from the wafer stage itself or its surface adhering to the back side of the wafer upon contact, becomes a problem. Therefore, methods to reduce back-side metal contamination are needed.
[0004] As a method for processing the back side of a wafer, Patent Document 1 discloses the following method: a wafer coated with a resist is raised by a pusher, and after removing charged particles in the plasma with a screen such as aluminum, free radicals in the plasma are actively irradiated, thereby removing the polycrystalline silicon film formed on the back side of the wafer.
[0005] Prior art literature
[0006] Patent documents
[0007] Patent Document 1: JP Japanese Patent Application Publication No. 10-22276 Summary of the Invention
[0008] The problem that the invention aims to solve
[0009] In methods that irradiate the back of a wafer with free radicals in plasma by lifting the wafer with a pusher, the patterned wafer surface is also similarly irradiated with free radicals or plasma. Therefore, in the invention described in Patent Document 1, the pattern on the surface is protected by additionally coating the wafer surface with a resist before it is fed into the apparatus. That is, in order to remove metallic contaminants from the back of the wafer after dry etching, after a given treatment of the pattern on the wafer surface by dry etching, the wafer needs to be removed and coated with resist once, and then further fed into a vacuum apparatus to remove the film from the back of the wafer. Therefore, the increased processing time per wafer due to the transport of wafers into and out of the vacuum container becomes a problem.
[0010] The purpose of this invention is to provide a plasma treatment method that removes metallic contaminants adhering to the back side of a wafer through contact between the wafer and the wafer stage without damaging the pattern on the wafer surface due to plasma.
[0011] Methods for solving problems
[0012] The structure of the present invention for solving the above-mentioned problems is as follows.
[0013] A plasma processing method is proposed, comprising: a semiconductor device formation step, wherein a given semiconductor device formation process is performed on a wafer to be processed in a vacuum chamber with the wafer to be processed placed on a wafer stage; a film deposition step, wherein after the semiconductor device formation step, a deposition film is formed on the wafer to be processed with the wafer to be processed placed on the wafer stage; and a halogen plasma processing step, wherein after the film deposition step, the wafer to be processed is separated from the wafer stage, and the wafer to be processed is treated with halogen plasma with the wafer to be processed in the state of being separated from the wafer stage.
[0014] Furthermore, a plasma processing method is proposed, comprising: a semiconductor device formation step, wherein a wafer to be processed is subjected to a given semiconductor device formation process in a vacuum chamber with the wafer to be processed placed on a wafer stage; a C deposition film formation step, wherein after the semiconductor device formation step, a C deposition film is formed on the wafer to be processed by plasma containing C gas while the wafer to be processed is placed on the wafer stage; a halogen plasma processing step, wherein after the deposition film formation step, the wafer to be processed is separated from the wafer stage, and the wafer to be processed is treated with halogen plasma while the wafer to be processed is separated from the wafer stage; and a C deposition film removal step, wherein after the halogen plasma processing step, the C deposition film formed on the wafer to be processed is removed by plasma containing oxygen gas.
[0015] Furthermore, a plasma processing method is proposed, comprising: a first deposition film formation step, wherein a first deposition film is formed on a wafer to be processed in a vacuum chamber with the wafer to be processed separated from the wafer stage; a semiconductor device formation step, wherein after the first deposition film formation step, the wafer to be processed is placed on the wafer stage, and a given semiconductor device formation process is performed on the wafer to be processed with the wafer to be processed placed on the wafer stage; a second deposition film formation step, wherein after the semiconductor device formation step, a second deposition film is formed on the wafer to be processed with the wafer to be processed placed on the wafer stage; and a first deposition film removal step, wherein after the second deposition film formation step, the wafer to be processed is separated from the wafer stage, and the first deposition film on the wafer to be processed is removed with the wafer to be processed separated from the wafer stage.
[0016] The effects of the invention
[0017] According to the present invention, a plasma treatment method is provided that can remove metallic contaminants adhering to the back side of a wafer through contact between the wafer and the wafer stage without causing plasma damage to the pattern on the wafer surface. Attached Figure Description
[0018] Figure 1 This is a diagram illustrating an example of a device structure that can implement an embodiment of the present invention.
[0019] Figure 2 This is the first representative time series diagram involved in Example 1.
[0020] Figure 3 This is a diagram showing the state in which the wafer to be etched is lifted by a pusher.
[0021] Figure 4 This is the second representative time series diagram involved in Example 1.
[0022] Figure 5 This is the first representative time series diagram involved in Example 2.
[0023] Figure 6 This is the second representative time series diagram involved in Example 2.
[0024] Figure 7 This is a representative time series diagram involved in Example 3. Detailed Implementation
[0025] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
[0026]
Example 1
[0027] use Figures 1-4 Example 1, which is used to implement the present invention, will be described below. Figure 1This illustrates a representative apparatus configuration for implementing electron cyclotron resonance in a plasma source, according to this embodiment. Figure 2 This indicates that the first time series plot of this embodiment was used. Figure 3 express Figure 2 The device state during the process of removing the back side. Figure 4 This indicates the use of the second time series diagram in this embodiment. Furthermore, this embodiment describes a plasma source utilizing electron cyclotron resonance, but this method is not limited to plasma sources utilizing electron cyclotron resonance. It is applicable even to plasma sources utilizing inductive coupling or parallel plate methods, as long as the device can preferentially irradiate the wafer with plasma free radicals relative to charged particles in the plasma by inserting an ion shielding plate or similar device.
[0028] like Figure 1 As shown, a separation plate 1002 is provided inside the vacuum container 1001, dividing the interior of the vacuum container into an upper first space 1003 (which constitutes the upper plasma forming chamber, as described later) and a lower second space 1004 (which constitutes the lower plasma forming chamber, as described later). A wafer stage 1006 for placing the wafer 1005 to be etched is installed in the second space 1004, allowing the wafer 1005 to be processed by irradiation with plasma or by free radicals generated in the plasma.
[0029] High-frequency power 1007, oscillating from a high-frequency power source to generate plasma, is transmitted from above the device through a waveguide 1008 and a cavity resonator 1009 into the vacuum container 1001. Here, the high-frequency power 1007 used for plasma generation employs a high frequency of 300MHz to 300GHz.
[0030] Furthermore, process gas 1010 is introduced into the vacuum container using a given method, and exhaust is achieved from 1011 at the bottom of the vacuum container. At this time, it is appropriate to monitor the flow rate of process gas 1010 and the exhaust velocity. By controlling the flow rate and exhaust velocity of the process gas in conjunction with the monitored values, the pressure inside the vacuum container can be maintained at any desired level.
[0031] The process gas introduced into the vacuum container generates and maintains plasma at a position where electron cyclotron resonance is induced by the high-frequency power 1007 and the static magnetic field generated by the static magnetic field coil 1012. In this device structure, the plasma generation position, which is induced by changing the coil current value of the static magnetic field coil 1012, is adjusted. When the generation position is set within the first space 1003, neutral free radicals formed in the plasma are preferentially supplied to the wafer being etched. On the other hand, when the generation position is set within the second space 1004, the plasma directly irradiates the wafer being etched, enabling processing that utilizes ions as charged particles and neutral free radicals in the plasma. That is, the plasma forming chamber can be separated into an upper plasma forming chamber based on the first space 1003 and a lower plasma forming chamber based on the second space 1004 by the separation plate 1002.
[0032] The wafer stage 1006 has a temperature control function, allowing it to be controlled at any temperature. Furthermore, the wafer stage 1006 is equipped with a function to fix the wafer to be etched on the wafer stage, and a function to supply a heat-conducting gas such as He between the wafer to be etched 1005 and the wafer stage 1006 to maintain a pressure between them, for example, between 0.1 kPa and 10 kPa. This heat-conducting gas improves the thermal conductivity between the wafer stage and the wafer to be etched, enabling efficient temperature control of the wafer even within a vacuum chamber.
[0033] As a function to hold the etched wafer to the wafer stage, it is desirable to generate Johnson-Lambert force or Coulomb force for electrical fixation (a technique known as "electrostatic chuck"). Alternatively, this fixation method can connect only a single DC power supply to the wafer stage, creating an electrical path from the wafer stage through the plasma to ground, thereby fixing the etched wafer. However, to reliably fix the wafer even without generating plasma directly above it, such as... Figure 1 As shown, a first electrode 1013 and a second electrode 1014 for applying DC voltage are provided in the wafer stage 1006, and opposite positive and negative voltages are applied respectively. In order to adjust the dielectric constant and resistance, it is desirable to coat the electrode surface with ceramic materials such as Al2O3 and metal materials such as Ti.
[0034] in addition, Figure 1 Although not illustrated, in order to actively introduce ions formed in the plasma into the wafer being etched, it is desirable to connect a high-frequency power supply, for example, with a frequency of 10 kHz to 100 MHz, to the wafer stage. In this way, when plasma is generated in the second space 1004, high-frequency power can be supplied to the wafer stage from this high-frequency power supply, enabling reactive ion etching that utilizes ions and free radicals in the plasma.
[0035] exist Figure 1In this process, the separation plate 1002 is provided to supply only free radicals to the wafer being etched. The separation plate can also be constructed using a method where the plate is made of metal materials such as aluminum, titanium, or SUS. By electrically connecting the separation plate to ground, a DC power supply, or an AC power supply, the positively charged ions and negatively charged electrons generated in the plasma are electrically shielded, supplying only the free radicals generated in the plasma to the wafer. However, in this case, because the surface of the metal material is exposed to the plasma and the metal material scatters, the electrical properties of the wafer after treatment deteriorate due to metal contamination, which becomes a problem for mass production.
[0036] As a method to suppress metal contamination, a structure is considered whereby a conductive material is coated with a Si-containing oxide film, a Y-containing oxide film, or an Al-containing oxide film, preventing direct contact between the metal and the plasma. However, the coating may increase production costs, or metal contamination may occur if part of the coated film disappears after prolonged processing. Therefore, the separation plate 1002 is ideally constructed solely of a dielectric material, wherein the dielectric material consists of a Si-containing oxide film, a Y-containing oxide film, or an Al-containing oxide film. In particular, quartz, as the Si-containing oxide film, does not contain metals such as Y and Al internally, making it a desirable dielectric material for suppressing metal contamination.
[0037] In addition, Figure 1 In this design, only one separation plate is used, but it can also be configured with multiple separation plates. However, it is desirable that one of the multiple separation plates has a hole on its outer periphery, specifically at a point more than half the radius of the separation plate. Furthermore, a gap can be left between the outer side of the separation plate and the chamber wall; its structure and area are not limited to the hole configuration and are not particularly restricted.
[0038] Next, record the use Figure 1 The device through Figure 2 A method for suppressing metal contamination on the back side of a wafer caused by contact between the etched wafer and the wafer stage using time series analysis.
[0039] First, such as Figure 2 As shown in (21), the wafer to be etched 1005 is transported onto the wafer stage 1006. During wafer transport, the wafer to be etched 1005, loaded onto the transport arm, is transported from the transport chamber maintained in a vacuum onto the wafer stage 1006. The wafer to be etched is lifted from the transport arm by raising three or more pushers (not shown) housed within the wafer stage. Afterward, the transport arm is retracted into the transport chamber, and the pushers holding the wafer to be etched are lowered into the wafer stage, thereby placing the wafer to be etched onto the wafer stage.
[0040] At this point, it is difficult to make the contact area between the back of the wafer and the wafer stage zero. There is a possibility that metal contaminants may adhere to the back of the wafer due to the metal of the wafer stage itself or the surface of the wafer stage adhering to the back of the wafer during contact.
[0041] Next, as Figure 2 As shown in (22), an etching process is performed under given conditions, namely, a process of forming a semiconductor device on the wafer to be etched by etching. At this time, the wafer to be etched 1005 is electrically fixed on the wafer stage 1006 by applying opposite positive and negative DC voltages, respectively, to the first electrode 1013 and the second electrode 1014 disposed in the wafer stage. It is desirable that the positive and negative voltages be the same, but either a positive voltage or a negative voltage can be applied to the first electrode 1013.
[0042] Therefore, until the electrical fixation is released, the etched wafer remains fixed on the wafer stage, which can suppress the generation of foreign matter caused by wear between the etched wafer and the wafer stage due to the movement of the etched wafer caused by pressure changes during the process.
[0043] Furthermore, after the wafer to be etched is fixed on the wafer stage, a heat-conducting gas such as He is introduced between the wafer and the wafer stage to maintain a pressure of 0.1 kPa to 10 kPa. This heat-conducting gas increases the thermal conductivity between the wafer stage and the wafer to be etched, allowing efficient temperature control of the wafer at a set temperature even within a vacuum chamber using a temperature control function mounted on the wafer stage. Additionally, to prevent foreign matter from entering the holes through which the heat-conducting gas is introduced, the gas can flow continuously regardless of whether a wafer to be etched is on the wafer stage. Furthermore, even when the wafer to be etched is not on the wafer stage, gases such as N2 and Ar can be flowed in addition to the highly thermally conductive He gas to suppress the introduction of foreign matter.
[0044] Figure 2 In the etching process of (22), the plasma generation position and the etching gas used in the vacuum chamber are controlled to achieve the desired etched shape. However, the control method is not particularly limited as long as the desired shape can be achieved. That is, the plasma generation position can be formed in the upper plasma formation chamber, the lower plasma formation chamber, or alternate between the two. Furthermore, it is desirable to change the plasma generation position and the process gas used in conjunction with the film being etched. In addition, in Figure 2 In the etching process of (22), plasma is generated in the lower plasma forming chamber after plasma is generated in the upper plasma forming chamber. However, plasma generation can also be interrupted after plasma is generated in the upper plasma forming chamber, and then plasma is generated in the lower plasma forming chamber.
[0045] In addition, in order to actively irradiate the wafer to be etched with ions in the etching process of (22), high-frequency power can also be applied by a high-frequency power supply connected to the wafer stage. However, since there are almost no ions introduced into the wafer to be etched when plasma is generated in the upper plasma forming chamber, it is desirable to apply high-frequency power by a high-frequency power supply connected to the wafer stage only when plasma is generated in the lower plasma forming chamber.
[0046] Next, as Figure 2 As shown in (23), a deposited film is formed on the etched wafer under given conditions. In this process, it is desirable to use a Si-containing gas containing SiCl4, SiH4, Si2H6, etc. The location of plasma generation is not particularly limited, but if the plasma formation chamber is set as the lower plasma formation chamber, damage may sometimes occur to the etched wafer due to ion irradiation in the plasma, depending on the thickness of the deposited film. Therefore, it is desirable to form plasma in the upper plasma formation chamber. Furthermore, if the deposited film is too thin, the pattern under the deposited film will be oxidized in the subsequent oxidation process, and if the deposited film is too thick, film peeling will occur due to film stress. Therefore, the thickness of the deposited film is desirable to be 5 nm or more and 100 nm or less. In addition, in order to form a hard deposited film, a multi-step process can also be used, in which plasma is generated in the upper plasma formation chamber when the deposited film thickness is less than 5 nm, and plasma is generated in the lower plasma formation chamber after the deposited film thickness becomes 5 nm or more. However, in this process, in order to control the wafer temperature, it is desirable to electrically fix the wafer to be etched on the wafer stage and introduce heat-conducting gases such as He between the wafer to be etched and the wafer stage to maintain a constant pressure.
[0047] Next, as Figure 2 As shown in (24), oxygen plasma generated by ionizing oxygen-containing gases such as O2 and CO2 oxidizes the Si-based deposition film formed on the etched wafer by passing through a Si-containing gas. While oxygen plasma can also be formed in the upper plasma formation chamber, since oxygen ions formed in the oxygen plasma promote oxidation, it is desirable to oxidize the Si-based deposition film in the lower plasma formation chamber. Furthermore, oxidation can be promoted by actively introducing oxygen ions from the plasma through a high-frequency power supply connected to the wafer stage. However, in this process, to control the wafer temperature, it is desirable to electrically fix the etched wafer to the wafer stage and introduce a heat-conducting gas such as He between the etched wafer and the wafer stage to maintain a constant pressure. Furthermore, in Figure 2In step (23), after forming a Si deposition film, the Si deposition film is oxidized in step (24). However, it is also possible to simultaneously supply Si-containing gas and oxygen-containing gas to generate plasma in the upper plasma forming chamber 1003 or the lower plasma forming chamber 1004, thereby depositing a Si oxide film. However, in this case, if materials such as carbon are exposed in the pattern formed in the etching process of step (22), there is a possibility that the processed shape may change due to oxygen free radicals. Therefore, depending on the pattern structure, it is desirable to set the Si deposition film formation in step (23) and the oxidation of the Si deposition film in step (24) as different steps.
[0048] Next, in Figure 2 In the metal film removal step shown in (25), the metal film attached to the back of the wafer is removed by contact between the wafer stage and the back of the wafer in the process of (21). At this time, after stopping the introduction of the heat conduction gas between the wafer to be etched and the wafer stage, the DC voltage applied to the first electrode 1013 and the second electrode 1014 is reduced to zero to release the electrical fixation between the wafer to be etched and the wafer stage. The pusher is raised while maintaining the formation of plasma in the lower plasma forming chamber. Figure 3 The etched wafer 1005 is shown in the state where it is lifted by the pusher 3001. Here, even after the DC voltage applied to the electrodes is reduced to zero, residual charge accumulated on the electrodes and the etched wafer may not completely release the wafer from its fixation, potentially causing wafer misalignment or breakage when the pusher rises. However, by raising the pusher while generating plasma in the lower plasma forming chamber, the residual charge can be removed using charged particles in the plasma, suppressing wafer misalignment and breakage during the pusher's ascent.
[0049] Figure 2 The plasma formed in the lower plasma forming chamber of (25) is expected to use halogen-based plasma containing F and Cl elements, which are known to remove metal films. At this time, the Si oxide film formed in (24) and (25) is known to have high resistance to Cl plasma, which can prevent the pattern on the wafer surface from being directly exposed to halogen-based plasma during the removal of metal contaminants attached to the back side.
[0050] However, in this configuration, to prevent the pusher 3001 from being consumed due to direct contact with charged particles in the halogen-based plasma, it can also be as follows: Figure 4In the back-side metal removal step (41), the pusher is raised while plasma is formed using a rare gas such as Ar in the lower plasma forming chamber. After the wafer to be etched is raised, halogen-based plasma containing Cl is generated in the upper plasma forming chamber to remove the metal contaminants attached to the back side. At this time, it is also known that the Si oxide film formed in (24) and (25) has high resistance to Cl free radicals, preventing the pattern on the wafer surface from being directly exposed to the halogen-based plasma during the removal of the metal contaminants attached to the back side. Furthermore, in Figure 4 In the middle, steps other than (41) are because they are related to Figure 2 The same steps are followed, therefore, detailed descriptions are omitted.
[0051] Next, in Figure 2 In step (26), the wafer to be etched is removed from the vacuum container. During wafer removal, for example, three or more pushers (not shown) mounted in the wafer stage 1006 are kept raised, maintaining the wafer 1005 in a lifted state, and the wafer is transported from the transport chamber into the transport arm. At this time, to prevent contact between the wafer 1005 and the transport arm, the wafer 1005 needs to be raised to a position higher than the transport arm. Then, by lowering the pushers into the wafer stage, the transport arm holds the wafer. Finally, by retracting the transport arm into the transport chamber, the wafer is removed from the vacuum container 1001.
[0052] In addition, in this method, the wafer to be etched is transported out of the vacuum container in a state where a Si-based deposition film is deposited on the pattern. However, the Si-based deposition film can be easily removed by wet etching such as SC1 cleaning and HF cleaning using a mixed solution of ammonia and hydrogen peroxide, and it has been confirmed that there are no problems in subsequent processes.
[0053] Furthermore, it is known that when etching is performed using a plasma mixed with SiCl4 gas in the upper plasma formation chamber, a deposition film of 5 nm or more can be formed while processing the etched material such as SiGe. Thus, when etching the target film using a process gas containing SiCl4 gas, steps (22) and (23) do not necessarily have to be separated, and etching and Si deposition film formation can be performed in the same steps.
[0054] Additionally, the conditions in Table 1 are used for comparison according to... Figure 2The etching rates of the Si deposited film formed on the wafer in the processes of Examples (23) and (24), and TiN as a representative example of the back metal, were investigated. The results confirmed that the etching rate of the Si deposited film was less than 0.1 nm / min (the measurement limit) compared to the etching rate of 83 nm / min for TiN, allowing the removal of back metal contaminants while maintaining the function of the formed Si deposited film as a protective film. Furthermore, it was confirmed that the Si deposited film could be easily removed by wet etching using HF without affecting subsequent processes.
[0055] Table 1
[0056]
[0057] As described above, when a wafer is placed on a wafer stage, metal contaminants adhere to the back side of the wafer upon contact with the wafer stage itself or the surface of the wafer stage. However, after the wafer surface is coated with a Si deposition film to protect the etched pattern, the wafer is lifted by a pusher, thereby creating a gap between the etched wafer and the wafer stage, and a step is taken to remove the back side metal. This process can reduce the amount of metal contamination on the back side of the wafer.
[0058]
Example 2
[0059] As an embodiment 2 for implementing the present invention, using Figure 5 This example illustrates an embodiment where a C deposition film is used to form a film on the wafer surface after the etching process. Additionally, similar to Example 1, a plasma source using... Figure 1 This is an embodiment of the electron cyclotron resonance method, but the same embodiment can also be achieved using other plasma sources such as inductive coupling or parallel plate methods. Furthermore, the same process as in Embodiment 1 is described using the same notation.
[0060] First, such as Figure 5 As shown in (21), the wafer to be etched 1005 is transported onto the wafer stage 1006. During wafer transport, the wafer to be etched 1005, mounted on a transport arm, is transported from a vacuum-maintained transport chamber onto the wafer stage 1006. The wafer to be etched 1005 is lifted from the transport arm by raising three or more pushers (not shown 10) mounted inside the wafer stage. Afterward, the transport arm is retracted into the transport chamber, and the pushers holding the wafer to be etched 1005 are lowered onto the wafer stage 1006, thereby setting the wafer to be etched 1005 onto the wafer stage 1006.
[0061] At this point, it is difficult to make the contact area between the back side of the etched wafer 1005 and the wafer stage 1006 zero. There is a possibility that metal contaminants may adhere to the back side of the wafer due to the metal of the wafer stage itself or the surface of the wafer stage adhering to the back side of the wafer during contact.
[0062] Next, as Figure 5 As shown in (22), an etching process is performed under given conditions. The wafer 1005 to be etched is electrically fixed to the wafer stage 1006 by applying opposite positive and negative DC voltages, respectively, to the first electrode 1013 and the second electrode 1014 disposed within the wafer stage 1006. It is desirable that the positive and negative voltages be the same, but either a positive or negative voltage can be applied to the first electrode 1013.
[0063] Therefore, until the electrical fixation is released, the etched wafer 1005 remains fixed on the wafer stage 1006, which can suppress the generation of foreign matter caused by the movement of the etched wafer due to pressure changes in the process, and by wear between the etched wafer and the wafer stage.
[0064] Furthermore, after the wafer 1005 to be etched is fixed on the wafer stage 1006, a heat-conducting gas such as He is introduced between the wafer and the wafer stage to maintain a pressure of 0.1 kPa to 10 kPa between them. This heat-conducting gas increases the thermal conductivity between the wafer stage and the wafer, allowing efficient temperature control of the wafer at a set temperature even within a vacuum chamber using a temperature control function mounted on the wafer stage. Additionally, to prevent foreign matter from entering the holes through which the heat-conducting gas is introduced, the gas can flow continuously regardless of whether a wafer is on the wafer stage. Alternatively, even when the wafer is not on the wafer stage, gases with high thermal conductivity such as He, N2, and Ar can flow to suppress the introduction of foreign matter.
[0065] Furthermore, in the etching process of (22), the plasma generation position and the etching gas used within the vacuum chamber are controlled to achieve the desired etched shape. However, the control method is not particularly limited as long as the desired shape can be achieved. That is, the plasma generation position can be formed in the upper plasma formation chamber, the lower plasma formation chamber, or alternate between the two. Furthermore, it is desirable to change the plasma generation position and the process gas used in conjunction with the film being etched. Additionally, in Figure 5 In the etching process of (22), plasma is always generated in the upper or lower plasma forming chamber, but plasma generation or process gas supply can be interrupted between steps.
[0066] In addition, in order to actively irradiate the wafer to be etched with ions in the etching process of (22), high-frequency power can also be applied by a high-frequency power supply connected to the wafer stage. However, since there are almost no ions introduced into the wafer to be etched when plasma is generated in the upper plasma forming chamber, it is desirable to apply high-frequency power by a high-frequency power supply connected to the wafer stage only when plasma is generated in the lower plasma forming chamber.
[0067] Next, as Figure 5 As shown in (51), a deposited film is formed on the wafer to be etched under given conditions. In this process, it is desirable to use a carbon-containing gas containing CH4, CH3F, CHF3, CF4, C4F6, C4F8, etc. The location of plasma generation is not particularly limited, but if the plasma formation chamber is set as the lower plasma formation chamber, damage may sometimes occur to the wafer to be etched due to ion irradiation in the plasma, depending on the thickness of the deposited film. Therefore, it is desirable to form plasma in the upper plasma formation chamber.
[0068] Furthermore, if the deposited film is too thin, there is a possibility of etching damage to the pattern beneath the deposited film during the subsequent backside metal removal process. If the deposited film is too thick, there is a possibility of film peeling due to film stress. Therefore, the desired deposited film thickness is 5 nm or more and less than 100 nm. Alternatively, to form a hard deposited film, a multi-step process can be used: generating plasma in the upper plasma formation chamber when the deposited film thickness is less than 5 nm, and then generating plasma in the lower plasma formation chamber after the deposited film thickness reaches 5 nm or more. However, in this process, to control the wafer temperature, it is desirable to electrically fix the wafer to be etched to the wafer stage and introduce a heat-conducting gas such as He between the wafer to be etched and the wafer stage to maintain a constant pressure.
[0069] Next, in Figure 5 In the metal film removal step shown in (25), the metal film attached to the back of the wafer is removed by contact between the wafer stage and the back of the wafer in the process of (21). At this time, after stopping the introduction of the heat conduction gas between the wafer to be etched and the wafer stage, the DC voltage applied to the first electrode 1013 and the second electrode 1014 is reduced to zero to release the electrical fixation between the wafer to be etched and the wafer stage. The pusher is raised while maintaining the formation of plasma in the lower plasma formation chamber. Figure 3The etched wafer 1005 is lifted by the pusher 3001. Here, even after the DC voltage applied to the electrodes is reduced to zero, residual charge accumulated on the electrodes and the etched wafer may not completely release the wafer's fixation, potentially causing wafer misalignment or breakage when the pusher rises. However, by raising the pusher while generating plasma in the lower plasma forming chamber, the charged particles in the plasma can remove residual charge, suppressing wafer misalignment and breakage during the pusher's ascent.
[0070] Figure 5 The plasma formed in the lower plasma forming chamber of (25) is expected to use halogen-based plasma containing F and Cl elements, which is known to have had its metal film removed. At this time, it is known... Figure 5 The C deposition film formed in (51) has high resistance to Cl plasma, which can prevent the pattern on the wafer surface from being directly exposed to halogen plasma during the removal of metal contaminants attached to the back side.
[0071] However, in this configuration, to prevent the pusher 3001 from being consumed due to direct contact with charged particles in the halogen-based plasma, it can also be replaced with... Figure 5 (25) and such Figure 6 As in (61), the pusher is raised in a state where a rare gas such as Ar is used to form plasma in the lower plasma forming chamber. After the wafer to be etched is raised, halogen-based plasma containing Cl is generated in the upper plasma forming chamber to remove metallic contaminants adhering to the back side. It is also known at this time that Figure 5 The C deposition film formed in (51) exhibits high resistance to Cl free radicals, preventing the wafer surface pattern from being directly exposed to halogen plasma during the removal of metallic contaminants adhering to the back side. Furthermore, in Figure 6 In the middle, steps other than (61) are related to Figure 2 The same steps are followed, therefore detailed descriptions are omitted.
[0072] Next, in Figure 5 In step (52), oxygen-containing gases such as O2, CO2, and O3 are used to remove the C deposited film. The position of the pusher in this step can be high or low, but in order to reduce the increase in process time caused by the rise and fall of the pusher, it is desirable to remove the C deposited film while keeping the pusher rising steadily. In addition, the plasma can be formed in the upper plasma forming chamber or the lower plasma forming chamber, but in order to prevent damage to the formed pattern due to irradiation of ions in the plasma after the C deposited film is removed, it is desirable to form the plasma in the upper plasma forming chamber.
[0073] Next, in Figure 5In step (26), the wafer to be etched is removed from the vacuum container. When removing the wafer, for example, the wafer to be etched 1005 is lifted by raising three or more pushers (not shown) mounted in the wafer stage 1006, and a transport arm is brought in from the transport chamber. At this time, in order to prevent contact between the wafer to be etched 1005 and the transport arm, the wafer to be etched 1005 needs to be lifted to a position higher than the transport arm. Then, by lowering the pushers into the wafer stage, the transport arm can hold the wafer to be etched. Then, by retracting the transport arm into the transport chamber, the wafer to be etched can be removed from the vacuum container 1001.
[0074] In addition, this method describes a method for removing the C deposition film in a vacuum container and then transporting the wafer out, but the process of removing the C deposition film can also be performed in other dry etching or wet etching apparatuses after the wafer is transported out.
[0075] As described above, when placing a wafer on a wafer stage, there is a possibility that metal contaminants may adhere to the back of the wafer due to metal from the wafer stage itself or the surface of the wafer stage adhering to the back of the wafer upon contact. However, after the wafer surface is coated with a C deposition film to protect the etched pattern, the wafer is lifted by a pusher, thereby creating a gap between the etched wafer and the wafer stage, and a step is taken to remove the back metal, thereby achieving a process that reduces the amount of metal contamination on the back of the wafer.
[0076]
Example 3
[0077] As an embodiment 3 for implementing the present invention, using Figure 7 This section describes an embodiment where a deposition film is formed on the back side of a wafer prior to the etching process. Similar to Embodiments 1 and 2, the plasma source used is described. Figure 1 This is an embodiment of the electron cyclotron resonance method, but the same embodiment can also be achieved using other plasma sources such as inductive coupling or parallel plate methods. Furthermore, the same process as in Embodiment 1 is described using the same notation.
[0078] First, such as Figure 7 As shown in (71), the wafer to be etched 1005 is transported onto the wafer stage 1006. During wafer transport, the wafer to be etched 1005, mounted on a transport arm, is transported from a vacuum-maintained transport chamber onto the wafer stage 1006. The wafer to be etched is lifted from the transport arm by raising three or more pushers (not shown) housed within the wafer stage. Afterward, the transport arm is retracted into the transport chamber. At this time, with the pushers holding the wafer to be etched raised, the back side of the wafer and the wafer stage remain in a non-contact state.
[0079] Next, as Figure 7As shown in (72), a first deposition film is formed on the surface and back side of the wafer to be etched under given conditions. In this process, it is desirable to use a C-containing gas containing CH4, CH3F, CHF3, CF4, C4F6, C4F8, etc., or a Si-containing gas containing SiCl4, SiH4, Si2H6, etc., for the deposition film. The location of plasma generation is not particularly limited, but if the plasma formation chamber is set as the lower plasma formation chamber, damage may sometimes occur to the wafer to be etched due to ion irradiation in the plasma, depending on the thickness of the deposition film. Therefore, it is desirable to form plasma in the upper plasma formation chamber. Furthermore, if the deposition film is too thin, it will cause etching damage to the pattern under the deposition film in the subsequent back side metal removal process; if the deposition film is too thick, it will cause film peeling due to film stress. Therefore, the thickness of the deposition film is desirable to be 5 nm or more and 100 nm or less. In addition, a multi-step process can be used to form a hard deposited film, wherein plasma is generated in the upper plasma formation chamber when the deposited film thickness is less than 5 nm, and plasma is generated in the lower plasma formation chamber after the deposited film thickness becomes 5 nm or more.
[0080] Next, as Figure 7 As shown in step (73), by lowering the pusher holding the wafer to be etched into the wafer stage, the first surface deposition film formed on the wafer surface is removed after the wafer to be etched is placed on the wafer stage. When the wafer to be etched is placed on the wafer stage, it is difficult to make the contact area between the back side of the wafer and the wafer stage zero. There is a possibility that metal contaminants may adhere to the back side of the wafer due to the metal of the wafer stage itself or the surface of the wafer stage adhering to the back side of the wafer during contact. However, by performing the deposition film formation step (72), the deposition of metal contaminants can be limited to the back deposition film deposited on the back side of the wafer, and the wafer to be etched below it can be ensured that it does not directly contact the metal contaminants.
[0081] Furthermore, in this embodiment, the rare gas flow is maintained constant during the lowering of the pusher to prevent foreign matter from adhering to the stage by creating gas flow within the chamber. Therefore, unless there is a specific need, the gas flow can be stopped when the pusher is lowered.
[0082] In the removal process (73) of the first surface deposited film, after the wafer to be etched is placed on the wafer stage, the wafer to be etched 1005 is electrically fixed to the wafer stage 1006 by applying opposite positive and negative DC voltages, respectively, to the first electrode 1013 and the second electrode 1014 disposed in the wafer stage. It is desirable that the positive and negative voltages be the same, but either a positive or negative voltage can be applied to the first electrode 1013. Thus, the wafer to be etched remains fixed to the wafer stage until the electrical fixation is released, suppressing foreign matter caused by wear between the wafer to be etched and the wafer stage due to movement of the wafer caused by pressure variations during the process.
[0083] Furthermore, after the wafer to be etched is fixed on the wafer stage, a heat-conducting gas such as He is introduced between the wafer and the wafer stage to maintain a pressure of 0.1 kPa to 10 kPa. This heat-conducting gas increases the thermal conductivity between the wafer stage and the wafer to be etched, allowing efficient temperature control of the wafer at a set temperature even within a vacuum chamber using a temperature control function mounted on the wafer stage. Additionally, to prevent foreign matter from entering the holes through which the heat-conducting gas is introduced, the gas can flow continuously regardless of whether a wafer to be etched is on the wafer stage. Alternatively, even when the wafer to be etched is not on the wafer stage, gases with high thermal conductivity such as He, N2, and Ar can flow through the gas to suppress the introduction of foreign matter.
[0084] In the first surface deposition film removal step (73), if a C-containing gas is used to form the deposition film in the first deposition film formation step (72), it is desirable to use a gas containing O, N, or H elements as the deposition film removal gas. Furthermore, if a Si-containing gas is used to form the deposition film in the first deposition film formation step (72), it is desirable to use a gas containing H, F, Br, or Cl elements as the deposition film removal gas. However, the combination of gases selected is not particularly limited depending on the type of film to be etched.
[0085] In addition, in order to improve the removal efficiency of the deposited film, it is desirable to generate plasma in the lower plasma forming chamber where plasma is generated near the etched wafer. However, as long as the deposited film can be removed at an acceptable rate, plasma can also be generated in the upper plasma forming chamber.
[0086] Next, as Figure 7As shown in (74), an etching process is performed under given conditions. At this time, the wafer is fixed on the wafer stage, and the heat transfer gas between the wafer to be etched and the wafer stage is expected to remain in the state of (73), maintaining a pressure between the wafer to be etched and the wafer stage at 0.1 kPa to 10 kPa. Furthermore, in the etching process of (74), the plasma generation position within the vacuum chamber and the etching gas used are controlled to achieve the desired etching shape. However, the control method is not particularly limited as long as the desired shape can be achieved. That is, the plasma generation position can be formed in the upper plasma formation chamber, the lower plasma formation chamber, or alternate between the two. Furthermore, the number of times the plasma generation position and the process gas used can be changed in conjunction with the film being etched can also be adjusted.
[0087] In addition, Figure 7 In the etching process of (74), plasma is continuously formed in the upper plasma forming chamber after plasma is generated in the lower plasma forming chamber, but plasma generation or process gas supply can be interrupted between steps. Furthermore, if necessary, etching can be performed by generating plasma only in either the upper or lower chamber.
[0088] Furthermore, in the etching process of (74), in order to actively irradiate the wafer to be etched with ions, high-frequency power can also be applied by a high-frequency power supply connected to the wafer stage. However, since there are almost no ions introduced into the wafer to be etched when plasma is generated in the upper plasma forming chamber, it is desirable to apply high-frequency power by a high-frequency power supply connected to the wafer stage only when plasma is generated in the lower plasma forming chamber.
[0089] Next, as Figure 7As shown in (23), a Si deposition film is formed on the etched wafer under given conditions. In this process, it is desirable to use a Si-containing gas containing SiCl4, SiH4, Si2H6, etc. The location of plasma generation is not particularly limited, but if the plasma formation chamber is set as the lower plasma formation chamber, damage may sometimes occur to the etched wafer due to ion irradiation in the plasma, depending on the thickness of the deposition film. Therefore, it is desirable to form plasma in the upper plasma formation chamber. In addition, if the deposition film is too thin, the pattern under the deposition film will be oxidized in the subsequent oxidation process, and if the deposition film is too thick, film peeling will occur due to film stress. Therefore, the thickness of the deposition film is desirable to be 5 nm or more and 100 nm or less. In addition, in order to form a hard deposition film, a multi-step process can also be used, in which plasma is generated in the upper plasma formation chamber when the deposition film thickness is less than 5 nm, and plasma is generated in the lower plasma formation chamber after the deposition film thickness becomes 5 nm or more. However, in this process, in order to control the wafer temperature, it is desirable to electrically fix the wafer to be etched on the wafer stage and introduce heat-conducting gases such as He between the wafer to be etched and the wafer stage to maintain a constant pressure.
[0090] Next, as Figure 7 As shown in (24), oxygen plasma generated by ionizing oxygen-containing gases such as O2 and CO2 oxidizes the Si-based deposition film formed on the etched wafer by passing through a Si-containing gas. While oxygen plasma can also be formed in the upper plasma formation chamber, since oxygen ions formed in the oxygen plasma promote oxidation, it is desirable to oxidize the Si-based deposition film in the lower plasma formation chamber. Furthermore, oxidation can be promoted by actively introducing oxygen ions from the plasma through a high-frequency power supply connected to the wafer stage. However, in this process, to control the wafer temperature, it is desirable to electrically fix the etched wafer to the wafer stage and introduce a heat-conducting gas such as He between the etched wafer and the wafer stage to maintain a constant pressure. Furthermore, in Figure 7 In step (23), after forming a Si deposition film, the Si deposition film is oxidized in step (24). However, it is also possible to simultaneously supply Si-containing gas and oxygen-containing gas to generate plasma in the upper plasma forming chamber 1003 or the lower plasma forming chamber 1004, thereby depositing a Si oxide film. However, in this case, since the pattern formed in the etching process of step (74) contains materials such as carbon, there is a possibility that the processed shape may change due to oxygen free radicals. Therefore, it is desirable to set the Si deposition film formation in step (23) and the oxidation of the Si deposition film in step (24) as different steps.
[0091] Next, in Figure 7In the process shown in (75), the first back-side deposition film formed on the back side of the etched wafer is removed. At this time, after stopping the introduction of the heat conduction gas between the etched wafer and the wafer stage, the DC voltage applied to the first electrode 1013 and the second electrode 1014 is reduced to zero to release the electrical fixation between the etched wafer and the wafer stage. The pusher is raised while plasma is formed using rare gas in the lower plasma formation chamber. Figure 3 The wafer 1005 to be etched is lifted by the pusher 3001. However, even after the DC voltage applied to the electrodes is reduced to zero, residual charge accumulated on the electrodes and the wafer being etched may not completely release the wafer from its fixation, potentially causing wafer misalignment or breakage when the pusher rises. But by raising the pusher while generating plasma in the lower plasma forming chamber, the charged particles in the plasma can remove residual charge, suppressing wafer misalignment and breakage during the pusher's ascent.
[0092] exist Figure 7 In the process of removing the first back-side deposited film (75), if a deposited film is formed using a C-containing gas in the first deposited film formation process (72), it is desirable to use a gas containing O, N, or H elements as the deposited film removal gas. If a deposited film is formed using a Si-containing gas in the first deposited film formation process (72), it is desirable to use a gas containing H, F, Br, or Cl elements as the deposited film removal gas. However, the combination of gases selected is not particularly limited depending on the type of film to be etched.
[0093] In addition, in order to reduce processing damage to the etched wafer, it is desirable to generate plasma in the upper plasma forming chamber. If the processing damage is below the allowable value, plasma can also be generated in the lower plasma forming chamber.
[0094] Next, in Figure 7 In step (26), the wafer to be etched is removed from the vacuum container. During wafer removal, for example, three or more pushers (not shown) mounted in the wafer stage 1006 are raised, keeping the wafer to be etched 1005 raised, and it is transported from the transport chamber into the transport arm. At this time, to prevent contact between the wafer to be etched 1005 and the transport arm, the wafer to be etched 1005 needs to be raised to a position higher than the transport arm into which it is being transported. Then, by lowering the pushers into the wafer stage, the transport arm can hold the wafer to be etched. Then, by retracting the transport arm into the transport chamber, the wafer to be etched can be removed from the vacuum container 1001.
[0095] As described above, by using this embodiment, the deposition of metal contaminants is limited to the back deposit film deposited on the back side of the wafer by the deposition film formation process (72) performed before the wafer to be etched is placed on the wafer stage, so that the back side of the wafer to be etched is not in direct contact with the metal contaminants, and the wafer to be etched is removed after removing the metal contaminants from each back deposit film deposited on the back side of the wafer, thereby reducing back side metal contamination.
[0096] Furthermore, in this embodiment, a method for removing the first backside deposited film in step (75) is described. However, the first backside metal film can also be removed before removing the first backside deposited film by removing the metal film using a halogen-based plasma containing elements F and Cl, which is known for removing metal films. By setting the relevant structure, the metal film on the backside of the wafer can be removed more reliably. In addition, in this embodiment 3, the Si deposited film is formed using the same method as the method for forming the Si deposited film described in embodiment 1 after the etching process (74). However, the method for forming the C deposited film described in embodiment 2 can also be used after etching.
[0097] Furthermore, the present invention is not limited to the embodiments described above, and includes various modifications. For example, the embodiments described above have been explained in detail for ease of understanding of the present invention, but are not necessarily limited to having all the described structures. In addition, a part of the structure of one embodiment can be replaced with the structure of another embodiment, and the structure of another embodiment can be added to the structure of one embodiment. Furthermore, other structures can be added, deleted, or replaced to a part of the structure of each embodiment.
[0098] Explanation of reference numerals in the attached figures
[0099] 1001…Vacuum container, 1002…Separation plate, 1003…First space, 1004…Second space, 1005…Etched wafer, 1006…Wafer stage, 1007…High-frequency power, 1008…Waveguide, 1009…Cavity resonator, 1010…Process gas, 1011…Exhaust direction, 1012…Static magnetic field coil, 1013…First electrode, 1014…Second electrode.
Claims
1. A plasma treatment method, characterized in that, have: The first step is to perform plasma treatment on the sample placed on the sample stage; The second step, after the first step, is to form a deposition film on the surface of the sample; and The third step, following the second step, involves using plasma generated by a halogen-containing gas to remove metallic contaminants from the sample positioned above the sample stage.
2. The plasma treatment method according to claim 1, wherein, The halogen-containing gas is a gas containing chlorine.
3. The plasma treatment method according to claim 1, wherein, The second process is carried out using plasma generated by a silicon-containing gas.
4. The plasma treatment method according to claim 1, wherein, The second process has: The deposition film formation process uses plasma-generated active neutral particles to form the deposition film; and The hardening process hardens the deposited film by using active neutral particles and ions generated by plasma.
5. The plasma treatment method according to claim 4, wherein, The deposition film formation process is performed using plasma generated by silicon-containing gas. The hardening process is performed using plasma generated from oxygen-containing gas.
6. The plasma treatment method according to claim 3 or 5, wherein, The silicon-containing gas is SiCl4 gas, SiH4 gas, or Si2H6 gas.
7. The plasma treatment method according to claim 5, wherein, The oxygen-containing gas is either O2 or CO2.
8. The plasma treatment method according to claim 1, wherein, The third step removes contaminants from the sample by using reactive neutral particles generated by plasma.
9. The plasma treatment method according to claim 1, wherein, The third step is as follows: when the sample is raised from the sample stage, a rare gas is used to generate plasma in the space below the shielding plate that blocks the incident ions onto the sample stage; after the sample is raised from the sample stage, the halogen-containing gas is used to generate plasma in the space above the shielding plate.
10. The plasma treatment method according to claim 1, wherein, The second process is carried out using plasma generated by carbon-containing gas.
11. The plasma treatment method according to claim 1, wherein, The plasma treatment method also has the following characteristics: The fourth step involves exposing the sample, positioned above the sample stage, to plasma generated by oxygen-containing gas. The second process uses plasma generated by carbon-containing gas. The plasma of the second process is generated in the space above a shielding plate that blocks the incident ions onto the sample stage.
12. The plasma treatment method according to claim 11, wherein, The third step is as follows: when the sample is raised from the sample stage, a rare gas is used to generate plasma in the space below the shielding plate that blocks the incident ions onto the sample stage; after the sample is raised from the sample stage, the halogen-containing gas is used to generate plasma in the space above the shielding plate.
13. A plasma treatment method, characterized in that, have: The first step involves forming a deposition film on both the surface and back of the sample; The second step, following the first step, involves plasma treatment of the sample placed on the sample stage. The third step, following the second step, involves forming a deposition film on the sample placed on the sample stage; and The fourth step, after the third step, involves using plasma to remove the deposited film on the back side of the sample positioned above the sample stage.
14. The plasma treatment method according to claim 13, wherein, The plasma in the fourth process is generated using a halogen-containing gas.
15. The plasma treatment method according to any one of claims 1, 11, or 13, wherein, The plasma treatment method further includes the following steps: After the sample is transported out of the processing chamber where the plasma treatment was performed, the transported sample is wet etched.
16. The plasma treatment method according to claim 15, wherein, The wet etching process uses a mixture of ammonia and hydrogen peroxide or hydrofluoric acid (HF).
Citation Information
Patent Citations
Plasma treatment device and plasma treatment method
JP1998022276A