Etching composition and method for manufacturing semiconductor device using the same

Abstract

The present invention relates to an etching composition and a method for manufacturing a semiconductor device using the same, the etching composition comprising an inorganic acid and a silanol-based compound, and the content of the silanol-based compound in the etching composition and the viscosity of the etching composition satisfying formula 1, according to the present invention, a sufficient etching selection ratio of a nitride film with respect to an oxide film can be ensured while suppressing abnormal growth in a high-temperature wet etching process, and bubbles are not immediately generated after manufacturing, so that deterioration of etching process efficiency or damage to etching equipment are not caused, and excellent processability is achieved due to low viscosity.

Description

[0001] Cross-reference with related applications This application claims priority to Korean Patent Application No. 10-2023-0135825 dated October 12, 2023, Korean Patent Application No. 10-2024-0096376 dated July 22, 2024, and Korean Patent Application No. 10-20240096377 dated July 22, 2024, and all disclosures in the documents of the Korean patent applications are incorporated herein by reference. Technical Field

[0002] The present invention relates to an etching composition and a method for manufacturing a semiconductor device using the composition, and more particularly, to an etching composition for etching a nitride film with a high selectivity and a method for manufacturing a semiconductor device using the composition. Background Technology

[0003] In recent years, with the increasing multifunctionality of information and communication devices, there has been a demand for larger capacity and higher integration of semiconductor devices, including memory devices. As the size of memory cells decreases due to high integration, the operating circuits and wiring structures included in memory devices for operation and electrical connection also become more complex. In the manufacturing process of highly miniaturized semiconductor devices, oxide and nitride films, as representative insulating films, can be used separately or alternately stacked. To construct complex and miniaturized structures, such as three-dimensional electronic devices, selective etching processes of nitride films formed by patterns of various shapes may be required. In particular, there is a need for an etching composition as described below that does not cause problems such as the generation of unwanted particles or the undesirable growth of byproducts on the oxide film surface during the etching process of the nitride film, while ensuring a sufficient etch selectivity ratio of the nitride film relative to the oxide film.

[0004] In semiconductor (integrated circuit) devices, oxide films such as silicon oxide (SiO2) and silicon nitride films (SiN) are used. x Nitride films, such as oxide films and nitride films, are representative insulating films with structures consisting of individual or alternating layers of films. These oxide and nitride films are also used as hard masks for forming conductive patterns such as metal wiring.

[0005] In wet etching processes used to remove the nitride film, an etching composition consisting of phosphoric acid and deionized water is typically used. The deionized water is added to prevent a decrease in etching rate and a change in etching selectivity for the oxide film. However, when removing the nitride film via wet etching, even slight variations in the amount of deionized water can cause problems, and the reduced etching selectivity for the oxide film limits the ability to etch the nitride film to the desired level.

[0006] Therefore, in order to improve the effect of etching compositions consisting only of phosphoric acid and deionized water, and especially to improve the selectivity ratio of nitride / oxide films etched based on said etching compositions, improved techniques have been developed that further include additives in the etching compositions. However, even in such improved techniques, the additives are used at a low content of less than about 3% by weight, based on the total weight of the etching solution. This is because when the additives are used at a content of more than about 3% by weight, it is impossible to ensure a sufficient nitride film etching rate, or the etching selectivity ratio relative to the oxide film may not be met, due to the fact that the amount of such additives used is so small that the improvement effect based on the use of the additives cannot be fully obtained.

[0007] Furthermore, in terms of etching processes, there are cases where the process is carried out at temperatures exceeding 150°C. In such cases, due to the additives used for etching selectivity, when the temperature exceeds the specified range, problems may arise such as insufficient etching performance or abnormal growth. Therefore, finding an etching composition that can be used without problems under high-temperature wet etching conditions, while also fully realizing the improvement effect based on the use of additives, and with an excellent basic nitride / oxide film selection ratio, remains a technical problem that needs to be solved. Summary of the Invention

[0008] The problem the invention aims to solve The present invention aims to solve the above-mentioned problems and provides an etching composition that can suppress abnormal growth even under high-temperature wet etching processes, while improving the etch selectivity of the nitride film relative to the oxide film. Furthermore, it does not generate bubbles immediately after manufacturing, thus avoiding a decrease in the efficiency of the etching process or damage to the etching equipment. In addition, it has excellent processability due to its low viscosity, and since its APHA value is below 35, especially preferably below 3, it is almost colorless, making it particularly easy to handle when used in etching processes.

[0009] Furthermore, the present invention aims to provide a method for manufacturing semiconductor devices that, during etching of nitride films of various shapes used to realize electronic devices with complex and miniaturized structures, does not cause problems such as the generation of bubbles in the etching composition, while improving the etching selectivity of the nitride film relative to the oxide film, thereby ensuring the stability and reliability of the nitride film etching process and improving the productivity of the semiconductor device manufacturing process.

[0010] means for solving problems As a technical means to solve the above-mentioned technical problems, the present invention provides an etching composition and a method for manufacturing a semiconductor device using the composition.

[0011] More specifically, (1) the present invention provides an etching composition, wherein the etching composition comprises an inorganic acid, a silanol-based compound and the balance solvent, and the content of the silanol-based compound and the viscosity of the etching composition, based on the total weight of the etching composition, satisfy the following formula 1: [Formula 1] V≤0.184*C + 48.1 In Formula 1 above, C is the content (wt%) of silanol-based compound based on the total weight of the etching composition, and V is the viscosity (cP) of the etching composition.

[0012] (2) The present invention provides an etching composition according to (1) above, wherein the content of the silanol group compound is 0.1% by weight or more and 50% by weight or less.

[0013] (3) The present invention provides an etching composition according to (1) or (2) above, wherein the following formula 2 is further satisfied: [Equation 2] 0.184*C+44.3≤V≤0.184*C+48.1.

[0014] (4) The present invention provides an etching composition according to any one of (1) to (3) above, wherein the APHA value of the etching composition is 35 or less.

[0015] (5) The present invention provides an etching composition according to any one of (1) to (4) above, wherein the silanol compound is a silanol compound or a condensate thereof represented by the following chemical formula 1: [Chemical Formula 1]

[0016] In the chemical formula 1, R1 is selected from the group consisting of aminoalkyl, alkoxy, acetoxy and haloalkylacetoxy with 1 to 20 carbon atoms, and R2 and R3 are hydroxyl groups.

[0017] (6) The present invention provides an etching composition according to any one of (1) to (5) above, wherein the silanol-based compound is 3-aminopropylsilanetriol or a condensate thereof.

[0018] (7) The present invention provides an etching composition according to any one of (1) to (6) above, wherein the CAS number of the silanol-based compound is 68400-07-7.

[0019] (8) The present invention provides an etching composition according to any one of (1) to (7) above, wherein the content of the inorganic acid is 50 parts by weight or more and 85 parts by weight or less relative to 100 parts by weight of the total etching composition.

[0020] (9) The present invention provides an etching composition according to any one of (1) to (8) above, wherein the inorganic acid comprises one or more selected from the group consisting of sulfuric acid, nitric acid, phosphoric acid, silicic acid, hydrofluoric acid, boric acid, hydrochloric acid and perchloric acid.

[0021] (10) The present invention provides an etching composition according to any one of (1) to (9) above, wherein the etching composition further comprises an ammonium-based composition.

[0022] (11) The present invention provides an etching composition according to any one of (1) to (10) above, wherein the ammonium-based composition comprises one or more selected from the group consisting of ammonium chloride, ammonium phosphate, ammonium acetate, ammonium sulfate, ammonium formate and metal ammonium complex salts.

[0023] (12) The present invention provides an etching composition according to any one of (1) to (11) above, wherein the etching composition is used to etch a silicon nitride film.

[0024] (13) The present invention provides an etching composition according to any one of (1) to (12) above, wherein the silicon nitride film / silicon oxide film etching selectivity ratio of the etching composition is 30 or more.

[0025] (14) The present invention provides an etching composition according to any one of (1) to (13) above, wherein the absolute value of the rate of change of the nitride film etching rate is less than 20% during the etching process from silicon ion concentration from 100 ppm to 2000 ppm.

[0026] (15) The present invention provides an etching composition according to any one of (1) to (14) above, wherein the height of the bubble formed by the etching composition on the immediate surface is less than 0.5 cm.

[0027] (16) The present invention provides an etching composition according to any one of (1) to (15) above, wherein the etching composition etches the silicon nitride film at an etching process temperature of 165°C at a rate of 40 Å / min to 80 Å / min.

[0028] (17) The present invention provides an etching composition according to any one of (1) to (16) above, wherein the etching composition has an etching rate of less than 1 angstrom / min on a silicon oxide film at an etching process temperature of 165°C.

[0029] (18) The present invention provides a method for manufacturing a semiconductor device, comprising the following steps: forming a structure by stacking an insulating film and a sacrificial film on a substrate; and removing the sacrificial film to form a spatial region by performing an etching process using an etching composition according to any one of (1) to (17) above.

[0030] (19) The present invention provides a method for manufacturing a semiconductor device according to (18) above, wherein the sacrificial film comprises silicon nitride and the insulating film comprises silicon oxide.

[0031] (20) The present invention provides a method for manufacturing a semiconductor device according to (18) or (19) above, wherein, in the etching process, the sacrificial film has a higher etching rate than the insulating film.

[0032] (21) The present invention provides a method for manufacturing a semiconductor device according to any one of (18) to (20) above, wherein the spatial region includes: a gate region formed between the insulating films, and a trench connected to the gate region.

[0033] (22) The present invention provides a method for manufacturing a semiconductor device according to any one of (18) to (21) above, wherein the method further comprises the steps of: forming an opening for penetrating the stacked structure and forming a semiconductor pattern spaced apart from the trench in the opening; and the step of forming the semiconductor pattern is performed before forming the trench.

[0034] The effects of the invention With respect to the etching composition of the present invention, since it has a high etch selectivity for the nitride film, the effective oxide height (EFH) can be easily adjusted by adjusting the etch rate of the oxide film.

[0035] Furthermore, the etching composition of the present invention can improve the reliability of semiconductor devices by preventing damage to the thin film quality of the oxide film during the removal of the nitride film, as well as the electrical properties and particle generation caused by the etching of the oxide film.

[0036] Furthermore, the etching composition of the present invention has excellent processability due to its low viscosity.

[0037] Furthermore, the etching composition of the present invention has an APHA value of less than 35, which is relatively colorless, making it particularly easy to operate when applying etching processes.

[0038] Furthermore, when etching nitride films, even with alternating stacking or mixing of nitride and oxide films, the etching composition of the present invention can selectively etch only the nitride film based on the high etch selectivity between the nitride and oxide films. Therefore, in order to construct electronic devices with complex and miniaturized structures, the etching composition of the present invention avoids the aforementioned problems during the etching of nitride films formed by patterns of various shapes and further improves the etch selectivity of the nitride film relative to the oxide film. This ensures the stability and reliability of the nitride film etching process and prevents damage to the oxide film exposed to the etching composition along with the nitride film or degradation of the oxide film's electrical properties. This improves the productivity of semiconductor device manufacturing processes and enhances the reliability of semiconductor devices.

[0039] Therefore, the etching composition of the present invention can be effectively used in the manufacturing processes of semiconductor devices that require selective removal of nitride films from oxide films (e.g., device separation processes for flash memory devices, pipe channel formation processes for 3D flash memory devices, diode formation processes for phase change memories, etc.), thereby helping to improve the efficiency of semiconductor device manufacturing processes.

[0040] Furthermore, since the etching composition of the present invention contains a predetermined amount of additives that can achieve both an improved etch selectivity for the nitride film and the ability to withstand high-temperature process characteristics, it provides an etching composition with high process applicability. In particular, because the predetermined amount of additives contained in the etching composition of the present invention can suppress abnormal growth and particle generation in the etching process, the etching composition of the present invention does not immediately generate bubbles after manufacturing, thereby preventing a decrease in etching process efficiency or damage to the etching process when applied to the etching process.

[0041] The effects of the present invention are not limited to those described above, but should be understood to include all effects that can be derived from the composition of the invention as described in the detailed description of the present invention or the claims of the patent. Attached Figure Description

[0042] Figure 1A top view of a semiconductor device according to an embodiment of the present invention is shown.

[0043] Figures 2 to 8 This is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

[0044] Figure 9 It is shown in magnification Figure 8 The diagram of region A. Detailed Implementation

[0045] The present invention will now be described in more detail. However, the present invention can be implemented in various different forms, and is not limited to the embodiments described herein; the invention is defined only by the scope of the claims.

[0046] Furthermore, the terminology used in this invention is merely for illustrating specific embodiments and is not intended to limit the scope of this disclosure. Unless explicitly stated in the context, a single quantity includes multiple quantities. Throughout this specification, "comprising" a constituent element, unless otherwise stated, means that other constituent elements may also be included, not excluded.

[0047] In this invention, "silicon nitride film", "silicon nitride", and "Si" are used. x N y "It not only refers to pure silicon nitrides, but also includes impure silicon nitrides that contain hydrogen, carbon and / or oxygen impurities in their crystalline structure (where x and y are each independent positive integers).

[0048] In this invention, "silicon oxide film" and "silicon oxide" refer to silicon oxide (SiO2). x ), such as SiO2, "thermal oxides" (ThO2) x Silicon oxides are thin films made from materials such as silicon oxides. Silicon oxides can be deposited on a substrate using any method, such as deposition by chemical vapor deposition from TEOS or other sources, or thermal deposition. Silicon oxides may include low amounts of other substances or impurities that are generally commercially useful. Silicon oxides can be present as part of a microelectronic device, for example, as an insulating layer, or as a feature of the microelectronic device.

[0049] In this invention, "at least partial removal of silicon nitride material" corresponds to the removal of at least a portion of the exposed silicon nitride layer. For example, partial removal of the silicon nitride film includes anisotropic removal of the silicon nitride film covering and protecting the gate electrode used to form Si3N4. The compositions of this invention can be more generally used to substantially remove silicon nitride compared to polycrystalline silicon and / or silicon oxide films. In this case, "substantial removal" can mean that at least 90%, at least 95%, or at least 99% of the silicon nitride material is removed using the compositions of this invention. The percentage can correspond to at least one of all factors that can serve as a basis for percentages such as volume, weight, or moles.

[0050] In this invention, "substituted or unsubstituted" means that at least one hydrogen atom and / or lone pair of electrons is substituted or unsubstituted by one or more substituents selected from the group consisting of deuterium, halogen, boron, cyano, nitro, amino, silyl, phosphine oxide, phosphorus sulfide, alkoxy, aryl, and heterocyclic groups. As a specific example, "substituted or unsubstituted" may mean that at least one hydrogen atom and / or lone pair of electrons is substituted or unsubstituted by one or more substituents selected from the group consisting of deuterium, alkyl, amino, silyl, and alkoxy groups. Furthermore, each of the substituents in the above examples may be substituted or unsubstituted. For example, methylamino and aminoalkylamino can be interpreted as amino groups.

[0051] In this invention, examples of halogen atoms can be fluorine atoms, chlorine atoms, bromine atoms, or iodine atoms.

[0052] In this invention, the alkyl group can be a straight-chain alkyl group, a branched alkyl group, or a cyclic alkyl group. Examples of alkyl groups may include, but are not limited to, methyl, ethyl, n-propyl, isopropyl, n-butyl, tert-butyl, isobutyl, 2-ethylbutyl, 3,3-dimethylbutyl, n-pentyl, isopentyl, neopentyl, tert-pentyl, cyclopentyl, 1-methylpentyl, 3-methylpentyl, 2-ethylpentyl, 4-methyl-2-pentyl, n-hexyl, 1-methylhexyl, 2-ethylhexyl, 2-butylhexyl, cyclohexyl, 4-methylcyclohexyl, 4-tert-butylcyclohexyl, n-heptyl, 1-methylheptyl, 2,2-dimethylheptyl, 2-ethylheptyl, 2-butylheptyl, n-octyl, tert-octyl, 2-ethyloctyl, 2-butyloctyl, 2-hexyloctyl, 3,7-dimethyloctyl, cyclooctyl, n-nonyl, and n-decyl.

[0053] In this invention, amino groups may include alkylamino and arylamino groups. Examples of amino groups may include, but are not limited to, methylamino, ethylamino, dimethylamino, diethylamino, and / or ethylmethylamino.

[0054] In this invention, alkoxy groups may include alkylalkoxy groups and arylalkoxy groups. Examples of alkoxy groups may include, but are not limited to, methylalkoxy, ethylalkoxy, propylalkoxy, butylalkoxy, pentylalkoxy, hexylalkoxy, heptylalkoxy, octylalkoxy, nonylalkoxy, and decylalkoxy groups.

[0055] Etching Composition Etching compositions can be used to etch silicon-containing materials. Specifically, etching compositions can be used to etch insulating silicon nitride films or silicon oxide films. For example, etching of a silicon nitride film using an etching composition containing phosphoric acid as an inorganic acid can be carried out as shown in reaction formula 1 below. Etching of a silicon oxide film using the same etching composition can be carried out as shown in reaction formula 2 below. However, in the etching process using the etching composition, the etching rate of the silicon nitride film as the first insulating film can be greater than the etching rate of the silicon oxide film as the second insulating film. In this invention, etching of the silicon nitride film can refer to the removal of silicon nitride, and etching of the silicon oxide film can refer to the removal of silicon oxide. Silicon nitride can be formed from Si x N y Indicated. Silicon oxide can be made from Si x O y It represents (where x and y are each independent positive integers).

[0056] [Reaction Formula 1] 3Si3N4+ 4H3PO4+ 27H2O → 4(NH4)3PO4+ 9SiO2H2O [Reaction 2] SiO2 + 4H + + 4e - → Si + 2H2O Referring to reaction formula 1 above, phosphoric acid can react with silicon nitride to remove it. In this case, the content of phosphoric acid as an inorganic acid can be 50 parts by weight or more and 85 parts by weight or less, relative to 100 parts by weight of the overall etching composition. If a small amount of inorganic acid is included, the silicon nitride film may be difficult to remove easily. If more inorganic acid is included than necessary, it may negatively affect the etching equipment. Alternatively, if the amount of inorganic acid is inappropriate, etching byproducts may form during the etching process.

[0057] Referring to reaction formula 2, phosphoric acid can react with silicon oxide by providing hydrogen ions. If the etching composition contains excess phosphoric acid, the reaction rate between hydrogen ions and silicon oxide may increase as the amount of hydrogen ions provided by phosphoric acid increases. In this case, it may be difficult to sufficiently improve the selectivity of silicon nitride film relative to silicon oxide film in the etching process.

[0058] The etching composition provided by the present invention will be described in detail below.

[0059] This invention provides an etching composition comprising an inorganic acid, a silanol-based compound, and the balance being a solvent, wherein the content of the silanol-based compound and the viscosity of the etching composition, based on the total weight of the etching composition, satisfy the following formula 1: [Formula 1] 0.184*C+45.6≤V In Formula 1 above, C is the content (wt%) of silanol-based compound based on the total weight of the etching composition, and V is the viscosity (cP) of the etching composition.

[0060] In one embodiment of this application, the inorganic acid contained in the etching composition enables the etching composition to have an acidic pH (e.g., pH 2 to 6) for etching the object (e.g., an insulating film).

[0061] This inorganic acid can be one or more selected from the group consisting of sulfuric acid, nitric acid, phosphoric acid, silicic acid, hydrofluoric acid, boric acid, hydrochloric acid, and perchloric acid; as a specific example, it can be phosphoric acid. If phosphoric acid is used as the inorganic acid, the etching selectivity of the nitride film relative to the oxide film can be improved when the etching target is an oxide film or a nitride film. Furthermore, if phosphoric acid is used as the inorganic acid, etching can be promoted by providing a sufficient amount of hydrogen ions to the etching composition.

[0062] Furthermore, if the inorganic acid is phosphoric acid, the etching composition may also contain sulfuric acid as an additive. The sulfuric acid raises the boiling point of the etching composition containing the phosphoric acid as an inorganic acid, thereby facilitating the etching of the nitride film.

[0063] In one embodiment of this application, the content of the inorganic acid relative to 100 parts by weight of the overall etching composition can be 50 parts by weight or more and 85 parts by weight or less. Specifically, relative to 100 parts by weight of the overall etching composition, the content of the inorganic acid can be 50 parts by weight or more, 51 parts by weight or more, 52 parts by weight or more, 53 parts by weight or more, 54 parts by weight or more, 55 parts by weight or more, 56 parts by weight or more, 57 parts by weight or more, 58 parts by weight or more, or 59 parts by weight or more, and less than 85 parts by weight, less than 84 parts by weight, less than 83 parts by weight, less than 82 parts by weight, less than 81 parts by weight, less than 80 parts by weight, less than 79 parts by weight, less than 78 parts by weight, or less than 77 parts by weight. When the etching composition contains the above-mentioned amounts of inorganic acid, the etching (removal) selectivity of the nitride film can be further improved, and particle generation can be prevented.

[0064] On the other hand, the silanol-based compounds contained in the etching composition correspond to additives that can be included in the etching composition. By being included in the etching composition, they can improve the etch selectivity of the nitride film and control abnormal growth while suppressing particle formation. Various Si-based compounds with different structures are known as additives that can be included in etching compositions, among which silanol-based compounds with a Si-OH structure in their molecular structure, in particular, can better exert the effects of the additives.

[0065] In particular, the silanol-based compound may be a silanol-based compound or a condensate thereof represented by the following chemical formula 1: [Chemical Formula 1]

[0066] In the chemical formula 1, R1 is selected from the group consisting of aminoalkyl, alkoxy, acetoxy and haloalkylacetoxy with 1 to 20 carbon atoms, and R2 and R3 are hydroxyl groups.

[0067] In particular, Si-based compounds in which R2 and R3 of the structure of Chemical Formula 1 are alkoxy groups replacing hydroxyl groups are known to be particularly suitable as additives in etching compositions. However, when such substances are used in etching compositions, the following problems exist: they can cause color changes or generate particles that interfere with the etching process, or they can form a large number of bubbles immediately after formation, damaging the etching equipment and reducing the efficiency of the etching process. The etching composition of the present invention, by using a silanol-based compound or its condensate represented by Chemical Formula 1 as an additive instead of the Si-based compound having the aforementioned alkoxy groups, achieves excellent performance and stability without causing the above-mentioned problems.

[0068] On the other hand, in the silanol-based compounds used in the etching compositions of the present invention, a condensate of a silanol-based compound refers to a compound formed by the condensation or combination of two or more silanol-based compounds. As an example, the silanol-based compound represented by the stated chemical formula 1 has three Si-OH bonds, so the Si-OH structure of one molecule can react with the Si-OH structures of other molecules to form bond structures, and compounds that can form multiple structures through this process are called condensates.

[0069] In particular, although the specific principle cannot be definitively confirmed, the etching composition of the present invention, due to the inclusion of the silanol-based compound or its condensate, can maintain a low viscosity depending on the content within the etching composition, and more specifically, can satisfy the following formula 1: [Formula 1] V≤0.184*C+48.1 In Formula 1 above, C is the content (wt%) of silanol-based compound based on the total weight of the etching composition, and V is the viscosity (cP) of the etching composition.

[0070] As described above, when the content of the silanol compound in the etching composition and the viscosity of the etching composition satisfy Equation 1 above, the viscosity of the etching composition remains within a low range, thereby achieving excellent operability and processability in the etching process. As an example, an 85% by weight aqueous solution of phosphoric acid containing only phosphoric acid and water, but without the silanol compound, has a viscosity as high as approximately 47 cP at 20°C. As mentioned above, if the viscosity of the etching composition increases, it may cause overload on the process conditions during manufacturing. Furthermore, when the viscosity of the etching composition is high, the remaining amount of etching composition after the etching process may adversely affect subsequent manufacturing processes.

[0071] More specifically, as technology advances, the number of layers in 3D NAND becomes higher and the word lines become deeper. In this case, the inorganic acid in the etching composition needs to penetrate the wafer well. The lower the viscosity of the etching composition, the better the inorganic acid can penetrate the wafer. If the viscosity of the etching composition is high, the likelihood of etching the lower edge of the word line decreases, and even after etching and cleaning, the etching composition is difficult to remove effectively, potentially causing problems with residues remaining on the wafer.

[0072] More specifically, in addition to satisfying Formula 1 above, the etching composition of the present invention may also satisfy Formula 2: [Equation 2] 0.184*C+44.3≤V≤0.184*C+48.1 When the etching composition contains the silanol-based compound used in this invention, it can satisfy Formula 1 and Formula 2 above. Since Formula 1 and Formula 2 are satisfied at the same time, the viscosity of the etching composition can be kept in a low range.

[0073] On the other hand, the viscosity value V in Equations 1 and 2 above can be measured using a conventional viscometer, and more specifically, it can be measured using a rotational viscometer (Brookfield, DV-II) under constant temperature conditions of 25°C.

[0074] In one embodiment of this application, preferably, the silanol-based compound can be an aminoalkylsilanetriol or a condensate thereof, and as a specific example, it can be 3-aminopropylsilanetriol or a condensate thereof. More specifically, the CAS number of the silanol-based compound can be 68400-07-7. When such a silanol-based compound is used, it exhibits a significant improvement effect, particularly in the nitriding film relative to the oxide film, while satisfying Formulas 1 and 2 above, and keeping the APHA value of the etching composition below 35.

[0075] In one embodiment of this application, the APHA value of the etching composition of the present invention can be 35 or less, preferably 30 or less, 25 or less, 20 or less, 15 or less, 10 or less, 8 or less, 7 or less, 6 or less, 5 or less, 4 or less, 3.5 or less, or 3 or less. The etching composition of the present invention exhibits almost no color due to its low APHA value and does not interfere with the etching process. If the APHA value of the etching composition is higher than the above values, discoloration of the etching composition may become an interfering factor in measurements using spectrophotometric concentration meters, etc. Alternatively, the APHA value can be measured based on ASTM-D1209.

[0076] In particular, although the specific principle cannot be definitively confirmed, the etching composition of the present invention, due to the inclusion of the silanol-based compound or its condensate, can achieve an APHA value of 35 or less, preferably as low as 3 or less. When the APHA value of such an etching composition is low, the etching composition is almost colorless, thereby facilitating the smooth progress of the etching process. More specifically, if the etching composition has a low APHA value and is almost colorless and transparent, then when color changes occur due to particle generation or potential side reactions during the etching process, they can be immediately identified and responded to. Furthermore, by applying this result to the process condition settings, process conditions and side reactions can be optimized to prevent their occurrence. However, if the etching composition is colored, the response to color changes as described above will be delayed, and subtle color changes will be completely unresponsive, making it impossible to identify problems arising in the process. In particular, if the etching composition is colored, color deposition may occur on some equipment as the process progresses, which may further accelerate the aforementioned problems.

[0077] In one embodiment of this application, the content of the silanol-based compound, based on the weight of the overall etching composition, can be 0.1% by weight or more, 0.5% by weight or more, 1% by weight or more, 3% by weight or more, 5% by weight or more, 7% by weight or more, 10% by weight or more, 12% by weight or more, or 15% by weight or more, and can be less than 50% by weight, less than 45% by weight, less than 40% by weight, less than 38% by weight, less than 35% by weight, less than 33% by weight, or less than 30% by weight. If the content of the silanol-based compound exceeds the above range, it acts as an impurity, and as the content of the silanol-based compound increases, the content of inorganic acid decreases, resulting in a decrease in the etching rate itself. If it is less than the above range, it is difficult to use in high-temperature processes, making it difficult to adequately suppress abnormal growth, ensure etching selectivity, or suppress the formation of bubbles. That is, in contrast to conventional nitride film etching compositions, where even if silane compounds are included as additives, their content is less than about 3% by weight based on the total etching composition, the etching composition of the present invention uses a greater amount of the silanol-based compound compared to the prior art. Preferably, based on 100 parts by weight of the total etching composition, more than 10 parts by weight and less than 50 parts by weight are used, thereby achieving the effect of suppressing the stability of the etching composition, abnormal growth and the formation of bubbles in the process while maintaining a balance between etching rate and selectivity.

[0078] Furthermore, in one embodiment of this application, the etching composition may contain a solvent. Specifically, the solvent may be water or deionized water (DIW). The content of this solvent may be the content of the remaining portion of the overall etching composition excluding the content of inorganic acid and the content of the silanol-based compound; if additives are added, the content of the additives must also be removed.

[0079] In one embodiment of this application, the etching composition may further comprise an ammonium-based composition. An ammonium-based composition may refer to an amine (NH4+) that forms when dissolved in the solvent, particularly in water. + The ammonium-based composition may contain at least one of, for example, ammonia, ammonium chloride, ammonium phosphate, ammonium acetate, ammonium sulfate, ammonium formate, and a metal ammonium complex salt. The metal amine complex salt may be a metal complex salt containing at least one ammonia (NH3) ligand. If the etching process of the silicon nitride film is carried out for a long time, excessive silicon ions may be formed due to the product SiO2H2O of reaction formula 1. Excessive silicon ions may cause abnormal growth of the silicon oxide film, and if contained in the etching composition, may form amines (NH4+). +The resulting amine may react with silicon ion precursors (e.g., SiO2) to remove the silicon ion precursors. This prevents abnormal growth of the silicon oxide film. Furthermore, the ammonium-based composition can maintain a constant etching rate based on etching time.

[0080] Based on 100 parts by weight of the overall etching composition, the content of the ammonium-based composition can be 0.01 parts by weight or more and 10 parts by weight or less. When the etching composition further contains an ammonium-based composition, if the content of the ammonium-based composition is less than the above range, contrary to the purpose of further containing the ammonium-based compound, it may be difficult to prevent abnormal growth of the silicon oxide film, or the etching selectivity ratio of the silicon nitride film relative to the silicon oxide film may change over time. Furthermore, if the etching composition contains too much ammonium-based composition, contrary to the purpose of further containing the ammonium-based composition, the etching rates of the silicon nitride film and the silicon oxide film may change over time.

[0081] In addition, in one embodiment of this application, the etching composition may further contain any known additives to improve etching performance. The additives may be surfactants, metal ion blocking agents, or corrosion inhibitors, etc.

[0082] The etching composition of the present invention, as described above, optionally includes additives and ammonium-based compositions in addition to inorganic acids and silanol-based compounds, thereby exhibiting a significantly high etch selectivity ratio of the nitride film relative to the oxide film. Furthermore, the etching composition can prevent electrical performance degradation due to damage to the oxide film quality or etching of the oxide film during the etching process of the nitride film, and minimizes particle generation. Therefore, the etching composition of the present invention can be effectively used in etching processes for manufacturing semiconductor devices.

[0083] In one embodiment of this application, the etching composition is characterized in that it is used to etch a silicon nitride film. In this case, the silicon nitride film / silicon oxide film etching selectivity ratio can be 30 or more, 35 or more, 40 or more, 45 or more, 50 or more, 55 or more, 60 or more, 65 or more, 70 or more, 75 or more, 80 or more, 85 or more, 90 or more, 95 or more, 100 or more, 110 or more, 120 or more, 130 or more, 140 or more, 150 or more, 160 or more, 170 or more, or 180 or more, while it can be 5000 or less, 4500 or less, 4000 or less, 3500 or less, 3000 or less, 2500 or less, 2300 or less, 2000 or less, 1900 or less, 1800 or less, 1700 or less, 1600 or less, 1500 or less, 1400 or less, 1300 or less, 1200 or less, 1100 or less, or 1000 or less. When the silicon nitride / silicon oxide selectivity ratio is within the above range, the nitride film can be etched with a sufficiently high selectivity while ensuring the etch rate of the nitride film.

[0084] In one embodiment of this application, the etching composition of the present invention exhibits an absolute value of the rate of change of the nitride film etching rate of 20% or less, 19% or less, or 18% or less during the etching process, from silicon ion concentration up to 2000 ppm. That is, this means that the etching composition of the present invention exhibits a relatively uniform nitride film etching rate at various silicon ion concentrations, and particularly, when the absolute value of the rate of change of the nitride film etching rate is within the above-mentioned range during the etching process, the stability of the etching composition can be excellent.

[0085] In one embodiment of this application, the etching composition of the present invention has a bubble height of less than 0.5 cm, less than 0.4 cm, less than 0.3 cm, less than 0.2 cm, less than 0.2 cm, less than 0.15 cm, or less than 0.1 cm on the surface immediately after formation. The etching composition of the present invention produces almost no bubbles on the surface immediately after formation. When the bubble height on the surface immediately after formation is within the above-mentioned range, the etching process can be performed smoothly without reducing the efficiency of the etching process or damaging the etching equipment.

[0086] In one embodiment of this application, the etching composition according to the present invention, at an etching process temperature of 165°C, can achieve an etching rate of 40 Å / min or more and 80 Å / min or less relative to a silicon nitride film. Preferably, it can be 40 Å / min or more, 45 Å / min or more, 50 Å / min or more, or 55 Å / min or more and 80 Å / min or less, or 75 Å / min or less. Furthermore, the etching composition according to the present invention, at an etching process temperature of 165°C, can achieve an etching rate of 1 Å / min or less relative to a silicon oxide film. Preferably, it can be 1 Å / min or less and 0.0001 Å / min or more, 0.01 Å / min or more, 0.1 Å / min or more, 0.2 Å / min or more, 0.3 Å / min or more, or 0.4 Å / min or more.

[0087] Semiconductor device manufacturing methods The present invention provides a method for manufacturing a semiconductor device using the above-described etching composition.

[0088] More specifically, the present invention provides a method for manufacturing a semiconductor device, comprising the following steps: forming a structure by stacking an insulating film and a sacrificial film on a substrate; and performing an etching process using the etching composition to remove the sacrificial film to form a spatial region.

[0089] The above description of the etching composition of the present invention can also be applied to the method for manufacturing the semiconductor device of the present invention.

[0090] The following describes in detail the manufacturing method of the semiconductor device of the present invention.

[0091] In this invention, the term "space" in "spatial region" or "spatial portion" refers to the space formed by removing the sacrificial film during the etching process of a semiconductor device. As a non-limiting example, it may include trenches, channels, gates, spacers, etc.

[0092] Furthermore, the term "deposited portion" as used in this invention refers to a portion formed by depositing conductive or insulating material in the aforementioned spatial region or spatial portion, and can be constructed by patterning.

[0093] This application Figure 1 This is a top view of a semiconductor device according to an embodiment. Figures 2 to 8 This is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment, corresponding to along... Figure 1 The cross section intercepted by the I-I' line. The following will omit any content repeated from the above description.

[0094] Referring to this application Figure 1 and Figure 2The stacked structure 200 can be formed on the substrate 100. The substrate 100 can be a bulk silicon substrate, a silicon-on-insulator (SOI) substrate, a germanium substrate, a germanium-on-insulator (GOI) substrate, a silicon-germanium substrate, or a substrate with an epitaxial thin film obtained by selective epitaxial growth (SEG). The first direction D1 and the second direction D2 can be parallel to the upper surface 100a of the substrate 100. The second direction D2 can intersect with the first direction D1. The third direction D3 can be perpendicular to the upper surface 100a of the substrate 100.

[0095] In one embodiment of this application, the stacked structure 200 may include a sacrificial film SC and an insulating film IL. The stacked structure 200 can be formed by alternating and repeatedly depositing the sacrificial film SC and the insulating film IL on a substrate 100. The sacrificial film SC may be formed between the insulating films IL. The sacrificial film SC may have etch selectivity for the insulating films IL. The sacrificial film SC may, for example, contain silicon nitride (e.g., Si). x N y The insulating film IL may contain silicon oxide (e.g., Si). x O y The insulating film IL can be formed using tetraethoxysilane (TEOS), which can be represented by (C2H5O)4Si.

[0096] In embodiments of the invention, the sacrificial films SC may have substantially the same thickness. In contrast, the lowermost and uppermost sacrificial films SC may be thicker than the sacrificial films SC located between them. Furthermore, the insulating films IL may have the same thickness, or at least two of the insulating films IL may have different thicknesses. The lowermost insulating film IL may have a thinner thickness than the sacrificial films SC and insulating films IL formed on top of it. The lowermost insulating film IL may be a silicon oxide film formed by a thermal oxidation process. In this invention, the thickness of a constituent element may refer to the distance of the constituent element in a third direction D3.

[0097] Referring to this application Figure 1 and Figure 3 The opening 210 and the vertical structure 300 can be formed within the stacked structure 200. The opening 210 can be formed by forming a mask pattern (not shown) on the stacked structure 200 to define the planar location of the opening 210, and then etching the stacked structure 200 using the mask pattern as an etching mask. The etching of the stacked structure 200 can be performed using an anisotropic etching process.

[0098] In one embodiment of this application, the opening 210 may penetrate the stacked structure 200. The sidewalls of the opening 210 may expose the sacrificial film SC and the insulating film IL. The opening 210 may expose the substrate 100. During the formation of the opening 210, the upper surface 100a of the substrate 100 may be over-etched. In this case, the upper surface 100a of the substrate 100 exposed to the opening 210 may also be recessed to a predetermined depth.

[0099] The etching composition according to the invention can be used to uniformly etch the surfaces of the sacrificial film SC and the insulating film IL exposed by the opening 201. In order to uniformly etch the surfaces of the sacrificial film SC and the insulating film IL exposed from the upper to the lower part of the opening 201, the etching composition according to the invention is preferably a composition with an etching rate of 20 Å / min to 55 Å / min for the sacrificial film SC at an etching process temperature of 165°C.

[0100] If the etching rate range is exceeded at the etching process temperature, it is impossible to uniformly etch the surfaces of the sacrificial film SC and the insulating film IL exposed from the upper to the lower part of the opening 201.

[0101] In one embodiment of this application, each opening 210 may be formed as a cylindrical or rectangular hole shape. The lower portion of the opening 210 may have a smaller width than its upper portion. Figure 1 As shown in the top view, the openings 210 can form rows parallel to the second direction D2. The openings 210 between adjacent rows can be arranged in a zigzag shape along the second direction D2. Figure 1 In contrast, the openings 210 can form an array aligned along the first direction D1 and the second direction D2. For example, the openings 210 of two adjacent columns can be aligned along the first direction D1 to form an array.

[0102] In one embodiment of this application, a first dielectric pattern 310 may be formed within the opening 210. The first dielectric pattern 310 may cover the sidewalls of the opening 210. The first dielectric pattern 310 may expose the upper surface 100a of the substrate 100. The first dielectric pattern 310 may include a single-layer insulating layer or multiple layers of insulating layers. The first dielectric pattern 310 may be used as part of the data storage film of a charge-trapping flash memory transistor. This will be discussed below. Figure 9 An exemplary embodiment of the first dielectric pattern 310 is described below.

[0103] In one embodiment of this application, a semiconductor pattern 320 may be formed in the opening 210. The semiconductor pattern 320 may include, for example, silicon (Si), germanium (Ge), or mixtures thereof. The semiconductor pattern 320 may have a crystalline structure including at least one of single crystal, amorphous, and polycrystalline. The semiconductor pattern 320 may also include doped impurities. As another example, the semiconductor pattern 320 may be an undoped intrinsic semiconductor. The semiconductor pattern 320 may be formed using thermal chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PVD), or atomic layer deposition (ALD) techniques.

[0104] In one embodiment of this application, a semiconductor pattern 320 may be formed on the sidewall of the opening 210 to cover the first dielectric pattern 310. The semiconductor pattern 320 may extend onto the substrate 100 to contact a portion of the upper surface 100a of the substrate 100 exposed by the opening 210. Each semiconductor pattern 320 may be formed in a pipe-shaped, hollow cylindrical, or cup-shaped manner within its corresponding opening 210. The semiconductor pattern 320 may define an empty region 321 in the central portion of the opening 210.

[0105] In one embodiment of this application, the buried insulating pattern 330 can be filled in the empty regions 321 respectively. The buried insulating pattern 330 can be formed of an insulating material with excellent gap-filling properties. The buried insulating pattern 330 can be formed of, for example, a high-density plasma oxide film, an SOG film (Spin On Glass layer), an ALD oxide film, and / or a CVD oxide film.

[0106] In one embodiment of this application, pads 340 may be formed on the vertical structure 300. Pads 340 may be made of a conductive material such as impurity-doped semiconductor material or metal. The lower surface of pads 340 may be disposed on a horizontal plane higher than the upper surface of the uppermost sacrificial film SC. A lower cover film 510 may be formed on the upper surfaces of the vertical structure 300 and the stacked structure 200. The lower cover film 510 may include an insulating material such as silicon oxide, silicon nitride, and / or silicon oxynitride.

[0107] Referring to this application Figure 4A trench 600 can be formed to penetrate the stacked structure 200 and the lower cover film 510. The trench 600 can be formed by forming a mask pattern (not shown) on the lower cover film 510 to define the planar location of the trench 600 and by using the mask pattern as an etching mask to etch the stacked structure 200. The etching of the stacked structure 200 can be performed by an anisotropic etching process.

[0108] In one embodiment of this application, trenches 600 may be formed between vertical structures 300. Trenches 600 may be spaced apart from vertical structures 300 to expose the sidewalls of the sacrificial film SC and the insulating film IL. The upper portion of trenches 600 may have a greater width than their lower portions. Trenches 600 may expose the upper surface 100a of substrate 100. During the formation of trenches 600, the upper surface 100a of substrate 100 exposed to trenches 600 may be recessed to a predetermined depth due to over-etching. Figure 1 As shown in the top view, the groove 600 may have a major axis parallel to the second direction D2. The grooves 600 may be spaced apart from each other in the first direction D1.

[0109] Referring to this application Figure 5 The gate region 250 can be formed by etching the sacrificial film SC. The gate region 250 can be a void or... Figure 7 The area formed by the gate electrode pattern 450. Gate region 250 may be formed between insulating films IL and connected to trench 600. Gate region 250 may expose a portion of the sidewall 300c of vertical structure 300. The thickness of gate region 250 may be substantially the same as the thickness of the removed sacrificial film SC. Etching of the sacrificial film SC can be performed using an etching process utilizing an etching composition. The etching process may be a wet etching process.

[0110] In one embodiment of this application, the etching composition may be the etching composition of the present invention described above. Since the sacrificial film SC contains silicon nitride, it can be etched by phosphoric acid in the manner of reaction formula 1.

[0111] In one embodiment of this application, for example, an etching composition at 150°C to 200°C may be provided on substrate 100, specifically, an etching composition at 155°C to 170°C may be provided. At these temperature conditions, the inorganic acid can etch not only the sacrificial film SC but also the silicon oxide. The insulating film IL may comprise silicon oxide. According to embodiments, the etching composition, due to the inclusion of a silanol-based compound, can prevent / reduce etching of the inorganic acid-based insulating film IL. For example, during the etching process, the oxygen atom of the silanol-based compound can bind to the surface of the insulating film IL to protect it. Therefore, the insulating film IL can exhibit a low etching rate during the etching process. The oxygen atoms of the silanol-based compound may not interact with the surface of the sacrificial film SC (e.g., hydrogen bonding). This can increase the etching selectivity of the sacrificial film SC relative to the insulating film IL. If the silanol-based compound is unstable, byproducts may form, and these byproducts may form particles. Byproducts and / or particles may cause adverse effects during the manufacture of semiconductor devices. For example, byproducts and / or particles may adsorb onto the insulating film IL. Because the silicon and oxygen atoms in silanol-based compounds are stably bonded, the formation of byproducts can be prevented during the etching process. The sacrificial film SC is etched to form silicon ions (e.g., SiO₂H₂O). The ammonium-based composition can remove the generated silicon ions during the etching of the sacrificial film SC. This prevents / reduces abnormal growth of the insulating film IL based on these silicon ions.

[0112] In one embodiment of this application, in the etching process, the etching composition can be applied to the substrate 100 by coating, dipping, spraying, or spraying. If the etching composition is applied by dipping, a batch processing apparatus can be used in the etching process. If the etching composition is sprayed onto the substrate 100, a single-wafer type apparatus can be used in the etching process. After the etching process, a cleaning process using ultrapure water or the like can be performed on the substrate 100. Ultrapure water can refer to water with impurities of 100 ppb or less.

[0113] Referring to this application Figure 6The second dielectric pattern 410 and the gate conductive film 451 can be formed on the stacked structure 200 and within the trench 600. The second dielectric pattern 410 can be formed substantially conformally on the stacked structure 200 and within the trench 600. The second dielectric pattern 410 can extend into the trench 600 and the gate region 250. The second dielectric pattern 410 can substantially conformally cover the upper surface of the uppermost insulating film IL, the sidewalls of the insulating film IL exposed by the trench 600, the upper and lower surfaces of the insulating film IL exposed by the gate region 250, the sidewalls 300c of the vertical structure 300 exposed by the gate region 250, and the upper surface 100a of the substrate 100. The second dielectric pattern 410 can be formed by a deposition process. By adjusting the deposition method and deposition conditions, the second dielectric pattern 410 can be formed to have good step coverage. For example, the deposition process of the second dielectric pattern 410 can be performed by chemical vapor deposition or atomic layer deposition. The second dielectric pattern 410 can include a single layer or multiple layers. The second dielectric pattern 410 can be part of the data storage film DS of a charge-trapping flash memory transistor. The following will... Figure 9 An exemplary embodiment of the second dielectric pattern 410 is illustrated below. A gate conductive film 451 may be formed on the second dielectric pattern 410. The gate conductive film 451 may fill at least a portion of each trench 600 and the gate region 250. Unlike the illustration, the gate conductive film 451 may completely fill each trench 600. Although not illustrated, the gate conductive film 451 may be formed by sequentially depositing a barrier metal film and a metal film. The barrier metal film may comprise metal nitrides such as titanium nitride (TiN), tantalum nitride (TaN), or tungsten nitride (WN). The metal film may comprise, for example, tungsten (W), aluminum (Al), titanium (Ti), tantalum (Ta), cobalt (Co), or copper (Cu).

[0114] Referring to this application Figure 1 and Figure 7The gate conductive film 451 can be patterned to form gate electrode patterns 450 within the gate region 250. The patterning of the gate conductive film 451 can be performed by an etching process. At this time, the second dielectric pattern 410 can be further etched. In the etching process of the gate conductive film 451, the gate conductive film 451 on the substrate 100 can be removed. Etching of the gate conductive film 451 can be performed until the insulating film IL on the sidewalls of the insulating film IL is removed and the sidewalls of the insulating film IL are exposed. Thus, the gate electrode pattern 450 and the second dielectric pattern 410 can be concentrated in the gate region 250 and form a gate structure 400. Each gate structure 400 can be formed between two adjacent trenches 600. The sidewalls of the gate structure 400 can be exposed to the trenches 600. The gate structure 400 can expose the upper surface 100a of the substrate 100 within the trenches 600. The exposed upper surface 100a of the substrate 100 can be further etched. Figure 1 As shown in the top view, the gate structure 400 may have a major axis parallel to the second direction D2. The gate structures 400 may be spaced apart from each other in the first direction D1.

[0115] In one embodiment of this application, each gate structure 400 may include stacked gate electrode patterns 450, a second dielectric pattern 410, and an insulating film IL. In each gate structure 400, the gate electrode patterns 450 may be interposed between the insulating films IL. The gate electrode patterns 450 may serve as serial select lines, ground select lines, and word lines. For example, the uppermost and lowermost portions of the stacked gate electrode patterns 450 may serve as serial select lines and ground select lines, respectively. The gate electrode patterns 450 between the uppermost and lowermost gate electrode patterns 450 may serve as word lines.

[0116] In one embodiment of this application, in the gate structure 400, the second dielectric pattern 410 can be inserted between the gate electrode pattern 450 and the insulating film IL, and between the vertical structure 300 and the insulating film IL.

[0117] In one embodiment of this application, a common source region CSR can be formed within a substrate 100 exposed in a trench 600. The common source regions CSR can be spaced apart from each other in a second direction D2. The common source regions CSR can be formed by an ion implantation process using a gate structure 400 as an ion mask. Due to impurity diffusion, the common source regions CSR overlap with a portion of the lower part of the gate structure 400 from a top-view angle. The common source regions CSR can have a different conductivity type than that of the substrate 100. As another example, the common source region CSR can be formed in the... Figure 4 The trenching is carried out after 600.

[0118] Referring to this application Figure 1 and Figure 8 The spacer 550 and the common source plug (CSP) can be formed within the trench 600. The spacer 550 can cover the sidewalls of the gate structure 400. The spacer 550 can include an insulating material. The spacer 550 can be formed of, for example, silicon oxide, silicon nitride, silicon oxynitride, or a low-k material. The spacer 550 can be formed by depositing a spacer film (not shown) of uniform thickness on the substrate 100 to cover the gate structure 400 and performing an etch-back process on the spacer film to expose the common source region (CSR).

[0119] In one embodiment of this application, a common source plug CSP can be formed on spacer 550 to fill trench 600. The common source plug CSP can be individually connected to a common source region CSR. The common source plug CSP can be formed by depositing a barrier metal film (not shown) to cover the sidewalls of spacer 550 and depositing a metal film (not shown) on the barrier metal film. The barrier metal film can comprise at least one of, for example, tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), tungsten (W), tungsten nitride (WN), and combinations thereof. The metal film can comprise tungsten (W), aluminum (Al), titanium (Ti), tantalum (Ta), cobalt (Co), or copper (Cu). Figure 1 In the top view shown, the long axis of the common source plug CSP can extend in a manner parallel to the second direction D2.

[0120] In one embodiment of this application, an upper cover film 520 may be formed on a lower cover film 510 to cover the upper surface of the common source plug CSP. The upper cover film 520 may contain an insulating material.

[0121] In one embodiment of this application, a bit line contact plug 530 may be formed within an upper cover film 520. The bit line contact plug 530 may penetrate both the upper cover film 520 and the lower cover film 510, and is connected to pads 340 respectively. The bit line contact plug 530 may be electrically connected to a vertical structure 300 (e.g., a semiconductor pattern 320) via the pads 340. A bit line BL may be formed on the upper cover film 520 to connect to the bit line contact plug 530. Figure 1 As shown in the top view, the bit line BL can extend along the first direction D1. The bit line contact plug 530 and the bit line BL can include a conductive material such as a metal. Thus, the semiconductor device 1 can be manufactured. The semiconductor device 1 can be a three-dimensional memory device.

[0122] This application Figure 9 It is a diagram illustrating the insulating pattern of a semiconductor device according to an embodiment, and is Figure 8A magnified view of region A. Below, in Figure 9 The description simplifies the explanation by describing a single insulating film, a single gate electrode pattern, and a single vertical structure. Referring to this application Figure 8 and Figure 9 The first dielectric pattern 310 may include a tunnel insulating film 311, a charge storage film 312, and a first barrier insulating film 313. The tunnel insulating film 311 may extend along a vertical structure. The charge storage film 312 and the first barrier insulating film 313 may be stacked on the tunnel insulating film 311. The tunnel insulating film 311 may be formed of a material having a lower dielectric constant than the first barrier insulating film 313. The tunnel insulating film 311 may contain at least one selected from, for example, oxides, nitrides, or oxynitrides. In contrast, the tunnel insulating film 311 may contain a high-dielectric material. A high-dielectric material refers to an insulating material having a higher dielectric constant than silicon oxide, and may include zirconium oxide, aluminum oxide, and / or hafnium oxide, etc. The charge storage film 312 may be inserted between the tunnel insulating film 311 and the first barrier insulating film 313. The charge storage film 312 may include at least one selected from charge trap insulating film, gate electrode, or conductive nanodots. The first barrier insulating film 313 may contain a high dielectric material.

[0123] In one embodiment of this application, the second dielectric pattern 410 may include a second barrier insulating film. The second barrier insulating film may be inserted between the gate electrode pattern 450 and the first dielectric pattern 310, and between the gate electrode pattern 450 and the insulating film IL. The second barrier insulating film may contain a high-dielectric material. As an example, the first barrier insulating film 313 may contain a high-dielectric material, and the second barrier insulating film may be a material having a smaller dielectric constant than the first barrier insulating film 313. As another example, the second barrier insulating film may be one of the high-dielectric materials, and the first barrier insulating film 313 may be a material having a smaller dielectric constant than the second barrier insulating film.

[0124] In one embodiment of this application, the first dielectric pattern 310 and the second dielectric pattern 410 can be used as a data storage film. The data stored in the data storage film can be altered using the Fowler-Nordheim tunneling effect, which can be caused by the voltage difference between the vertical structure 300 and the gate electrode pattern 450.

[0125] In one embodiment of this application, unlike the illustration, the second dielectric pattern 410 may not be formed. As another example, the first barrier insulating film 313 may not be formed.

[0126] The embodiments of the present invention are described in detail below to enable those skilled in the art to implement the invention. However, the present invention can be implemented in various different forms and is not limited to the embodiments described herein.

[0127] Examples 1 to 5: Preparation of Etching Compositions Etching compositions were prepared using the compositions described in Table 1 below. Specifically, for phosphoric acid, an 85% by weight aqueous solution was used to control the phosphoric acid content in each etching composition. For etching compositions that further contained water in addition to the aforementioned aqueous phosphoric acid solution, water was further added, and the silanol-based compounds containing the compound with CAS number 68400-07-7 in the amounts described in Table 1 were used as the silanol-based compounds, as shown in Table 1 below, to prepare the etching compositions respectively.

[0128] Comparative Examples 1 to 10: Preparation of Etching Compositions In Comparative Example 1, only the aqueous phosphoric acid solution (85% by weight) used in the preparation of the above-described examples was used as the etching composition without the use of silanol-based compounds. In Comparative Examples 2 to 6, the etching compositions were prepared by using the compound with CAS number 58160-99-9 in the amounts listed in Table 1 as the silanol-based compound. In Comparative Examples 7 to 10, the etching compositions were prepared by using other types of silicon additives in the amounts listed in Table 1 below instead of silanol-based compounds. The compositions of the embodiments and comparative examples are shown in Table 1 below. On the other hand, the viscosity values ​​in Table 1 were measured using a rotational viscometer (Brookfield, DV-II) under isothermal conditions at 25°C.

[0129] [Table 1]

[0130] * MTES: Methyltriethoxysilane * TEOS: Tetraethoxysilane * APTMS: 3-Aminopropyltrimethoxysilane As confirmed in Table 1 above, even when using silanol-based compounds as additives, whether the etching composition satisfies Formula 1 varies depending on the type of silanol-based compound used. In particular, for Comparative Examples 2 to 6, even when using silanol-based compounds, the viscosity was higher than that of the etching compositions of Examples 1 to 5 of the present invention, thus failing to satisfy Formula 1. Similarly, Comparative Examples 1 and 9 to 10 also failed to satisfy Formula 1 because their viscosity was higher than that of the etching compositions of the present invention. That is, this means that the etching composition must contain a specific type of silanol-based compound as an additive in order to satisfy Formula 1. On the other hand, the etching compositions of Comparative Examples 7 and 8 exhibited opaque characteristics, making it impossible to measure significant viscosity values. Furthermore, the APHA value also varies significantly depending on the type of silanol-based compound used. In particular, it was confirmed that the higher the additive content, the greater the difference in APHA values ​​among the etching compositions, indicating that the APHA value of the etching composition varies due to the additives contained within it. On the other hand, regarding the etching compositions of Comparative Examples 7 and 8, the APHA value could not be measured. APHA values ​​can only be measured in a clear, non-turbid liquid phase, while the etching compositions of Comparative Examples 7 and 8 exhibited opaque characteristics, making it impossible to measure the APHA value.

[0131] Experimental Example 1: Determination of Etching Rate and Selectivity The nitride and oxide films were etched using the etching compositions prepared in the Examples and Comparative Examples, respectively, at a process temperature of 165°C. The etching rates for the nitride and oxide films were measured using an ellipsometer (NANO VIEW, SEMG-1000) and are shown in Table 2 below. Specifically, the etching rates in Table 2 are calculated by dividing the difference between the film thickness before and after etching by the etching time (minutes) after 300 seconds of etching for each film.

[0132] [Table 2]

[0133] Based on Table 2 above, it can be confirmed that the nitride film corresponding to the embodiment of the etching composition of the present invention has a high oxide film etching rate selectivity of 150 or more, and the nitride film etching rate is also high.

[0134] Experimental Example 2: Analysis of Abnormal Growth Inhibition Level of Etching Composition The etching composition of the examples was used in an etching process as described in Experimental Example 1. The solution from the silicon oxide film was then collected, and the etching rate was measured at silicon ion concentrations of 100 ppm, 300 ppm, 500 ppm, 1000 ppm, 1500 ppm, and 2000 ppm, as well as the etching rate after filtering the etching solution (hereinafter referred to as the dummy etching rate). The results are shown in Tables 3 to 6. This allows determination of whether abnormal growth can be suppressed and etching stability maintained even under long-term etching processes.

[0135] [Table 3]

[0136] [Table 4]

[0137] [Table 5]

[0138] [Table 6]

[0139] Based on Tables 3 to 6 above, observing the etching rate and etching selectivity of the silicon oxide film before and after filtration in the embodiments, it is evident that, firstly, as the silicon ion concentration increases, the etching rates of both the nitride and oxide films decrease, while the changes in etching rate before and after filtration show a gradually decreasing trend. Specifically, regarding the silicon ion concentration in the embodiments, the selectivity remained at the same level even after the process reached 2000 ppm.

[0140] On the other hand, in the case of Comparative Examples 7 to 10, in which additives having a different structure than those used in the present invention were used in similar amounts to those in the present invention, there were some differences depending on the type of additive, but under the condition of silicon ion concentration of 100 ppm to 500 ppm, unmeasurable results were also shown, and it can be confirmed that in order to achieve the effect of suppressing abnormal growth, the etching composition must contain silanol-based compounds in the amount required in the present invention.

[0141] In summary, it can be confirmed that, even at high concentrations of 1000 ppm or higher, the change rate of selectivity before and after filtration and the change rate of nitride film etching rate both show values ​​of less than 0.1%, and it can be seen that the absolute value of the change rate of nitride film etching rate is less than 20% up to the point where the silicon ion concentration increases from 100 ppm to 2000 ppm.

[0142] Experimental Example 3: Color Change and Particle Suppression Effect of Etching Composition After etching using the etching compositions of the examples and comparative examples, the color change and particle suppression effect of the etching compositions were analyzed. The results are shown in Table 7 below.

[0143] [Table 7]

[0144] Referring to Table 7, in all the embodiments, it can be seen that color change or particle generation is suppressed.

[0145] On the other hand, in Comparative Example 1 where no additive was used, or in Comparative Examples 7 to 10 where other types of additives were used instead of silanol-based compounds, the problem of particle generation occurred.

[0146] Experimental Example 4: Analysis of Bubble Generation Levels in Etching Compositions The degree of bubble formation was confirmed using the bubble pour method. Flow was conducted with N2 (0.5 L / min). Immediately after forming the etching composition, the mixture was poured into a container, and the bubble height (cm) was measured. After 60 seconds, the bubble height after debubbling was measured to determine the debubbling characteristics. The results are shown in Table 8 below.

[0147] [Table 8]

[0148] Referring to Table 8 above, it can be seen that the etching compositions of Examples 1 to 7 containing the silanol-based compounds of this application also hardly produce bubbles immediately after the etching composition is formed, as in Comparative Example 1, which consists only of an aqueous solution of phosphoric acid. In contrast, Comparative Examples 7 to 10, which used other types of additives instead of the silanol-based compounds used in the etching compositions of the present invention, produced significantly more bubbles than the etching compositions of the examples.

[0149] This means that the present invention solves the problem of bubble formation, which typically occurs in etching compositions containing silicon additives, during the initial formation or transport process before process input. Such bubbles or vesicles can degrade the efficiency of the etching process or damage the etching equipment; therefore, it is considered necessary to prepare the etching composition from the formation step to prevent bubble formation.

[0150] The above description of the present invention is merely illustrative, and those skilled in the art will understand that the present invention can be readily modified into other specific forms without changing the technical concept or essential features of the invention. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive. For example, the constituent elements described in a single form may be implemented in a distributed manner, and similarly, the constituent elements described in a distributed manner may be implemented in a combined manner.

[0151] The scope of this invention is defined by the claims and should be interpreted to include all variations or modifications derived from the scope of the claims and their equivalents.

Claims

1. An etching composition, wherein, Include: Inorganic acids, Silanol compounds, and The remaining solvent; The content of the silanol-based compound and the viscosity of the etching composition, based on the total weight of the etching composition, satisfy the following formula 1: [Formula 1] V≤0.184*C+48.1 In Formula 1 above, C is the content (wt%) of silanol-based compound based on the total weight of the etching composition, and V is the viscosity (cP) of the etching composition.

2. The etching composition according to claim 1, wherein, The content of the silanol-based compound is more than 0.1% by weight and less than 50% by weight.

3. The etching composition according to claim 1, wherein, Further satisfying Equation 2: [Equation 2] 0.184*C+44.3≤V≤0.184*C+48.

1.

4. The etching composition according to claim 1, wherein, The APHA value of the etching composition is below 35.

5. The etching composition according to claim 1, wherein, The silanol group compound is a silanol group compound or its condensate represented by the following chemical formula 1: [Chemical Formula 1] In the chemical formula 1, R1 is selected from the group consisting of aminoalkyl, alkoxy, acetoxy and haloalkylacetoxy with 1 to 20 carbon atoms, and R2 and R3 are hydroxyl groups.

6. The etching composition according to claim 1, wherein, The silanol-based compound is 3-aminopropylsilanetriol or its condensate.

7. The etching composition according to claim 1, wherein, The CAS number of the silanol-based compound is 68400-07-7.

8. The etching composition according to claim 1, wherein, The content of the inorganic acid is 50 parts by weight or more and 85 parts by weight or less, relative to 100 parts by weight of the total etching composition.

9. The etching composition according to claim 1, wherein, The inorganic acid includes one or more selected from the group consisting of sulfuric acid, nitric acid, phosphoric acid, silicic acid, hydrofluoric acid, boric acid, hydrochloric acid, and perchloric acid.

10. The etching composition according to claim 1, wherein, The etching composition further comprises an ammonium-based composition.

11. The etching composition according to claim 10, wherein, The ammonium-based composition comprises one or more selected from the group consisting of ammonium chloride, ammonium phosphate, ammonium acetate, ammonium sulfate, ammonium formate, and metal amine complex salts.

12. The etching composition according to claim 1, wherein, The etching composition is used to etch silicon nitride films.

13. The etching composition according to claim 1, wherein, The etching composition has a silicon nitride / silicon oxide etch selectivity ratio of 30 or higher.

14. The etching composition according to claim 1, wherein, During the etching process, from silicon ion concentration up to 2000 ppm, the absolute value of the rate of change of the nitride film etching rate is less than 20%.

15. The etching composition according to claim 1, wherein, The height of the bubbles formed on the immediate surface by the etching composition is less than 0.5 cm.

16. The etching composition according to claim 1, wherein, The etching composition etches the silicon nitride film at an etching process temperature of 165°C at a rate of 40 Å / min to 80 Å / min.

17. The etching composition according to claim 1, wherein, The etching composition achieves an etching rate of less than 1 angstrom per minute on the silicon oxide film at an etching process temperature of 165°C.

18. A method for manufacturing a semiconductor device, in, Includes the following steps: Structures are formed by stacking insulating and sacrificial films on a substrate; and An etching process using the etching composition according to claim 1 is performed to remove the sacrificial film to form a spatial region.

19. The method for manufacturing a semiconductor device according to claim 18, wherein, The sacrificial film comprises silicon nitride, and the insulating film comprises silicon oxide.

20. The method for manufacturing a semiconductor device according to claim 18, wherein, In the etching process, the sacrificial film has a higher etching rate than the insulating film.

21. The method for manufacturing a semiconductor device according to claim 18, wherein, The spatial region includes: The gate region formed between the insulating films, and A trench connected to the gate region.

22. The method for manufacturing a semiconductor device according to claim 21, wherein, It also includes the following steps: To form openings for penetrating the stacked structure, and A semiconductor pattern spaced apart from the trench is formed within the opening; Furthermore, the step of forming the semiconductor pattern is performed before forming the trench.

Images