Method for producing a composite structure for microelectronics, optical or optoelectronic

Abstract

The invention relates to a method of manufacturing a composite structure, the method comprising: (a) forming a temporary substrate (3 ') comprising a carrier substrate (3) on which a plurality of tile portions (P' 1-P '3) or layers of interest (20) made of a first material are arranged; (b) forming a detachable interface (5) arranged between the carrier substrate (3) and the tile portion or the layer of interest, or in or on the tile portion or the layer of interest, (c) assembling the temporary substrate (3 ') with a receiving substrate (4) made of a second material via the tile portion or the layer of interest, the second material is different from the first material, and (d) removing the carrier substrate (3) by detaching the detachable interface (5) in order to transfer at least a portion of the tile portion (P '1-P' 3) or the layer of interest (20) to the receiving substrate (4) to form the composite structure.

Description

Technical Field

[0001] This invention relates to a method for manufacturing composite structures for microelectronics, optics or optoelectronics. Background Technology

[0002] In the fields of microelectronics, optics, or optoelectronics, the design of multilayer structures sometimes requires transferring sheets in the form of multiple parts of a donor substrate onto a support substrate or a receiver substrate.

[0003] This type of method is often referred to as a tiling process and involves the partial transfer of layers taken from a donor substrate to form one or more pieces arranged according to a pattern or at predetermined locations on a support substrate.

[0004] This tiling may be necessary due to the dimensional differences between the donor substrate and the support substrate. More specifically, due to the dimensional differences, it is not possible to transfer a layer of the donor substrate that covers the entire surface of the support substrate.

[0005] One well-known method for transferring layers is the Smart Cut™ method, in which a brittle region defining the layer to be transferred is formed by implanting atomic material into a donor substrate, the donor substrate is bonded to a support substrate, and then the donor substrate is peeled off along the brittle region to transfer the layer from the donor substrate to the support substrate. However, this method assumes that the donor substrate and the support substrate have the same dimensions.

[0006] However, while large-size silicon substrates are available (typically with a diameter of 300 mm), other materials of interest are currently only available in the form of small-size bulk substrates, such as those with diameters of 100 mm or 150 mm. Furthermore, these materials of interest are sometimes particularly expensive, thus minimizing any waste generated during transfer is desirable. This is especially true for III-V semiconductor materials, including nitrides (e.g., for binary compounds, indium nitride (InN), gallium nitride (GaN), and aluminum nitride (AlN)), arsenides (e.g., for binary compounds, indium arsenide (InAs), gallium arsenide (GaAs), and aluminum arsenide (AlAs)), and phosphides (e.g., for binary compounds, indium phosphide (InP), gallium phosphide (GaP), and aluminum phosphide (AlP)).

[0007] Instead of transferring an entire layer of donor substrate, a Smart Cut™-based solution involves: removing one or more pieces from at least one donor substrate and transferring the pieces onto an intermediate support to form so-called dummy donor substrates; creating embrittlement regions in each piece by implanting atomic material; bonding the dummy donor substrates to a receiving substrate via the pieces; and peeling each piece along the embrittlement regions to transfer a portion of each piece onto the receiving substrate. The intermediate substrate and the receiving substrate have the same dimensions.

[0008] However, in some cases, the materials of the wafer portion and the receiving substrate must undergo different and incompatible process steps. For example, if the material of the wafer portion is a III-V group material, such as InP, and the material of the receiving substrate is silicon, the wafer portion is intended to receive one or more additional layers of III-V group material formed by epitaxy, while the receiving substrate is intended to form electronic circuit elements according to the CMOS method (an abbreviation for "complementary metal-oxide-semiconductor").

[0009] However, CMOS production lines cannot include epitaxy of III-V materials, especially due to the risk of contamination from III-V materials.

[0010] Document US 2011 / 0244613 describes a method for fabricating a structure comprising a silicon substrate (which includes photonic elements, such as waveguides or modulators) and an InP-based sheet supporting a laser structure. The sheet is first formed on a supporting substrate, and then portions of the sheet are transferred from the supporting substrate to a silicon receiving substrate including the photonic elements. However, this transfer, based on the Smart Cut™ method, introduces several problems.

[0011] In some implementations, hydrogen is injected into a sheet disposed on a support substrate to create embrittlement zones within the sheet. Therefore, the injected hydrogen must penetrate the laser structure located on top of the sheet, which risks damaging it. Furthermore, depending on the thickness of the laser structure, achieving the desired injection depth may be difficult using industrially available injection equipment.

[0012] In other embodiments, hydrogen implantation is performed in the InP donor substrate via a side opposite to the side where the laser structure is formed, prior to dicing the dicing, to prevent the implanted hydrogen from penetrating the laser structure. However, this method results in significant InP loss. In fact, on the one hand, the donor substrate can only be used once to form the dicing, and the residual thickness after assembling the dicing onto the support substrate does not allow for the formation of new dicings; on the other hand, after transferring the dicing portion from the support substrate to the receiving substrate, a large thickness of InP not belonging to the laser structure is removed by chemical or plasma etching. Considering the cost of InP, this method is very expensive.

[0013] When the structure includes (instead of a sheet) a continuous layer of the first material, the problem of insufficient compatibility between the two parts of the composite structure also arises. Summary of the Invention

[0014] Therefore, the object of the present invention is to provide a method that enables the fabrication of a structure from a temporary substrate comprising a layer or sheet of interest, the structure including a receiving substrate on which portions of the layer or sheet of interest extend, the structure being composite in that it combines materials subjected to different and incompatible treatments for the receiving substrate and the portions of the layer or sheet of interest, the method being carried out under conditions that minimize damage to the sheet or layer of interest and optimize the recycling of the temporary substrate.

[0015] The present invention relates to a method for manufacturing a composite structure comprising sheet portions or layers of interest. In the case of sheets, the method includes: (a) Forming a temporary substrate, the temporary substrate comprising a support substrate and a plurality of sheet portions of a first material deposited on the support substrate, the formation of the temporary substrate comprising: (i) Removing multiple pieces from at least one donor substrate and placing each piece on an intermediate substrate, wherein the diameter of each donor substrate is smaller than the diameter of the intermediate substrate. (ii) By injecting atomic material into each sheet to form embrittlement zones, the sheet portions to be transferred are defined. (iii) The intermediate substrate is bonded to the support substrate via the sheet, and (iv) Peel off the sheets along the embrittled region to transfer each sheet portion onto the support substrate. (b) Forming a removable interface, the removable interface being disposed between the support substrate and the sheet portion, or disposed in or on the sheet portion. (c) Assembling the temporary substrate with a receiving substrate made of a second material, different from the first material, via the sheet portion, and (d) The support substrate is removed by disassembling the removable interface in order to transfer at least a portion of the sheet portion onto the receiving substrate to form the composite structure.

[0016] In the case of the layer of interest, the method includes: (a) Forming a temporary substrate, the temporary substrate comprising a support substrate and a layer of interest of a first material deposited on the support substrate, the formation of the temporary substrate comprising: (i) Provide a donor substrate, (ii) By implanting atomic material into the donor substrate to form embrittled regions, the layers of interest to be transferred are defined. (iii) The donor substrate is bonded to the support substrate via the layer of interest, and (iv) Peeling the donor substrate along the embrittlement region to transfer the layer of interest onto the support substrate. (b) Forming a removable interface, the removable interface being disposed between the supporting substrate and the layer of interest, or disposed in or on the layer of interest. (c) Assembling the temporary substrate with a receiving substrate made of a second material, different from the first material, via the layer of interest, and (d) The supporting substrate is removed by disassembling the removable interface in order to transfer at least a portion of the layer of interest onto the receiving substrate to form the composite structure.

[0017] The term "removable interface" excludes the case of embrittlement zones formed by injecting atomic material.

[0018] In this text, the term "assembly via a sheet portion (or via a layer of interest)" means that the assembly of the temporary substrate on the receiving substrate is performed with the sheet portion (or layer of interest) oriented toward the receiving substrate (with the support substrate located on the side of the sheet portion or layer of interest opposite to the receiving substrate). This does not imply direct contact between the sheet portion (or layer of interest) and the receiving substrate. Therefore, if, prior to the assembly step, an additional layer has been formed on the sheet portion or layer of interest in the context of one or more processes of the sheet portion or layer of interest, as disclosed below, the layer located at the free surface of the sheet portion or layer of interest is in contact with the receiving substrate.

[0019] Therefore, the present invention enables the assembly of two incompatible substrates to be delayed as much as possible during the manufacture of the composite structure, in particular by avoiding processing the sheet or layer of interest according to a method incompatible with the material of the receiving substrate.

[0020] Furthermore, the assembly of the intermediate substrate with the sheet or layer of interest (or the remainder of the sheet or layer of interest after a portion of the sheet or layer of interest has been transferred onto the receiving substrate) facilitates the formation of several temporary substrates, which minimizes the unit cost of the temporary substrates.

[0021] Particularly advantageously, the method includes at least one step of processing the sheet portion or the layer of interest before assembling the sheet portion or the layer of interest onto the receiving substrate.

[0022] The process may include: - Epitaxial layers of a third material on each sheet or on the layer of interest - Etching, - Surface treatment, - Doping, - Heat treatment, - Forming channels or trenches in a temporary substrate to provide access for the etchant to the removable interface, and / or - Forming interconnections.

[0023] In some embodiments, the processing of the sheet portion or the layer of interest is performed at a temperature greater than or equal to 500°C.

[0024] In some embodiments, the receiving substrate includes at least a portion of an electronic circuit formed prior to the assembly of the temporary substrate and the receiving substrate.

[0025] The formation of the aforementioned portion of the electronic circuit can be performed, in particular, using CMOS technology.

[0026] The method may include at least one step of finalizing the electronic circuitry after transferring a sectional portion or layer of interest onto a receiving substrate. In this text, the term "finalization" refers to assembling transistors, laser diodes, and chip elements formed in the sectional portion or layer of interest, along with the receiving substrate, to form electronic and / or optoelectronic components. These finishing steps are often referred to in the field of microelectronics as the term "back-end."

[0027] Of particular advantage, each step that ultimately completes the electronic circuit is performed at a temperature below 500°C.

[0028] The electronic circuit may advantageously include at least one transistor, particularly a field-effect transistor, CMOS transistor, BiCMOS transistor or bipolar transistor, and / or at least one diode, particularly a laser diode or light-emitting diode (LED).

[0029] The first material is advantageously selected from: - III-V group materials, such as indium nitride (InN), gallium nitride (GaN), aluminum nitride (AlN), indium arsenide (InAs), gallium arsenide (GaAs), aluminum arsenide (AlAs), indium phosphide (InP), gallium phosphide (GaP), or aluminum phosphide (AlP). - Piezoelectric materials, such as lithium tantalate (LiTaO3), lithium niobate (LiNbO3), potassium sodium niobate (KxNa1-xNbO3 or KNN), barium titanate (BaTiO3), quartz, lead zirconate titanate (PZT), lead magnesium niobate-lead titanate compound (PMN-PT), zinc oxide (ZnO), aluminum nitride (AlN) or aluminum scandium nitride (AlScN). - Germanium or silicon carbide, and - Electrically insulating materials, such as diamond, strontium titanate, yttrium-stabilized zirconium oxide, or sapphire.

[0030] The third material can then be selected from: III-V group materials, piezoelectric materials, silicon carbide, silicon-germanium (SiGe), and germanium.

[0031] The second material is preferably selected from silicon, germanium, silicon carbide and group III-V materials, especially gallium arsenide.

[0032] The supporting substrate advantageously includes silicon, silicon carbide (especially polycrystalline silicon carbide) or aluminum nitride (especially polycrystalline aluminum nitride).

[0033] In some embodiments, the removable interface includes a selectively etched layer, a porous layer, and / or a layer with low binding energy, and the removal of the interface during the removal of the support substrate includes applying mechanical action, chemical etching, and / or thermal treatment to the layer.

[0034] Particularly advantageously, the method comprises depositing a stack of layers on the free surface of each sheet portion of a temporary substrate or a layer of interest, the removable interface being formed by one of the layers of the stack. Attached Figure Description

[0035] Other features and advantages of the invention will become apparent from the following detailed description with reference to the accompanying drawings, in which: - Figure 1A An embodiment of the composite structure obtained by means of the method according to the invention (realizing the piece of interest) is shown; Figure 1B A variation of the composite structure is shown; Figure 1C Another embodiment of the composite structure obtained by the method according to the invention (realizing the continuous layers of interest) is shown; - Figures 2A to 2E The steps of removing a sheet from a donor substrate, placing the sheet on an intermediate substrate, forming a brittle region in the sheet, bonding the intermediate substrate to a support substrate via the sheet, and transferring portions of the sheet to the support substrate after peeling the sheet along the brittle region are shown respectively. - Figure 3 The steps for assembling a temporary substrate onto a receiving substrate are shown. - Figure 4 The steps for removing the support substrate to transfer the individual pieces onto the receiving substrate are shown. - Figures 5A to 5D They are shown respectively in Figure 2C The steps include forming a layer (which forms a removable interface) on the sheet, bonding the intermediate substrate and the sheet to a support substrate via the layer forming the removable interface, transferring portions of the sheet to the support substrate after peeling the sheet along the embrittlement region, and assembling a temporary substrate onto a receiving substrate. - Figure 6 It shows in Figure 2E A layer stack is formed on a sheet portion of a temporary substrate, the stack including layers forming removable interfaces. - Figure 7 It shows that Figure 6 The step of assembling a temporary substrate onto a receiving substrate.

[0036] For readability, the elements are not drawn to scale. Furthermore, the number of sections is only schematic. The same reference numerals refer to the same elements from one figure to another; therefore, they are not described with reference to each figure individually. Detailed Implementation

[0037] Figure 1A An example of a composite structure is shown, which combines a sheet or sheet portion P'1, P'2, P'3 of a first material with a substrate 4 (referred to as a receiving substrate) formed of a second material different from the first material.

[0038] Advantageously, the sheet portion comprises non-commercially available material in the form of a large-size donor substrate. Thus, the donor substrate can have a diameter of less than 300 mm, for example, about 100 or 150 mm.

[0039] This is especially true for III-V semiconductor materials, which include nitrides (e.g., for binary compounds, indium nitride (InN), gallium nitride (GaN), and aluminum nitride (AlN)), arsenides (e.g., for binary compounds, indium arsenide (InAs), gallium arsenide (GaAs), and aluminum arsenide (AlAs)) and phosphides (e.g., for binary compounds, indium phosphide (InP), gallium phosphide (GaP), and aluminum phosphide (AlP)).

[0040] The wafer portion may also include group IV or group IV-IV semiconductor compounds, such as germanium and silicon carbide.

[0041] The sheet portion may also include piezoelectric materials, such as lithium tantalate (LiTaO3) or even lithium niobate (LiNbO3), potassium sodium niobate (K... x Na 1-xNbO3 or KNN), barium titanate (BaTiO3), quartz, lead zirconate titanate (PZT), lead magnesium niobate-lead titanate compound (PMN-PT), zinc oxide (ZnO), aluminum nitride (AlN) or scandium aluminum nitride (AlScN) (non-exhaustive list).

[0042] The sheet portion may also include electrically insulating materials such as diamond, strontium titanate (SrTiO3), yttrium stabilized zirconium oxide (YSZ), or even sapphire.

[0043] The receiving substrate itself is made of a second material, which is different from the material of the sheet, and the second material is typically suitable for different technical steps that are incompatible with the technical steps performed on the first material.

[0044] In some implementations (see) Figure 1B A bonding layer 40, such as a dielectric layer or a silicon oxide (SiO2) layer, can be inserted between the sheet portion P'1-P'3 and the receiving substrate 4.

[0045] Figure 1C Another example of a composite structure is shown, which is formed by stacking a layer of interest 20 made of a first material onto a receiving substrate 4 made of a second material different from the first material.

[0046] Advantageously, the layers of interest and the receiving substrate are of the same size. The layers of interest are made of commercially available material, preferably in the form of a donor substrate having the same size as the receiving substrate. Thus, the donor substrate may advantageously have a diameter of 100 or 150 mm.

[0047] Layers of interest advantageously include group III-V semiconductor materials, including nitrides (e.g., for binary compounds, indium nitride (InN), gallium nitride (GaN), and aluminum nitride (AlN)), arsenides (e.g., for binary compounds, indium arsenide (InAs), gallium arsenide (GaAs), and aluminum arsenide (AlAs)), and phosphides (e.g., for binary compounds, indium phosphide (InP), gallium phosphide (GaP), and aluminum phosphide (AlP)). Examples of ternary or quaternary compounds of interest include InGaAs, InGaP, and InGaAlAs.

[0048] Although not shown, a bonding layer—such as a dielectric layer, such as a silicon oxide (SiO2) layer—can be inserted between the layer of interest 20 and the receiving substrate 4.

[0049] The methods used to fabricate composite structures are essentially the same, whether they comprise multiple pieces of interest or continuous layers of interest. In fact, a set of pieces can be considered as discontinuous layers; conversely, a layer of interest can be considered as a single piece. Furthermore, the transfer or handling of pieces involves the same techniques as in the case of a single layer. Therefore, unless otherwise stated, this description applies equally to sets of pieces of interest and continuous layers of interest, even though for the sake of brevity, the description focuses on the case of pieces.

[0050] Formation of temporary substrate

[0051] Figures 2A to 2E The formation of a temporary substrate is schematically illustrated, which includes pieces placed on an intermediate substrate and portions of said pieces transferred to a supporting substrate.

[0052] Reference Figure 2A The sheets P1-P3 are cut from the donor substrate 2. The cutting of the sheets can be performed by any technique known to those skilled in the art. In particular, it can be performed by sawing and / or cleaving, or even by laser cutting. It can also be combined, for example, with a localized plasma etching step along the cutting line (a technique known as "plasma cutting").

[0053] Figure 2B It shows that it will be from Figure 2A The piece taken from the donor substrate 2 is placed on the base substrate 1 to form the intermediate substrate 1'.

[0054] Placement can be achieved through a "pick-and-place" technique, in which a robot picks up a piece previously cut from a donor substrate and places it at a predetermined location on an intermediate substrate.

[0055] In some embodiments, each piece is adhered to the base substrate 1 via molecular adhesion. For this purpose, surface treatments of the pieces and / or the base substrate 1 can be performed beforehand to promote good molecular adhesion. These treatments may specifically include cleaning, deposition of a bonding layer (e.g., silicon oxide (SiO2)), plasma activation prior to bonding, and annealing.

[0056] In other embodiments, the bonding of the sheet to the base substrate 1 may involve a bonding layer, such as a polymer bonding layer, a eutectic bonding layer, or a ceramic bonding layer.

[0057] The base substrate 1 advantageously has a diameter larger than that of the donor substrate 2, for example, a diameter of about 300 mm.

[0058] Given the size difference between the donor substrate and the base substrate 1, several donor substrates may be required to lay the entire surface of the base substrate 1 at the desired piling density to form the intermediate substrate 1'.

[0059] In the case of a continuous layer of interest, the steps of cutting the donor substrate and placing it on the base substrate can be omitted.

[0060] Figure 2C The diagram illustrates the formation of embrittlement regions within the sheets P1-P3 (or, in the case of a continuous layer, within a donor substrate) to define surface portions of the sheets intended to be transferred onto the support substrate 3. As indicated by the arrows, the embrittlement regions 11 are advantageously formed by implanting atomic material (e.g., hydrogen and / or helium) into the sheets to a depth corresponding to the thickness of the layer to be transferred.

[0061] Figure 2D It shows that Figure 2C The intermediate substrate 1' is bonded to the support substrate 3 via a sheet.

[0062] Particularly advantageously, each piece is adhered to the support substrate 3 via molecular adhesion. For this purpose, surface treatments of the pieces and / or the support substrate 3 can be performed beforehand to promote good molecular adhesion. These treatments may specifically include cleaning, deposition of a bonding layer (e.g., silicon oxide (SiO2)), plasma activation before bonding, polishing, and annealing, preferably at low temperatures (in other words, typically below 300°C).

[0063] In another embodiment (which will be referred to below) Figures 5A to 5D (As described), each piece is adhered to the support substrate via layer 5, which forms a removable interface.

[0064] The intermediate substrate 1' and the support substrate 3 have the same diameter.

[0065] In some embodiments, the support substrate is a silicon substrate. Silicon support substrates are particularly advantageous because they are available in large diameters (typically 300 mm). Such substrates are particularly suitable for transferring wafers of interest.

[0066] In other embodiments, the support substrate is a silicon carbide or aluminum nitride substrate. Silicon carbide and aluminum nitride substrates are typically available in smaller diameters (e.g., 100 or 150 mm). These substrates are particularly suitable for transferring layers of interest from donor substrates with a diameter of 100 or 150 mm, but they can also be used to transfer sheets of interest.

[0067] Since the support substrate is selected primarily based on its mechanical and / or chemical properties rather than its electrical or optical properties, it can be used in low-cost forms, such as polycrystalline forms (p-SiC, p-AlN). Furthermore, choosing a polycrystalline form makes it possible to obtain support substrates with larger diameters than those in single-crystal forms.

[0068] Compared to silicon substrates, SiC or AlN substrates have thermal expansion coefficients that are closer to those of III-V materials used to form sheets or layers of interest. The thermal expansion coefficient of p-SiC can be finely tuned by altering its structure (polymorphs—especially hexagonal polymorphs SiC-4H and SiC-6H, or cubic polymorphs SiC-3C—crystallographic grain orientation, grain size, grain boundary structure, etc.) and / or its manufacturing process.

[0069] This improved compatibility of thermal expansion coefficients helps minimize tensile or compressive stresses within the temporary substrate during its fabrication. In fact, the step of transferring a sheet or layer of interest onto a support substrate using the Smart Cut™ process requires one or more annealing steps, particularly for bonding and consolidation. Furthermore, epitaxial regrowth represents a significant thermal budget in the possible treatments (detailed below) applied to the sheet portions or layers of interest before transferring them onto the receiving substrate, especially when the epitaxial layers are large (typically several μm). For example, for InP group materials, epitaxy is performed at temperatures above 500 or 600°C, while for GaAs and GaN group materials, it is performed at even higher temperatures.

[0070] Then, refer to Figure 2E The sheet is peeled off along the embrittlement region 11 to transfer the sheet portions P'1, P'2, and P'3 defined by the embrittlement region onto the support substrate. Thus, a temporary substrate 3' is formed, which includes the sheet portions P'1, P'2, and P'3 and the support substrate 3.

[0071] The sheets placed on the base substrate 1 typically have a thickness between 20 µm and 1000 µm, preferably between 100 µm and 700 µm. The portions transferred from each sheet to the support substrate 3 typically have a thickness between 30 nm and 1.5 µm.

[0072] Processing of temporary substrate sheets

[0073] Advantageously, most of the processing to be performed on the sheet portion is carried out on the temporary substrate 3', after which the temporary substrate 3' is assembled with the receiving substrate 4.

[0074] This makes it possible, in particular, to overcome any incompatibility between technical steps implemented on the sheet portion on one hand and technical steps implemented on the receiving substrate on the other hand.

[0075] Therefore, all processing of the sheet portion that could potentially damage the receiving substrate or production line is preferably performed on a temporary substrate in a specific device.

[0076] In particular, in the manufacture of electronic components, a distinction is conventionally made between the so-called "front-end" stage (corresponding to the fabrication of the substrate in which, for example, transistors or laser diodes and other chip elements are formed) and the so-called "back-end" stage (corresponding to the assembly of transistors, laser diodes, and chip elements formed from the substrate to form electronic and / or optoelectronic components). Typically, steps performed at high temperatures (e.g., above 500°C) are carried out during the "front-end" stage, while the "back-end" stage involves only lower temperatures (below 500°C) to avoid damaging the chip.

[0077] In this invention, preferably, only processes that do not involve temperatures greater than 500°C and do not pose a risk of contaminating the receiving substrate are performed after the individual sheet portions are transferred onto the receiving substrate 4. Processes involving temperatures greater than 500°C and / or that may contaminate or damage the receiving substrate are preferably performed while the sheet portions are still on the temporary substrate 3' (i.e., before they are transferred onto the receiving substrate).

[0078] Depending on the application, different processing methods can be applied to the fragmented parts.

[0079] In some embodiments, the processing of the sheet portions includes forming at least one layer of a third material on each sheet portion via epitaxy. The third material may be the same as the first material. This allows the sheet portions to be thickened to a target thickness. Optionally, an additional layer of a fourth material, different from the third material, may be formed via epitaxy, with the sheet portion acting as a seed layer for forming the additional layer. For this purpose, the fourth material and epitaxial operating conditions are selected such that the additional layer has good crystal quality.

[0080] For example, if the sheet portion is made of a first group III-V material (especially InP, GaN, GaAs, etc.), sapphire, or germanium, then the third or fourth material can be a group III-V material. If the sheet portion is made of germanium (or silicon carbide), then the third material can be germanium or silicon-germanium (or silicon carbide). If the sheet portion is made of a piezoelectric material, then the third or fourth material can be a piezoelectric material.

[0081] More generally, a person skilled in the art can epitaxially deposit multiple material layers to form complex epitaxial stacks. He will be able to apply all his expertise, such as in the epitaxial field of III-V material stacks (or non-III-V material stacks) on substrates such as GaAs, InP, Ge, GaN, and SiC.

[0082] As described above, the support substrate is preferably selected such that its coefficient of thermal expansion is as close as possible to the coefficient of thermal expansion of the material of the sheet or the layer of interest and the epitaxial layer, in order to minimize stress within the temporary substrate.

[0083] In addition, those skilled in the art can use epitaxy to deposit a layer that forms a removable interface, which is adapted to be detached between a supporting substrate and a piece portion intended to be transferred onto a receiving substrate. Figure 6 Therefore, it is shown Figure 2E The structure includes a preferably epitaxial stack 6 deposited on each tile portion P1'-P3'. This stack can be deposited using any deposition technique. The stack includes a layer 5 on the tile portion side designed to form a removable interface. Layer 5 may, in particular, be composed of the same material as one of the layers constituting the stack, but with different doping to allow for selective etching relative to the rest of the stack. As will be seen below, the portion of the stack located on layer 5 is intended to be transferred onto a receiving substrate. This portion of the stack is shown as consisting of two layers, but it may include any other number of layers depending on the specifications of the device to be formed in the stack.

[0084] In some implementations, the process applied to the wafer portion may be etching. This etching may be specifically performed to define the outline of a transistor or other optoelectronic component (e.g., a diode). It may also be performed to remove peripheral or internal regions of each wafer portion, for example, to resize the wafer portions or subdivide them into multiple smaller portions, or to correct defects in the arrangement or alignment of the wafer portions. For this purpose, a protective film is formed on the surface of the wafer portion such that the protective film covers the area of ​​the wafer portion to be preserved, and the protective film has openings positioned opposite to the area of ​​the wafer portion to be removed. In this text, the term "etching" means the chemical and / or physical erosion of the wafer material resulting in the removal of areas of the wafer not covered by the protective film.

[0085] When using a continuous layer of interest instead of a sheet, the method may include a selective etching step that forms channels or trenches defining islands or bands, thereby allowing the etchant to more easily reach the area to be etched during the removal of the support substrate.

[0086] In some embodiments, the processing of the sheet portion includes at least one surface treatment, such as polishing, cleaning, or even dielectric deposition. Such surface treatment can particularly improve the subsequent adhesion of the sheet portion to the receiving substrate, especially when the assembly of the temporary substrate and the receiving substrate is performed by bonding. Dielectric deposition can also, for example, passivate the surface of the laser diode.

[0087] In some embodiments, processing of the sheet portion may include doping at least a portion of the sheet portion to impart desired electrical properties to the portion. This doping operation may be performed during an epitaxial step on the sheet portion, or independently, for example, by ion implantation or by diffusion.

[0088] In some embodiments, the processing of the sheets may include at least one heat treatment. For example, the heat treatment may include smooth annealing of the sheet portions to remove defects associated with transferring the respective sheet portions onto the support substrate. It may also be accompanied, for example, by a doping step performed by implantation or by diffusion.

[0089] In some implementations, processing of the sheet portion may include forming interconnects, for example by doping regions of the sheet and / or depositing conductive layers on the sheet.

[0090] Naturally, the above processes can be combined simultaneously or sequentially, and those skilled in the art can choose the order in which the processes are performed. For example, the epitaxy of an additional layer may be accompanied by doping of the layer. According to another example, in order to form a component such as a laser, multiple epitaxial steps separated by other operations such as photolithography can be performed.

[0091] Ultimately, these operations can lead to the intermediate production of complete sub-components. Therefore, this utilizes the support substrate, whose mechanical properties are generally superior to those of the donor substrate.

[0092] Processing of receiving substrate

[0093] In some applications, the receiving substrate is advantageously a substrate suitable for the production of electronic components, particularly by CMOS methods. The receiving substrate can therefore typically be a silicon substrate. It can also be composed of other materials, particularly germanium, silicon carbide, and group III-V materials, especially gallium arsenide (GaAs).

[0094] The material of the receiving substrate can be specifically selected based on the material of the sheet. As an example, a receiving substrate made of GaAs can be combined with a temporary substrate in which the sheet is made of InP, or a receiving substrate made of SiC can be combined with a temporary substrate in which the sheet is made of diamond.

[0095] In a manner known per se, the receiving substrate can undergo photolithography, localized doping, and deposition of electrically insulating and / or conductive layers (particularly for the fabrication of transistors). The transistors may include field-effect transistors, CMOS transistors, BiCMOS transistors, bipolar transistors, etc.

[0096] In other embodiments, the receiving substrate may simply be a bulk semiconductor substrate or a silicon-on-insulator (SOI) substrate.

[0097] In some applications, the receiving substrate is suitable for manufacturing radio frequency (RF) devices. The receiving substrate may then have high resistance (e.g., greater than 1000 Ω·cm) and / or include a layer of charge traps (trap-rich layer).

[0098] Assembly of temporary substrate and receiving substrate

[0099] The assembly of the temporary substrate and the receiving substrate can be performed through molecular adhesion bonding.

[0100] In the implementation method, such as Figure 3 As shown, the receiving substrate 4 can be covered by a bonding layer 40 (e.g., a silicon dioxide (SiO2) layer).

[0101] In other implementations, the bonding is direct, without the intervention of such a layer.

[0102] The assembly may include annealing at a temperature suitable for enhancing adhesion between the sheet portion and the receiving substrate (or bonding layer, as appropriate).

[0103] Other combination techniques known to those skilled in the art can also be conceived.

[0104] Removal of the supporting substrate

[0105] Reference Figure 4 After the temporary substrate 3' is assembled on the receiving substrate 4, the supporting substrate 3 is removed so that the piece portions P'1-P'3 can be transferred onto the receiving substrate 4.

[0106] In some embodiments, this removal is performed by grinding the support substrate until the surface of the sheet portion opposite to the receiving substrate 4 is exposed. Preferably, the grinding of the support substrate stops a few micrometers to tens of micrometers from the surface of the sheet portion. The remaining portion of the support substrate can then be removed by polishing and / or etching. Furthermore, this removal of the support substrate can be performed by the substrate manufacturer, or preferably by the optoelectronic device manufacturing customer.

[0107] Alternatively or additionally, removal may include polishing and / or etching.

[0108] Although this removal of material consumes the support substrate and does not allow it to be reused, it does not have a significant economic impact on the method because the support substrate is composed of a material that is more readily available and cheaper than the sheet material.

[0109] In other embodiments, removal can also be achieved by peeling the support substrate from the sheet portion (see [link]). Figures 5A to 5D ) or by peeling within the piece (see Figures 6 to 7 This can be performed by [method / method]. To this end, the interface between the sheet portion and the supporting substrate, or the interface within the sheet portion, can be designed to facilitate the separation of the sheet portion during this removal step. The removal of the interface can be aided by applying mechanical stress, chemical etchants, and / or heat treatment.

[0110] Compared to removal by grinding, this method of removing the support substrate allows it to be recycled and reused multiple times, which is particularly advantageous when the support substrate is relatively expensive. Furthermore, this method is more environmentally friendly because it minimizes material waste.

[0111] In this context, SiC substrates—especially p-SiC—or AlN substrates—especially p-AlN—are particularly advantageous for the following reasons. First, although more expensive than silicon, SiC or AlN exhibits high mechanical hardness, making it exceptionally resistant to scratches and other degradation caused by repeated use. Another advantage of SiC or AlN is its chemical inertness, which makes the supporting substrate particularly robust to a variety of chemical etchants that can be used to etch III-V materials or possible bonding layers or removable interfaces.

[0112] According to a first embodiment, the interface includes a layer suitable for selective etching; in other words, a layer formed of a material suitable for selective etching relative to the material intended for transfer onto the sheet portion of the receiving substrate. Therefore, the material must be different from the material intended for transfer onto the sheet portion of the receiving substrate and is selected to be etchable by a chemical etchant, while the material intended for transfer onto the sheet portion of the receiving substrate is not damaged by the etchant.

[0113] Specifically, the selectively etched layer may be incorporated into the sheet portion and formed on the sheet by epitaxy or by any other deposition technique before the sheet is bonded to the support substrate (see [link to documentation]). Figures 5A to 5D ) or within a stack of layers formed on a sheet portion (see Figures 6 to 7 ).

[0114] Figure 5A It shows in Figure 2C Layer 5, which is intended to form a removable interface, is formed on the sheets P1-P3. Layer 5 may be formed before or after the injection, which is intended to form an embrittlement layer. If the formation of layer 5 implies a thermal budget that could cause the sheets to peel off along the embrittlement zone, then layer 5 is preferably formed before the injection.

[0115] like Figure 5B As shown, the intermediate substrate 1 and the sheets P1-P3 are bonded to the support substrate 3 via layer 5.

[0116] Reference Figure 5C This triggers the peeling of the sheet along the embrittled region, allowing the sheet portions P'1-P'3 to be transferred onto the support substrate 3, where layer 5 is transferred to the interface between the support substrate and the sheet portions. Thus, a temporary substrate 3' with a removable interface is obtained.

[0117] Reference Figure 5D The temporary substrate 3' is assembled on the receiving substrate 4.

[0118] The disassembly of interface 5 results in all the sheet portions being transferred to the receiving substrate. Therefore, the supporting substrate 3 can be individually recovered and reused to form new temporary substrates.

[0119] Figure 6 and Figure 7 A preferred embodiment of the detachable interface is shown.

[0120] like Figure 6 As shown, in Figure 2E A stack 6 of layers is formed (e.g., by epitaxy) on a sheet portion of a temporary substrate. The stack includes a layer 5 forming a removable interface. The layer 5 is preferably a first layer deposited on a free surface of the sheet portion, or optionally a layer deposited subsequently, but in any case, it is not located on the surface of the stack. The layer 5 forms an interface between the sheet portion intended to remain fixed to a support substrate after disassembly and the remaining portion of the stack intended to be transferred to the support substrate at the end of disassembly.

[0121] Figure 7 It shows that Figure 6 The step of assembling a temporary substrate onto a receiving substrate.

[0122] In order to remove the support substrate 3 from the sheet portion or stack portion intended to be transferred onto the receiving substrate, it is sufficient to expose the interface to an etchant that is selected to selectively etch layer 5 relative to the remaining portion of the sheet portion P1'-P3'.

[0123] Those skilled in the art can determine the material and etchant of layer 5 based on the material of the sheet portion and the receiving substrate. For example, for a sheet made of gallium arsenide (GaAs), the selective etching layer can be made of indium aluminum phosphide (InAlP), and the layer can be selectively etched using a mixture of hydrochloric acid and ethanol.

[0124] The advantage of this selective etch layer incorporated into the sheet portions is that the etchant can flow into the free space between the sheets, which facilitates etching at every point on the temporary substrate. In cases where the selective etch layer extends across the entire interface between two substrates, the etchant may struggle to reach the center of the layer and effectively etch it, or it may be difficult to remove it after the reaction, tending to slow down or even stop the etching process.

[0125] To overcome this drawback, in the case of continuous layers of interest, one solution involves using mechanical assistance to apply stress that promotes separation of the substrate to be stripped and / or enhances etchant circulation. This stress can be generated by applying a separation force between the substrates or by applying ultrasound. Another solution involves creating external access points to the layer to be etched to better supply etchant to the etch front. These access points can take the form of etch channels, which can be created by perforating the upper or supporting substrate of the temporary substrate in a direction perpendicular to and / or laterally (i.e., parallel to the main surface) to the area to be etched. This etching can also be performed after the structure to be undercut (which may or may not correspond to the final device (MESA-type structure)) is defined in the temporary substrate. The characteristic lateral distance of these access openings can range from tens of micrometers to several millimeters, depending on the effectiveness of the etch selectivity of the layer stack under consideration. The design of these access points and related processes can also draw inspiration from the field of MEMS (Micro-Electro-Mechanical Systems), where selective etching of buried layers is commonly achieved.

[0126] Furthermore, in the case where the etched layer is arranged in a layer stack (see...) Figures 6 to 7 Another advantage is that not only is the support substrate 3 recycled, but also the sheet portion fixed to it is recycled. Therefore, the temporary substrate can be directly reused.

[0127] According to one variation, the selective etch layer can be a silicon oxide (SiO2) layer formed on a support substrate prior to the bonding of the sheets. The material of the receiving substrate is selected to be suitable for etching with an etchant that is not used to etch oxides.

[0128] According to the second embodiment, the interface between the sheet portion and the supporting substrate includes a porous layer. Due to its porosity, the layer can be more mechanically fragile and / or more conducive to chemical etching.

[0129] According to a third embodiment, the interface between the sheet portion and the supporting substrate includes a layer with a low binding energy compared to the sheet portion and / or the supporting substrate. Such a layer can then be removed by mechanical action (optionally chemically assisted).

[0130] Optionally, the free surfaces of the sheet can be finished, particularly smoothed, polished, or cleaned, to facilitate technical steps to be performed later on the sheet portion.

[0131] Compared to existing methods, the removal of the support substrate does not utilize the Smart Cut™ method. Specifically, no implantation is performed within the wafer to create brittle zones. Therefore, the problems of wafer damage and non-recyclability mentioned in the introduction are avoided.

[0132] Formation of new temporary substrate

[0133] The formation of the temporary substrate requires only a small-thickness sheet, which is transferred from the intermediate substrate to the temporary substrate using the Smart Cut™ method. At the end of this transfer, the remaining portion of the intermediate substrate and the sheet can then be used to form a new temporary substrate.

[0134] For this purpose, the remaining portion of the sheet is advantageously polished and / or cleaned to remove implantation-related defects and obtain a surface state suitable for bonding on the support substrate.

[0135] If the support substrate is consumed by removing material during the transfer of the individual pieces onto the receiving substrate, a new support substrate similar to the previous support substrate is provided, and the previously described steps are repeated with the new temporary substrate thus formed.

[0136] The support substrate uses a removable interface (in) Figures 5A to 5D In the embodiment described above, if at least partially preserved, it can be reused as a new support substrate. For this purpose, if necessary, it can be surface-treated to make it suitable for bonding to the remainder of the sheet. The previously described steps are then repeated with the new temporary substrate thus formed.

[0137] Depending on the initial thickness of the sheet and the thickness of the sheet portion transferred onto the supporting substrate, multiple temporary substrates can be formed from a given sheet assembly deposited on an intermediate substrate. Therefore, the amount of material used for the sheet is optimized, which reduces the unit cost of the temporary substrates.

[0138] Finally, in the case where the sheet portion remains on the support substrate at the end of disassembly (in Figures 6 to 7 In this implementation, the remaining portion can be directly reused as a new temporary substrate. To this end, the free surface of the sheet portion can be surface-treated to make it suitable for bonding to a new receiving substrate. Therefore, the number of times the sheet portion can be used is optimized.

[0139] Example

[0140] Example No. 1 – InP layer of interest

[0141] A temporary substrate with a diameter of 150 mm was fabricated, comprising a p-SiC support substrate and an InP layer of interest bonded via a buried electrically insulating SiO2 layer with a thickness of 1 µm.

[0142] An epitaxial stack is formed on the layer of interest, comprising an InP layer with a thickness of 0.5 µm, an InGaAs layer with a thickness of 3 µm, and an InP layer with a thickness of 0.5 µm, to form a PIN photodiode.

[0143] A chemical mechanical polishing (CMP) step is performed on the top InP layer to remove 50 to 100 nm of InP.

[0144] Temporary substrates are bonded to 150 mm silicon receiving substrates via atomic diffusion bonding (ADB) or SAG bonding, with the final bonding not using any SiO2-type bonding layer.

[0145] HF-based selective etching is performed on the buried insulating layer to peel the support substrate from the composite structure consisting of the epitaxial stack and the receiving substrate.

[0146] Alternatively, an etch access channel can be created after epitaxy by forming a trench through a temporary substrate (parallel to its main plane), and / or mechanical assistance can be applied during etching to separate the support substrate and the composite structure.

[0147] Example No. 2 – InP wafers of interest and p-SiC supporting substrate

[0148] The method in this example is essentially the same as that in Example No.1, but multiple pieces are used instead of consecutive InP layers.

[0149] A temporary substrate with a diameter of 300 mm was fabricated, comprising a p-SiC support substrate and an InP active sheet bonded by a buried electrically insulating SiO2 layer with a thickness of 1 µm.

[0150] An epitaxial stack is formed on each chip, comprising an InP layer with a thickness of 0.5 µm, an InGaAs layer with a thickness of 3 µm, and an InP layer with a thickness of 0.5 µm, to form a PIN photodiode.

[0151] After epitaxy, a photolithographic etching step is performed around the periphery of each piece (removing a contour width of approximately 500µm).

[0152] A CMP step was performed on the top InP layer of each sheet to remove 50 to 100 nm of InP.

[0153] Temporary substrates are bonded to 150 mm silicon receiving substrates via ADB or SAG bonding, with the final bonding performed without the use of any SiO2-type bonding layer.

[0154] HF-based selective etching is performed on the buried insulating layer to peel the support substrate from the composite structure comprising the epitaxial stack and the receiving substrate.

[0155] Example No. 3 – InP layer of interest and sacrificed epitaxial layer

[0156] The method in this example is essentially the same as that in Example No. 1, but it employs a sacrificial layer formed within the epitaxial stack through selective etching for stripping.

[0157] A temporary substrate with a diameter of 150 mm was fabricated, comprising a p-SiC support substrate and an InP layer of interest bonded together by a buried electrically insulating SiO2 layer with a thickness of 0.2 µm.

[0158] An epitaxial stack is formed on the layer of interest, comprising a sacrificial layer, an InP layer with a thickness of 0.5 µm, an InGaAs layer with a thickness of 3 µm, and an InP layer with a thickness of 0.5 µm, to form a PIN photodiode.

[0159] A CMP step is performed on the top InP layer to remove 50 to 100 nm of InP.

[0160] Temporary substrates are bonded to 150 mm silicon receiving substrates via ADB or SAG bonding, with the final bonding not using a SiO2 bonding layer.

[0161] Selective etching is performed on the sacrificial layer relative to the other layers of the epitaxial stack, thereby stripping the support substrate from the composite structure consisting of the remaining epitaxial layers and the receiving substrate.

[0162] Alternatively, etch access channels can be formed after epitaxy by creating trenches through a temporary substrate (parallel to its main plane), and / or mechanical assistance can be used during the separation step.

[0163] Example No. 3bis – InP layer of interest and sacrifice epitaxial layer

[0164] The method in this example is essentially the same as that in Example No. 1, except that there is no SiO2 layer at the interface between the layer of interest and the supporting substrate.

[0165] Example No. 4 – InP Patch of Interest and Sacrificial Epitaxial Layer

[0166] The method in this example is essentially the same as that in Example No. 2, but includes the formation of a sacrificial layer within the epitaxial stack formed on each piece, as in Example No. 3.

[0167] Example No. 5 – InP wafers of interest and p-AlN supporting substrate

[0168] The method in this example is essentially the same as that in Example No. 2, except that the supporting substrate is made of p-AlN instead of p-SiC.

[0169] Example No. 6 – Receiving substrate including components

[0170] The method in this example is substantially the same as that in Examples 1–5, but the silicon receiving substrate includes elements that are partially or completely formed before being bonded to a temporary substrate.

[0171] Example No. 7 – Receiving substrate including components

[0172] The method in this example is substantially the same as that in Example No. 3, except that the temporary substrate includes a III-V element that is at least partially formed before being bonded to the receiving substrate.

[0173] Naturally, these examples are provided for illustrative and non-limiting purposes and can be combined in any technically feasible manner.

[0174] application

[0175] The resulting composite structure can be used in a variety of applications.

[0176] Based on a first application example corresponding to 6G communication technology, the composite structure is designed to combine multiple stages of radio frequency devices operating in different frequency ranges. Devices such as transistors can be produced by stacking epitaxial material on slab portions made of InP, enabling operation at very high frequencies (typically above 100 GHz). Power amplifiers and low-noise amplifiers, both characterized by good high-frequency performance, can be produced. The receiving substrate, such as a silicon substrate or a silicon-on-insulator (SOI) substrate, optionally includes one or more SiGe layers, allowing for optimal integration of other stages of devices operating at lower frequencies (typically below 100 GHz).

[0177] Another application example relies on the same combination: a wafer portion made of InP that has been formed into an epitaxial stack, and a receiving substrate made of silicon. This example involves incorporating an infrared laser diode into the wafer portion and silicon-based management and readout circuitry in the receiving substrate. This relates to a very wide range of applications, such as optical interconnects for data centers or LiDAR (short for "laser imaging detection and ranging") for autonomous vehicles.

[0178] Another example involves a screen based on micro-LEDs (µLEDs). A wafer portion acts as a seed for growing a gallium nitride-based epitaxial stack used to produce the µLEDs. A receiving substrate houses the silicon-based management and readout circuitry for the µLEDs.

Claims

1. A method for manufacturing a composite structure (4'), the method comprising the following steps: (a) Forming a temporary substrate (3'), the temporary substrate comprising a support substrate (3) and a plurality of sheet portions (P'1-P'3) or layers of interest (20) of a first material disposed on the support substrate (3), wherein the step of forming the temporary substrate (3') includes: (i) Take out a plurality of pieces (P1-P3) from at least one donor substrate (2) and place each piece (P1-P3) on an intermediate substrate (1'), wherein the diameter of each donor substrate (2) is smaller than the diameter of the intermediate substrate (1'), or provide a donor substrate (2). (ii) To define the portion of the sheet to be transferred (P'1-P'3) by implanting atomic material to form embrittlement regions (11) in each sheet (P1-P3), or to define the layer of interest to be transferred (20) by implanting atomic material in the donor substrate. (iii) The intermediate substrate (1') or the donor substrate is bonded to the support substrate (3) via the sheets (P1-P3) or via the layer of interest, and (iv) Peel off the sheet (P1-P3) or the donor substrate along the embrittlement region (11) to transfer the sheet portion (P'1-P'3) or the layer of interest onto the support substrate (3). (b) Forming a removable interface (5) disposed between the support substrate (3) and the sheet portion (P'1-P'3) or the layer of interest (20), or disposed in the sheet portion (P'1-P'3) or the layer of interest (20) or on the sheet portion (P'1-P'3) or the layer of interest (20). (c) Assembling the temporary substrate (3') with a receiving substrate (4) made of a second material, different from the first material, via the sheet portions (P'1-P'3) or the layer of interest (20), and (d) The support substrate (3) is removed by disassembling the removable interface (5) in order to transfer at least a portion of the sheet portion (P'1-P'3) or the layer of interest (20) onto the receiving substrate (4) to form the composite structure.

2. The method according to claim 1, the method comprising at least one step of processing the piece portion (P'1-P'3) or the layer of interest (20) before assembling the piece portion (P'1-P'3) or the layer of interest (20) onto the receiving substrate (4).

3. The method according to claim 2, wherein, The process includes: - Epitaxially extending at least one layer of a third material onto each sheet portion or onto the layer of interest. - Etching, - Surface treatment, - Doping, - Heat treatment, - Forming channels or trenches in the temporary substrate to provide access for the etchant to the removable interface, and / or - Forming interconnections.

4. The method according to claim 2 or 3, wherein, The processing of the patch portion (P'1-P'3) or the layer of interest (20) is performed at a temperature greater than or equal to 500°C.

5. The method according to any one of claims 1 to 4, wherein, The receiving substrate (4) includes at least a portion of electronic circuitry formed prior to the assembly of the temporary substrate (3') and the receiving substrate (4).

6. The method of claim 5, wherein the method includes forming the portion of the electronic circuit using a CMOS process.

7. The method of claim 6, wherein the method includes at least one step of finally completing the electronic circuit after transferring the piece portion (P'1-P'3) or the layer of interest (20) onto the receiving substrate (4).

8. The method according to claim 7, wherein, Each step of the final electronic circuit is performed at a temperature below 500°C.

9. The method according to any one of claims 5 to 8, wherein, The electronic circuit includes at least one transistor, particularly a field-effect transistor, CMOS transistor, BiCMOS transistor or bipolar transistor, and / or at least one diode, particularly a laser diode or light-emitting diode (LED).

10. The method according to any one of claims 1 to 9, wherein, The first material is selected from: - III-V group materials, such as indium nitride (InN), gallium nitride (GaN), aluminum nitride (AlN), indium arsenide (InAs), gallium arsenide (GaAs), aluminum arsenide (AlAs), indium phosphide (InP), gallium phosphide (GaP), or aluminum phosphide (AlP). - Piezoelectric materials, such as lithium tantalate (LiTaO3), lithium niobate (LiNbO3), potassium sodium niobate (KxNa1-xNbO3 or KNN), barium titanate (BaTiO3), quartz, lead zirconate titanate (PZT), lead magnesium niobate-lead titanate compound (PMN-PT), zinc oxide (ZnO), aluminum nitride (AlN) or aluminum scandium nitride (AlScN). - Germanium or silicon carbide, and - Electrically insulating materials, such as diamond, strontium titanate, yttrium-stabilized zirconium oxide, or sapphire.

11. The method according to claim 10 in conjunction with claim 4, wherein, The third material is selected from: III-V group materials, piezoelectric materials, silicon carbide, silicon germanium and germanium.

12. The method according to any one of claims 1 to 11, wherein, The second material is selected from silicon, germanium, silicon carbide and group III-V materials, especially gallium arsenide.

13. The method according to any one of claims 1 to 12, wherein, The supporting substrate (3) includes silicon; silicon carbide, especially polycrystalline silicon carbide; or aluminum nitride, especially polycrystalline aluminum nitride.

14. The method according to any one of claims 1 to 13, wherein, The removable interface (5) includes a selectively etched layer, a porous layer and / or a layer with low binding energy, and the removal of the interface during the removal of the support substrate (3) includes applying mechanical action, chemical etching and / or thermal treatment to the layers.

15. The method of claim 14, the method comprising depositing a stack of layers (6) on a free surface of each sheet portion (P'1-P'3) of the temporary substrate (3') or the layer of interest (20), the removable interface (5) being formed by one of the layers of the stack (6).

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