A method and system for stability analysis of an integrated circuit test equipment
By performing channel replacement scheduling and path overlap location in integrated circuit testing equipment, and combining historical test records for consistency retrieval and clustering, the problem of inaccurate identification of test channel anomalies in existing technologies is solved, and more efficient test result stability analysis is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- 弘润半导体(苏州)有限公司
- Filing Date
- 2026-04-09
- Publication Date
- 2026-07-03
AI Technical Summary
Existing technologies struggle to accurately identify the source of anomalies in test channels and the propagation relationships of differences within relay connection paths in integrated circuit testing equipment, resulting in inaccurate stability analysis of test results.
By performing channel replacement scheduling on the test channels during the integrated circuit functional testing process, recording the functional test response changes, generating a channel replacement difference sequence, and locating the difference positions based on the relay connection path to generate relay path difference trajectories, combining historical test records for consistency retrieval and path clustering to generate a path memory set, and finally performing stability attribution analysis to identify abnormal channels.
It improves the accuracy of test channel anomaly identification, enhances the stability and interpretability of functional test results, and improves the stability analysis capabilities of integrated circuit test equipment.
Smart Images
Figure CN121995292B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit testing technology, and in particular to a method and system for stability analysis of integrated circuit testing equipment. Background Technology
[0002] Integrated circuit test equipment plays a crucial role in semiconductor R&D verification and mass production. As the complexity of integrated circuit structures continues to increase, the number of test channels and the scale of relay connection networks in automated test equipment are constantly expanding. Test channels establish electrical connections with the device under test (DUT) through relay connection paths and perform operations such as logic function testing, timing function testing, interface communication function testing, and register read / write function testing under unified test conditions. The connection relationships of test channels, the relay path structure, and the test channel scheduling method directly affect the stability of functional test response results. Therefore, research on test channel structure analysis, relay connection path identification, and functional test response change analysis has gradually become an important research direction in the field of integrated circuit test equipment stability analysis methods.
[0003] In the field of integrated circuit test equipment stability analysis technology, existing methods usually rely on statistical analysis of test results or relay switch status monitoring to evaluate the operating status of test equipment. This method can reflect the operating status of test channels to a certain extent, but when intermittent abnormalities occur in test channels or local changes occur in relay connection paths, the statistical method of test results is difficult to accurately identify the source of the abnormality, and the propagation relationship of differences within the relay connection path is also difficult to be effectively identified. Summary of the Invention
[0004] In view of the aforementioned existing problems, the present invention is proposed.
[0005] Therefore, this invention provides a stability analysis method for integrated circuit testing equipment to solve the problems that statistical methods of test results are difficult to accurately identify the source of anomalies and that the propagation relationship of differences within relay connection paths is also difficult to effectively identify.
[0006] To solve the above-mentioned technical problems, the present invention provides the following technical solution:
[0007] In a first aspect, the present invention provides a method for stability analysis of integrated circuit testing equipment, comprising,
[0008] Perform channel replacement scheduling on the test channels formed during integrated circuit functional testing, record the changes in functional test responses before and after channel replacement scheduling, sort out the differences in functional test response changes, and generate a channel replacement difference sequence.
[0009] Based on the channel replacement difference sequence, path mapping is performed on the relay connection path corresponding to the test channel, and the channel difference position in the channel replacement difference sequence is located by path overlap according to the relay connection path to generate the relay path difference trajectory;
[0010] In historical test records, expand the corresponding path difference positions along the relay path difference trajectory, perform consistency retrieval and path clustering on the path difference positions that appear repeatedly in historical test records, and generate a path memory set;
[0011] By using the path memory set, stable attribution analysis is performed on the abnormal test channels corresponding to the path difference locations, and the stable attribution results are classified into levels to generate a stable judgment set.
[0012] As a preferred embodiment of the stability analysis method for integrated circuit test equipment described in this invention, the channel replacement scheduling refers to the process of exchanging the test connection relationship of the device under test between test channels and re-executing the functional test.
[0013] As a preferred embodiment of the stability analysis method for integrated circuit test equipment described in this invention, the difference sorting refers to marking the position of functional test response changes and collecting the differences to form channel difference positions and aggregate them into a channel replacement difference sequence.
[0014] As a preferred embodiment of the stability analysis method for integrated circuit testing equipment described in this invention, the step of locating the path overlap of channel difference positions in the channel permutation difference sequence specifically involves:
[0015] In the channel permutation difference sequence, the corresponding test channel is determined according to the test channel identifier corresponding to the channel difference position;
[0016] The relay connection sequence before and after channel replacement scheduling is determined along the relay connection path of the test channel.
[0017] The relay connection sequence before and after the channel replacement scheduling is matched with the execution path to form a path comparison sequence.
[0018] Locate consecutive and consistent relay nodes along the path connection sequence and mark them as overlapping segments. At the same time, locate inconsistent relay nodes along the path and mark them as separating segments.
[0019] In a preferred embodiment of the stability analysis method for integrated circuit testing equipment described in this invention, the generation of relay path difference trajectories specifically involves:
[0020] Based on the relay connection sequence after channel replacement scheduling, sequential anchoring is performed on overlapping and separated path segments to form a segment sorting sequence.
[0021] Insert the path separation segments between adjacent overlapping path segments, and arrange their positions according to the segment sorting sequence to form a difference splicing sequence;
[0022] Perform start-end alignment correction on the path overlap and path separation segments in the differential splicing sequence to form a continuous path sequence;
[0023] The relay path difference trajectory is generated by marking the relay node distribution corresponding to the channel difference positions in the continuous path sequence.
[0024] As a preferred embodiment of the stability analysis method for integrated circuit testing equipment described in this invention, the generation of the path memory set specifically comprises:
[0025] Locate the path difference position corresponding to the relay path difference trajectory in the historical test records, and associate the path difference position with the historical test records to form a difference record sequence;
[0026] Perform consistency retrieval on the difference record sequence to identify the path difference locations that are repeated in different test rounds, and form a consistent difference sequence;
[0027] Path clustering and merging are performed on consistent difference sequences to form path clustering sequences;
[0028] Clustering results of path clustering sequences are aggregated to generate a path memory set.
[0029] As a preferred embodiment of the stability analysis method for integrated circuit testing equipment described in this invention, the historical test record is a test execution record formed and saved in each test round during the integrated circuit functional testing process;
[0030] The consistency retrieval is a process of comparing duplicate positions of path differences in the difference record sequence and identifying the same path difference positions.
[0031] As a preferred embodiment of the stability analysis method for integrated circuit testing equipment described in this invention, the stability attribution analysis involves locating the source of abnormal test channels corresponding to path difference locations and determining the abnormal source channel based on the path memory set.
[0032] As a preferred embodiment of the stability analysis method for integrated circuit testing equipment described in this invention, the classification includes stable channel level, fluctuating channel level, and abnormal channel level.
[0033] Secondly, the present invention provides a stability analysis system for integrated circuit testing equipment, comprising,
[0034] The difference module is used to perform channel replacement scheduling on the test channels formed during the integrated circuit functional testing process, record the changes in functional test response before and after the channel replacement scheduling, sort out the differences in functional test response changes, and generate a channel replacement difference sequence.
[0035] The positioning module is used to perform path mapping on the relay connection path corresponding to the test channel based on the channel replacement difference sequence, and to perform path overlap positioning on the channel difference position in the channel replacement difference sequence according to the relay connection path to generate the relay path difference trajectory.
[0036] The retrieval module is used to expand the corresponding path difference positions along the relay path difference trajectory in the historical test records, perform consistency retrieval and path clustering on the path difference positions that appear repeatedly in the historical test records, and generate a path memory set.
[0037] The partitioning module is used to perform stable attribution analysis on abnormal test channels corresponding to path difference locations using the path memory set, and to classify the stable attribution results into levels to generate a stable judgment set.
[0038] The beneficial effects of this invention are as follows: By channel replacement scheduling and functional test response difference processing, the ability to identify test channel anomalies is improved. Channel replacement scheduling exchanges the test connections between test channels and the device under test (DUT) while maintaining consistent functional test conditions. Then, by comparing the functional test response results item by item to form a channel replacement difference sequence, a clear correspondence is established between changes in functional test responses and specific test channel positions. This provides a basis for difference localization in relay connection path analysis, improves the accuracy of test channel anomaly identification during integrated circuit functional testing, and enhances the stability and interpretability of functional test result analysis. Attached Figure Description
[0039] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0040] Figure 1 This is a flowchart of a method for stability analysis of integrated circuit testing equipment.
[0041] Figure 2 This is a schematic diagram of an integrated circuit testing equipment stability analysis system.
[0042] Figure 3 A flowchart for generating relay path difference trajectories.
[0043] Figure 4 This is a flowchart for path backtracking and splicing interaction. Detailed Implementation
[0044] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0045] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.
[0046] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.
[0047] Reference Figures 1-4 As one embodiment of the present invention, this embodiment provides a method for stability analysis of integrated circuit testing equipment, including the following steps:
[0048] S1. Perform channel replacement scheduling on the test channels formed during the integrated circuit functional testing process, record the changes in functional test response before and after channel replacement scheduling, sort out the differences in functional test response, and generate a channel replacement difference sequence.
[0049] S1.1 Channel replacement scheduling refers to the process of exchanging the test connection relationships of the device under test (DUT) between test channels and re-executing functional tests; the changes in functional test responses before and after channel replacement scheduling are recorded, specifically,
[0050] During integrated circuit functional testing, the test channel identifier and test connection relationship of the device under test (DUT) are read. Based on the test channel identifier, the DUT is connected to the corresponding test channel to form the test connection relationship before channel replacement scheduling. Two test channels are selected from the test channels participating in integrated circuit functional testing, and the same DUT is switched between the two test channels. The DUT corresponding to the first test channel is connected to the second test channel, and the DUT corresponding to the second test channel is connected to the first test channel, thus forming the test connection relationship after channel replacement scheduling.
[0051] While maintaining consistent integrated circuit functional test conditions, integrated circuit functional tests are performed on the same device under test based on the test connection relationship before and after channel replacement scheduling. The integrated circuit functional tests include logic function tests, timing function tests, interface communication function tests, and register read / write function tests, and the functional test response results generated by the integrated circuit functional tests are obtained item by item.
[0052] The functional test response results before and after channel replacement scheduling are compared item by item according to the order of the test items in the functional test response results. When the functional test response results before and after channel replacement scheduling are consistent, they are marked as consistent. When the functional test response results before and after channel replacement scheduling are inconsistent, they are marked as changes in response. The changes in functional test response before and after channel replacement scheduling are recorded according to the changes in response.
[0053] It should be noted that each test item in the integrated circuit functional test program is registered with a corresponding test channel identifier, and the test program configuration file records the correspondence between the test item sequence position and the test channel identifier. When performing integrated circuit functional testing, the integrated circuit test equipment calls the corresponding test channel identifier to perform functional testing according to the test item sequence position registered in the test program. Therefore, the test item sequence position can uniquely correspond to the test channel identifier of the test item to be executed.
[0054] S1.2, Difference Sorting, refers to the location marking and difference aggregation of functional test response changes, forming channel difference locations and compiling them into a channel replacement difference sequence. Specifically,
[0055] After recording the changes in functional test responses before and after channel replacement scheduling, the functional test response results before and after channel replacement scheduling are read, and then compared and organized item by item according to the order of the test items in the functional test response results. The functional test response results include test item identifiers and test response values. The test item identifiers are used to indicate the sequential position of the test items in the integrated circuit functional test, and the test response values are used to indicate the test response status after the corresponding test item is executed. The test response status includes the logic function test response status, timing function test response status, interface communication function test response status, and register read / write function test response status.
[0056] During the item-by-item comparison and sorting process, the functional test response results before and after the channel replacement scheduling are checked one by one. When the functional test response results before and after the channel replacement scheduling are consistent, the original test item order is maintained. When the functional test response results before and after the channel replacement scheduling are inconsistent, the corresponding test item order is marked, and the test item order position where the functional test response results are inconsistent is determined as the channel difference position.
[0057] After completing the item-by-item correspondence check of all test items, arrange all channel difference positions according to the order of the test items, and then gather the arranged channel difference positions to form a channel substitution difference sequence.
[0058] S2. Based on the channel replacement difference sequence, perform path mapping on the relay connection path corresponding to the test channel, and perform path overlap positioning on the channel difference position in the channel replacement difference sequence according to the relay connection path to generate the relay path difference trajectory.
[0059] It should be noted that the integrated circuit testing equipment establishes a channel path mapping table between the test channel identifier and the relay node arrangement order. The channel path mapping table records the sequential connection order of the relay nodes that each test channel passes through to the pin of the device under test. After determining the test channel identifier corresponding to the channel difference position, the relay node arrangement order corresponding to the test channel can be read through the channel path mapping table, thereby establishing the sequential mapping relationship between the test item sequence position, the test channel identifier and the relay node arrangement order.
[0060] After establishing the sequential mapping relationship between the test item sequence position, test channel identifier, and relay node arrangement order, based on the test item sequence position and test channel identifier corresponding to the channel difference position, the corresponding relay node arrangement order interval is determined in the relay connection path according to the continuous correspondence of the relay node arrangement order, and the relay node arrangement order interval and the channel difference position are registered one-to-one. The relay node arrangement order interval is jointly determined by the starting relay node arrangement order and the ending relay node arrangement order, and is used to characterize the specific position range of the channel difference position in the relay connection path.
[0061] The relay path difference trajectory is composed of a combination of path overlap segments and path separation segments. The path separation segment corresponds to the relay node arrangement order interval in the relay connection path where the channel difference position is located. The path overlap segment is a node sequence with the same relay node arrangement order before and after channel replacement scheduling, while the path separation segment is a node sequence with inconsistent relay node arrangement order before and after channel replacement scheduling. By uniformly registering the starting relay node arrangement order, ending relay node arrangement order, and corresponding node sequence of the path separation segment, the relay path difference trajectory formed in different test rounds remains consistent in the relay node arrangement order dimension, thereby supporting subsequent consistency retrieval and path clustering based on relay node arrangement order.
[0062] S2.1 In the channel permutation difference sequence, the corresponding test channel is determined according to the test channel identifier corresponding to the channel difference position. Specifically,
[0063] Read the channel difference positions in the channel replacement difference sequence one by one, and perform a sequential correspondence query between the channel difference positions and the test connection relationships before channel replacement scheduling to obtain the test channel identifiers before channel replacement scheduling. Perform a sequential correspondence query between the channel difference positions and the test connection relationships after channel replacement scheduling to obtain the test channel identifiers after channel replacement scheduling.
[0064] When the test channel identifier before the channel replacement scheduling is consistent with the test channel identifier after the channel replacement scheduling, the consistent test channel identifier is determined as the test channel corresponding to the channel difference position; when the test channel identifier before the channel replacement scheduling is inconsistent with the test channel identifier after the channel replacement scheduling, the test channel identifier before the channel replacement scheduling and the test channel identifier after the channel replacement scheduling are jointly determined as the test channel corresponding to the channel difference position according to the reading order.
[0065] S2.2. Determine the relay connection sequence before and after channel replacement scheduling along the relay connection path of the test channel, specifically as follows:
[0066] For a given test channel, locate the relay connection path corresponding to the test channel in the test connection relationship before and after the channel replacement and scheduling, and read the relay nodes one by one from the test channel connection end to the device under test connection end along the relay connection path corresponding to the test channel.
[0067] During the reading process, the relay nodes that pass through the test connection relationship before the channel replacement scheduling are arranged continuously in the order of reading to form the relay connection sequence before the channel replacement scheduling. Similarly, the relay nodes that pass through the test connection relationship after the channel replacement scheduling are arranged continuously in the order of reading to form the relay connection sequence after the channel replacement scheduling.
[0068] When there are relay nodes in the relay connection path corresponding to the test channel, all relay nodes are completely written into the corresponding relay connection sequence according to the order of reading, and the relay nodes are arranged continuously according to the order of reading, thus completing the relay connection sequence before channel replacement scheduling and the relay connection sequence after channel replacement scheduling along the relay connection path of the test channel.
[0069] It should be noted that the relay connection path corresponding to the test channel comes from the channel switching matrix configuration table inside the integrated circuit test equipment. The channel switching matrix configuration table records the connection order of the relay nodes that the test channel passes through to the pin of the device under test, and registers the arrangement order of the relay nodes for each test channel. After reading the test channel identifier, the connection order of the relay nodes corresponding to the test channel can be determined through the channel switching matrix configuration table, thereby obtaining the relay connection path corresponding to the test channel.
[0070] S2.3 The relay connection sequence before and after channel replacement scheduling is mapped to the execution path to form a path mapping sequence, specifically as follows:
[0071] Following the reading direction from the test channel connection end to the device under test connection end, align the first relay node in the relay connection sequence before channel replacement and scheduling with the first relay node in the relay connection sequence after channel replacement and scheduling, align the second relay node in the relay connection sequence before channel replacement and scheduling with the second relay node in the relay connection sequence after channel replacement and scheduling, and complete the alignment of all relay nodes sequentially along the reading direction.
[0072] When relay nodes in the same priority are identical, a consistent priority comparison entry is registered in the path comparison sequence. When relay nodes in the same priority are different, a difference priority comparison entry is registered in the path comparison sequence. When the number of relay nodes in the relay connection sequence before channel replacement scheduling is greater than the number of relay nodes in the relay connection sequence after channel replacement scheduling, the relay nodes exceeding the length of the relay connection sequence after channel replacement scheduling are registered one by one as the preceding sequence remaining comparison entry. When the number of relay nodes in the relay connection sequence after channel replacement scheduling is greater than the number of relay nodes in the relay connection sequence before channel replacement scheduling, the relay nodes exceeding the length of the relay connection sequence before channel replacement scheduling are registered one by one as the following sequence remaining comparison entry.
[0073] Consistent-rank control entries, differential-rank control entries, preceding and subsequent remaining control entries are arranged sequentially to form a path control sequence.
[0074] S2.4. Locate consecutive and consistent relay nodes along the path connection sequence and mark them as overlapping segments. Simultaneously, locate and mark inconsistent relay nodes along the path connection sequence as separating segments. Specifically,
[0075] Read the consistent sequence control entries, differing sequence control entries, preceding remaining control entries, and subsequent remaining control entries one by one according to the order of their positions in the path control sequence.
[0076] When the reference entries in adjacent sequences are consecutive identical reference entries, the relay nodes corresponding to the consecutive identical reference entries are connected in sequence, and the relay nodes corresponding to the consecutive identical reference entries are determined as the path overlap segment.
[0077] When the consecutive reference entries in adjacent order are any of the following reference entries: difference order reference entry, preceding remaining reference entry, or following remaining reference entry, the relay nodes corresponding to the consecutively arranged difference order reference entries, preceding remaining reference entries, and following remaining reference entries are connected in sequence, and the relay nodes corresponding to the consecutively arranged difference order reference entries, preceding remaining reference entries, and following remaining reference entries are determined as path separation segments.
[0078] When a consistent ranking control entry is adjacent to a differing ranking control entry, the position of the ranking change is used as the segmentation position between the path overlap segment and the path separation segment. When a consistent ranking control entry is adjacent to a preceding remaining control entry, the position of the ranking change is used as the segmentation position between the path overlap segment and the path separation segment. When a consistent ranking control entry is adjacent to a subsequent remaining control entry, the position of the ranking change is used as the segmentation position between the path overlap segment and the path separation segment.
[0079] After completing the sequential reading of all the reference entries, all overlapping segments and all separated segments of the path are registered according to their order in the path reference sequence, thus completing the marking of overlapping segments and separated segments.
[0080] It should be noted that path coincidence location is to determine the positions of consecutive and consistent relay nodes in the relay connection path based on the consistency sequence in the path comparison sequence, and mark the consecutive and consistent relay nodes as path coincidence segments, thereby obtaining the path coincidence positions in the relay connection path.
[0081] S2.5. The overlapping and separated segments of the path are then back-connected according to the relay connection order after channel replacement scheduling to generate a relay path difference trajectory. Specifically,
[0082] S2.51. Based on the relay connection sequence after channel replacement scheduling, sequential anchoring is performed on overlapping and separated path segments to form a segment ranking sequence, specifically as follows:
[0083] After the relay connection is replaced along the channel, the relay nodes are read one by one according to the order in which they appear, and the read relay nodes are matched one by one with the relay nodes in the overlapping segments of the path and the relay nodes in the separated segments of the path.
[0084] When the relay node read belongs to a relay node in a certain path overlap segment, the position of the first corresponding relay node read is recorded as the starting position of the corresponding path overlap segment, and the position of the last corresponding relay node read is recorded as the ending position of the corresponding path overlap segment.
[0085] When the relay node read belongs to a relay node in a certain path separation segment, the position of the first corresponding relay node read is recorded as the starting position of the corresponding path separation segment, and the position of the last corresponding relay node read is recorded as the ending position of the corresponding path separation segment.
[0086] When a path overlaps with only one relay node, the position of the corresponding relay node is recorded as both the start and end position of the path overlaps with the path overlap. When a path separations with only one relay node, the position of the corresponding relay node is recorded as both the start and end position of the path separation.
[0087] After all relay nodes have been read, the overlapping and separating segments are arranged from front to back according to the starting order of the overlapping segments and the starting order of the separating segments, and the arranged overlapping and separating segments are registered as a segment sorting sequence.
[0088] S2.52. Insert the separated segments of the path between overlapping segments of adjacent paths, and arrange their positions according to the segment order sequence to form a difference splicing sequence, specifically as follows:
[0089] Read the overlapping and separating segments of the path according to the order in the segment ranking sequence, and match the starting and ending positions of the overlapping segments, the starting and ending positions of the separating segments with the corresponding order.
[0090] When the starting position of the path separation segment is after the ending position of the preceding path overlapping segment and the ending position of the path separation segment is before the starting position of the following path overlapping segment, the path separation segment is inserted between the preceding and following path overlapping segments.
[0091] When the end position of a path-separated segment is before the start position of the first segment of all overlapping paths, the path-separated segment is placed before the first overlapping path segment; when the start position of a path-separated segment is after the end position of the last segment of all overlapping paths, the path-separated segment is placed after the last overlapping path segment.
[0092] When the end position of the previous path separation segment and the start position of the next path separation segment are adjacent, the two adjacent path separation segments are arranged in order according to the order of the segment sorting sequence.
[0093] After all path separation segments have been inserted and arranged, the overlapping and separation segments are arranged consecutively according to the order of the segment sorting sequence to form a difference splicing sequence.
[0094] S2.53. Perform start-end alignment correction on overlapping and separated path segments in the differential splicing sequence to form a continuous path sequence. Specifically,
[0095] Take out the overlapping segments and the separated segments of the path in the order of the different splicing sequence, and compare the end position of the previous segment with the start position of the next segment. At the same time, read the node order relationship between the last relay node of the previous segment and the first relay node of the next segment in the relay connection sequence after the channel replacement scheduling.
[0096] When the end order of a segment is connected to the beginning order of a segment, and the last relay node of the previous segment and the first relay node of the next segment remain consecutive in the relay connection sequence after channel replacement scheduling, the current arrangement order remains unchanged.
[0097] When there is a sequence gap between the end sequence and the start sequence of a rank, the relay nodes located after the end sequence and before the start sequence of the rank are read according to the relay connection order after channel replacement scheduling. The read relay nodes are then placed between the end relay node of the previous segment and the first relay node of the next segment to restore the continuity of the relay node arrangement. If the end relay node of the previous segment and the first relay node of the next segment are reversed in the relay connection order after channel replacement scheduling, the position of the next segment is adjusted according to the relay connection order after channel replacement scheduling. That is, the node sequence of the first relay node of the next segment is read according to the relay connection order after channel replacement scheduling, and the entire next segment is moved to the position of the corresponding node sequence, so that the first relay node of the next segment is arranged after the end relay node of the previous segment.
[0098] After all overlapping and separated segments of the path are connected and corrected segment by segment, the corrected overlapping and separated segments are continuously registered according to their order in the difference splicing sequence to obtain a continuous path sequence.
[0099] S2.54. Mark the relay node distribution corresponding to the channel difference positions in the continuous path sequence, and generate the relay path difference trajectory, specifically,
[0100] Relay nodes are read sequentially according to the order of the continuous path sequence, and the relay nodes in the continuous path sequence are matched sequentially with the channel difference positions in the channel permutation difference sequence.
[0101] When a relay node in a continuous path sequence is located in the node sequence corresponding to the channel difference position, the relay node in the continuous path sequence is marked with the difference position, and the relay node that has completed the difference position marking is registered as the relay node distribution corresponding to the channel difference position.
[0102] When a relay node in a continuous path sequence is not located in the node order corresponding to the channel difference position, the original arrangement order of the relay nodes in the continuous path sequence remains unchanged; after all channel difference positions are matched, the distribution of relay nodes marked with difference positions is continuously registered according to the arrangement order in the continuous path sequence, and the continuously registered relay node distribution is determined as the relay path difference trajectory.
[0103] It should be noted that when mapping relay nodes in a continuous path sequence to channel difference positions, the corresponding relay node order interval is first read from the channel path mapping table based on the test item sequence position and test channel identifier corresponding to the channel difference position. Then, using the relay node order interval as a reference, the order range of the corresponding relay node in the continuous path sequence is determined, thus establishing the order correspondence between channel difference positions and relay nodes in the continuous path sequence. The relay node order interval and the relay node order in the continuous path sequence use the same order marking system to ensure that the relay node order interval and the node order range in the continuous path sequence can be directly mapped.
[0104] S3. Expand the corresponding path difference positions along the relay path difference trajectory in the historical test records, perform consistency retrieval and path clustering on the path difference positions that appear repeatedly in the historical test records, and generate a path memory set.
[0105] S3.1 Locate the path difference position corresponding to the relay path difference trajectory in the historical test records, and associate the path difference position with the historical test records to form a difference record sequence. Specifically,
[0106] Read the marked path difference positions one by one along the relay path difference trajectory, and then read the test channel identifier, relay node arrangement order and functional test response results in the historical test records one by one according to the time sequence of each test round of integrated circuit functional test.
[0107] Each path difference location is identified and matched with the test channel identifier in the historical test record. The order of the relay nodes in the relay path difference trajectory for each path difference location is matched with the order of the relay nodes in the historical test record.
[0108] It should be noted that when performing relay node arrangement order correspondence, the relay node arrangement order interval corresponding to the path difference position is used as a reference. When the relay node arrangement order in the historical test record falls within the relay node arrangement order interval, it is determined that the relay node arrangement order in the historical test record corresponds to the path difference position, thereby completing the establishment of the order correspondence relationship between the path difference position and the historical test record.
[0109] When the test channel identifiers are consistent and the relay node arrangement order is consistent, the current path difference position and the current historical test record are registered as the same associated entry, and the test round identifier, test channel identifier, path difference position, relay node arrangement order and functional test response result are written in the same associated entry.
[0110] When the test channel identifiers are inconsistent or the relay node arrangement order is inconsistent, the current path difference position and the current historical test record will not be registered as the same associated entry.
[0111] After completing the mapping of all path difference locations with all historical test records, all related entries are arranged sequentially according to the time sequence of the test rounds, and the sequentially arranged related entries are determined as the difference record sequence.
[0112] It should be noted that historical test records are test execution records formed and saved during each test round in the process of integrated circuit functional testing. Historical test records include test round identifiers, test channel identifiers, relay node arrangement order, test item identifiers, and corresponding functional test response results. Historical test records are saved continuously in chronological order of test rounds for historical consistency retrieval of execution path differences.
[0113] S3.2 Perform consistency retrieval on the difference record sequence to identify the path difference positions that recur in different test rounds, forming a consistent difference sequence; consistency retrieval is the process of comparing the repeated positions of path difference positions in the difference record sequence and identifying the same path difference positions, specifically...
[0114] In the difference record sequence, related entries are selected sequentially according to the time order of the test rounds, and the path difference position in the related entries is used as the position comparison object. The path difference position is compared one by one in the difference record sequence.
[0115] When the path difference position in a subsequent associated entry is in the same relay node arrangement order and corresponds to the same test channel identifier as the path difference position in the current associated entry, the current associated entry and the subsequent associated entry are grouped into the same set of repeated positions, and the associated entries in the set of repeated positions are arranged consecutively according to the time sequence of the test round.
[0116] It should be noted that the consistency determination of path difference locations is based on the combination and correspondence between the relay node arrangement sequence interval and the test channel identifier. When the relay node arrangement sequence interval corresponding to the path difference location is consistent and the test channel identifier is consistent, it is determined to be the same path difference location.
[0117] When the path difference positions in subsequent related entries are inconsistent in the relay node arrangement order or the test channel identifier, the subsequent related entries will not be included in the current duplicate position set, and the path difference position comparison will continue to be performed backward in the difference record sequence.
[0118] After the difference record sequence completes the position comparison of all path difference positions, the set of repeated positions containing two or more test round identifiers is determined as consistent difference entries, and all consistent difference entries are continuously registered according to the time sequence of the test rounds to obtain a consistent difference sequence.
[0119] S3.3. Perform path clustering and merging on the consistent difference sequences to form path clustering sequences, specifically as follows:
[0120] Consistent difference entries are selected sequentially in the consistent difference sequence according to the time order of the test rounds. The path difference position, test channel identifier, and relay node arrangement order in the consistent difference entries are used as the basis for path clustering and merging. Subsequent consistent difference entries are compared one by one in the consistent difference sequence.
[0121] When a subsequent consistent difference entry has the same path difference location, the same test channel identifier, and the same relay node arrangement order as the current consistent difference entry, the current consistent difference entry and the subsequent consistent difference entry are merged into the same path cluster entry group, and the consistent difference entries in the same path cluster entry group are arranged consecutively according to the time sequence of the test round.
[0122] When subsequent consistent difference entries are inconsistent with the current consistent difference entry in terms of path difference location, test channel identifier, or relay node arrangement order, the subsequent consistent difference entries will not be merged into the current path cluster entry group, and the entries will continue to be compared backward in the consistent difference sequence.
[0123] After all consistent difference entries have been clustered and merged into paths, each path clustering entry group is registered consecutively according to the time sequence of the test rounds to form a path clustering sequence.
[0124] S3.4. Aggregate the clustering results of the path clustering sequences to generate a path memory set, specifically as follows:
[0125] Each path clustering entry group in the path clustering sequence is registered consecutively according to the time sequence of the test rounds. The path difference position, test channel identifier, and relay node arrangement order corresponding to each path clustering entry group are combined and registered. The combined and registered path clustering entry groups are collected to obtain the path memory set.
[0126] S4. Using the path memory set, perform stable attribution analysis on the abnormal test channels corresponding to the path difference locations, and classify the stable attribution results into levels to generate a stable judgment set.
[0127] S4.1, Stable attribution analysis involves locating the source of anomalies in test channels corresponding to path differences and determining the source channels of the anomalies based on the path memory set. Specifically,
[0128] Starting from the path difference position, the relay node arrangement order is expanded along the relay path difference trajectory, and the path memory entries containing the same path difference position are located in the path memory set.
[0129] Extract the test channel identifier and relay node arrangement order from the located path memory entries. Compare the relay node arrangement order of the abnormal test channel in the relay path difference trajectory with the relay node arrangement order in the path memory entries. At the same time, match the abnormal test channel with the test channel identifier in the path memory entries.
[0130] When the ranking comparison results are consistent and the channel correspondence results are consistent, the test channel identifier in the path memory entry is identified as the anomaly source channel, and an anomaly source channel correspondence is established at the path difference location. When the ranking comparison results are inconsistent or the channel correspondence results are inconsistent, no anomaly source channel correspondence is established. After establishing the anomaly source channel correspondence for all path difference locations, the path difference locations and anomaly source channel correspondences are merged according to the relay node arrangement order to form a stable attribution result.
[0131] It should be noted that consistent ranking comparison results mean that the ranking of relay nodes in the relay path difference trajectory of the abnormal test channel falls within the ranking interval of the relay nodes corresponding to the path memory entry, thus providing a unified interval judgment basis for the relay node ranking comparison process.
[0132] S4.2 The stable attribution results are classified into levels, including stable channel level, fluctuating channel level, and abnormal channel level. Specifically,
[0133] Using the abnormal source channels in the stable attribution results as the classification objects, the path memory entries that are completely consistent with the path difference positions, test channel identifiers and relay node arrangement order of the abnormal source channels are retrieved in the path memory set, and the occurrence rounds corresponding to the abnormal source channels are unfolded according to the time sequence of the test rounds.
[0134] When the path memory entry corresponding to the anomaly source channel only appears in the current test round and no identical path difference position has appeared before the current test round, the anomaly source channel is determined to be a stable channel.
[0135] When the path memory entry corresponding to the anomaly source channel appears in more than two test rounds, and there is an interrupted test round between two adjacent test rounds where the same path difference position does not appear, the anomaly source channel is determined to be a fluctuation channel level.
[0136] It should be noted that an interrupted test round refers to a test round segment in the historical test records arranged continuously according to the test round identifier where no identical path difference position was found. The test round segment is used to characterize the non-continuous occurrence of path difference positions in the time series.
[0137] When the path memory entry corresponding to the abnormal source channel appears in two or more consecutive test rounds, and the same path difference position is repeatedly observed in the consecutive test rounds, the abnormal source channel is determined to be an abnormal channel level.
[0138] After completing the classification of all anomaly source channels, the anomaly source channels and their corresponding levels are registered sequentially according to the time sequence of the test rounds to obtain a stable decision set.
[0139] It should be noted that the stable channel level is used to indicate test channels where path differences occur sporadically in historical test records without forming a repeating abnormal pattern; the fluctuating channel level is used to indicate test channels where path differences occur intermittently in historical test records; and the abnormal channel level is used to indicate test channels where path differences occur repeatedly in historical test records.
[0140] This embodiment also provides a stability analysis system for integrated circuit testing equipment, including:
[0141] The difference module is used to perform channel replacement scheduling on the test channels formed during the integrated circuit functional testing process, record the changes in functional test response before and after the channel replacement scheduling, sort out the differences in functional test response changes, and generate a channel replacement difference sequence.
[0142] The positioning module is used to perform path mapping on the relay connection path corresponding to the test channel based on the channel replacement difference sequence, and to perform path overlap positioning on the channel difference position in the channel replacement difference sequence according to the relay connection path to generate the relay path difference trajectory.
[0143] The retrieval module is used to expand the corresponding path difference positions along the relay path difference trajectory in the historical test records, perform consistency retrieval and path clustering on the path difference positions that appear repeatedly in the historical test records, and generate a path memory set.
[0144] The partitioning module is used to perform stable attribution analysis on abnormal test channels corresponding to path difference locations using the path memory set, and to classify the stable attribution results into levels to generate a stable judgment set.
[0145] This embodiment also provides a computer device applicable to the stability analysis method of integrated circuit test equipment, including: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to implement the stability analysis method of integrated circuit test equipment as proposed in the above embodiment.
[0146] The computer device can be a terminal, comprising a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, carrier networks, NFC (Near Field Communication), or other technologies. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the computer device's casing, or an external keyboard, touchpad, or mouse.
[0147] This embodiment also provides a storage medium storing a computer program, which, when executed by a processor, implements the stability analysis method for integrated circuit testing equipment as proposed in the above embodiments. The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.
[0148] In summary, this invention improves the ability to identify test channel anomalies through channel replacement scheduling and functional test response difference processing. Channel replacement scheduling swaps the test connections between test channels and the device under test (DUT) while maintaining consistent functional test conditions. Then, by comparing the functional test response results item by item to form a channel replacement difference sequence, a clear correspondence is established between changes in functional test responses and specific test channel locations. This provides a basis for difference localization in relay connection path analysis, improves the accuracy of test channel anomaly identification during integrated circuit functional testing, and enhances the stability and interpretability of functional test result analysis.
[0149] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.
Claims
1. A method of integrated circuit test equipment stability analysis, characterized by: include, Perform channel replacement scheduling on the test channels formed during integrated circuit functional testing, record the changes in functional test responses before and after channel replacement scheduling, sort out the differences in functional test response changes, and generate a channel replacement difference sequence. Based on the channel replacement difference sequence, path mapping is performed on the relay connection path corresponding to the test channel, and the channel difference position in the channel replacement difference sequence is located by path overlap according to the relay connection path to generate the relay path difference trajectory; In historical test records, expand the corresponding path difference positions along the relay path difference trajectory, perform consistency retrieval and path clustering on the path difference positions that appear repeatedly in historical test records, and generate a path memory set; By using the path memory set, stable attribution analysis is performed on the abnormal test channels corresponding to the path difference locations, and the stable attribution results are classified into levels to generate a stable judgment set.
2. The integrated circuit test equipment stability analysis method of claim 1, wherein: The channel replacement scheduling refers to the process of exchanging the test connection relationship of the device under test between test channels and re-executing the functional test.
3. The method of claim 1, wherein: The difference sorting refers to marking the location and aggregating the differences in the functional test response, forming the channel difference locations and compiling them into a channel replacement difference sequence.
4. The method of claim 1, wherein: The specific steps involve locating the path overlap positions of channel differences in the channel permutation difference sequence. In the channel permutation difference sequence, the corresponding test channel is determined according to the test channel identifier corresponding to the channel difference position; The relay connection sequence before and after channel replacement scheduling is determined along the relay connection path of the test channel. The relay connection sequence before and after the channel replacement scheduling is matched with the execution path to form a path comparison sequence. Locate consecutive and consistent relay nodes along the path connection sequence and mark them as overlapping segments. At the same time, locate inconsistent relay nodes along the path and mark them as separating segments.
5. The integrated circuit test equipment stability analysis method of claim 4, wherein: The generation of relay path difference trajectories specifically refers to... Based on the relay connection sequence after channel replacement scheduling, sequential anchoring is performed on overlapping and separated path segments to form a segment sorting sequence. Insert the path separation segments between adjacent overlapping path segments, and arrange their positions according to the segment sorting sequence to form a difference splicing sequence; Perform start-end alignment correction on the path overlap and path separation segments in the differential splicing sequence to form a continuous path sequence; The relay path difference trajectory is generated by marking the relay node distribution corresponding to the channel difference positions in the continuous path sequence.
6. The method for stability analysis of integrated circuit testing equipment as described in claim 1, characterized in that: The generated path memory set is specifically as follows: Locate the path difference position corresponding to the relay path difference trajectory in the historical test records, and associate the path difference position with the historical test records to form a difference record sequence; Perform consistency retrieval on the difference record sequence to identify the path difference locations that are repeated in different test rounds, and form a consistent difference sequence; Path clustering and merging are performed on consistent difference sequences to form path clustering sequences; Clustering results of path clustering sequences are aggregated to generate a path memory set.
7. The integrated circuit test equipment stability analysis method of claim 6, wherein: The historical test records are test execution records generated and saved during each test round in the process of integrated circuit functional testing; The consistency retrieval is a process of comparing duplicate positions of path differences in the difference record sequence and identifying the same path difference positions.
8. The method of integrated circuit test equipment stability analysis of claim 1, wherein: The stable attribution analysis locates the source of the abnormal test channel corresponding to the path difference position and determines the abnormal source channel based on the path memory set.
9. The method of integrated circuit test equipment stability analysis of claim 1, wherein: The classification includes stable channel level, fluctuating channel level, and abnormal channel level.
10. An integrated circuit test equipment stability analysis system based on the integrated circuit test equipment stability analysis method of any one of claims 1 to 9, characterized by: include, The difference module is used to perform channel replacement scheduling on the test channels formed during the integrated circuit functional testing process, record the changes in functional test response before and after the channel replacement scheduling, sort out the differences in functional test response, and generate a channel replacement difference sequence. The positioning module is used to perform path mapping on the relay connection path corresponding to the test channel based on the channel replacement difference sequence, and to perform path overlap positioning on the channel difference position in the channel replacement difference sequence according to the relay connection path to generate the relay path difference trajectory. The retrieval module is used to expand the corresponding path difference positions along the relay path difference trajectory in the historical test records, perform consistency retrieval and path clustering on the path difference positions that appear repeatedly in the historical test records, and generate a path memory set. The partitioning module is used to perform stable attribution analysis on abnormal test channels corresponding to path difference locations using the path memory set, and to classify the stable attribution results into levels to generate a stable judgment set.