Data error correction method based on optimal error correction code set

Abstract

The invention discloses a data error correction method based on an optimal error correction code set, and the method comprises the steps: calculating the bit width needed by an error correction code according to the bit width of to-be-verified data; combining an error correction code library according to the bit width required by the error correction codes; selecting an optimal error correction code from an error correction code library; coding pre-error correction data according to a bit where a binary 1 in an error correction code corresponding to the data to be verified in the optimal error correction code set is located; positioning a single-bit error according to an XOR result between the pre-error correction data and pre-obtained reference verification data and the optimal error correction code set; and when a bit with a single-bit error is indexed from the optimal error correction code set, performing negation operation on data on the bit with the single-bit error to obtain corrected data.

Description

Technical Field

[0001] This application relates to the field of error correction code technology, and in particular to a data error correction method based on an optimal error correction code set. Background Technology

[0002] During operation, memory chips are susceptible to errors in one or more bits during transmission due to interference, potentially causing program crashes. Therefore, in critical transmission scenarios, ECC (Error Correction Code) is necessary to ensure data transmission stability. ECC is an error detection and correction algorithm for memory. While it can correct single-bit errors, it cannot correctly detect two-bit errors. Current encoding algorithms typically add even-number parity bits and multiple check bits to ECC to detect two-bit errors. However, this encoding process generates redundant bits, increasing storage space required to store these redundant bits and check bits. For example, combining the error correction code and the corresponding redundant bits into an error correction code library and storing it in memory increases memory costs.

[0003] Chinese invention patent application number 202410607056.7 discloses a dynamic adjustment method based on error correction codes. It adjusts the current error correction strategy level according to the data importance level, operating load and / or data error flag information. The invention of this patent is to allow the error correction code to be converted between error correction codes corresponding to different error correction strategy levels. However, it requires repeated data readings to adjust the error correction strategy level, and the conversion of various flag information consumes circuit resources, which restricts the calculation speed, reduces the flexibility of ECC algorithm selection, and does not provide correction measures for specific erroneous data bits. Summary of the Invention

[0004] This application provides a data error correction method based on the optimal error correction code set, and the specific technical solution is as follows:

[0005] The data error correction method based on the optimal error correction code set includes: calculating the required bit width of the error correction code according to the bit width of the data to be verified; assembling an error correction code library according to the required bit width of the error correction code, wherein the error correction code library includes error correction codes; selecting the optimal error correction code from the error correction code library; encoding pre-corrected data according to the bit position of the binary 1 in the error correction code corresponding to the data to be verified in the optimal error correction code set, such that when the i-th bit of the pre-corrected data is encoded, the data at the i-th bit of the error correction code corresponding to each bit involved in encoding in the data to be verified is equal to binary 1; locating a single bit error based on the XOR result between the pre-corrected data and the pre-obtained reference verification data and the optimal error correction code set; and, based on the XOR result, when the bit with the single bit error is indexed from the optimal error correction code set, inverting the data at the bit with the single bit error to obtain the corrected data; wherein the data at the bit with the single bit error is located in the reference verification data or the data to be verified. In summary, this application, based on selecting the optimal error correction code set from the error correction code library, uses the XOR result between the pre-corrected data (obtained by encoding the corresponding error correction code with the data to be verified) and the pre-obtained reference verification data to index the error correction code from the optimal error correction code set, locates the single-bit error in the reference verification data or the data to be verified, and then performs an inversion operation on the indexed bit with the single-bit error to complete the data error correction. This method is highly targeted, capable of accurately locating a specific bit error in multi-bit data transmission and promptly inverting and correcting it, ensuring the error correction performance of the chip running the data error correction method or the chip with the corresponding logic operation circuit defined by the data error correction method on the input data. Furthermore, it achieves correction of data with single-bit errors within the pre-designed maximum error correction capability (when the data to be verified or the reference verification data has an error in memory and the number of erroneous bits is 1). Attached Figure Description

[0006] Figure 1 This is a flowchart of the data error correction method based on the optimal error correction code set disclosed in this application.

[0007] Figure 2 This is a flowchart of the encoding method for pre-correction data disclosed in this application.

[0008] Figure 3 This is a flowchart of the method for generating an error correction code library disclosed in this application.

[0009] Figure 4 This is a flowchart of the method for selecting a number of candidate error correction codes disclosed in this application. Detailed Implementation

[0010] The present application will be described in further detail below with reference to the embodiments and accompanying drawings, but the implementation of the present application is not limited thereto.

[0011] In ECC error correction applications, to use a simpler error correction code library for data bit error correction without expanding the check bits (or redundancy bits, supervision bits, etc.) of the error correction code or adjusting the error correction strategy level, this application discloses a data error correction method based on an optimal error correction code set. This data error correction method can define each logic circuit sub-module of the digital logic circuit, execute operational functions and state transitions according to timing, thereby optimizing the area and performance of the digital logic circuit. The execution entity of this data error correction method can be a controller, which can exist in the form of a single-chip system. The required execution steps can be compiled and mapped into specific logic circuit sub-modules using hardware languages ​​in various electronic design automation tools. To facilitate the description of the logical flow of the data verification method and the necessary steps required to solve related technical problems, this application describes the functional steps with sequential or synchronous execution order, but it can still be integrated into a circuit system during the design and manufacturing process.

[0012] like Figure 1 As shown, the data error correction method includes: calculating the required bit width of the error correction code based on the bit width of the data to be verified, wherein, in order to traverse the data to be verified bit by bit during detection and error correction, the required bit width of the error correction code is set to be smaller than the bit width of the data to be verified; when the bit width of the data to be verified is fixed, there can be multiple bit width results for the required bit width of the error correction code.

[0013] Based on the required bit width of the error correction code, an error correction code library is constructed, which includes error correction codes. Since the binary 1s in the error correction code are used for calculations, various error correction codes are enumerated based on the bit position and the number of occurrences of the binary 1s. These various error correction codes form the error correction code library. The positions of the binary 1s in the various error correction codes are different, and the number of occurrences of binary 1s in some error correction codes is equal.

[0014] The optimal error correction code set is selected from the error correction code library, so that each bit of the data to be verified corresponds to the corresponding error correction code in the optimal error correction code set. Of course, in addition to the error correction codes corresponding to each bit of the data to be verified, the optimal error correction code set may also include error correction codes that can verify their own errors; the bit width required for each error correction code in the optimal error correction code set is equal.

[0015] In order to make the error correction codes correspond to different bits of the data to be verified, the optimal error correction code set needs to be selected from the error correction code library to optimize the code library. The optimal error correction code set is stored in the storage array. Compared with the existing technology of storing the error correction code library and directly using it to index and locate the error data bit, the design of this application makes the timing and area of ​​the memory design better.

[0016] Based on the bit position of the binary 1 in the error correction code corresponding to the data to be verified within the optimal error correction code set, pre-correction data is encoded. This encoding is based on the encoding logic derived from the aligned binary 1s in the error correction codes corresponding to each bit of the data to be verified. Preferably, the bit width of the encoded pre-correction data is equal to the bit width required by the error correction code. Specifically, when encoding the i-th bit of the pre-correction data, the data at the i-th bit of the error correction code corresponding to each bit involved in the encoding of the data to be verified (equivalent to being aligned with the i-th bit of the pre-correction data) is equal to binary 1, but not allowed to be equal to binary 0; thereby realizing the encoding of the error correction code using the relevant bits of the data to be verified, allowing the relevant bits of the data to be verified to start participating in the verification, and determining the bits in the data to be verified that need to be calculated and detected (i.e., the bits to be verified) according to the bit position of the corresponding binary 1 in the error correction code, and then encoding the error correction code corresponding to the bits in the data to be verified that are calculated and detected into the pre-correction data.

[0017] Based on the XOR result between the pre-corrected error data and the pre-obtained reference check data, and the optimal error correction code set, a single-bit error is located. Specifically, the error correction code that matches the XOR result is indexed from the optimal error correction code set, and the data bit corresponding to the indexed error correction code is identified as the single-bit error to be located. When the XOR result is not in the optimal error correction code set, it can be identified as either no error or a two-bit error. From a logic circuit perspective, the encoded pre-corrected error data and the reference check data are input into an XOR gate circuit for XOR operation. Then, based on the error correction code indexed in the optimal error correction code set, it is determined whether the data to be checked and the reference check data have a single-bit error. This is equivalent to a decoding logic for the encoded pre-corrected error data, decoding out the bit in the data to be checked that has a single-bit error.

[0018] Based on the XOR result, when indexing from the optimal error correction code set to the bit with a single-bit error, it is determined that the XOR result is equal to an error correction code in the optimal error correction code set. The data bit corresponding to this error correction code is the data bit with a single-bit error. Then, the data at the bit with the single-bit error is inverted to obtain the corrected data. Wherein, the data at the bit with the single-bit error is located in the reference check data or the data to be checked, so the single-bit error appearing in the reference check data or the data to be checked can be corrected.

[0019] In one communication implementation, if the sending module transmits the data to be verified to the receiving module, the aforementioned pre-correction data is obtained by the receiving module using the data to be verified according to the aforementioned encoding logic. It is worth noting that the sending module pre-obtains the reference verification data using the data to be verified according to the aforementioned encoding logic, and then the sending module sends the data to be verified and the reference verification data to the receiving module. Then, the receiving module obtains the pre-correction data using the data to be verified according to the aforementioned encoding logic. Since factors such as data loss and noise errors may occur during communication, the pre-correction data may not be the same as the reference verification data. Therefore, it is necessary to perform an XOR operation on the pre-correction data and the pre-obtained reference verification data, and then verify the XOR result by combining the error correction codes in the optimal error correction code set. Specifically, based on whether the XOR result is 0 or whether it is an error correction code in the optimal error correction code set, it is determined that the data to be verified has a single bit error. The error is located in terms of the position and number of bits, and then the data at the bit with the single bit error is inverted to complete one correction of the data to be verified.

[0020] The reference verification data is also error correction data encoded using the data to be verified. The reference verification data also has a corresponding error correction code in the optimal error correction code set, which is an error correction code capable of verifying its own errors. Since the sending module sends the data to be verified and the reference verification data to the receiving module, the receiving module will verify both the reference verification data and the data to be verified based on the XOR result between the pre-correction data and the pre-obtained reference verification data and the optimal error correction code set. This allows the receiving module to identify a single-bit error in the reference verification data and then invert the bit with the single-bit error to complete one correction of the reference verification data.

[0021] In summary, this application, based on selecting the optimal error correction code set from the error correction code library, uses the XOR result between the pre-corrected data obtained by encoding the corresponding error correction code with the data to be verified and the pre-obtained reference verification data to index the error correction code from the optimal error correction code set, locates the single-bit error in the reference verification data or the data to be verified, and then performs an inversion operation on the indexed bit with the single-bit error to complete the data error correction. It is highly targeted and can accurately locate the error in a certain bit from multi-bit data transmission and perform timely inversion correction, ensuring the error correction performance of the chip running the data error correction method or the chip with the corresponding logic operation circuit defined by the data error correction method on the input data.

[0022] To illustrate, when the XOR result is an error correction code within the optimal error correction code set, the following list of information can be used to determine if a single bit error exists in the bit corresponding to the XOR result. The reference check data ecc_in[6:0] has a bit width of 7 bits, and the data to be checked data_in[39:0] has a bit width of 40 bits.

[0023] The mapping table between reference check data ecc_in[6:0] and error correction codes is as follows:

[0024]

[0025]

[0026] In the mapping table between reference check data ecc_in[6:0] and error correction codes, each error correction code contains only one binary 1. An error correction code containing only one binary 1 is used to correct the error correction code itself. That is, reference check data ecc_in can be regarded as the check value of the error correction code in the same row of the table.

[0027] The mapping table between the data to be verified, data_in[39:0], and the error correction code is as follows:

[0028]

[0029]

[0030] As can be seen from the aforementioned embodiments, when the i-th bit of the error correction code is binary 1, the i-th bit of the pre-correction data is considered as a valid bit data. The minimum value of i is 0, and the maximum value of i in the aforementioned mapping table is 6. Then, the reference check data is XORed with the valid bit data to locate the error. If the XOR result is equal to the error correction code in one of the rows of the third column in the aforementioned two mapping tables, then the error is located in one of the rows of the third column. It can be a bit error in data_in

[39] to data_in[0] or a bit error in ecc_in[6] to ecc_in[0], thus determining that the bit corresponding to the XOR result has a single bit error.

[0031] Specifically, when the XOR result is an error-correcting code within the optimal error-correcting code set, the following holds true:

[0032] When the error correction code corresponding to one of the bits of the data to be verified, indexed from the optimal error correction code set, is the XOR result, it is determined that a single bit error has occurred in one of the bits of the data to be verified. That is, a single bit error has occurred in the bit of the data to be verified corresponding to the error correction code in the optimized error correction code set that is equal to the XOR result. This bit of the data to be verified is one bit of the data to be verified, which can be understood as an error in the data of one bit of the data to be verified. For example, in the mapping table between the data to be verified data_in[39:0] and the error correction code, a single bit error has occurred in one of the bits of the data to be verified data_in

[39] to data_in[0]. Therefore, after receiving the reference verification data and the data to be verified at the same time, a single bit error has occurred in the bit of the data to be verified, but no error has occurred in any of the bits in the reference verification data. Then, the data in one bit of the data to be verified is inverted while keeping the data in the other bits unchanged, resulting in the corrected data to be verified. The corrected data to be verified is composed of the bits that were not inverted and the bits that were inverted, arranged in the original bit order. At this point, the data bits with single-bit errors in the data to be verified have been corrected, and the bit width of the corrected data to be verified has not changed compared to the original data. Then, the reference verification data and the corrected data to be verified are driven to be output in parallel. By running the data error correction method, the parallel input reference verification data and data to be verified are verified and corrected before being output in parallel.

[0033] It should be noted that the aforementioned inversion operation inverts the binary number of the bit where a single bit error occurs. For example, the data in the bit where a single bit error occurs that was originally binary 0 becomes binary 1, and the data that was originally binary 1 becomes binary 0.

[0034] If the error correction code corresponding to one of the bits in the reference check data indexed from the optimal error correction code set is the XOR result, the bit with a single bit error is located from the reference check data according to the bit position of the binary 1 of the corresponding error correction code in the optimal error correction code set. That is, the checked data bit corresponding to the error correction code in the optimized error correction code set that is equal to the XOR result has a single bit error. This checked data bit is one bit in the reference check data, which can be understood as the data on one bit of the reference check data having an error. For example, in the mapping table between the reference check data ecc_in[6:0] and the error correction code, the data on one bit of the reference check data ecc_in[6] to ecc_in[0] has a single bit error. Therefore, after receiving the reference check data and the data to be checked at the same time, based on the aforementioned XOR result, it is identified that a single bit error has occurred in the pre-generated error correction data, but no errors have occurred in any bit of the data to be checked. Then, the data at the erroneous bit is inverted while keeping the data at other bits in the reference check data unchanged, resulting in corrected reference check data. At this point, the data bit with the single-bit error in the reference check data has been corrected, and the bit width of the corrected reference check data has not changed compared to the original. Then, the corrected reference check data and the data to be checked are driven to be output in parallel. By running the data error correction method, the parallel input reference check data and the data to be checked are checked and corrected before being output in parallel.

[0035] It should be noted that the bit width of the reference check data, the bit width of the XOR result, and the bit width required by the error correction code are equal, so that each bit of the reference check data is aligned with each bit of the corresponding error correction code; in the error correction code corresponding to each bit of the reference check data, there is only one bit that is binary 1, which can serve to detect its own corresponding error correction code.

[0036] It should be noted that the mapping relationship between each bit of the reference check data and each bit of the data to be checked and the error correction code in the optimal error correction code set is pre-configured, such as the mapping table between the reference check data ecc_in[6:0] and the error correction code and the mapping table between the data to be checked data_in[39:0] and the error correction code. The specific pre-configured mapping relationship between the order of each bit of the reference check data and the specific numerical error correction code is stored in the storage array to facilitate indexing in the storage array.

[0037] In summary, this application determines whether an error has occurred based on the XOR result and its index result in the optimal error correction code set. If no error has occurred, the reference check data and the data to be checked can be output in parallel. If a single bit error has occurred, the bit with the error in the reference check data and the data to be checked can be inverted and corrected before being output in parallel. This achieves the correction of data with a single bit error within the pre-designed maximum error correction capability (when the data to be checked or the reference check data has an error in memory and the number of bits with the error is 1).

[0038] Based on the foregoing embodiments, the method for locating a single-bit error based on the XOR result between the pre-correction data and the pre-obtained reference verification data, and the optimal error correction code set, includes: controlling the pre-correction data to perform an XOR operation with the pre-obtained reference verification data to obtain the XOR result; since the reference verification data is obtained by using the data to be verified according to the aforementioned encoding logic, and the reference verification data is pre-encoded error correction data, performing an XOR operation between the pre-correction data and the pre-obtained reference verification data is equivalent to performing a bitwise XOR operation between the original ECC check value (the reference verification data) and the new ECC check value (the pre-correction data); when implemented using hardware logic circuits, each bit in the pre-correction data and the corresponding bit in the reference verification data are input to an XOR gate for XOR operation to obtain the XOR result of each bit, and output in parallel as the XOR result between the pre-correction data and the pre-obtained reference verification data.

[0039] It should be noted that the error correction codes in the optimal error correction code set include the error correction codes corresponding to each bit of the reference verification data and the error correction codes corresponding to each bit of the data to be verified, so as to verify the aforementioned XOR result bit by bit by using the error correction code corresponding to the index; however, each bit of any error correction code in the optimal error correction code set is not equal to binary 0, so that 0 is excluded from the optimal error correction code set.

[0040] If each bit of the XOR result is equal to binary 0, specifically, the XOR result is composed of multiple bits of binary 0 (the bit width of the XOR result is equal to the bit width required by the error correction code), then it is determined that both the reference check data and the data to be checked are correct data, that is, each bit in the reference check data and each bit in the data to be checked are without error.

[0041] If the XOR result is an error correction code within the optimal error correction code set, then the bit corresponding to the XOR result is determined to have a single-bit error, indicating that only one bit of data is incorrect and can be corrected. The bit corresponding to the XOR result is either a bit of the reference check data or a bit of the data to be checked. Since each bit of any error correction code in the optimal error correction code set is not equal to binary 0, a corresponding error correction code with an equal value can be indexed from the optimal error correction code set based on the binary 1 in the corresponding bit of the XOR result. This allows the location of the erroneous bit, including its row and column address in the storage array. The data to be checked, the reference check data, and their corresponding error correction codes are already stored in the storage array, awaiting external signals to index based on the XOR result.

[0042] If the XOR result is neither any of the error correction codes in the optimal error correction code set, and each bit of the XOR result is not equal to binary 0, then it is determined that there is a two-bit error in the data to be checked and / or the reference check data, indicating that there is more than one bit data error. Compared with the prior art, the two-bit error has been reported without using extension bits, detection bits, or check bits, and is determined solely based on the result of the bitwise XOR operation between the original ECC check value (the reference check data) and the new ECC check value (the pre-correction data).

[0043] As one embodiment, the method of encoding pre-corrected data based on the bit position of the binary 1 in the error correction code corresponding to the data to be verified within the optimal error correction code set is as follows: Figure 2 As shown, it includes:

[0044] In addition to the error correction code corresponding to the reference check data, all error correction codes whose i-th bit data is binary 1 are indexed from the optimal error correction code set, and then the indexed error correction codes are marked as error correction codes to be mapped; wherein, the error correction code to be mapped is not the error correction code corresponding to the reference check data; all error correction codes in the optimal error correction code set have the same bit width. In order to encode the i-th bit of the pre-corrected data, all error correction codes whose data at the i-th bit is binary 1 except for the error correction code corresponding to the reference check data are indexed, so as to further index the corresponding bit to be checked (i.e., the bit corresponding to the data to be checked). This ensures that when the i-th bit of the pre-corrected data is encoded, the data at the i-th bit of the error correction code corresponding to each bit involved in the encoding of the data to be checked is equal to binary 1.

[0045] According to the mapping relationship between each bit of the data to be verified and the error correction code in the optimal error correction code set, the corresponding bits in the data to be verified are indexed using the error correction code to be mapped. The corresponding mapping relationship can be referred to in the mapping table between the data to be verified data_in[39:0] and the error correction code. The order of each bit in the data to be verified corresponds one-to-one with the error correction code. Whenever an error correction code to be mapped is determined, a bit corresponding to the mapped bit of the data to be verified can be indexed. The order of the bit corresponding to the mapped bit of the data to be verified remains unchanged, but the data on the bit corresponding to the mapped bit of the data to be verified will change with the change of external input data.

[0046] It should be noted that the mapping relationship between each bit of the data to be verified and the error correction code in the optimal error correction code set is pre-configured; the optimal error correction code set is set in the storage array, and the error correction code corresponding to each bit of the data to be verified is stored in the address corresponding to the storage array; wherein, the bit width of the pre-corrected data is equal to the bit width required by the error correction code.

[0047] When indexing out and obtaining the corresponding bits in the data to be verified, the data in the corresponding bits of the data to be verified are XORed. If the data in the i-th bit of the error correction code is equal to binary 1, then the data to be verified corresponding to the error correction code whose data in the i-th bit is equal to binary 1 participates in the XOR operation to obtain the data in the i-th bit of the pre-corrected data. The data to be verified is the bit in the data to be verified that corresponds to the error correction code whose data in the i-th bit is equal to binary 1. If implemented using logic circuits, the corresponding bits in the data to be verified are input into a multi-input XOR gate circuit to perform an XOR operation, and the XOR operation result of the mapped bits in the data to be verified is output; then the XOR operation result of the mapped bits in the data to be verified is identified as the i-th bit encoded data; where i is an integer, i is less than or equal to the difference between the bit width required by the error correction code and decimal 1, and i is greater than or equal to 0; the i-th bit encoded data is the i-th bit data of the pre-error correction data.

[0048] Schematic, starting from the least significant bit of the data to be verified, data_in[0], each bit of the pre-correction data ecc is encoded in combination with the corresponding error correction code; referring to the aforementioned mapping table between the data to be verified, data_in[39:0] and the error correction code, it can be seen that the error correction code corresponding to the least significant bit of the data to be verified, data_in[0], is 0000111; in order to index out all error correction codes other than the error correction code corresponding to the reference verification data whose data at the i-th bit is binary 1, and to achieve that when encoding the i-th bit of the pre-correction data, the data at the i-th bit of the error correction code corresponding to each bit of the data to be verified is equal to binary 1, therefore, in order to encode the pre-correction data To encode the data at the 0th bit (0th bit encoded data) ecc[0], the lowest bit data data_in[0] (the data at the 0th bit of the data to be verified) needs to be input by an XOR gate circuit. Similarly, in order to encode the data at the 1st bit (1st bit encoded data) ecc[1] of the pre-correction data, the data at the 0th bit of the data to be verified needs to be input by other XOR gate circuits. Similarly, in order to encode the data at the 2nd bit (2nd bit encoded data) ecc[2] of the pre-correction data, the data at the 0th bit of the data to be verified needs to be input by other XOR gate circuits.

[0049] Referring to the mapping table between the data to be verified (data_in[39:0]) and the error correction code, it can be seen that the error correction code corresponding to the first bit (data_in[1]) of the data to be verified is 0001011. In order to encode the data (0th bit encoded data) ecc[0] of the 0th bit of the pre-correction data, the least bit data (data_in[0]) and the data (data_in[1]) of the first bit of the data to be verified need to be input by an XOR gate circuit, that is, ecc[0] = data_in[0]^data_in[1]. Similarly, in order to encode the data (1st bit encoded data) ecc[1] of the first bit of the pre-correction data, the least bit data (data_in[0]) and the data (data_in[1]) of the first bit of the data to be verified need to be input by an XOR gate circuit, that is, ecc[1] = d ata_in[0]^data_in[1]; Similarly, in order to encode the data on the second bit of the pre-correction data (the second bit encoded data) ecc[2], the least bit data data data_in[0] of the data to be verified needs to be input by the XOR gate circuit, that is, ecc[2] = data_in[0], but the data on the first bit of the data to be verified data_in[1] is not input, because the data on the second bit of the error correction code corresponding to data_in[1] is binary 0; Similarly, in order to encode the data on the third bit of the pre-correction data (the third bit encoded data) ecc[3], the least bit data data data_in[0] of the data to be verified and the data on the first bit of the data to be verified data_in[1] need to be input by the XOR gate circuit, that is, ecc[1] = data_in[0]^data_in[1];

[0050] Therefore, in order to encode the i-th bit of the pre-correction data, the data on the i-th bit of the error correction code corresponding to each bit involved in the encoding in the data to be verified must be equal to binary 1 in order to control the XOR operation of the data on each bit involved in the encoding in the data to be verified.

[0051] Based on the aforementioned embodiments, each time i increments, the encoding changes from ecc[i] to ecc[i+1]. Then, except for the error correction code corresponding to the reference check data ecc_in[i], all error correction codes whose data at the (i+1)th bit is binary 1 are indexed from the optimal error correction code set. These indexed error correction codes are then marked as error correction codes to be mapped. To encode the (i+1)th bit of the pre-corrected data, all error correction codes whose data at the (i+1)th bit is binary 1, except for the error correction code corresponding to the reference check data, are indexed. This further indexes the corresponding bit to be checked (i.e., the bit corresponding to the data to be checked), ensuring that when the (i+1)th bit of the pre-corrected data is encoded, the data at the (i+1)th bit of the error correction code corresponding to each bit in the data to be checked is equal to binary 1. Then, according to the mapping relationship between each bit of the data to be verified and the error correction codes in the optimal error correction code set, the corresponding bits in the data to be verified are indexed using the error correction codes to be mapped. While indexing and obtaining the corresponding bits in the data to be verified, an XOR operation is performed on the corresponding bits in the data to be verified. If the data in the (i+1)th bit of the error correction code is equal to binary 1, then the data bit to be verified corresponding to the error correction code whose data in the (i+1)th bit is equal to binary 1 participates in the XOR operation to obtain the data in the (i+1)th bit of the pre-corrected data. The data bit to be verified is the bit in the data to be verified corresponding to the error correction code whose data in the (i+1)th bit is equal to binary 1. The XOR operation result of the corresponding bits in the data to be verified is then identified as the (i+1)th bit encoded data, which is the (i+1)th bit data of the pre-corrected data. It should be added that the number of binary 1s in each error-correcting code in the optimal error-correcting code set is odd.

[0052] According to the aforementioned XOR operation, each bit of the pre-correction data is continuously obtained during the increment of i until i is incremented to m. The 0th bit encoded data to the mth bit encoded data are used to form the pre-correction data. Each time i is incremented, a decimal 1 is added. The difference between the bit width required for the error correction code and the decimal 1 is m, where m is an integer.

[0053] By referring to the mapping table between the data to be verified, data_in[39:0], and the error correction code, as well as the order of the corresponding bits of the data to be verified participating in the aforementioned XOR operation and the binary form of their corresponding error correction codes, the encoding form of each bit of the pre-correction data, ecc[6:0], can be derived. That is, the logical example of encoding 7 bits of pre-correction data, ecc, based on the data to be verified, data_in[39:0], and the aforementioned mapping table is as follows:

[0054] ecc[0]=data_in[0]^data_in[1]^data_in[2]^data_in[4]^data_in[5]^data_in[7]^dat a_in

[10] ^data_in

[11] ^data_in

[13] ^data_in

[16] ^data_in

[20] ^data_in

[21] ^data_in

[23] ^data_in

[26] ^data_in

[30] ^data_in

[35] ^data_in

[37] ^data_in

[38] ^data_in

[39] ;

[0055] ecc[1]=data_in[0]^data_in[1]^data_in[3]^data_in[4]^data_in[6]^data_in[8]^dat a_in

[10] ^data_in

[12] ^data_in

[14] ^data_in

[17] ^data_in

[20] ^data_in

[22] ^data_in

[24] ^data_in

[27] ^data_in

[31] ^data_in

[35] ^data_in

[36] ^data_in

[37] ^data_in

[38] ;

[0056] ecc[2]=data_in[0]^data_in[2]^data_in[3]^data_in[5]^data_in[6]^data_in[9]^dat a_in

[11] ^data_in

[12] ^data_in

[15] ^data_in

[18] ^data_in

[21] ^data_in

[22] ^data_in

[25] ^data_in

[28] ^data_in

[32] ^data_in

[35] ^data_in

[36] ^data_in

[37] ^data_in

[38] ;

[0057] ecc[3]=data_in[1]^data_in[2]^data_in[3]^data_in[7]^data_in[8]^data_in[9]^dat a_in

[13] ^data_in

[14] ^data_in

[15] ^data_in

[19] ^data_in

[23] ^data_in

[24] ^data_in

[25] ^data_in

[29] ^data_in

[33] ^data_in

[35] ^data_in

[36] ^data_in

[37] ^data_in

[39] ;

[0058] ecc[4]=data_in[4]^data_in[5]^data_in[6]^data_in[7]^data_in[8]^data_in[9]^dat a_in

[16] ^data_in

[17] ^data_in

[18] ^data_in

[19] ^data_in

[26] ^data_in

[27] ^data_in

[28] ^data_in

[29] ^data_in

[34] ^data_in

[35] ^data_in

[36] ^data_in

[39] ;

[0059] ecc[5]=data_in

[10] ^data_in

[11] ^data_in

[12] ^data_in

[13] ^data_in

[14] ^data_in

[15] ^data_in

[16] ^data_in

[17] ^data_in

[18] ^data_in

[19] ^data_in

[30] ^data_in

[31] ^data_in

[32] ^data_in

[33] ^data_in

[34] ^data_in

[36] ^data_in

[38] ^data_in

[39] ;

[0060] ecc[6]=data_in

[20] ^data_in

[21] ^data_in

[22] ^data_in

[23] ^data_in

[24] ^data_in

[25] ^data_in

[26] ^data_in

[27] ^data_in

[28] ^data_in

[29] ^data_in

[30] ^data_in

[31] ^data_in

[32] ^data_in

[33] ^data_in

[34] ^data_in

[37] ^data_in

[38] ^data_in

[39] 。

[0061] In the XOR operations that encode ecc[6:0], the number of times binary 1s in the error correction code are used from ecc[6] to ecc[0] are [18,18,18,19,19,19,19]. That is, the number of data bits to be checked that need to be indexed to encode the 6th bit to the 0th bit of the pre-corrected data can also be understood as the total number of times the data to be checked participates in the check or the total number of bit transmissions. Some data bits to be checked are repeatedly involved in the XOR operation. Therefore, the optimization of the error correction code ensures that the amount of data used by each combinational logic is as consistent as possible, ensuring the optimal timing and area of ​​the design.

[0062] Preferably, the difference between the number of error correction codes required to identify each bit of encoded data does not exceed decimal 1. For example, in each XOR operation corresponding to ecc[6:0], from the 6th bit encoded data ecc[6] to the 0th bit encoded data ecc[0], the number of times the binary 1 in the error correction code is used is [18,18,18,19,19,19,19]. Then, the difference between the number of error correction codes required to identify the 7 bits of encoded data does not exceed decimal 1, so that the data on each bit of the XOR operation in the data to be checked has the smallest change in logic length before and after i increments, according to the combinational logic circuit. That is, the difference between the logic lengths generated by the XOR operation in the data to be checked is not large, so that the number of times the binary 1 is used in each bit of the pre-corrected data is as similar as possible, and the timing is optimized.

[0063] Based on the aforementioned embodiments, the method for controlling the XOR operation of the corresponding bits in the data to be verified includes: after indexing the corresponding bits in the data to be verified using the error correction code to be mapped, dividing the corresponding bits in the data to be verified into at least two groups of bits to be operated on in order from low bit to high bit, that is, all bits in the data to be verified that need to participate in the XOR operation (participate in encoding) are allocated into multiple groups; controlling the data in each group of bits to be operated on to perform XOR operation simultaneously to obtain the XOR operation result of each group of bits to be operated on, wherein the XOR operation result of each group of bits to be operated on is stored in a register, and the XOR operation of each group of bits to be operated on is handled by its own XOR gate circuit; then controlling the XOR operation result of each group of bits to be operated on to perform XOR operation, which still requires an XOR gate circuit to handle, to obtain the XOR operation result of the corresponding bits in the data to be verified.

[0064] As for the number of groups corresponding to each bit in the data to be verified, it is divided according to the system performance requirements. The data in each group of bits to be processed are XORed simultaneously, which is recorded as one cycle calculation; then the XOR results of each group of bits to be processed are XORed, which is recorded as another cycle calculation, forming two cycle calculations.

[0065] In practical applications, if the data bit width is large and high performance is required, the aforementioned XOR operation (corresponding to the encoding logic) can be split into multiple cycles for calculation to meet performance requirements. This is because a large data bit width will cause the combinational logic required for the XOR operation to be longer, resulting in poor performance and inability to run high-frequency clocks. When the calculation is split into multiple cycles, the performance can be improved.

[0066] Schematic, the 0th bit encoded data ecc[0] can be split into two groups of bits to be operated on. The XOR operation results of the two groups of bits to be operated on are calculated separately as ecc0_0 and ecc0_1. Then the XOR operation result of ecc0_0 and ecc0_1 is calculated to obtain the 0th bit encoded data ecc[0], as follows:

[0067] ecc0_0=data_in[0]^data_in[1]^data_in[2]^data_in[4]^data_in[5]^data_in[7]^dat a_in

[10] ^data_in

[11] ^data_in

[13] ^data_in

[16] ;

[0068] ecc0_1=data_in

[20] ^data_in

[21] ^data_in

[23] ^data_in

[26] ^data_in

[30] ^data_in

[35] ^data_in

[37] ^data_in

[38] ^data_in

[39] ;

[0069] Then, in the next clock cycle, ecc[0] = ecc0_0^ecc0_1 is performed, thereby calculating the XOR operation result of each corresponding bit in the data to be verified by splitting it into two clock cycles.

[0070] As one embodiment, the method for assembling an error correction code library based on the required bit width of the error correction code is as follows: Figure 3 As shown, it includes:

[0071] Step A1: Ensure that the number of binary 1s in the error correction code is odd, then set the number of binary 1s in the error correction code to j; then configure j to be equal to decimal 1, and then execute step A2; it should be noted that all error correction codes in the error correction code library have a combination of an odd number of binary 1s.

[0072] Step A2: Determine whether j is less than or equal to the bit width required for the error correction code. If yes, proceed to step A3; otherwise, confirm that the error correction code library is complete and obtain all error correction codes in the error correction code library. It should be noted that j is a value that increments from 1 and needs to be limited to the bit width required for the error correction code in order to build an effective error correction code set.

[0073] Step A3: Control j binary 1s to be configured at different bits of the error correction code and form an error correction code. Then add the current error correction code to the error correction library, which is initially empty. Continue until the j binary 1s have been configured in different bit orders for all bits of the error correction code, that is, each binary 1 has been set for each bit of the error correction code. The difference between the required bit width of the error correction code and j is the number of binary 0s configured in the error correction code. The j binary 1s and the difference between the required bit width of the error correction code and j and the binary 0s are combined to form different error correction codes, obtaining each error correction code configured by the j binary 1s in different bit orders. Then execute step A4.

[0074] Step A4: Control j to increment once, where each increment of j adds a decimal 2 to ensure that j keeps increasing to an odd number starting from decimal 1; then execute step A2 to drive j+2 binary 1s to be configured at different bits of the error correction code and form a new error correction code.

[0075] Schematic, the bit width required for the error correction code is equal to 7 bits. During the repeated execution of steps A2 to A4, j increases sequentially from decimal 1 to decimal 3, decimal 5, and decimal 7, respectively forming error correction codes with 1 binary 1, 3 binary 1, 5 binary 1, and 7 binary 1, which are combined to form an error correction code library. All error correction codes that meet the condition of an odd number of binary 1 are listed, such as 0000001, 0000010, ..., 1000000, 0000111, 0001011, ..., 1110000, 0011111, ..., 1111100, 1111111.

[0076] Based on the above embodiments, the method for selecting the optimal error correction code set in the error correction code library includes: executing steps A2 to A4 to drive j to increment multiple times; each time error correction codes are obtained by executing step A3 with the j binary 1s configured in different bit positions, the number of error correction codes obtained in step A3 is counted, that is, the number of error correction codes obtained in the already executed step A3 is accumulated until the accumulated number of error correction codes is greater than the sum of the bit width of the data to be verified and the bit width of the reference verification data. At this time, j is greater than decimal 2, so in the j-2 binary 1s configured in different bit positions... When all bits of the error correction code are configured in the correct bit order, the number of error correction codes obtained is not greater than the sum of the bit width of the data to be verified and the bit width of the reference verification data. Then, the number of error correction codes calculated when all bits of the error correction code are configured in j-2 binary 1s in different bit orders is selected as the selected number. All selected error correction codes are added to the optimal error correction code set to start selecting the optimal error correction code set from the error correction code library. However, it is still necessary to select some additional error correction codes from the error correction codes configured in j binary 1s in different bit orders to add to the optimal error correction code set.

[0077] Next, the difference between the bit width of the data to be verified and the number of selected codes is calculated to obtain the number of candidate codes. It is worth noting that the bit width of the data to be verified may be much larger than the bit width required by the error correction code. Then, from the error correction codes configured with j binary 1s in different bit orders, the number of candidate error correction codes is selected, and all of these candidate error correction codes are added to the optimal error correction code set to form all the error correction codes in the optimal error correction code set. This ultimately achieves the selection of the optimal error correction code set from the error correction code library, making the optimal error correction code set simple and easy to implement.

[0078] The number of error correction codes required in the optimal error correction code set is equal to the sum of the bit width of the data to be verified and the bit width required for the error correction codes, so that the optimal error correction code set includes error correction codes used for error correction codes themselves (specifically, error correction codes containing only one binary 1). The bit width required for the error correction codes is less than the bit width of the data to be verified. For example, the bit width required for the error correction codes is 7 bits, and the bit width of the data to be verified is 40 bits. During steps A2 to A4, among the 7-bit error correction codes configured, 7 error correction codes containing one binary 1 are configured cumulatively, 35 error correction codes containing three binary 1s are configured cumulatively, and 21 error correction codes containing five binary 1s are configured cumulatively. To form all the error correction codes in the optimal error correction code set, 35 error correction codes containing one binary 1 are configured sequentially. After having 3 error correction codes with 1 binary digits, the selected number is 35 + 7 = 42. Then, the remaining 5 error correction codes are selected from the error correction codes with 5 1 binary digits as the candidate number of error correction codes. Referring to the mapping table between the data to be verified data_in[39:0] and the error correction codes, it can be seen that the 5 selected error correction codes with 5 1 binary digits are: 0011111, 0111110, 1001111, 1100111, 1111001.

[0079] It should be added that after configuring a binary 1 into the bits of the error correction code in different bit orders by executing step A3, the number of different error correction codes obtained is equal to the bit width required for the error correction code. The different error correction codes obtained are the error correction codes corresponding to each bit of the reference check data. Then, the error correction codes corresponding to each bit of the reference check data are selected and added to the optimal error correction code set. Referring to the mapping table between the aforementioned reference check data ecc_in[6:0] and the error correction codes, it can be seen that the seven error correction codes with one binary 1 are: 0000001, 0000010, 0000100, 0001000, 0010000, 0100000, 1000000. Among them, the error correction codes with one binary 1 are used to correct the reference check data ecc_in[6:0].

[0080] As one embodiment, a method for selecting the number of candidate error-correcting codes from the j binary 1s configured with different bit orders is as follows: Figure 4 As shown, it includes:

[0081] Step B1: Iterate through each bit of each error-correcting code in the remaining error-correcting code set. This can be understood as iterating by bit or by error-correcting code. Step B2 is executed while iterating through the current error-correcting code. The current error-correcting code is one of the error-correcting codes traversed in the current round within the remaining error-correcting code set. The remaining error-correcting code set is composed of error-correcting codes configured with j binary 1s in different bit orders when the number of error-correcting codes obtained during the execution of steps A2 to A4 first exceeds the sum of the bit width of the data to be verified and the bit width of the reference verification data. It should be noted that the number of error-correcting codes obtained is counted after step A3, when the j binary 1s are configured with different bit orders for all bits of the error-correcting code.

[0082] Schematic, the required bit width of the error correction code is 7 bits, and the bit width of the data to be checked is 40 bits. During the execution of steps A2 to A4, after configuring 7 error correction codes containing 1 binary 1 and 35 error correction codes containing 3 binary 1s, when configuring 21 error correction codes containing 5 binary 1s, the cumulative number of error correction codes obtained is greater than the sum of the bit width of the data to be checked and the bit width of the reference check data. Then, the 21 error correction codes containing 5 binary 1s form the remaining error correction code set and are saved in a dedicated cache space.

[0083] Step B2: If a binary 1 appears in a bit of the current error correction code, count the bit being traversed and mark it as the count value of the currently traversed bit. Then, control the current traversed bit to update the count values ​​of each bit in the current error correction code sequentially. Then, proceed to step B3. Further, when the current error correction code is subsequently updated, the count value of the currently traversed bit will not be lost, and the counting will continue based on the count value of the currently traversed bit. The currently traversed bit will be repeatedly traversed and counted in subsequent score calculations, causing the count value of the currently traversed bit to increase subsequently, recording the number of times a bit uses a binary 1.

[0084] Within the remaining set of error-correcting codes, the data on each bit of the error-correcting code can be traversed in order from least bit to most bit. However, in order to calculate the score of a single error-correcting code, it is not necessary to start traversing from the least bit. Each bit of any error-correcting code has the opportunity to be counted to record the usage rate of binary 1 for each bit.

[0085] Step B3: During the process of traversing each bit of the current error correction code, the bits are divided into the currently traversed bits and the subsequently traversed bits according to the time sequence. The count value of each bit is updated in real time according to the occurrence of binary 1. The score value corresponding to the current error correction code is obtained by calculating the sum of the absolute values ​​of the differences between the count value of the currently traversed bits and the count values ​​of each subsequently traversed bits. Then, it is determined that one round of traversal of the error correction code has been completed, and then step B4 is executed. The score corresponding to the current error correction code is equivalent to the sum of the absolute differences between the counts of all pairs of bits in the current error correction code. It is worth noting that the premise of calculating the score in step B3 is that for the same error correction code, the currently traversed bits are updated sequentially between each bit of the current error correction code. Each time it is updated, the absolute value of the difference between the count value of the currently traversed bit and the count values ​​of the other bits is calculated. The absolute value of the difference between the count values ​​of all pairs of bits in the current error correction code is calculated in a loop until all bits of the current error correction code have been updated. Based on this, after the currently traversed bits have been updated / circulated to all bits of the current error correction code and the absolute value of the difference between the count value of the currently traversed bit and the count values ​​of the other bits is calculated, the result is summed to obtain the score corresponding to the current error correction code. Then, the score corresponding to the current error correction code is saved in a special score list.

[0086] Step B4: Determine whether all error correction codes in the remaining error correction code set have been traversed. If yes, proceed to step B5; otherwise, update the current error correction code with one of the error correction codes in the next round of traversal within the remaining error correction code set, and then proceed to step B2. Specifically, for each error correction code traversed in the remaining error correction code set, a corresponding score is calculated. This requires one round of traversal as described in steps B2 to B3, to iteratively calculate the score corresponding to one of the error correction codes in the next round of traversal, and then save the score corresponding to one of the error correction codes in the next round of traversal into the dedicated score list.

[0087] Step B5: Sort the scores of all the traversed error correction codes in the remaining error correction code set according to their numerical values. This can be done by sorting the scores of different error correction codes in a dedicated score list, either in ascending order, until at least the highest or lowest ranked candidate score values ​​are identified. Then, select the error correction codes corresponding to the highest or lowest ranked candidate score values ​​and add them to the optimal error correction code set. This involves transferring the highest or lowest ranked candidate score values ​​from the remaining error correction code set to the optimal error correction code set, ensuring that the selected error correction codes are sorted according to their numerical values ​​within the optimal set. Preferably, the selected candidate error correction codes are the candidate error correction codes with the lowest numerical values ​​among the error correction codes traversed in steps B1 to B4 within the remaining error correction code set.

[0088] Combining steps B1 to B5, by utilizing the count of binary 1s in the error correction codes within the remaining error correction code set, the remaining error correction code set is optimized into a part of the optimal error correction code set, ensuring optimal timing and area in the design.

[0089] Indicatively, the number of candidates is 5 in decimal. Referring to the mapping table between the data to be verified (data_in[39:0]) and the error correction codes, the five selected error correction codes with five binary 1s are as follows: 0011111 (corresponding to data_in

[35] ), 0111110 (corresponding to data_in

[36] ), 1001111 (corresponding to data_in

[37] ), 1100111 (corresponding to data_in

[38] ), and 1111001 (corresponding to data_in

[39] ). The probability of these selected error correction codes distributing binary 1s on different bit positions tends to be balanced.

[0090] Specifically, in step B3, the method of obtaining the score value corresponding to the current error correction code by calculating the sum of the absolute values ​​of the differences between the count value of the currently traversed bit and the count values ​​of each subsequent traversed bit includes: whenever the currently traversed bit is updated from a bit in the current error correction code to a higher or lower bit in the current error correction code, the absolute value of the difference between the count value of the currently traversed bit and the count values ​​of each subsequent traversed bit is calculated, and then the absolute values ​​of the differences between the count values ​​of the currently traversed bit and the count values ​​of each subsequent traversed bit are summed to obtain the cyclic score value. It is worth noting that when calculating the absolute value of the difference between the count values ​​of two bits, the currently traversed bit and each subsequent traversed bit do not change. It is a cyclic score value for a single currently traversed bit obtained by selecting one bit in the previous traversal and calculating the absolute value of the difference between the count values ​​of the remaining bits, but it is not the only score value in the previous traversal.

[0091] Based on this, if the currently traversed bit has successively updated all bits of the current error correction code, the number of successively calculated cyclic scores is equal to the bit width required by the current error correction code. The successively calculated cyclic scores are then added together to obtain the score corresponding to the current error correction code. During the traversal of each bit of the current error correction code, each time the currently traversed bit updates one bit of the current error correction code, a cyclic score is calculated and recorded as the cyclic score of the currently traversed bit. This continues until all bits of the current error correction code have been updated. Then, all pre-calculated cyclic scores are accumulated to obtain the score for a single current error correction code. This score is used to measure the balance of the bit counts in the current error correction code.

[0092] In addition, in cases where the score value needs to be as small as possible, the smallest cyclic score value can be selected from the successively calculated cyclic score values ​​as the score value corresponding to the current error correction code.

[0093] As one embodiment, whenever the score value corresponding to the current error correction code is calculated, for the count value of each bit of the current error correction code, the difference between the maximum count value and the minimum count value is calculated. In fact, the absolute value of the maximum difference between the count values ​​of different bits in the same error correction code is calculated, and then the difference is set as the current bit count span, which can be understood as the effective count range generated by the count in one round of traversal.

[0094] When the score corresponding to the current error correction code is less than the preset minimum score, the score corresponding to the current error correction code is updated to the preset minimum score, and the current bit count span is updated to the preset bit count span to expand the counting range of bits for the error correction code in the remaining error correction code set; and the current error correction code is added to the optimal error correction code set to start adding the number of candidate error correction codes with the lowest scores from the remaining error correction code set to the optimal error correction code set.

[0095] It should be noted that the preset minimum score is the minimum score corresponding to the predetermined error correction code, and the minimum score can be updated according to the error correction codes that have been traversed; preferably, each bit of the error correction code corresponding to the minimum score is a binary 1.

[0096] The preset bit count span is the minimum absolute value of the maximum difference between the count values ​​of two bits in the same error correction code. The minimum absolute value of the maximum difference between the count values ​​of two bits can be updated based on each bit of the error correction code that has been traversed.

[0097] When the score corresponding to the current error correction code is equal to the preset minimum score and the current bit count span is less than the preset bit count span, the score corresponding to the current error correction code is updated to the preset minimum score, and the current bit count span is updated to the preset bit count span to expand the counting range of bits for the error correction code in the remaining error correction code set; and the current error correction code is added to the optimal error correction code set to start adding the number of candidate error correction codes with the lowest scores from the remaining error correction code set to the optimal error correction code set.

[0098] Preferably, the method for calculating the required bit width of the error correction code based on the bit width of the data to be verified includes: firstly, determining the relationship between the required bit width of the error correction code and the bit width of the data to be verified as 2^(ecc_width-1)-ecc_width>data_width, where data_width is the bit width of the data to be verified, and ecc_width is the required bit width of the error correction code; the relationship between the required bit width of the error correction code and the bit width of the data to be verified is obtained by calling a calculation function program in a mathematical function library. Then, substituting a predetermined value of data_width into the aforementioned relationship, the obtained ecc_width is greater than or equal to the reference bit width, and then setting the reference bit width as the required bit width of the error correction code.

[0099] Schematic, a predetermined data_width of 40 bits is used. After inputting data_width into the formula relating the required bit width of the error correction code to the bit width of the data to be verified, ecc_width is repeatedly increased starting from 0 bits until it is greater than or equal to 7 bits, satisfying 2^(ecc_width-1)-ecc_width>data_width. Therefore, the baseline bit width is 7 bits. Finally, the required bit width ecc_width of the error correction code is configured to 7 bits. Thus, based on the exponential relationship between the required bit width of the error correction code and the bit width of the data to be verified, the required bit width of the error correction code is determined from the predetermined bit width of the data to be verified.

[0100] Based on the foregoing embodiments, this application also discloses a chip for executing the data error correction method based on the optimal error correction code set described in the foregoing embodiments. The execution form here includes embedding the data error correction method into a software program for the control unit built into the chip to call and execute, or it can be executed by defining it as a hardware logic module (compiled and mapped into a corresponding logic calculation circuit by a hardware language for execution).

[0101] The chip can be divided into an encoding unit and a decoding unit. The encoding unit, when selecting the optimal error correction code set, encodes pre-correction data based on the bit position of the binary 1 in the error correction code corresponding to the data to be verified within the optimal error correction code set. Specifically, when encoding the i-th bit of the pre-correction data, the data at the i-th bit of the error correction code corresponding to each bit involved in encoding in the data to be verified (equivalent to being aligned with the i-th bit of the pre-correction data) is equal to binary 1, but not allowed to be equal to binary 0. Thus, the encoding unit utilizes the relevant bits of the data to be verified to encode the error correction code, allowing the relevant bits in the data to be verified to participate in the verification. It also identifies the bits in the data to be verified that need to be calculated and detected (i.e., the bits to be verified) according to the bit position of the corresponding binary 1 in the error correction code, and then encodes the error correction code corresponding to the bits in the data to be verified for calculation and detection as the pre-correction data. The decoding unit is used to locate a single-bit error based on the XOR result between the pre-corrected error data and the pre-obtained reference check data, as well as the optimal error correction code set. It then indexes the bit containing the single-bit error from the optimal error correction code set and inverts the data at that bit to obtain the corrected data. From a logic circuit perspective, the encoded pre-corrected error data and the reference check data are input to an XOR gate for XOR operation. Based on the error correction code indexed in the optimal error correction code set according to the XOR result, a single-bit error is located in the data to be checked or the reference check data. The bit containing the single-bit error is then input to a NOT gate for logical inversion. Overall, this is equivalent to a decoding operation on the encoded pre-corrected error data, i.e., indexing the bit containing the single-bit error from the optimal error correction code set and inverting it for correction. In summary, the chip disclosed in this application locates a single-bit error based on the XOR result and its index result in the optimal error correction code set. Then, it inverts and corrects the erroneous bits in the reference check data and the data to be checked, and outputs them in parallel. This achieves the correction of data with single-bit errors within the pre-designed maximum error correction capability (when the data to be checked or the reference check data has an error in the memory and the number of erroneous bits is 1).

[0102] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them; although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications can still be made to the specific implementation of the present invention or equivalent substitutions can be made to some technical features without departing from the spirit of the technical solutions of the present invention, and all such modifications and substitutions should be covered within the scope of the technical solutions claimed in the present invention.

Claims

1. A data error correction method based on an optimal error correction code set, characterized in that, Data error correction methods include: Calculate the required bit width of the error correction code based on the bit width of the data to be verified; Based on the required bit width of the error correction code, an error correction code library is constructed, which includes error correction codes. Select the optimal error correction code from the error correction code library; Based on the bit position of the binary 1 in the error correction code corresponding to the data to be verified in the optimal error correction code set, pre-correction data is encoded so that when the i-th bit of the pre-correction data is encoded, the data in the i-th bit of the error correction code corresponding to each bit of the data to be verified is equal to binary 1. Based on the XOR result between the pre-correction data and the pre-obtained reference verification data, and the optimal error correction code set, the single bit error is located. When indexing to the bit with a single-bit error from the optimal error correction code set, the data at the bit with the single-bit error is inverted to obtain the corrected data; wherein the data at the bit with the single-bit error is located in the reference check data or the data to be checked.

2. The data error correction method according to claim 1, characterized in that, When the error correction code corresponding to one of the bits of the data to be verified is the XOR result from the index within the optimal error correction code set, it is determined that a single bit error has occurred in one of the bits of the data to be verified. Then, the data in one of the bits of the data to be verified is inverted while keeping the data in the other bits of the data to be verified unchanged, to obtain the corrected data to be verified. Then, the reference verification data and the corrected data to be verified are driven to be output in parallel.

3. The data error correction method according to claim 1, characterized in that, When the error correction code corresponding to one of the bits in the reference check data indexed from the optimal error correction code set is the XOR result, according to the bit position of the binary 1 of the corresponding error correction code in the optimal error correction code set, the bit position where the single bit error occurs is located from the reference check data, and then the data at the bit position where the single bit error occurs is inverted while keeping the data at other bits in the reference check data unchanged, to obtain the corrected reference check data; Then the corrected reference verification data and the data to be verified are output in parallel. Wherein, the bit width of the reference check data, the bit width of the XOR result, and the bit width required by the error correction code are equal, so that each bit of the reference check data is aligned with each bit of the corresponding error correction code; in the error correction code corresponding to each bit of the reference check data, there is only one bit that is binary 1.

4. The data error correction method according to claim 2 or 3, characterized in that, The method for locating single-bit errors based on the XOR result between the pre-correction data and the pre-obtained reference verification data, and the optimal error correction code set, includes: The pre-correction data is XORed with the pre-obtained reference verification data to obtain the XOR result. If every bit of the XOR result is equal to binary 0, then it is determined that neither the reference check data nor the data to be checked has any errors. If the XOR result is an error-correcting code within the optimal error-correcting code set, then it is determined that the bit corresponding to the XOR result has a single-bit error. Wherein, the bit corresponding to the XOR result is a bit of the reference check data or a bit of the data to be checked; If the XOR result is neither any of the error correction codes in the optimal error correction code set, and each bit of the XOR result is not equal to binary 0, then it is determined that there is a two-bit error in the data to be verified and / or the reference verification data. The error correction codes in the optimal error correction code set include the error correction codes corresponding to each bit of the reference verification data and the error correction codes corresponding to each bit of the data to be verified; each bit of any error correction code in the optimal error correction code set is not equal to binary 0.

5. The data error correction method according to claim 4, characterized in that, The method for encoding pre-corrected data based on the bit position of the binary 1 in the error correction code corresponding to the data to be verified in the optimal error correction code set includes: In addition to the error correction codes corresponding to the reference verification data, all error correction codes whose data at the i-th bit is binary 1 are indexed from the optimal error correction code set, and then the indexed error correction codes are marked as error correction codes to be mapped. According to the mapping relationship between each bit of the data to be verified and the error correction code in the optimal error correction code set, the corresponding bits in the data to be verified are indexed using the error correction code to be mapped. The data at each corresponding bit in the data to be verified is XORed, and the result of the XOR operation is marked as the ith bit encoded data. The data to be verified corresponding to the error correction code where the data at the ith bit is equal to the binary 1 is obtained by participating in the XOR operation. Here, the data to be verified is the bit in the data to be verified that corresponds to the error correction code where the data at the ith bit is equal to the binary 1. Where i is an integer, i is less than or equal to the difference between the bit width required by the error correction code and decimal 1, and i is greater than or equal to 0; the ith bit encoded data is the data on the ith bit of the pre-error correction data; The mapping relationship between each bit of the data to be verified and the error correction code in the optimal error correction code set is pre-configured; the optimal error correction code set is set in the storage array, and the error correction code corresponding to each bit of the data to be verified is stored in the address corresponding to the storage array. The bit width of the pre-correction data is equal to the bit width required for the error correction code.

6. The data error correction method according to claim 5, characterized in that, Each time i increments, in addition to the error correction code corresponding to the reference check data, all error correction codes whose data at the (i+1)th bit is binary 1 are indexed from the optimal error correction code set, and the indexed error correction codes are marked as error correction codes to be mapped; then, according to the mapping relationship between each bit of the data to be checked and the error correction codes in the optimal error correction code set, the corresponding bits in the data to be checked are indexed using the error correction codes to be mapped; then, the data at the corresponding bits in the data to be checked are XORed, and the result of the XOR operation is marked as the (i+1)th bit encoded data, where the (i+1)th bit encoded data is the (i+1)th bit data of the pre-error correction data; until i increments to m, the 0th bit encoded data to the mth bit encoded data are combined to form the pre-error correction data, where each increment of i is incremented by a decimal 1; Wherein, the difference between the bit width required for the error correction code and decimal 1 is m, where m is an integer; In this optimal error correction code set, the number of binary 1s in each error correction code is odd.

7. The data error correction method according to claim 4, characterized in that, The method for assembling an error correction code library based on the required bit width of the error correction code includes: Step A1: Ensure that the number of binary 1s in the error correction code is odd, then set the number of binary 1s in the error correction code to j; then configure j to be equal to decimal 1, and then execute step A2. Step A2: Determine whether j is less than or equal to the bit width required for the error correction code. If yes, proceed to step A3; otherwise, confirm that the error correction code library combination is complete and obtain all error correction codes in the error correction code library. Step A3: Control the j binary 1s to be configured in different bits of the error correction code and form an error correction code. Then add the current error correction code to the error correction library. Continue until the j binary 1s are configured in different bit orders to complete all bits of the error correction code, and obtain each error correction code configured in different bit orders of the j binary 1s. Then execute step A4. Step A4: Control j to increment once, where each increment of j adds a decimal 2; then execute step A2.

8. The data error correction method according to claim 7, characterized in that, The method for selecting the optimal set of error-correcting codes from the error-correcting code library includes: By executing steps A2 to A4 to drive j to increment multiple times, each time error correction codes configured with j binary 1s in different bit orders are obtained by executing step A3, the number of error correction codes obtained in step A3 is counted until the cumulative number of error correction codes is greater than the sum of the bit width of the data to be verified and the bit width of the reference verification data. The number of error correction codes counted when all bits of the error correction codes are configured with j-2 binary 1s in different bit orders is selected as the selected number, and the selected number of error correction codes are added to the optimal error correction code set. Then, the difference between the bit width of the data to be verified and the selected number is calculated to obtain the candidate number. Then, from the error correction codes configured with j binary 1s in different bit orders, the candidate number of error correction codes are selected, and the candidate number of error correction codes are added to the optimal error correction code set to form all the error correction codes in the optimal error correction code set. The number of error correction codes required in the optimal error correction code set is equal to the sum of the bit width of the data to be verified and the bit width required for the error correction codes; the bit width required for the error correction codes is less than the bit width of the data to be verified.

9. The data error correction method according to claim 8, characterized in that, After executing step A3 to configure a binary 1 into the bits of the error correction code in different bit orders, the number of different error correction codes obtained is equal to the bit width required for the error correction code. The different error correction codes obtained are the error correction codes corresponding to each bit of the reference check data. Then, the error correction codes corresponding to each bit of the reference check data are selected and added to the optimal error correction code set.

10. The data error correction method according to claim 8, characterized in that, The method for selecting the number of candidate error correction codes from the j binary 1s configured in different bit orders includes: Step B1: Iterate through each bit of each error correction code in the remaining error correction code set. When iterating through the current error correction code, execute step B2. Here, the current error correction code is an error correction code that has been traversed in the current round in the remaining error correction code set. The remaining error correction code set is composed of each error correction code configured with j binary 1s in different bit order when the number of error correction codes obtained during the execution of steps A2 to A4 is greater than the sum of the bit width of the data to be verified and the bit width of the reference verification data for the first time. Step B2: If a binary 1 appears in a bit of the current error correction code, count the bit being traversed and mark it as the count value of the bit being traversed. Then, control the bit being traversed to update the count values ​​of each bit in the current error correction code in turn. Then, execute step B3. Step B3: During the process of traversing each bit of the current error correction code, the score corresponding to the current error correction code is obtained by summing the absolute values ​​of the differences between the count values ​​of the currently traversed bit and the count values ​​of the subsequently traversed bits, and it is determined that one round of traversal of the error correction code has been completed; then proceed to step B4. Step B4: Determine whether all error correction codes in the remaining error correction code set have been traversed. If yes, proceed to step B5; otherwise, update one of the error correction codes in the next round of traversal in the remaining error correction code set to the current error correction code, and then proceed to step B2. Step B5: Sort the scores of all the traversed error correction codes in the remaining error correction code set according to the size of the scores, and then select the error correction codes corresponding to the candidate number of scores with the highest or lowest scores to add to the optimal error correction code set.

11. The data error correction method according to claim 10, characterized in that, In step B3, the method of obtaining the score corresponding to the current error correction code by summing the absolute values ​​of the differences between the count values ​​of the currently traversed bits and the count values ​​of each subsequently traversed bit includes: Whenever the currently traversed bit is updated from a bit in the current error correction code to a higher or lower bit in the current error correction code, the absolute value of the difference between the count value of the currently traversed bit and the count values ​​of each subsequent traversed bit is calculated. Then, the absolute values ​​of the differences between the count values ​​of the currently traversed bit and the count values ​​of each subsequent traversed bit are summed to obtain the cyclic score. If the currently traversed bits have successively updated all bits of the current error correction code, then for the same current error correction code, the number of successively calculated cyclic scores is equal to the bit width required by the current error correction code, and the successively calculated cyclic scores are added together to obtain the score corresponding to the current error correction code.

12. The data error correction method according to claim 1, characterized in that, The method for calculating the required bit width of the error correction code based on the bit width of the data to be verified includes: First, the relationship between the bit width required for the error correction code and the bit width of the data to be verified is determined as 2^(ecc_width-1)-ecc_width>data_width, where data_width is the bit width of the data to be verified and ecc_width is the bit width required for the error correction code. Then, the predetermined value of data_width is substituted into the aforementioned relation to obtain ecc_width, which is greater than or equal to the reference bit width. The reference bit width is then set as the bit width required by the error correction code.

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