Method and device for generating board card design file and related equipment
By performing readability level analysis on the functional modules of the circuit board and using a differentiated design method to generate circuit board design documents, the problem of low circuit board design efficiency was solved, and more efficient and accurate circuit board design was achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HAIGUANG INTEGRATED CIRCUIT DESIGN (BEIJING) CO LTD
- Filing Date
- 2026-01-12
- Publication Date
- 2026-05-08
AI Technical Summary
Existing board designs are inefficient, especially as the number of chip pins increases, the design workload rises significantly, leading to an increased risk of design errors.
By analyzing the requirements of each functional module in the board to be designed, its readability level is determined, and a first design file and a second design file that meet different readability levels are generated. The corresponding design files are generated by using schematic design and pin connection relationship design rules, and then merged to generate the target design file.
It improves the efficiency of generating board design files, reduces design errors, shortens the design cycle, and improves the overall efficiency of board design.
Smart Images
Figure CN121997875A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit board technology, specifically to a method, apparatus, and related equipment for generating circuit board design documents. Background Technology
[0002] Circuit boards are used to connect scattered electronic components (such as chips, resistors, capacitors, connectors, etc.) into complete circuits through wires, enabling the transmission and processing of electrical signals. Circuit board design mainly consists of three stages: schematic design, generating circuit board design files, and component placement and routing.
[0003] However, the design efficiency of current circuit boards still needs to be improved. Summary of the Invention
[0004] In view of this, embodiments of this application provide a method, apparatus, and related equipment for generating board design documents to improve board design efficiency.
[0005] To achieve the above objectives, the embodiments of this application provide the following technical solutions.
[0006] In a first aspect, embodiments of this application provide a method for generating board design documents, including: Analyze the requirements of each functional module in the board to be designed, and generate module requirement analysis results; Based on the results of the module requirements analysis, the readability level of the functional module is determined; Based on readability levels, a first design file and a second design file are generated; wherein, the first design file corresponds to a functional module that meets the first readability level, and the second design file corresponds to a functional module that meets the second readability level; wherein, the readability of the first readability level is higher than that of the second readability level; The first design file and the second design file are merged to generate the target design file.
[0007] Optionally, compared to the second readability level, the first readability level must satisfy at least one of the following conditions: The number or variety of functions exceeds the requirements of the second readability level; The algorithm complexity exceeds the requirements of the second readability level; The signal integrity exceeds the requirements of the second readability level. The timing strictness is higher than the requirements of the second readability level; The frequency of debugging, optimization, or maintenance is higher than the requirements of the second readability level.
[0008] Optionally, generating the first design file and the second design file based on the readability level includes: For functional modules that meet the first readability level, the first design file is generated using schematic design. For functional modules that meet the second readability level, a second design file is generated by analyzing the design rules of the module pin connection relationship.
[0009] Optionally, the step of generating a second design file by analyzing the design rules of the module pin connection relationships includes: Determine the design principles for the pin connection relationships of functional modules; The pin information of the functional module is processed, and a second design file is generated.
[0010] Optionally, the design principles for the module pin connection relationships include: Adjacent pins are connected in pairs; The pins used for connecting to the power supply are connected to the same power supply.
[0011] Secondly, embodiments of this application provide an apparatus for generating board design documents, comprising: The analysis module is used to analyze the requirements of each functional module in the board to be designed and generate module requirement analysis results; The judgment module is used to determine the readability level of the functional module based on the results of the module requirements analysis. A generation module is used to generate a first design file and a second design file based on a readability level; wherein the first design file corresponds to a functional module that meets a first readability level, and the second design file corresponds to a functional module that meets a second readability level; wherein the readability of the first readability level is higher than that of the second readability level. The merging module is used to merge the first design file and the second design file to generate the target design file.
[0012] Optionally, compared to the second readability level, the first readability level must satisfy at least one of the following conditions: The number or variety of functions exceeds the requirements of the second readability level; The algorithm complexity exceeds the requirements of the second readability level; The signal integrity exceeds the requirements of the second readability level. The timing strictness is higher than the requirements of the second readability level; The frequency of debugging, optimization, or maintenance is higher than the requirements of the second readability level.
[0013] Optionally, the generation module includes a first generation module and a second generation module; The first generation module is used to generate a first design file for functional modules that meet the first readability level through schematic design. The second generation module is used to generate a second design file for functional modules that meet the second readability level by analyzing the design rules of the module pin connection relationship.
[0014] Optionally, the design principles for the module pin connection relationships include: Adjacent pins are connected in pairs; The pins used for connecting to the power supply are connected to the same power supply.
[0015] Thirdly, embodiments of this application provide an electronic device, including at least one memory and at least one processor, wherein the memory stores one or more computer-executable instructions, and the processor invokes the one or more computer-executable instructions to execute the method for generating board design documents as described in the first aspect above.
[0016] Fourthly, embodiments of this application provide a storage medium that stores one or more computer-executable instructions, which, when executed, implement the method for generating board design documents as described in the first aspect above.
[0017] Fifthly, embodiments of this application provide a computer program product including one or more computer-executable instructions, which, when executed, implement the method for generating board design documents as described in the first aspect above.
[0018] This application provides a method, apparatus, and related equipment for generating board design documents. The method includes: analyzing the requirements of each functional module in the board to be designed, generating module requirement analysis results; determining the readability level of the functional modules based on the module requirement analysis results; generating a first design document and a second design document based on the readability level; wherein the first design document corresponds to a functional module that meets a first readability level, and the second design document corresponds to a functional module that meets a second readability level; wherein the readability of the first readability level is higher than that of the second readability level; and merging the first design document and the second design document to generate a target design document.
[0019] As can be seen, the method for generating board design files provided in this application determines the readability level of the functional modules based on the module requirements analysis results, and then generates a first design file for the functional modules that meet the first readability level and a second design file for the functional modules that meet the second readability level based on the readability level. By differentiating the design tasks through readability grading, the efficiency of generating board design files is improved, thereby improving the efficiency of board design. Attached Figure Description
[0020] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0021] Figure 1 This is an optional flowchart for designing a circuit board; Figure 2 This is an optional flowchart illustrating the method for generating board design documents provided in the embodiments of this application; Figure 3 This is an optional flowchart of step S300 provided in the embodiments of this application; Figure 4 This is a first structural schematic diagram of the module pin connection relationship provided in the embodiments of this application; Figure 5 This is a schematic diagram of an optional structure for a complete power supply test provided in an embodiment of this application; Figure 6 This is a second structural schematic diagram of the module pin connection relationship provided in the embodiments of this application; Figure 7 This is a schematic diagram of an optional structure of the apparatus for generating board design documents provided in the embodiments of this application; Figure 8 This is an optional block diagram of the electronic device provided in the embodiments of this application. Detailed Implementation
[0022] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0023] As described in the background section, circuit boards are used to connect disparate electronic components (such as chips, resistors, capacitors, connectors, etc.) into a complete circuit via wires, enabling the transmission and processing of electrical signals. Circuit board design mainly consists of three stages: schematic design, generating circuit board design files, and component placement and routing.
[0024] For details, please refer to Figure 1 The example shown is an optional flowchart for designing a circuit board. Currently, when designing a circuit board, the first step is to design a schematic diagram. After the schematic diagram is completed, a circuit board design file is generated based on the designed schematic diagram. Then, the component layout and routing are performed based on the circuit board design file.
[0025] However, the inventors' analysis revealed that while the functional modules of the board in the above solution are presented in schematic diagram form, which offers good readability, in practical applications, there exists a type of board where some functional modules have lower readability requirements and exhibit obvious patterns, yet the design workload is quite heavy. Especially as the number of chip pins continues to increase, the workload of board schematic design rises dramatically. If the above solution is still used to design the board, it not only leads to low design efficiency but also significantly increases the risk of design errors in the schematic diagram.
[0026] It is evident that the design efficiency of circuit boards still needs to be improved.
[0027] In view of this, embodiments of this application provide a method, apparatus, and related equipment for generating board design documents. The method for generating board design documents includes: analyzing the requirements of each functional module in the board to be designed, and generating module requirement analysis results; determining the readability level of the functional modules based on the module requirement analysis results; generating a first design document and a second design document based on the readability level; wherein the first design document corresponds to a functional module that meets a first readability level, and the second design document corresponds to a functional module that meets a second readability level; wherein the readability of the first readability level is higher than that of the second readability level; and merging the first design document and the second design document to generate a target design document.
[0028] As can be seen, the method for generating board design files provided in this application determines the readability level of the functional modules based on the module requirements analysis results, and then generates a first design file for the functional modules that meet the first readability level and a second design file for the functional modules that meet the second readability level based on the readability level. By differentiating the design tasks through readability grading, the efficiency of generating board design files is improved, thereby improving the efficiency of board design.
[0029] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.
[0030] refer to Figure 2 , Figure 2 This is a schematic diagram of an optional process for generating board design files provided in an embodiment of this application. For example... Figure 2 As shown, the method may include the following steps: Step S100: Analyze the requirements of each functional module in the board to be designed and generate module requirement analysis results.
[0031] The requirements of each functional module in the design board are analyzed to clarify the specific role, performance indicators, interface requirements and other key information of each functional module in the board, so as to provide a basis and basis for subsequent design work.
[0032] In an optional implementation, the analysis of the requirements for each functional module in the board under design may include: determining the specific functions that the functional module needs to perform. For example, for a signal processing module in a communication board, it is necessary to clarify whether it performs operations such as filtering, amplification, modulation, or demodulation on a specific type of signal. Analyzing the requirements of the functional module in terms of speed, accuracy, power consumption, and stability. For example, what is the required data throughput (in megabytes per second) and computational accuracy (in bits) for a data processing module? Determining the connection method and signal type between the functional module and other functional modules or external devices on the board. For example, whether the functional module communicates with other functional modules via a parallel bus or a serial bus, the interface level standard, and data transmission protocol. Analyzing the operating requirements of the functional module under environmental conditions such as temperature, humidity, and electromagnetic interference. For example, functional modules of some industrial application boards may need to operate normally over a wide temperature range.
[0033] After analyzing the requirements of each functional module in the design board, module requirement analysis results can be generated. These results can be presented in document form, detailing the requirements of each functional module to provide a basis for subsequent readability level assessment.
[0034] Step S200: Based on the module requirements analysis results, determine the readability level of the functional module.
[0035] Based on the requirements and characteristics of each functional module, determine its readability level so as to generate design documents through appropriate design methods and improve design efficiency.
[0036] In an optional implementation, the readability level of the functional module may include a first readability level and a second readability level, wherein the first readability level is more readable than the second readability level. Specifically, compared to the second readability level, the first readability level satisfies at least one of the following conditions: the number or types of functions are greater than the requirements of the second readability level; the algorithm complexity is greater than the requirements of the second readability level; the signal integrity is greater than the requirements of the second readability level; the timing strictness is greater than the requirements of the second readability level; and the frequency of debugging, optimization, or maintenance is greater than the requirements of the second readability level.
[0037] Understandably, functional modules with a large number or variety of functions or requiring complex algorithms typically have high readability requirements. For example, an image recognition module that integrates artificial intelligence algorithms, due to its complex algorithms and numerous signal processing steps, should be classified as having the highest readability level.
[0038] For functional modules with strict requirements for signal integrity and timing, their readability level should be determined as Level 1 readability. For example, in high-speed communication modules, even minor changes in the signal can lead to communication errors, so their readability level should be determined as Level 1 readability.
[0039] If a functional module requires frequent debugging, optimization, or maintenance during subsequent use, its readability level should be determined as Level 1 readability. For example, some programmable logic modules may require reconfiguration and debugging based on actual needs, and their readability level should be determined as Level 1 readability.
[0040] For functional modules with standardized functions, strong design regularity, and predictable failure modes, their readability level can be lower. For example, some general-purpose power conversion modules, whose design follows fixed topologies and parameter calculation methods, should be classified as second-level readability.
[0041] Step S300: Generate a first design file and a second design file based on the readability level.
[0042] In this embodiment, the first design file corresponds to a functional module that meets a first readability level, and the second design file corresponds to a functional module that meets a second readability level. This application differentiates design tasks through readability grading, thereby improving the efficiency of generating board design files and ultimately improving the overall board design efficiency.
[0043] In the specific implementation, refer to Figure 3 The exemplary schematic diagram of step S300 shows an optional process flow. Step S300, which generates a first design file and a second design file based on readability levels, may include: Step S301: For functional modules that meet the first readability level, generate the first design file through schematic design.
[0044] For functional modules that meet the first readability level, due to their complex circuit structure, critical functions, or the need for frequent debugging and optimization, schematic design is adopted. Schematic diagrams use graphical symbols to represent various electronic components (such as resistors, capacitors, integrated circuits, etc.) and use lines to represent the electrical connections between components.
[0045] After completing the schematic design, Electronic Design Automation (EDA) tools can be used to convert the schematic into a first design file. This first design file can be a netlist file, which is a text file that describes the connection relationships between various components in the circuit, including the pin connection information of the components.
[0046] For functional modules that meet the first readability level, the first design file is generated using schematic design. Schematics graphically represent the circuit structure, facilitating designers' understanding and analysis of circuit functions and signal flow, and aiding in circuit debugging, optimization, and documentation. Furthermore, schematic design allows for precise design of every detail of the circuit, ensuring that circuit performance meets requirements. For example, in high-speed digital circuit design, schematics allow for precise setting of signal transmission paths, impedance matching, and other parameters.
[0047] Step S302: For functional modules that meet the second readability level, a second design file is generated by analyzing the design rules of the pin connection relationship of the functional modules.
[0048] Functional modules that meet the second readability level typically have strong design regularity and relatively fixed functions, such as some standard interface circuits and power supply modules. Unlike functional modules that meet the first readability level, these modules do not require detailed schematic design for understanding and analysis. Instead, the second design document can be efficiently generated by analyzing the design regularities of the pin connections within the functional module.
[0049] In an optional implementation, the step of generating a second design file by analyzing the design rules of the pin connection relationship of the functional modules may include: determining the design rules of the pin connection relationship of the functional modules; processing the pin information of the functional modules; and generating a second design file.
[0050] The design principles for the connection relationships of the module pins may include: Adjacent pins are connected in pairs. For example... Figure 4 As shown, when designing the schematic of a chip, its pins can be divided into multiple links (such as...). Figure 4As shown in chip link A and chip link B, each link follows specific design rules for schematic design. It can be seen that regardless of the number of pins in each link, adjacent pins are connected in pairs. When the number of chip pins is large, creating chip symbols or performing schematic connection operations becomes quite cumbersome. Therefore, after determining the design rules for the pin connection relationships of functional modules, the pin information of the functional modules can be directly processed to generate a second design file. The second design file can be a netlist file, where the corresponding... Figure 4 The second design file for the structure can be shown in Table 1 below.
[0051] Table 1: First Example Table of Second Design Document
[0052] Pins used for power connection are connected to the same power source. In power supply testing scenarios, multiple boards are often required to collaboratively build the entire test environment. To save development costs, such as... Figure 5 As shown, test boards 2 and 3 are typically designed as universal boards to meet various testing needs. Test boards 1 and 2 are connected via a specific interface. Based on this design architecture, as long as the interface of test board 1 remains unchanged, when the chip under test changes, only the chip-related schematic on test board 1 needs to be updated.
[0053] Since this is a power supply test, only the chip's power supply pins need to be monitored; other pins can be left floating, and the pin definitions of the external connectors connected to them remain fixed. Typically, chips involve multiple power supply types (such as...). Figure 6 As shown in the diagram (chip power supply A and chip power supply B), it can be seen that as long as the pins belong to the same power supply type, they can be directly connected.
[0054] After determining the design rules for the pin connections of the functional modules, the pin information of the functional modules can be directly processed to generate a second design file. This second design file can be a netlist file, where the corresponding pins are... Figure 6 The second design file for the structure can be shown in Table 2 below, for example.
[0055] Table 2: Second Example Table of Second Design Document
[0056] By analyzing the design rules of the pin connection relationships of functional modules, a second design file is generated, avoiding the tedious process of drawing detailed schematics for functional modules that meet the second readability level. This improves design efficiency, especially in large-scale circuit design, which can significantly shorten the design cycle, reduce human design errors, and ensure the accuracy and reliability of the design.
[0057] refer to Figure 2 Continue with step S400, merging the first design file and the second design file to generate the target design file.
[0058] After generating a first design file for a functional module that meets the first readability level and a second design file for a functional module that meets the second readability level, the first design file and the second design file can be merged to generate a target design file.
[0059] Specifically, during the layout stage of board design, electronic design automation (EDA) tools can be used to import the first and second design files. Then, the EDA tools can be used to merge the imported first and second design files to generate the target design file. During the merging process, the tool will integrate the circuit connections of functional modules that meet the first readability level and those that meet the second readability level, based on the pin connection information described in the design files, to form a complete board design file.
[0060] The target design file contains component layout information for all functional modules on the entire board, as well as the electrical connections between these modules, providing a comprehensive data foundation for subsequent component placement and routing. Designers can use this target design file to perform the actual board layout design (determining the location of components on the board) and routing design (planning the traces between component pins), ultimately completing the entire board design.
[0061] As can be seen, the method for generating board design files provided in this application determines the readability level of the functional modules based on the module requirements analysis results, and then generates a first design file for the functional modules that meet the first readability level and a second design file for the functional modules that meet the second readability level based on the readability level. By differentiating the design tasks through readability grading, the efficiency of generating board design files is improved, thereby improving the efficiency of board design.
[0062] The apparatus for generating board design documents provided in the embodiments of this application will be described below. The apparatus for generating board design documents described below can be considered as a software or hardware functional module required to implement the method for generating board design documents provided in the embodiments of this application. The content of the apparatus for generating board design documents described below can be referred to in correspondence with the content of the method described above.
[0063] In an optional implementation, Figure 7 An exemplary schematic diagram of an optional structure of the apparatus for generating board design files provided in an embodiment of this application is shown, such as... Figure 7 As shown, the device may include: Analysis module 11 is used to analyze the requirements of each functional module in the board to be designed and generate module requirement analysis results; The judgment module 12 is used to determine the readability level of the functional module based on the module requirement analysis results; The generation module 13 is used to generate a first design file and a second design file based on a readability level; wherein the first design file corresponds to a functional module that meets a first readability level, and the second design file corresponds to a functional module that meets a second readability level; wherein the readability of the first readability level is higher than that of the second readability level. The merging module 14 is used to merge the first design file and the second design file to generate a target design file.
[0064] Optionally, compared to the second readability level, the first readability level must satisfy at least one of the following conditions: The number or variety of functions exceeds the requirements of the second readability level; The algorithm complexity exceeds the requirements of the second readability level; The signal integrity exceeds the requirements of the second readability level. The timing strictness is higher than the requirements of the second readability level; The frequency of debugging, optimization, or maintenance is higher than the requirements of the second readability level.
[0065] Optionally, the generation module 13 includes a first generation module 131 and a second generation module 132; The first generation module 131 is used to generate a first design file for functional modules that meet the first readability level through schematic design. The second generation module 132 is used to generate a second design file for functional modules that meet the second readability level by analyzing the design rules of the module pin connection relationship.
[0066] Optionally, the step of generating a second design file by analyzing the design rules of the module pin connection relationships includes: Determine the design principles for the pin connection relationships of functional modules; The pin information of the functional module is processed, and a second design file is generated.
[0067] Optionally, the design principles for the module pin connection relationships include: Adjacent pins are connected in pairs; The pins used for connecting to the power supply are connected to the same power supply.
[0068] As can be seen, the device for generating board design files provided in this application determines the readability level of the functional modules by a judgment module, and then the generation module generates a first design file for the functional modules that meet the first readability level and a second design file for the functional modules that meet the second readability level based on the readability level. By differentiating the design tasks through readability classification, the efficiency of generating board design files is improved, thereby improving the efficiency of board design.
[0069] This application also provides an electronic device that may include at least one memory and at least one processor. The memory stores one or more computer-executable instructions, and the processor invokes the one or more computer-executable instructions to execute the method for generating board design documents as described above.
[0070] As an optional implementation, refer to Figure 8 , Figure 8 This is an optional block diagram of the electronic device provided in the embodiments of this application. For example... Figure 8 As shown, the electronic device may include: at least one processor 21, at least one communication interface 22, at least one instruction memory 23 and at least one communication bus 24.
[0071] In this embodiment, the number of processor 21, communication interface 22, instruction memory 23 and communication bus 24 is at least one, and processor 21, communication interface 22 and instruction memory 23 communicate with each other through communication bus 24.
[0072] Optionally, the processor 21 may be a CPU (Central Processing Unit), GPU (Graphics Processing Unit), NPU (Neural-network Processing Unit), FPGA (Field Programmable Gate Array), TPU (Tensor Processing Unit), AI chip, ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of this application.
[0073] Optionally, the communication interface 22 can be an interface for a communication module used for network communication.
[0074] Instruction memory 23 may include high-speed RAM and may also include non-volatile memory, such as at least one disk storage device. Instruction memory 23 stores one or more computer-executable instructions, which processor 21 invokes to execute the method for generating board design documents as described above.
[0075] This application embodiment also provides a storage medium that stores one or more computer-executable instructions. When the one or more computer-executable instructions are executed, the method for generating board design files as described above is implemented.
[0076] This application also provides a computer program product, which may include one or more computer-executable instructions. When the one or more computer-executable instructions are executed, the method for generating board design documents as described above is implemented.
[0077] The foregoing describes multiple embodiment schemes provided by the embodiments of this application. The optional methods described in each embodiment scheme can be combined and cross-referenced with each other without conflict, thereby extending to a variety of possible embodiment schemes. These can all be considered as the embodiment schemes disclosed and published by the embodiments of this application.
[0078] While the embodiments disclosed above are described in this application, this application is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of this application; therefore, the scope of protection of this application should be determined by the scope defined in the claims.
Claims
1. A method for generating board design files, characterized in that, include: Analyze the requirements of each functional module in the board to be designed, and generate module requirement analysis results; Based on the results of the module requirements analysis, the readability level of the functional module is determined; Based on readability levels, a first design file and a second design file are generated; wherein, the first design file corresponds to a functional module that meets the first readability level, and the second design file corresponds to a functional module that meets the second readability level; wherein, the readability of the first readability level is higher than that of the second readability level; The first design file and the second design file are merged to generate the target design file.
2. The method for generating board design documents according to claim 1, characterized in that, Compared to the second readability level, the first readability level satisfies at least one of the following conditions: The number or variety of functions exceeds the requirements of the second readability level; The algorithm complexity exceeds the requirements of the second readability level; The signal integrity exceeds the requirements of the second readability level. The timing strictness is higher than the requirements of the second readability level; The frequency of debugging, optimization, or maintenance is higher than the requirements of the second readability level.
3. The method for generating board design documents according to claim 1, characterized in that, The process of generating a first design file and a second design file based on readability levels includes: For functional modules that meet the first readability level, the first design file is generated using schematic design. For functional modules that meet the second readability level, a second design file is generated by analyzing the design rules of the module pin connection relationship.
4. The method for generating board design documents according to claim 3, characterized in that, The process of generating a second design file by analyzing the design patterns of module pin connections includes: Determine the design principles for the pin connection relationships of functional modules; The pin information of the functional module is processed, and a second design file is generated.
5. The method for generating board design documents according to claim 3, characterized in that, The design principles for the module pin connection relationships include: Adjacent pins are connected in pairs; The pins used for connecting to the power supply are connected to the same power supply.
6. An apparatus for generating board design files, characterized in that, include: The analysis module is used to analyze the requirements of each functional module in the board to be designed and generate module requirement analysis results; The judgment module is used to determine the readability level of the functional module based on the results of the module requirements analysis. A generation module is used to generate a first design file and a second design file based on a readability level; wherein the first design file corresponds to a functional module that meets a first readability level, and the second design file corresponds to a functional module that meets a second readability level; wherein the readability of the first readability level is higher than that of the second readability level. The merging module is used to merge the first design file and the second design file to generate the target design file.
7. The apparatus for generating board design files according to claim 6, characterized in that, Compared to the second readability level, the first readability level satisfies at least one of the following conditions: The number or variety of functions exceeds the requirements of the second readability level; The algorithm complexity exceeds the requirements of the second readability level; The signal integrity exceeds the requirements of the second readability level. The timing strictness is higher than the requirements of the second readability level; The frequency of debugging, optimization, or maintenance is higher than the requirements of the second readability level.
8. The apparatus for generating board design files according to claim 6, characterized in that, The generation module includes a first generation module and a second generation module; The first generation module is used to generate a first design file for functional modules that meet the first readability level through schematic design. The second generation module is used to generate a second design file for functional modules that meet the second readability level by analyzing the design rules of the module pin connection relationship.
9. The apparatus for generating board design files according to claim 8, characterized in that, The design principles for the module pin connection relationships include: Adjacent pins are connected in pairs; The pins used for connecting to the power supply are connected to the same power supply.
10. An electronic device, characterized in that, The device includes at least one memory and at least one processor, the memory storing one or more computer-executable instructions, and the processor invoking the one or more computer-executable instructions to execute the method for generating board design documents as described in any one of claims 1 to 5.
11. A storage medium, characterized in that, The storage medium stores one or more computer-executable instructions, which, when executed, implement the method for generating board design documents as described in any one of claims 1 to 5.
12. A computer program product, characterized in that, It includes one or more computer-executable instructions, which, when executed, implement the method for generating board design documents as described in any one of claims 1 to 5.