Control circuit and display panel
By working together with the image detection module and the control branch, the ICA and OP compensation modules can be activated on demand, which solves the problems of power waste and poor compensation effect in the existing technology, and improves the performance of the display panel and the user experience.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HKC CORP LTD
- Filing Date
- 2026-04-02
- Publication Date
- 2026-06-26
AI Technical Summary
In existing technologies, operational amplifier (OP) compensation schemes cannot be flexibly started and stopped, resulting in wasted power consumption in normal scenes where compensation is not required, and poor compensation effect in some special scenes.
The screen detection module detects the degree of screen anomalies in real time. The first and second control branches are used to connect the ICA compensation module and the OP compensation module respectively, and connect them to the downstream load to realize on-demand activation and collaborative work, avoiding redundant operation.
It achieves intelligent compensation mode switching based on the degree of image anomaly, reduces system power consumption, and obtains the best compensation effect under severe anomalies, thereby improving the overall performance of the display panel and user experience.
Smart Images

Figure CN121999705B_ABST
Abstract
Description
Technical Field
[0001] This disclosure belongs to the field of display driver technology, specifically relating to a control circuit and a display panel. Background Technology
[0002] In the field of display technology, crosstalk, green screen, and other abnormal image problems are common display defects. To improve these problems, operational amplifier (OP) compensation technology is commonly used. Specifically, an operational amplifier is added to the external common electrode voltage (Vcom) generation circuit. The in-plane feedback voltage is amplified in reverse and then re-input into the plane, so that the input voltage cancels out the in-plane Vcom voltage, thereby balancing the waveform of the in-plane common voltage and reducing abnormal phenomena such as crosstalk caused by the distortion of the common voltage waveform.
[0003] However, as display refresh rates continue to increase, image anomaly issues are becoming increasingly complex. OP compensation in related technologies is a purely hardware solution; once deployed, it runs continuously and cannot be flexibly turned on or off according to changes in the image content. This results in the OP compensation circuit still operating under normal screen conditions where compensation is not required, causing unnecessary power consumption waste. Furthermore, under certain special screen conditions, relying solely on OP compensation is insufficient to achieve the desired compensation effect.
[0004] Therefore, in the process of image compensation for display panels, how to improve the image compensation effect while reducing redundant compensation power consumption has become an urgent problem to be solved. Summary of the Invention
[0005] This application provides a control circuit and a display panel. Through the coordinated operation of the screen detection module, the first control branch and the second control branch, this application realizes multiple compensation modes according to the degree of screen anomaly, including ICA compensation only, OP compensation only, and joint compensation of ICA and OP. While improving the screen compensation effect, it avoids redundant operation of the compensation function and reduces system power consumption.
[0006] In a first aspect, this application provides a control circuit applied to a display panel, the display panel including an ICA compensation module and an OP compensation module, the control circuit including: a screen detection module configured to detect the degree of abnormality of the current display screen and output a corresponding detection voltage according to the degree of abnormality; a first control branch connected to the output terminal of the screen detection module, the ICA compensation module and the subsequent load respectively, configured to: conduct the signal path between the ICA compensation module and the subsequent load when the detection voltage is in a first preset range; a second control branch connected to the output terminal of the screen detection module, the OP compensation module and the subsequent load respectively, configured to: conduct the signal path between the OP compensation module and the subsequent load when the detection voltage is in a second preset range; wherein the first preset range and the second preset range at least partially overlap, so that the first control branch and the second control branch are simultaneously turned on when the detection voltage is in the overlapping range.
[0007] Secondly, this application provides a display panel, the display panel including N display zones, and each display zone corresponding to an ICA compensation module and an OP compensation module; the display panel further includes: a mode detection circuit, configured to detect whether the current display screen is a zone combination screen, outputting a zone control signal when the current display screen is a zone combination screen, and outputting a whole-area control signal when the current display screen is a whole-area display screen; N control circuits, each control circuit having a first input terminal connected to the ICA compensation module of the corresponding zone, a second input terminal connected to the OP compensation module of the corresponding zone, and an output terminal connected to the downstream load of the corresponding zone; a mode switching circuit, connected to the mode detection circuit and the N control circuits respectively, configured to: in response to the zone control signal, transmit the detection voltage output by the screen detection module in the nth control circuit to the first control branch and the second control branch of the nth control circuit; in response to the whole-area control signal, simultaneously transmit the detection voltage output by the screen detection module in the specified control circuit to the first control branch and the second control branch of all control circuits.
[0008] The technical solution provided in this application has at least the following beneficial effects:
[0009] This application uses a screen detection module to detect the degree of abnormality of the currently displayed screen in real time and converts this degree of abnormality into a corresponding detection voltage. This achieves a unified representation from complex screen information to a single quantifiable electrical signal, laying the foundation for subsequent precise control. The first control branch responds to whether the detection voltage is within a first preset range. When the detection voltage falls within the first preset range, the signal path between the ICA compensation module and the downstream load is activated, enabling on-demand activation of ICA compensation and avoiding redundant operation of the ICA function when compensation is not needed. The second control branch responds to whether the detection voltage is within a second preset range. When the detection voltage falls within the second preset range, the signal path between the OP compensation module and the downstream load is activated, enabling on-demand activation of OP compensation and overcoming the power consumption waste caused by the inflexible start / stop of traditional OP compensation. In particular, by configuring the first and second preset ranges to at least partially overlap, the first and second control branches are simultaneously activated when the detection voltage is within the overlapping range, achieving coordinated operation of ICA compensation and OP compensation. Under severely abnormal screen conditions, both compensation methods can be activated simultaneously to obtain the best improvement effect. Attached Figure Description
[0010] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.
[0011] Figure 1 The diagram shown is a schematic diagram of a control circuit provided in an embodiment of this application.
[0012] Figure 2 The diagram shown is a schematic diagram of a first preset interval and a second preset interval provided in an embodiment of this application.
[0013] Figure 3 The diagram shown is a circuit diagram of the first control branch provided in the embodiment of this application.
[0014] Figure 4 The diagram shown is a circuit diagram of the second type of first control branch provided in an embodiment of this application.
[0015] Figure 5 The diagram shown is a schematic diagram of another first preset interval and a second preset interval provided in an embodiment of this application.
[0016] Figure 6 The diagram shown is a schematic diagram of another control circuit provided in an embodiment of this application.
[0017] Figure 7The diagram shown is a structural schematic of a display panel provided in an embodiment of this application.
[0018] Explanation of reference numerals in the attached figures:
[0019] 100. Control circuit; 110. Image detection module; 120. First control branch; 121. First interval determination unit; 122. Second interval determination unit; 130. Second control branch; 140. Blanking detection module; 101. First control circuit; 102. Second control circuit;
[0020] 200. ICA compensation module; 300. OP compensation module; 400. Subsequent stage load; 500. Mode detection circuit; 600. Mode switching circuit;
[0021] T1, first transistor; T2, second transistor; T3, third transistor; T4, fourth transistor; T5, fifth transistor; T6, sixth transistor; T7, seventh transistor; R0, pull-up resistor; R1, first resistor; R2, second resistor; U1, first comparator; U2, second comparator; D1, first diode; D2, second diode. Detailed Implementation
[0022] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.
[0023] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.
[0024] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.
[0025] Firstly, embodiments of this application provide a control circuit, specifically including the following embodiments:
[0026] Figure 1 The diagram shown is a structural schematic of a control circuit 100 provided in an embodiment of this application; as follows: Figure 1 As shown, the control circuit 100 in this embodiment is applied to the display panel of the ICA compensation module 200 and the OP compensation module 300 to intelligently schedule the activation timing of ICA compensation (image compensation algorithm) and OP compensation (operational amplifier Vcom compensation) to achieve the technical effects of on-demand compensation and reduced power consumption.
[0027] like Figure 1 As shown, the control circuit 100 in this embodiment includes a screen detection module 110, which is configured to detect the degree of abnormality of the currently displayed screen and output a corresponding detection voltage according to the degree of abnormality.
[0028] It should be noted that the screen detection module 110 in this embodiment can be integrated into the timing controller. Through built-in algorithms or hardware circuits, it can detect multiple display parameters of the currently displayed screen in real time. These multiple display parameters include at least the area of the abnormal region, the grayscale value of that region, and the screen refresh rate. Specifically, the screen detection module 110 internally presets an area threshold and a grayscale threshold. It determines the degree of abnormality of the currently displayed screen based on a comparison of the detected abnormal region's area, its grayscale value, and the screen refresh rate. The degree of abnormality includes, but is not limited to, 0 abnormality (i.e., normal screen), slight abnormality, moderate abnormality, and severe abnormality.
[0029] Furthermore, after determining the degree of anomaly, the image detection module 110 linearly converts the degree of anomaly into an analog detection voltage through a data converter (e.g., a digital-to-analog converter DAC or a voltage-controlled oscillator VCO); for example, the higher the degree of anomaly, the higher the output detection voltage value. It can be seen that this embodiment, through the image detection module 110, integrates information on whether image compensation is needed and the degree of anomaly into a single voltage signal, realizing the transformation from complex image parameters to a single, quantifiable electrical signal. This provides a unified signal basis for subsequent interval judgment and compensation decisions, simplifies circuit design, and improves the accuracy and response speed of the judgment.
[0030] like Figure 1 As shown, the control circuit 100 in this embodiment also includes a first control branch 120, which is connected to the output terminal of the image detection module 110, the ICA compensation module 200 and the downstream load 400 respectively, and is configured to: when the detected voltage is in the first preset range, conduct the signal path between the ICA compensation module 200 and the downstream load 400.
[0031] It should be noted that the first control branch 120 is connected between the output end of the screen detection module 110, the output end of the ICA compensation module 200 and the subsequent load 400 (such as a source driver chip). Its main function is to determine whether to allow the ICA compensation signal to be transmitted to the subsequent load 400 according to the value range of the detection voltage.
[0032] The first preset interval in this embodiment refers to a specific range of voltage values, which is preset by a hardware circuit (such as a comparator, interval discriminator); this first preset interval is configured as two discontinuous voltage intervals: such as Figure 2 the interval less than the first preset threshold V1 and the interval greater than the second preset threshold V2 shown (V1 < V2), that is:
[0033] (1) When the detection voltage Vi < V1, it is a slight anomaly, the first control branch 120 conducts, and the ICA compensation takes effect;
[0034] (2) When the detection voltage Vi > V2, it is a serious anomaly, the first control branch 120 conducts again, and the ICA compensation takes effect;
[0035] (3) When the detection voltage Vi is between V1 < Vi < V2, it is a relatively serious anomaly, the first control branch 120 is turned off, and the ICA compensation does not take effect.
[0036] In this embodiment, by restricting the enabling range of the ICA compensation in intervals, the power consumption waste caused by the continuous operation of the ICA function during normal or severely abnormal screens is avoided; at the same time, the ICA compensation is automatically enabled during high anomalies (Vi is too high) to ensure the screen improvement effect, realizing the on-demand start and stop of the ICA compensation and optimizing the system energy efficiency.
[0037] In this embodiment, the control circuit 100 further includes a second control branch 130, which is respectively connected to the output end of the screen detection module 110, the OP compensation module 300 and the subsequent load 400, and is configured to: conduct the signal path between the OP compensation module 300 and the subsequent load 400 when the detection voltage is within the second preset interval.
[0038] It should be noted that the second control branch 130 is connected between the output end of the screen detection module 110, the output end of the OP compensation module 300 and the subsequent load 400. Its function is similar to that of the first control branch 120, but the judgment logic is different: the second control branch 130 is configured to conduct when the detection voltage Vi is within the second preset interval, allowing the OP compensation signal to be transmitted to the subsequent load 400.
[0039] The second preset interval in this embodiment refers to another range of voltage values, such as Figure 2As shown, the second preset interval is configured as an interval greater than the third preset threshold V3; where the first preset threshold V1 < the third preset threshold V3 < the second preset threshold V2. That is:
[0040] (1) When the detected voltage Vi > V3, it is a relatively serious abnormality or a serious abnormality, the second control branch 130 is turned on, and the OP compensation takes effect;
[0041] (2) When the detected voltage Vi ≤ V3, it is a slight abnormality or a zero abnormality, the second control branch 130 is turned off, and the OP compensation does not take effect.
[0042] It should be noted that the OP compensation in this embodiment, as a hardware compensation scheme, has a relatively high power consumption. By setting the second preset interval, the OP compensation is enabled only when the degree of screen abnormality is relatively high (Vi > V3), avoiding redundant operation in low-abnormality or no-abnormality scenarios and significantly reducing the system power consumption.
[0043] It is worth noting that the first preset interval and the second preset interval in this embodiment at least partially overlap, so that the first control branch 120 and the second control branch 130 are turned on simultaneously when the detected voltage is in the overlapping interval.
[0044] In this embodiment, by reasonably configuring the threshold parameters (V1 < V3 < V2), the following interval relationships are achieved:
[0045] (1) The first preset interval: Vi < V1 or Vi > V2;
[0046] (2) The second preset interval: Vi > V3;
[0047] (3) The overlapping interval: Vi > V2 (because V2 > V3, so Vi > V2 necessarily satisfies both preset intervals).
[0048] The design of the interval overlap in this embodiment realizes the intelligent switching of three compensation modes. Specifically:
[0049] (1) Only ICA compensation mode: When the detected voltage is in the Vi < V1 interval, only the first control branch 120 is turned on, and the ICA compensation works alone;
[0050] (2) Only OP compensation mode: When the detected voltage is in the V3 < Vi < V2 interval, only the second control branch 130 is turned on, and the OP compensation works alone;
[0051] (3) ICA + OP combined compensation mode: When the detected voltage is in the Vi > V2 overlapping interval, the first control branch 120 and the second control branch 130 are turned on simultaneously, and the ICA compensation and the OP compensation work together to perform the strongest compensation for severely abnormal pictures.
[0052] In summary, this application uses the screen detection module 110 to detect the degree of abnormality of the currently displayed screen in real time and converts this degree of abnormality into a corresponding detection voltage, realizing a unified representation from complex screen information to a single quantifiable electrical signal, laying the foundation for subsequent precise control; the first control branch 120 responds to whether the detection voltage is within the first preset range, and when the detection voltage falls into the first preset range, it conducts the signal path between the ICA compensation module 200 and the downstream load 400, realizing the on-demand activation of ICA compensation and avoiding redundant operation of the ICA function when compensation is not needed; the second control branch 130 responds to... The system detects whether the voltage is within the second preset range. When the detected voltage falls within the second preset range, the signal path between the OP compensation module 300 and the subsequent load 400 is activated, enabling on-demand activation of OP compensation and overcoming the power consumption waste caused by the inflexible start and stop of traditional OP compensation. In particular, by configuring the first preset range and the second preset range to overlap at least partially, the first control branch 120 and the second control branch 130 are activated simultaneously when the detected voltage is within the overlapping range, realizing the coordinated operation of ICA compensation and OP compensation. Under severe abnormal screen conditions, both types of compensation can be activated simultaneously to obtain the best improvement effect.
[0053] Therefore, this application integrates screen anomaly detection, intelligent decision-making on compensation methods, and precise execution of compensation signals through the collaborative operation of the screen detection module 110, the first control branch 120, and the second control branch 130, constructing a rapid-response, accurate-judgment, and reliable adaptive compensation control system. By introducing a dual-path collaborative control mechanism based on a preset voltage range, three compensation modes are achieved: ICA compensation only, OP compensation only, and joint ICA and OP compensation. Intelligent switching is performed according to the severity of the screen anomaly, minimizing redundant operation of the compensation function while ensuring image improvement, significantly reducing system power consumption. Simultaneously, the introduction of the joint compensation mode allows for better display effects in severe scenarios where a single compensation method cannot completely resolve screen anomalies, achieving an optimal balance between power consumption and image quality, significantly improving the overall performance of the display panel and user experience.
[0054] In one embodiment, when the detected voltage is within a third preset range (e.g., <0), meaning the display is normal, both the first control branch 120 and the second control branch 130 are turned off, and no compensation is initiated. This conforms to the fundamental principle of on-demand compensation in display drivers, thereby achieving higher reliability, lower power consumption, and better overall image quality.
[0055] Figure 3 The diagram shown is a circuit diagram of the first control branch 120 provided in the embodiment of this application; Figure 3The circuit structure shown is an implementation of the first control branch 120 of this embodiment, which is composed of a first interval determination unit 121 and a first transistor T1.
[0056] Specifically, the first interval determination unit 121 is connected to the output end of the screen detection module 110 and is configured to: determine whether the detection voltage is within a first preset interval, output a conduction signal when the detection voltage is within the first preset interval, and output a cut-off signal when the detection voltage is not within the first preset interval; wherein, the first preset interval includes less than a first preset threshold and greater than a second preset threshold, and the first preset threshold is less than the second preset threshold.
[0057] It should be noted that the input end of the first interval determination unit 121 is connected to the output end of the screen detection module 110, and receives the detection voltage Vi output by the screen detection module 110. A comparator circuit or a window comparator circuit is integrated inside this unit, and the boundary thresholds of the first preset interval are preset: namely, the first preset threshold V1 and the second preset threshold V2, and V1 < V2. The core function of the first interval determination unit 121 is interval judgment: comparing the magnitude relationship between the detection voltage Vi and V1, V2 in real time, and outputting corresponding control signals accordingly. Specifically:
[0058] (1) When the detection voltage Vi < V1, it is determined that Vi is within the first preset interval, and a conduction signal (such as a high level) is output;
[0059] (2) When the detection voltage Vi > V2, it is determined that Vi is within the first preset interval, and a conduction signal (such as a high level) is output;
[0060] (3) When the detection voltage is between V1 ≤ Vi ≤ V2, it is determined that Vi is not within the first preset interval, and a cut-off signal (such as a low level) is output.
[0061] Optionally, the control terminal of the first transistor T1 is connected to the output terminal of the first interval determination unit 121, the first terminal of the first transistor T1 is connected to the output terminal of the ICA compensation module 200, and the second terminal of the first transistor T1 is connected to the subsequent load 400. Specifically: the first transistor T1 acts as a controlled switching element, with its control terminal (gate) connected to the output terminal of the first interval determination unit 121, its first terminal (source or drain) connected to the output terminal of the ICA compensation module 200, and its second terminal (drain or source) connected to the subsequent load 400 (such as a source driver chip). The first transistor T1 can be a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or a BJT (Bipolar Junction Transistor), and the N-type or P-type device is selected according to the polarity of the conduction signal. The first transistor T1 responds to the on / off signal output by the first interval determination unit 121 to realize the physical on / off of the signal path: (1) When the on signal (such as high level) is received, the first transistor T1 enters the on state, and the compensation signal output by the ICA compensation module 200 is transmitted to the downstream load 400 via the first transistor T1; (2) When the off signal (such as low level) is received, the first transistor T1 enters the off state, cutting off the signal path between the ICA compensation module 200 and the downstream load 400.
[0062] In this embodiment, the first transistor T1 acts as an actuator, realizing hard on / off control of the ICA compensation signal. It has the advantages of fast response speed, thorough shutdown, and no leakage current, ensuring that the ICA compensation only takes effect when needed and is completely cut off when not needed, thus minimizing unnecessary power consumption and signal interference.
[0063] like Figure 3 As shown, the first interval determination unit 121 in this embodiment includes a first comparator U1, a second comparator U2, a first diode D1, a second diode D2, and a first resistor R1. The first input terminal (i.e., the non-inverting input terminal) of the first comparator U1 is connected to the output terminal of the image detection module 110 to receive the detection voltage Vi, and the second input terminal (i.e., the inverting input terminal) of the first comparator U1 is connected to the output terminal of the second preset threshold to receive a high conduction level (i.e., the second preset threshold V2).
[0064] The first input terminal (i.e., the inverting input terminal) of the second comparator U2 is connected to the output terminal of the image detection module 110 to receive the detection voltage Vi. The second input terminal (i.e., the non-inverting input terminal) of the second comparator U2 is connected to the first preset threshold output terminal to receive the low conduction level (i.e., the first preset threshold V1). The anode of the first diode D1 is connected to the output terminal of the first comparator U1, and the anode of the second diode D2 is connected to the output terminal of the second comparator U2. The cathodes of the first diode D1 and the second diode D2 are shorted and then connected to the control terminal of the first transistor T1 through the first resistor R1.
[0065] The working principle of the first interval determination unit 121 in this embodiment is as follows:
[0066] (1) When the detected voltage Vi is less than the low conduction level V1 (i.e., Vi < V1 < V2), the voltage (V1) at the non-inverting input terminal of the second comparator U2 is greater than the voltage (Vi) at the inverting input terminal. Therefore, the second comparator U2 outputs a high level. At this time, the voltage (Vi) at the non-inverting input terminal of the first comparator U1 is less than the voltage (V2) at the inverting input terminal. Therefore, the first comparator U1 outputs a low level. The second diode D2 is forward-conducted because its anode receives a high level and transmits the high level to the first end of the first resistor R1. The first diode D1 is reverse-blocked because its anode receives a low level. Therefore, the first end of the first resistor R1 is at a high level, and this high level is transmitted through the first resistor R1 to the control terminal of the first transistor T1, causing the first transistor T1 to conduct.
[0067] (2) When the detected voltage Vi is between the low conduction level V1 and the high conduction level V2 (i.e., V1 < Vi < V2), the voltage (V1) at the non-inverting input terminal of the second comparator U2 is less than the voltage (Vi) at the inverting input terminal. Therefore, the second comparator U2 outputs a low level. The voltage (Vi) at the non-inverting input terminal of the first comparator U1 is less than the voltage (V2) at the inverting input terminal. Therefore, the first comparator U1 outputs a low level. The anodes of both the first diode D1 and the second diode D2 receive a low level and are both in a reverse-blocked state. At this time, the first end of the first resistor R1 is pulled down to a low level through a pull-down path (or internal circuit), and this low level is transmitted to the control terminal of the first transistor T1, causing the first transistor T1 to turn off.
[0068] (3) When the detected voltage Vi is greater than the high conduction level V2 (i.e., V1 < V2 < Vi), the voltage (Vi) at the non-inverting input terminal of the first comparator U1 is greater than the voltage (V2) at the inverting input terminal. Therefore, the first comparator U1 outputs a high level. At this time, the voltage (V1) at the non-inverting input terminal of the second comparator U2 is less than the voltage (Vi) at the inverting input terminal. Therefore, the second comparator U2 outputs a low level. The first diode D1 is forward-conducted because its anode receives a high level and transmits the high level to the first end of the first resistor R1. The second diode D2 is reverse-blocked because its anode receives a low level. Therefore, the first end of the first resistor R1 is at a high level, and this high level is transmitted to the control terminal of the first transistor T1, causing the first transistor T1 to conduct again.
[0069] In summary, this embodiment realizes the interval determination function of outputting a high level when the detected voltage is lower than the low conduction level V1, outputting a low level when the detected voltage is between V1 and V2, and outputting a high level when the detected voltage is higher than the high conduction level V2. In addition, in this circuit, the first resistor R1 not only plays a current limiting and protection role, but also cooperates with the on / off of the diode to ensure that the high level can be stably transmitted to the control end of the first transistor T1 in two conduction states, thereby accurately controlling the on and off of the ICA compensation signal.
[0070] The inventor of the present application found that there may be a problem with the first control branch 120 in the above embodiment, that is, it will conduct when the detected voltage Vi is lower than the first preset threshold V1. Then, when the screen detection module 110 detects that the current display screen is normal (that is, the degree of abnormality is 0), the output detected voltage will also be less than the first preset threshold V1, resulting in mis-conduction of the first control branch 120. To solve this problem, the present application also provides the following embodiments:
[0071] Figure 4 The following shows a schematic diagram of the circuit of the second first control branch 120 provided by an embodiment of the present application; Figure 4 The circuit structure shown is another implementation of the first control branch 120 in this embodiment. Compared with Figure 3 the circuit structure shown, the difference between the two is as follows: Figure 3 The embodiment shown uses an interval determination unit to implement the determination of two sub-intervals of the first preset interval, Figure 4 The embodiment shown uses two interval determination units to respectively implement the determination of two sub-intervals of the first preset interval; specifically, as Figure 4 shown, the first control branch 120 of this embodiment includes a first interval determination unit 121, a first transistor T1, a second interval determination unit 122, and a second transistor T2. By covering different voltage sub-intervals with two interval determination units and the parallel output of the two transistors, the accurate control of the signal path between the ICA compensation module 200 and the subsequent load 400 is jointly achieved.
[0072] In this embodiment, the input end of the first interval determination unit 121 is connected to the output end of the screen detection module 110 to receive the detected voltage Vi; the boundary thresholds of the first sub-interval are preset inside this unit: such as Figure 5 the first preset threshold V1 and the third preset threshold V3 shown, and V1 < V3. The first interval determination unit 121 is configured to determine whether the detected voltage Vi is within the first sub-interval (V1, V3). Specifically: (1) when the detected voltage satisfies V1 < Vi < V3, it is determined that Vi is within the first sub-interval, and a conduction signal (such as a high level) is output; (2) when the detected voltage does not satisfy the above conditions, a cut-off signal (such as a low level) is output.
[0073] In this embodiment, the first transistor T1 acts as a controlled switching element. Its control terminal is connected to the output terminal of the first interval determination unit 121, its first terminal is connected to the output terminal of the ICA compensation module 200, and its second terminal is connected to the downstream load 400. The first transistor T1 responds to the on / off signal output by the first interval determination unit 121 to realize the on / off control of the signal path: (1) When the on signal is received, the first transistor T1 is turned on, and the ICA compensation signal is transmitted to the downstream load 400 through the first transistor T1; (2) When the off signal is received, the first transistor T1 is turned off, cutting off the signal path.
[0074] In this embodiment, the input terminal of the second interval determination unit 122 is connected to the output terminal of the image detection module 110 to receive the detection voltage Vi; the unit internally has a preset minimum boundary threshold for the second sub-interval, such as Figure 5 The second preset threshold V2 is shown, and V2 > V3. The second interval determination unit 122 is configured to determine whether the detected voltage Vi is within the second sub-interval (V2, +∞). Specifically:
[0075] (1) When the detected voltage satisfies Vi>V2, it is determined that Vi is in the second sub-interval and a conduction signal (e.g., high level) is output.
[0076] (2) When the detected voltage does not meet the above conditions, output a shutdown signal (e.g., low level).
[0077] In this embodiment, the second transistor T2 also serves as a controlled switching element. Its control terminal is connected to the output terminal of the second interval determination unit 122, its first terminal is connected to the output terminal of the ICA compensation module 200, and its second terminal is connected to the downstream load 400. The second transistor T2 and the first transistor T1 are connected in parallel to form the output stage of the first control branch 120: (1) When the second interval determination unit 122 outputs a conduction signal, the second transistor T2 is turned on, and the ICA compensation signal is transmitted to the downstream load 400 through the second transistor T2; (2) When an output turn-off signal is output, the second transistor T2 is turned off.
[0078] It should be noted that the first preset interval in this embodiment is jointly composed of the first sub-interval (V1, V3) and the second sub-interval (V2, +∞), that is: first preset interval = first sub-interval ∪ second sub-interval = (V1, V3) ∪ (V2, +∞); however, there is naturally a blank interval (V3, V2) between the two sub-intervals. In this interval, both interval determination units output a shutdown signal, both transistors are turned off, and ICA compensation is not effective. In addition, when the detected voltage Vi is less than the first preset threshold, it indicates that the current display screen is a normal screen, and ICA compensation and OP compensation are not performed.
[0079] As described above, in this embodiment, two interval determination units respectively cover different voltage sub - intervals, achieving the precise enabling of ICA compensation in both the slightly abnormal interval and the severely abnormal interval. At the same time, it avoids false triggering due to normal display screens, further improving the compensation accuracy of abnormal screens and reducing power consumption.
[0080] Continue as Figure 4 shown, the first interval determination unit 121 includes a first comparator U1, a second comparator U2, a first diode D1, a second diode D2, an output node, a pull - up resistor R0, and a first resistor R1. Among them, the first comparator U1 is configured such that its inverting input terminal receives the detection voltage Vi, and its non - inverting input terminal receives the third preset threshold V3. Therefore, when Vi < V3, it outputs a high level, and when Vi > V3, it outputs a low level; the second comparator U2 is configured such that its non - inverting input terminal receives the detection voltage Vi, and its inverting input terminal receives the first preset threshold V1. Therefore, when Vi > V1, it outputs a high level, and when Vi < V1, it outputs a low level. The cathode of the first diode D1 is connected to the output terminal of the first comparator U1, the cathode of the second diode D2 is connected to the output terminal of the second comparator U2, and the anodes of the two diodes are short - circuited to the output node. This node is connected to the power supply voltage Vcc through the pull - up resistor R0 and to the control terminal of the first transistor T1 through the first resistor R1.
[0081] The working principle of the first interval determination unit 121 in this embodiment is as follows:
[0082] (1) When the detection voltage Vi is less than the first preset threshold V1 (Vi < V1 < V3): The first comparator U1 outputs a high level, and the second comparator U2 outputs a low level. The cathode of the first diode D1 is connected to a high level and is cut off, the cathode of the second diode D2 is connected to a low level and is turned on, and the output node is pulled down to the low level output of the second comparator U2 through the turned - on second diode D2. Therefore, the output node is at a low level, and the first transistor T1 is turned off.
[0083] (2) When the detection voltage Vi is between the first preset threshold V1 and the third preset threshold V3 (V1 < Vi < V3): The first comparator U1 outputs a high level, and the second comparator U2 outputs a high level. The cathodes of both diodes are connected to a high level and are both cut off. The output node is pulled up to the power supply voltage Vcc through the pull - up resistor R0. Therefore, the output node is at a high level, and the first transistor T1 is turned on.
[0084] (3) When the detection voltage Vi is greater than the third preset threshold V3 (V1 < V3 < Vi):
[0085] The first comparator U1 outputs a low level, and the second comparator U2 outputs a high level. The first diode D1 is turned on when its cathode is connected to a low level, and the second diode D2 is turned off when its cathode is connected to a high level. The output node is pulled low to the output low level of the first comparator U1 through the turned-on first diode D1, so the output node is at a low level, and the first transistor T1 is turned off.
[0086] In summary, this embodiment realizes the interval determination function of outputting a high level to turn on the first transistor T1 when the detected voltage Vi is between the first preset threshold V1 and the third preset threshold V3, and outputting a low level to turn off the first transistor T1 when the detected voltage Vi is lower than V1 or higher than V3.
[0087] like Figure 4 As shown, the second interval determination unit 122 includes a third comparator and a second resistor R2. The first input terminal (non-inverting input terminal) of the third comparator is connected to the output terminal of the image detection module 110 to receive the detection voltage Vi, and the second input terminal (inverting input terminal) of the third comparator is connected to the output terminal of the second preset threshold to receive the second preset threshold V2. The second resistor R2 is connected between the output terminal of the third comparator and the control terminal of the second transistor T2. The third comparator is configured to output a high level when the detection voltage Vi is greater than the second preset threshold V2, and output a low level when the detection voltage Vi is less than the second preset threshold V2.
[0088] The working principle of the second interval determination unit 122 in this embodiment is as follows:
[0089] (1) When the detected voltage Vi is greater than the second preset threshold V2: the third comparator outputs a high level, which is transmitted to the control terminal of the second transistor T2 through the second resistor R2, so that the second transistor T2 is turned on; at this time, the compensation signal output by the ICA compensation module 200 is transmitted to the downstream load 400 through the second transistor T2, and the ICA compensation takes effect.
[0090] (2) When the detected voltage Vi is less than the second preset threshold V2: the third comparator outputs a low level, which is transmitted to the control terminal of the second transistor T2 through the second resistor R2, causing the second transistor T2 to turn off. At this time, the signal path between the ICA compensation module 200 and the subsequent load 400 is cut off, and the ICA compensation is ineffective.
[0091] In summary, this circuit realizes the interval determination function of outputting a high level to turn on the second transistor T2 when the detected voltage Vi is greater than the second preset threshold V2, that is, the second sub-interval is composed of (V2, +∞); the second resistor R2 plays the role of current limiting protection in this circuit to prevent overcurrent from damaging the control terminal of the second transistor T2.
[0092] Figure 6The diagram shown is a structural schematic of another control circuit 100 provided in an embodiment of this application; as shown Figure 6 As shown, the second control branch 130 in this embodiment includes a third transistor T3. The control terminal (gate) of the third transistor T3 is connected to the output terminal of the image detection module 110 to receive the detection voltage Vi. The first terminal (source or drain) of the third transistor T3 is connected to the output terminal of the OP compensation module 300. The second terminal (drain or source) of the third transistor T3 is connected to the subsequent load 400.
[0093] In this embodiment, the third transistor T3 is configured to automatically turn on or off according to the magnitude of the detected voltage Vi; specifically, (1) when the detected voltage Vi is greater than the second preset interval (i.e., Vi>V3): the detected voltage Vi reaches the conduction threshold of the third transistor T3, the third transistor T3 turns on, and the compensation signal output by the OP compensation module 300 is transmitted to the downstream load 400 through the third transistor T3, driving the source drive chip to perform OP compensation. (2) when the detected voltage Vi is less than or equal to the second preset interval (i.e., Vi≤V3): the detected voltage Vi is lower than the conduction threshold of the third transistor T3, the third transistor T3 turns off, the signal path between the OP compensation module 300 and the downstream load 400 is cut off, and OP compensation is not effective.
[0094] like Figure 6 As shown, in this embodiment... Figure 1 Based on this, a blanking period control mechanism has been added to ensure that the switching of compensation states only occurs during the vertical blanking period (V-blanking), avoiding visual anomalies such as screen flickering or tearing caused by changes in compensation states during the effective display of the image. For example... Figure 6 As shown, the control circuit 100 in this embodiment also includes a blanking detection module 140, a fourth transistor T4, and a fifth transistor T5.
[0095] The blanking detection module 140 of this embodiment is connected to the synchronization signal terminal of the timing controller (TCON) or the display panel to detect in real time whether the current display screen is in the vertical blanking period; wherein, the vertical blanking period is the time interval between two adjacent frames, during which no valid image data is transmitted, and the pixels are in a reset or waiting state. The blanking detection module 140 integrates a synchronization signal detection circuit, which determines whether it is in the blanking period by monitoring the vertical synchronization signal (Vsync) or the data enable signal (DE): (1) when the blanking pulse of the vertical synchronization signal or the data enable signal is detected to be low, it is determined that it is in the blanking period and outputs a conduction signal (e.g., high level); (2) when the data enable signal is detected to be high (during the effective display period), it is determined that it is not in the blanking period and outputs a shutdown signal (e.g., low level).
[0096] In this embodiment, the fourth transistor T4 serves as a controlled switch element, connected in series between the output terminal of the image detection module 110 and the input terminal of the first control branch 120. Its control terminal is connected to the output terminal of the blanking detection module 140, its first terminal is connected to the output terminal of the image detection module 110, and its second terminal is connected to the input terminal of the first control branch 120 (i.e., the input terminal of the first interval determination unit 121). The fourth transistor T4 responds to the on / off signal output by the blanking detection module 140 to realize the timing control of the transmission of the detection voltage Vi to the first control branch 120: (1) When it is in the blanking period (the blanking detection module 140 outputs a high level), the fourth transistor T4 is turned on, and the detection voltage Vi output by the screen detection module 110 is transmitted to the first control branch 120 through the fourth transistor T4. The first control branch 120 makes a range judgment based on Vi and updates the ICA compensation state; (2) When it is in the effective display period (the blanking detection module 140 outputs a low level), the fourth transistor T4 is turned off, cutting off the transmission path of the detection voltage Vi to the first control branch 120. The first control branch 120 maintains the original compensation state and does not switch.
[0097] In this embodiment, the fifth transistor T5 is also a controlled switch element, connected in series between the output of the screen detection module 110 and the input of the second control branch 130. Its control terminal is connected to the output of the blanking detection module 140, its first terminal is connected to the output of the screen detection module 110, and its second terminal is connected to the input of the second control branch 130 (i.e., the control terminal of the third transistor T3). The fifth transistor T5 and the fourth transistor T4 are connected in parallel (sharing the same control signal) to jointly realize the synchronous timing control of dual-path compensation: (1) When in the blanking period, the fifth transistor T5 is turned on, the detection voltage Vi is transmitted to the control terminal of the third transistor T3, and the third transistor T3 updates the on / off state according to Vi, thereby controlling the start and stop of OP compensation; (2) When in the effective display period, the fifth transistor T5 is turned off, the control terminal of the third transistor T3 is isolated, the original state remains unchanged, and the OP compensation state is not switched.
[0098] Based on the above features, the overall workflow of this embodiment is as follows:
[0099] (1) Normal display period (effective display time):
[0100] When the blanking detection module 140 detects that the data enable signal is high, it determines that it is not currently in the blanking period and outputs a low-level shutdown signal. The fourth transistor T4 and the fifth transistor T5 are both turned off, and the detection voltage Vi output by the screen detection module 110 is blocked and cannot be transmitted to the first control branch 120 and the second control branch 130. The first control branch 120 and the second control branch 130 maintain the compensation state determined by the previous frame. The compensation state is stable throughout the display period without any switching action, ensuring that the screen display is flicker-free.
[0101] (2) Interframe interval (blank space period):
[0102] When the blanking detection module 140 detects that the vertical synchronization signal blanking pulse or data enable signal is low, it determines that it is currently in the blanking period and outputs a high-level conduction signal. The fourth transistor T4 and the fifth transistor T5 are simultaneously turned on, and the current frame detection voltage Vi output by the image detection module 110 is simultaneously transmitted to the first control branch 120 and the second control branch 130. The first control branch 120 performs interval judgment based on Vi and updates the ICA compensation state (on or off). The third transistor T3 in the second control branch 130 determines whether the conduction threshold has been reached based on Vi and updates the OP compensation state (on or off). After the compensation state is updated, the blanking period ends and the next frame is displayed. The fourth and fifth transistors T5 are turned off again, maintaining the new state.
[0103] (3) Special scene handling:
[0104] When the content of the screen changes drastically (such as scene switching), the detected voltage Vi may jump significantly during the blanking period. The first control branch 120 and the second control branch 130 can complete the state update within a blanking period, and the new compensation strategy is adopted in the next frame. The response speed is fast and there is no visual interference.
[0105] This embodiment introduces a blanking period control mechanism to finely limit the timing of the conduction signal path, ensuring that the compensation state update is only performed during the blanking period, thus avoiding sudden brightness changes caused by compensation switching during the effective display period.
[0106] Secondly, embodiments of this application provide a display panel, specifically including the following embodiments:
[0107] Figure 7The diagram shown is a schematic diagram of a display panel provided in an embodiment of this application. The display panel is divided into N display zones (e.g., three or more zones: left, middle, and right). Each zone has an independent display driving channel. Each zone is configured with: (1) an ICA compensation module 200 for providing image compensation algorithm compensation signals; (2) an OP compensation module 300 for providing operational amplifier Vcom compensation signals; and (3) a control circuit 100 as shown in the above embodiment. The first input terminal of the control circuit 100 is connected to the ICA compensation module 200 of this zone, the second input terminal is connected to the OP compensation module 300 of this zone, and the output terminal is connected to the subsequent load 400 (e.g., source driver chip) of this zone. Figure 7 The first and second partition loads are shown.
[0108] like Figure 7 As shown, the display panel also includes a mode detection circuit 500, which is connected to the screen detection module 110 of each display zone (integrated in each control circuit 100). The mode detection circuit 500 is configured to: acquire the display parameters of each display zone in real time (such as refresh rate, grayscale value, abnormality level, etc.), and determine the type of the current display screen accordingly; if a significant difference is detected in the display parameters of each zone (for example, different zones use different refresh rates, or the difference in abnormality level exceeds a preset threshold), then the current display screen is determined to be a zone combination screen, and a zone control signal is output at this time; if the display parameters of each zone are basically the same (for example, the whole screen uses the same refresh rate, or the difference in abnormality level is less than a preset threshold), then the current display screen is determined to be a whole area display screen, and a whole area control signal is output at this time.
[0109] like Figure 7 As shown, the display panel also includes a mode switching circuit 600, which is connected to the output of the mode detection circuit 500 and N control circuits 100. Internally, it integrates a switch array or signal routing circuit, configured to switch the transmission path of the detection voltage according to the control signal output by the mode detection circuit 500. Specifically:
[0110] (1) In response to the partition control signal: the mode switching circuit 600 transmits the detection voltage output by the screen detection module 110 in the nth control circuit 100 to the first control branch 120 and the second control branch 130 of the nth control circuit 100 separately; that is, each control circuit 100 uses the voltage detected in this partition to make an independent compensation decision.
[0111] (2) In response to the whole area control signal: the mode switching circuit 600 transmits the detection voltage output by the screen detection module 110 in the designated control circuit 100 (e.g., the main control partition or the first partition) to the first control branch 120 and the second control branch 130 of all N control circuits 100 at the same time; that is, all control circuits 100 share the same detection voltage to make compensation decisions and realize a unified compensation strategy for the whole screen.
[0112] The workflow of the display panel provided in this embodiment is as follows:
[0113] (1) Screen type recognition: The pattern detection circuit 500 continuously monitors the display parameters of each partition to determine the current screen type.
[0114] (2) Mode switching: When the screen is identified as a partition combination screen, the partition control signal is output and the mode switching circuit 600 routes the detection voltage of each partition to the corresponding control circuit 100 respectively; when the screen is identified as a whole area display screen, the whole area control signal is output and the mode switching circuit 600 broadcasts the detection voltage of the specified partition to all control circuits 100.
[0115] (3) Compensation execution: Each control circuit 100 determines the activation status of ICA compensation and OP compensation according to the logic of the above embodiment based on the received detection voltage (of this partition or uniform), and transmits the compensation signal to the downstream load 400 to drive the corresponding partition to perform compensation.
[0116] (4) Dynamic update: As the content of the screen changes, the mode detection circuit 500 updates the judgment result in real time, the mode switching circuit 600 adjusts the signal routing accordingly, and the compensation strategy is dynamically switched.
[0117] Therefore, this embodiment achieves adaptive partition compensation control for the display panel. Specifically, the mode detection circuit 500 identifies the type of the current display screen in real time. When significant differences in display parameters between different partitions are detected, it determines the screen to be a partition combination screen and outputs a partition control signal to enable each control circuit 100 to make independent decisions based on the detection voltage of its respective partition, thereby accurately compensating for abnormal screens in each partition. When the display parameters of each partition are basically consistent, it determines the screen to be a whole-area display screen and outputs a whole-area control signal to enable all control circuits 100 to share the detection voltage of the specified partition, achieving a unified compensation strategy across the entire screen. Thus, this embodiment avoids the problem of insufficient or excessive compensation in some areas due to unified compensation under partition combination screen conditions, and avoids inconsistencies in compensation and visual fragmentation caused by independent decisions of each partition under whole-area display screen conditions. Furthermore, by requiring only one control circuit 100 to output the detection voltage and the other control circuits 100 to share the decision result under whole-area display screen conditions, it effectively reduces system power consumption. In addition, the mode detection circuit 500 continuously monitors changes in the screen and dynamically switches control modes, enabling the display panel to adapt to various complex application scenarios. While ensuring the optimal compensation effect, it achieves a balance between power consumption and image quality, significantly improving the overall performance of the display panel and the user experience.
[0118] like Figure 7 As shown, when N=2 and the first control circuit 101 is designated as the control circuit 100, the mode switching circuit 600 includes a sixth transistor T6 and a seventh transistor T7. The control terminal of the sixth transistor T6 is connected to the output terminal of the mode detection circuit 500, and its first terminal is connected to the output terminal of the image detection module 110 of the first control circuit 101. The control terminal of the seventh transistor T7 is connected to the output terminal of the mode detection circuit 500, and its first terminal is connected to the output terminal of the image detection module 110 of the second control circuit 102. The second terminals of the sixth transistor T6 and the seventh transistor T7 are shorted and connected together to the input terminals of the first control branch 120 and the second control branch 130 of the second control circuit 102. The turn-on voltages of the sixth transistor T6 and the seventh transistor T7 are opposite; for example, the sixth transistor T6 is an NMOS (high level on) and the seventh transistor T7 is a PMOS (low level on).
[0119] The working principle of the mode switching circuit 600 in this embodiment is as follows:
[0120] (1) When the mode detection circuit 500 outputs a high level (whole area control signal): the sixth transistor T6 is turned on and the seventh transistor T7 is turned off; the detection voltage output by the screen detection module 110 of the first control circuit 101 is transmitted to the common node through the sixth transistor T6, and then input to the first control branch 120 and the second control branch 130 of the second control circuit 102; the first control circuit 101 directly uses the detection voltage of this partition, and the second control circuit 102 also uses Vi1 to make compensation decisions; at this time, the two control circuits 100 share the same detection voltage to realize a unified compensation strategy for the whole screen.
[0121] (2) When the mode detection circuit 500 outputs a low level (zone control signal): the sixth transistor T6 is turned off and the seventh transistor T7 is turned on; the detection voltage output by the screen detection module 110 of the second control circuit 102 is transmitted to the common node through the seventh transistor T7, and then input to the first control branch 120 and the second control branch 130 of the second control circuit 102; the first control circuit 101 directly uses the detection voltage of this zone, and the second control circuit 102 uses the detection voltage of this zone to make independent compensation decisions; at this time, the two control circuits 100 use the detection voltage of their respective zones to achieve independent zone compensation.
[0122] In summary, this circuit precisely achieves the selection function of the detection voltage source by using two transistors with opposite turn-on voltages: in whole-area mode, the detection voltage of the first partition is provided to the second control circuit 102, and in partition mode, the detection voltage of the second partition is provided to the second control circuit 102, while the first control circuit 101 always uses the detection voltage of this partition.
[0123] Furthermore, the terms "first," "second," and "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0124] In the description of this specification, references to terms such as "some embodiments," "exemplarily," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0125] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application. Therefore, any changes or modifications made in accordance with the claims and description of this application should fall within the scope of this patent application.
Claims
1. A control circuit, characterized in that, Applied to a display panel, the display panel includes an image compensation algorithm compensation module and an operational amplifier compensation module, and the control circuit includes: The screen detection module is configured to detect the degree of abnormality of the currently displayed screen and output a corresponding detection voltage according to the degree of abnormality; The first control branch is connected to the output terminal of the image detection module, the image compensation algorithm module, and the subsequent load, respectively, and is configured to: when the detected voltage is in the first preset range, conduct the signal path between the image compensation algorithm module and the subsequent load. The second control branch is connected to the output of the image detection module, the operational amplifier compensation module, and the downstream load, respectively, and is configured to: when the detection voltage is in the second preset range, conduct the signal path between the operational amplifier compensation module and the downstream load; The first preset interval and the second preset interval at least partially overlap, so that the first control branch and the second control branch are simultaneously turned on when the detected voltage is in the overlapping interval.
2. The control circuit according to claim 1, characterized in that, The first control branch includes: The first interval determination unit is connected to the output terminal of the image detection module and is configured to: determine whether the detected voltage is within a first preset interval; output a conduction signal when the detected voltage is within the first preset interval; and output a shutdown signal when the detected voltage is not within the first preset interval. The first transistor has its control terminal connected to the output terminal of the first interval determination unit, its first terminal connected to the output terminal of the image compensation algorithm compensation module, and its second terminal connected to the subsequent load. The first preset interval includes less than a first preset threshold and greater than a second preset threshold, wherein the first preset threshold is less than the second preset threshold.
3. The control circuit according to claim 2, characterized in that, The first interval determination unit includes: A first comparator, wherein the first input terminal of the first comparator is connected to the output terminal of the image detection module, and the second input terminal of the first comparator is connected to the output terminal of the second preset threshold. The second comparator has its first input terminal connected to the output terminal of the image detection module, and its second input terminal connected to the first preset threshold output terminal. The first diode, the anode of which is connected to the output of the first comparator; The second diode, the anode of which is connected to the output of the second comparator; The first resistor has its first end connected to the cathode of the first diode and the cathode of the second diode, and its second end connected to the control terminal of the first transistor.
4. The control circuit according to claim 1, characterized in that, The first control branch includes: The first interval determination unit, connected to the output terminal of the image detection module, is configured to: determine whether the detected voltage is in the first sub-interval; output a conduction signal when the detected voltage is in the first sub-interval; and output a shutdown signal when the detected voltage is not in the first sub-interval; wherein, the minimum value of the first sub-interval is used as the first preset threshold, and the maximum value of the first sub-interval is used as the third preset threshold. The first transistor has its control terminal connected to the output terminal of the first interval determination unit, its first terminal connected to the output terminal of the image compensation algorithm compensation module, and its second terminal connected to the subsequent load. The second interval determination unit, connected to the output terminal of the image detection module, is configured to: determine whether the detected voltage is in the second sub-interval; output a conduction signal when the detected voltage is in the second sub-interval; and output a shutdown signal when the detected voltage is not in the second sub-interval; wherein, the minimum value of the second sub-interval is used as the second preset threshold, and the second preset threshold is greater than the third preset threshold; the first preset interval includes the first sub-interval and the second sub-interval; The second transistor has its control terminal connected to the output terminal of the second interval determination unit, its first terminal connected to the output terminal of the image compensation algorithm compensation module, and its second terminal connected to the subsequent load.
5. The control circuit according to claim 4, characterized in that, The first interval determination unit includes: A first comparator, wherein the first input terminal of the first comparator is connected to the output terminal of the image detection module, and the second input terminal of the first comparator is connected to the third preset threshold output terminal; The second comparator has its first input terminal connected to the output terminal of the image detection module, and its second input terminal connected to the first preset threshold output terminal. The first diode, the cathode of which is connected to the output of the first comparator; The second diode, the cathode of which is connected to the output of the second comparator; A first resistor, the first end of which is connected to the anode of the first diode and the anode of the second diode, and the second end of which is connected to the control terminal of the first transistor; A pull-up resistor, wherein the first end of the pull-up resistor is connected to the first end of the first resistor, and the second end of the pull-up resistor is connected to the power supply terminal.
6. The control circuit according to claim 4, characterized in that, The second interval determination unit includes: The third comparator has its first input terminal connected to the output terminal of the image detection module, and its second input terminal connected to the output terminal of the second preset threshold. The second resistor has its first end connected to the output terminal of the third comparator and its second end connected to the control terminal of the second transistor.
7. The control circuit according to any one of claims 1-6, characterized in that, The second control branch includes: The third transistor has its control terminal connected to the output terminal of the image detection module, its first terminal connected to the output terminal of the operational amplifier compensation module, and its second terminal connected to the subsequent load.
8. The control circuit according to any one of claims 1-6, characterized in that, The control circuit also includes: The blanking detection module is configured to detect whether the current period is blanking period. When it is blanking period, it outputs an on signal and when it is not blanking period, it outputs an off signal. The fourth transistor has its control terminal connected to the output terminal of the blanking detection module, its first terminal connected to the output terminal of the image detection module, and its second terminal connected to the input terminal of the first control branch. The fifth transistor has its control terminal connected to the output terminal of the blanking detection module, its first terminal connected to the output terminal of the image detection module, and its second terminal connected to the input terminal of the second control branch.
9. A display panel, characterized in that, The display panel includes N display zones, and each display zone corresponds to an image compensation algorithm module and an operational amplifier compensation module; the display panel also includes: The mode detection circuit is configured to detect whether the currently displayed screen is a partitioned combined screen. If the currently displayed screen is a partitioned combined screen, it outputs a partition control signal; if the currently displayed screen is a whole-area display screen, it outputs a whole-area control signal. The control circuits according to any one of claims 1-8, wherein the first input terminal of each control circuit is connected to the image compensation algorithm compensation module of the corresponding partition, the second input terminal of each control circuit is connected to the operational amplifier compensation module of the corresponding partition, and the output terminal of each control circuit is connected to the subsequent load of the corresponding partition. The mode switching circuit, connected to the mode detection circuit and the N control circuits respectively, is configured to: in response to the partition control signal, transmit the detection voltage output by the screen detection module in the nth control circuit to the first control branch and the second control branch of the nth control circuit; and in response to the whole area control signal, transmit the detection voltage output by the screen detection module in the designated control circuit to the first control branch and the second control branch of all control circuits simultaneously.
10. The display panel according to claim 9, characterized in that, When N=2, and the first control circuit corresponding to the first display partition is used as the designated control circuit, the mode switching circuit includes: The sixth transistor has its control terminal connected to the output terminal of the pattern detection circuit, and its first terminal connected to the output terminal of the image detection module of the first control circuit. The seventh transistor has its control terminal connected to the output terminal of the pattern detection circuit, its first terminal connected to the output terminal of the image detection module of the second control circuit, its second terminal connected to the second terminal of the sixth transistor, and its second terminal also connected to the input terminals of the first and second control branches of the second control circuit. The turn-on voltages of the sixth and seventh transistors are opposite.