Switching power supply high-side N-MOS driving circuit and driving method

Abstract

The invention relates to a switching power supply high-side N-MOS drive circuit and method, and the circuit comprises a logic enhancement module and a level conversion module which is composed of a standard 5V CMOS device, and the logic enhancement module is used for enhancing a received logic signal outputted by a main controller module in stages; the level conversion module is used for performing logic level conversion between a low-voltage domain and a high-voltage domain; the driving module is connected to the output end of the logic enhancement module and converts the enhanced logic signal into a driving level suitable for an external power N-MOS tube; the power supply module is used for providing driving voltage higher than power supply voltage for the driving module; the driving module is composed of a high-voltage NLDMOS device or a high-voltage NDEMOS device. According to the scheme provided by the invention, the area and the manufacturing cost of a drive circuit chip can be reduced, the switching speed and the working frequency of the drive circuit are improved, and the circuit power consumption is reduced.

Description

Technical Field

[0001] This application relates to the field of switching power supply technology, and in particular to a high-side N-MOS driving circuit and driving method for a switching power supply. Background Technology

[0002] In DC-DC switching power supply systems, external power MOSFETs are often used as switching devices to increase output power. Especially in the high-side configuration of half-bridge or full-bridge topologies, N-type power MOSFETs are typically chosen due to considerations of on-resistance and cost. To ensure reliable conduction of the external power MOSFET, its drive voltage generally needs to be set to around 12V. Therefore, a VIN voltage plus 12V is required to turn on the high-side external power MOSFET, and an external Vccx voltage is usually used as the power supply for the drive section. Since Vccx is typically 12V, the components inside the drive chip must all meet a voltage rating of 12V or even higher.

[0003] However, using high-voltage devices to implement the driving logic would require extensive use of high-voltage devices in CMOS BCD technology, occupying a larger chip layout area and increasing the overall cost of the circuit chip. Simultaneously, using high-voltage devices to drive the chip would reduce the internal driving speed, making it unsuitable for higher switching frequencies. Furthermore, introducing a separate 12V Vccx power supply, when swinging the logic level under the 12V high-voltage power supply domain, requires pulling the switching node voltage up to 12V or down to 0V, consuming more charge and leading to increased static and dynamic power consumption of the driving circuit itself.

[0004] Therefore, there is an urgent need for a new high-side N-type MOS driving circuit and driving method that can use 5V standard CMOS devices to form the driving circuit while ensuring the generation of reliable high-voltage driving signals, thereby achieving the comprehensive goals of reducing chip area, reducing cost, increasing switching speed and reducing overall power consumption. Summary of the Invention

[0005] To address or partially address the problems existing in related technologies, this application provides a high-side N-MOS driving circuit and driving method for switching power supplies, aiming to solve the technical problem of using high-voltage devices to drive high-side external power MOSFETs.

[0006] The first aspect of this application provides a high-side N-MOS driving circuit for a switching power supply, comprising: Main controller module, logic enhancement module, level conversion module, driver module, power supply module, and external power N-MOS transistor; The logic enhancement module includes two or more sub-modules, which are respectively connected between the main controller module, the level conversion module and the driver module, and are used to enhance the logic signals output by the main controller module in stages. The level conversion module is connected between the sub-modules of the logic enhancement module and is used to perform logic level conversion between the low-voltage domain and the high-voltage domain; The driver module is connected to the output of the logic enhancement module and converts the enhanced logic signal into a drive level suitable for the external power N-MOS transistor. The power supply module is connected to the logic enhancement module and the drive module, and provides the drive module with a drive voltage higher than the power supply voltage; The logic enhancement module and level conversion module are composed of standard 5V CMOS devices, while the drive module is composed of high-voltage NLDMOS or NDEMOS devices.

[0007] Optionally, the logic enhancement module includes a first logic enhancement module, a second logic enhancement module, a third logic enhancement module, a fourth logic enhancement module, and a fifth logic enhancement module; the level conversion module includes a first level conversion module and a second level conversion module; the input terminal of the first logic enhancement module receives the logic signal output by the main controller module, and the output terminal is connected to the input terminal of the first level conversion module; the output terminal of the first level conversion module is connected to the input terminal of the second logic enhancement module, and the output terminal of the second logic enhancement module is connected to the input terminals of the third logic enhancement module and the fifth logic enhancement module respectively; the output terminal of the third logic enhancement module is connected to the input terminal of the second level conversion module, and the output terminal of the second level conversion module is connected to the input terminal of the fourth logic enhancement module; the output terminal of the fourth logic enhancement module is connected to the driver module; and the output terminal of the fifth logic enhancement module is connected to the driver module.

[0008] Optionally, the reference terminal of the first logic enhancement module is grounded, and the supply voltage is the supply voltage VCC output by the power supply module; the reference voltage of the second logic enhancement module is the first reference voltage SW, and the supply voltage is SW+Boot1, where Boot1 is the first bootstrap voltage, which is output by the power supply module; the reference voltage of the third logic enhancement module is the first reference voltage SW, and the supply voltage is SW+Boot1; the reference voltage of the fourth logic enhancement module is the second reference voltage VS, and the supply voltage is VS+Boot2, where Boot2 is the second bootstrap voltage, which is output by the power supply module; the reference voltage of the fifth logic enhancement module is the first reference voltage SW, and the supply voltage is SW+Boot1; the first level conversion module converts the logic level from GND to VCC voltage domain to the voltage domain from SW to SW+Boot1; the second level conversion module converts the logic level from SW to SW+Boot1 voltage domain to the voltage domain from VS to VS+Boot2.

[0009] Optionally, the driving module includes a high-side driving transistor HS_NLDMOS and a low-side driving transistor LS_NLDMOS; the gate of the high-side driving transistor HS_NLDMOS is connected to the output terminal of the fourth logic enhancement module, and the drain of the high-side driving transistor HS_NLDMOS is connected to the drive power output terminal of the power supply module; the gate of the low-side driving transistor LS_NLDMOS is connected to the output terminal of the fifth logic enhancement module, and the source of the low-side driving transistor LS_NLDMOS is connected to the first reference voltage SW; the drain of the low-side driving transistor LS_NLDMOS is connected to the source of the high-side driving transistor HS_NLDMOS and the drain of the external power N-MOS transistor; the enhanced driving signal HS_DRV is output from the source of the high-side driving transistor HS_NLDMOS or the drain of the low-side driving transistor LS_NLDMOS, and the HS_DRV signal is used to control the external power N-MOS transistor to turn on or off.

[0010] Optionally, the power supply module includes a drive power supply VCCX, a first diode D1, an LDO module, a first capacitor C1, a second capacitor C2, a second diode D2, a third capacitor C3, a third diode D3, and a fourth capacitor C4. The drive power supply VCCX is connected to the LDO module and outputs from the Vccx terminal of the LDO module after passing through the first diode D1 inside the LDO module. The Vccx terminal is connected to the drive module and the first capacitor C1. The other end of the first capacitor C1 is connected to the first reference voltage SW. After being processed by the LDO module, the drive power supply VCCX outputs a supply voltage at the VCC terminal. The VCC terminal of the LDO module is connected to the second capacitor C2, the anode of the second diode D2, and the anode of the third diode D3. The other end of the second capacitor C2 is grounded. The cathode of the second diode D2 is connected to one end of the third capacitor C3, and the voltage at the cathode of the second diode D2 is the first bootstrap voltage Boot1. The other end of the third capacitor C3 is connected to the first reference voltage SW. The cathode of the third diode D3 is connected to the fourth capacitor C4, and the voltage at the cathode of the third diode D3 is the second bootstrap voltage Boot2. The other end of the fourth capacitor C4 is connected to the second reference voltage VS.

[0011] Optionally, the voltage value at the Vccx terminal is the driving power supply VCCX voltage value minus the voltage drop of the first diode D1. The Vccx voltage is the gate drive voltage of the external power N-MOS transistor, which can be set to 12V, 20V or other voltage values ​​according to the specifications of the external power N-MOS transistor. After the driving power supply VCCX is processed by the LDO module, the output supply voltage at the VCC terminal is 5V or 3.3V.

[0012] A second aspect of this application also provides a driving method for a high-side N-MOS driving circuit of a switching power supply, comprising: When it is necessary to turn on or off the external power N-MOS transistor, the main controller module outputs a logic signal. The logic enhancement module enhances the logic input signals; The level conversion module converts the enhanced logic signal between the low-voltage domain and the high-voltage domain; The power supply module provides a drive level higher than the power supply voltage to the drive module; The drive module outputs a drive signal to the gate of an external power N-MOS to control its turn-on or turn-off. The logic enhancement module and level conversion module use standard 5V CMOS devices.

[0013] Optionally, when the external power N-MOS transistor needs to be turned on, the main controller module generates a high-level logic signal, which is amplified by the first logic enhancement module. The amplified high-level logic signal is sent to the first level conversion module, which converts the high-level logic signal from GND to VCC voltage domain to SW to SW+Boot1 voltage domain. Then, it passes through the second, third, and fourth logic enhancement modules and the second level conversion module. The second level conversion module converts the high-level logic signal from SW to SW+Boot1 voltage domain to VS to VS+Boot2 voltage domain, controlling the gate voltage of the high-side driving transistor HS_NLDMOS to Boot2, thus turning on the high-side driving transistor HS_NLDMOS. At the same time, the low level output by the fifth logic enhancement module makes the gate voltage of the low-side driving transistor LS_NLDMOS 0V, turning off the low-side driving transistor LS_NLDMOS. The driving signal HS_DRV output by the high-side driving transistor HS_NLDMOS is raised to SW+VCCX, controlling the gate-source voltage of the external power N-MOS transistor to the driving voltage Vccx, thus turning on the external power N-MOS transistor.

[0014] Optionally, when the external power N-MOS transistor needs to be turned off, the main controller module generates a low-level logic signal, which is amplified by the first logic enhancement module. The amplified low-level logic signal is sent to the first level conversion module, which converts the low level of the GND to VCC voltage domain to the SW to SW+Boot1 voltage domain. Then, it passes through the second, third, and fourth logic enhancement modules and the second level conversion module. The second level conversion module converts the low-level signal of the SW to SW+Boot1 voltage domain to the VS to VS+Boot2 voltage domain, controlling the gate voltage of the high-side driving transistor HS_NLDMOS to 0V, thus turning off the high-side driving transistor HS_NLDMOS. At the same time, the high level output by the fifth logic enhancement module makes the gate voltage of the low-side driving transistor LS_NLDMOS the Boot1 voltage, thus turning on the low-side driving transistor LS_NLDMOS. The driving signal HS_DRV voltage output by the low-side driving transistor LS_NLDMOS is pulled down to SW, controlling the gate voltage of the external power N-MOS transistor to 0V, thus turning off the external power N-MOS transistor.

[0015] The technical solution provided in this application may include the following beneficial effects: By using standard 5V CMOS devices to construct logic enhancement and level conversion modules, and coordinating with the power supply module to control the drive module, high-voltage NLDMOS / NDEMOS devices are used only in the drive module to achieve on / off control of the high-side external power N-MOS transistor, reducing the area and manufacturing cost of the drive circuit chip. At the same time, by utilizing the characteristics of low-voltage devices with small parasitic parameters and fast switching speed, the switching speed and operating frequency of the drive circuit are improved, and the drive logic processing is completed in the low-voltage domain, effectively reducing circuit power consumption.

[0016] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0017] The above and other objects, features and advantages of this application will become more apparent from the more detailed description of exemplary embodiments thereof in conjunction with the accompanying drawings, wherein the same reference numerals generally represent the same components in the exemplary embodiments thereof.

[0018] Figure 1 This is a schematic diagram of the high-side N-MOS drive circuit of the switching power supply shown in the embodiments of this application; Figure 2 This is a schematic diagram of the power supply module of the high-side N-MOS drive circuit of the switching power supply shown in the embodiments of this application; Figure 3 This is a schematic diagram of the operating timing of the high-side N-MOS drive circuit of the switching power supply shown in the embodiment of this application. Detailed Implementation

[0019] Embodiments of this application will now be described in more detail with reference to the accompanying drawings. While embodiments of this application are shown in the drawings, it should be understood that this application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to make this application more thorough and complete, and to fully convey the scope of this application to those skilled in the art.

[0020] It should be understood that although the terms "first," "second," "third," etc., may be used in this application to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0021] The technical solutions of the embodiments of this application are described in detail below with reference to the accompanying drawings.

[0022] Figure 1 This is a schematic diagram of the high-side N-MOS driving circuit of the switching power supply shown in the embodiments of this application.

[0023] In some implementations, see Figure 1 A high-side N-MOS drive circuit for a switching power supply, comprising: Main controller module, logic enhancement module, level conversion module, driver module, power supply module, and external power N-MOS transistor; The logic enhancement module includes two or more sub-modules, which are respectively connected between the main controller module, the level conversion module and the driver module, and are used to enhance the logic signals output by the main controller module in stages. The level conversion module is connected between the sub-modules of the logic enhancement module and is used to perform logic level conversion between the low-voltage domain and the high-voltage domain; The driver module is connected to the output of the logic enhancement module and converts the enhanced logic signal into a drive level suitable for the external power N-MOS transistor. The power supply module is connected to the logic enhancement module and the drive module, and provides the drive module with a drive voltage higher than the power supply voltage; The logic enhancement module and level conversion module are both composed of standard 5V CMOS devices, while the drive module is composed of high-voltage NLDMOS or NDEMOS devices.

[0024] Specifically, the logic enhancement module includes a first logic enhancement module, a second logic enhancement module, a third logic enhancement module, a fourth logic enhancement module, and a fifth logic enhancement module; the level conversion module includes a first level conversion module and a second level conversion module; and the driving module includes a high-side driving transistor HS_NLDMOS and a low-side driving transistor LS_NLDMOS.

[0025] like Figure 2 As shown, the power supply module includes a drive power supply VCCX, a first diode D1, an LDO module, a first capacitor C1, a second capacitor C2, a second diode D2, a third capacitor C3, a third diode D3, and a fourth capacitor C4. The drive power supply VCCX is connected to the LDO module and outputs from the Vccx terminal of the LDO module after passing through the first diode D1 inside the LDO module. The Vccx terminal is connected to the drive module and the first capacitor C1. The other end of the first capacitor C1 is connected to the first reference voltage SW. After being processed by the LDO module, the drive power supply VCCX outputs a supply voltage at the VCC terminal. The VCC terminal of the LDO module is connected to the second capacitor C2, the anode of the second diode D2, and the anode of the third diode D3. The other end of the second capacitor C2 is grounded. The cathode of the second diode D2 is connected to one end of the third capacitor C3, and the voltage at the cathode of the second diode D2 is the first bootstrap voltage Boot1. The other end of the third capacitor C3 is connected to the first reference voltage SW. The cathode of the third diode D3 is connected to the fourth capacitor C4, and the voltage at the cathode of the third diode D3 is the second bootstrap voltage Boot2. The other end of the fourth capacitor C4 is connected to the second reference voltage VS.

[0026] The voltage value at the Vccx terminal is the driving power supply VCCX voltage value minus the voltage drop of the first diode D1. The Vccx voltage is the gate drive voltage of the external power N-MOS transistor, which can be set to 12V, 20V or other voltage values ​​according to the specifications of the external power N-MOS transistor. After the driving power supply VCCX is processed by the LDO module, the output supply voltage at the VCC terminal is 5V or 3.3V.

[0027] The first logic enhancement module receives logic signals from the main controller module at its input terminal and its output terminal is connected to the input terminal of the first level conversion module. The reference terminal of the first logic enhancement module is grounded, and its supply voltage is the supply voltage VCC output by the power supply module. The first level conversion module converts the logic level from GND to VCC to the voltage domain from SW to SW+Boot1, where GND is the ground voltage, VCC is the supply voltage, SW is the first reference voltage, and Boot1 is the first bootstrap voltage. The output terminal of the first level conversion module is connected to the input terminal of the second logic enhancement module. The reference voltage of the second logic enhancement module is the first reference voltage SW, and its supply voltage is the first reference voltage SW plus the first bootstrap voltage Boot1.

[0028] The output of the second logic enhancement module is connected to the inputs of the third and fifth logic enhancement modules, respectively. The reference voltage of the third logic enhancement module is the first reference voltage SW, and the supply voltage is the first reference voltage SW plus the first bootstrap voltage Boot1. The output of the third logic enhancement module is connected to the input of the second level conversion module, which converts the logic level from SW to SW+Boot1 to the voltage domain from VS to VS+Boot2, where VS is the second reference voltage and Boot2 is the second bootstrap voltage. The output of the second level conversion module is connected to the input of the fourth logic enhancement module, which uses the second reference voltage VS as its reference voltage and the supply voltage as the second reference voltage VS plus the second bootstrap voltage Boot2. The output of the fourth logic enhancement module is connected to the gate of the high-side driver transistor HS_NLDMOS of the driver module, and the drain of the high-side driver transistor HS_NLDMOS is connected to the drive power supply SW+Vccx.

[0029] The reference voltage of the fifth logic enhancement module is the first reference voltage SW, and the supply voltage is the first reference voltage SW plus the first bootstrap voltage Boot1. The output terminal of the fifth logic enhancement module is connected to the gate of the low-side driving transistor LS_NLDMOS of the driving module. The source of the low-side driving transistor LS_NLDMOS is connected to the first reference voltage SW. The drain of the low-side driving transistor LS_NLDMOS is connected to the source of the high-side driving transistor HS_NLDMOS and the source terminal of the external power N-MOS transistor.

[0030] The source or low-side drive transistor of HS_NLDMOS outputs an enhanced drive signal HS_DRV from the drain of LS_NLDMOS. The HS_DRV signal is used to control the external power N-MOS transistor to turn on or off.

[0031] When the drive power supply VCCX voltage value is set to When Vccx is 12V. When the logic signal is low, Boot1 voltage is 5V, VS voltage is 0V, Boot2 voltage is 5V, Vccx voltage is 12V, SW voltage is 0V, HS_DRV voltage is 0V, and HS N-MOS is off. When the logic signal is high, Boot1 voltage is VIN+5V, VS voltage is VIN+12V, Boot2 voltage is VIN+12V+5V, Vccx voltage is VIN+12V, SW voltage is VIN, HS_DRV voltage is VIN+12V, and HS N-MOS is on. VIN is the input voltage of the switching power supply control circuit.

[0032] In some embodiments, corresponding to the aforementioned application function implementation device embodiments, this application also provides a driving method including the application of the above-described high-side N-MOS driving circuit of the dynamic switching power supply.

[0033] A driving method for a high-side N-MOS driving circuit of a switching power supply, comprising: When the external power N-MOS transistor needs to be turned on to supply current to the load, the main controller module LOGIC generates a high-level logic signal, `logic`. This `logic` signal is amplified by the first logic enhancement module. The further high-level logic signal is sent to the first level conversion module, which converts the high-level signal from GND to VCC to the SW to SW+Boot1 voltage domain. This signal then passes through the second, third, and fourth logic enhancement modules and the second level conversion module. The second level conversion module converts the high-level signal from SW to SW+Boot1 to the VS to VS+Boot2 voltage domain, further controlling the gate-source voltage of the driver module HS_NLDMOS to the Boot2 voltage, thus turning on HS_NLDMOS. Simultaneously, the low-level output of the fourth logic enhancement module causes the gate-source voltage of LS_NLDMOS to be 0V, turning LS_NLDMOS off. The HS_DRV drive voltage is then raised to SW+VCCX, making the gate-source voltage of the external power N-MOS transistor Vccx, thus turning it on.

[0034] like Figure 3 As shown, when the logic signal is high, the Boot1 voltage is VIN+5V, the VS voltage is VIN+12V, the Boot2 voltage is VIN+12V+5V, the Vccx voltage is VIN+12V, the SW voltage is VIN, the HS_DRV voltage is VIN+12V, and the external power N-MOS transistor is turned on. Here, VIN is the input power supply voltage in the entire switching power supply control circuit system, and VIN is connected to the drain of the external power N-MOS transistor.

[0035] When the external power N-MOS transistor needs to be turned off, the main controller module LOGIC generates a low-level logic signal, which is amplified by the first logic enhancement module. This low-level signal is then sent to the first level conversion module, which converts the low-level signal from GND to VCC to the SW to SW+Boot1 voltage domain. This signal then passes through the second, third, and fourth logic enhancement modules and the second level conversion module. The second level conversion module converts the low-level signal from SW to SW+Boot1 to the VS to VS+Boot2 voltage domain, further controlling the gate-source voltage of the HS_NLDMOS in the driver module to 0V, thus turning off the HS_NLDMOS. Simultaneously, the high-level output of the fourth logic enhancement module sets the gate-source voltage of the LS_NLDMOS to the Boot1 voltage, turning on the LS_NLDMOS. The HS_DRV signal drive voltage is pulled down to SW, making the gate-source voltage of the external power N-MOS transistor 0V, thus turning it off.

[0036] like Figure 3 As shown, when the logic signal is low, the Boot1 voltage is 5V, the VS voltage is 0V, the Boot2 voltage is 5V, the Vccx voltage is 12V, the SW voltage is 0V, the HS_DRV voltage is 0V, and the external power N-MOS transistor is turned off.

[0037] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A high-side N-MOS driving circuit for a switching power supply, characterized in that, include: Main controller module, logic enhancement module, level conversion module, driver module, power supply module, and external power N-MOS transistor; The logic enhancement module includes two or more sub-modules, which are respectively connected between the main controller module, the level conversion module and the driver module, and are used to enhance the logic signals output by the main controller module in stages. The level conversion module is connected between the sub-modules of the logic enhancement module and is used to perform logic level conversion between the low-voltage domain and the high-voltage domain. The driving module is connected to the output of the logic enhancement module and converts the enhanced logic signal into a driving level suitable for the external power N-MOS transistor. The power supply module is connected to the logic enhancement module and the drive module, and provides the drive module with a drive voltage higher than the power supply voltage; The logic enhancement module and level conversion module are composed of standard 5V CMOS devices, and the driving module is composed of high-voltage NLDMOS or NDEMOS devices.

2. The high-side N-MOS drive circuit for a switching power supply according to claim 1, characterized in that: The logic enhancement module includes a first logic enhancement module, a second logic enhancement module, a third logic enhancement module, a fourth logic enhancement module, and a fifth logic enhancement module; The level conversion module includes a first level conversion module and a second level conversion module; The first logic enhancement module receives the logic signal output by the main controller module at its input terminal, and its output terminal is connected to the input terminal of the first level conversion module. The output of the first level conversion module is connected to the input of the second logic enhancement module, and the output of the second logic enhancement module is connected to the inputs of the third logic enhancement module and the fifth logic enhancement module, respectively. The output of the third logic enhancement module is connected to the input of the second level conversion module, and the output of the second level conversion module is connected to the input of the fourth logic enhancement module. The output of the fourth logic enhancement module is connected to the driver module; The output of the fifth logic enhancement module is connected to the driver module.

3. The high-side N-MOS drive circuit for a switching power supply according to claim 2, characterized in that: The reference terminal of the first logic enhancement module is grounded, and the supply voltage is the supply voltage VCC output by the power supply module; The reference voltage of the second logic enhancement module is the first reference voltage SW, and the power supply voltage is SW+Boot1, where Boot1 is the first bootstrap voltage, which is output by the power supply module. The reference voltage of the third logic enhancement module is the first reference voltage SW, and the power supply voltage is SW+Boot1; The reference voltage of the fourth logic enhancement module is the second reference voltage VS, and the power supply voltage is VS+Boot2. Boot2 is the second bootstrap voltage, which is output by the power supply module. The reference voltage of the fifth logic enhancement module is the first reference voltage SW, and the power supply voltage is SW+Boot1; The first level conversion module converts the logic level from GND to VCC voltage domain to the voltage domain from SW to SW+Boot1. The second level conversion module converts the logic level of the voltage domain from SW to SW+Boot1 to the voltage domain from VS to VS+Boot2.

4. The high-side N-MOS drive circuit for a switching power supply according to claim 2, characterized in that: The driving module includes a high-side driving transistor HS_NLDMOS and a low-side driving transistor LS_NLDMOS; The gate of the high-side driving transistor HS_NLDMOS is connected to the output terminal of the fourth logic enhancement module, and the drain of the high-side driving transistor HS_NLDMOS is connected to the drive power output terminal of the power supply module. The gate of the low-side driving transistor LS_NLDMOS is connected to the output terminal of the fifth logic enhancement module, and the source of the low-side driving transistor LS_NLDMOS is connected to the first reference voltage SW. The drain of the low-side driving transistor LS_NLDMOS is connected to the source of the high-side driving transistor HS_NLDMOS and the drain of the external power N-MOS transistor. The source of the high-side driving transistor HS_NLDMOS or the drain of the low-side driving transistor LS_NLDMOS outputs an enhanced driving signal HS_DRV, which is used to control the external power N-MOS transistor to turn on or off.

5. The high-side N-MOS drive circuit for a switching power supply according to claim 1, characterized in that, The power supply module includes: The following components are included: a power supply VCCX, a first diode D1, an LDO module, a first capacitor C1, a second capacitor C2, a second diode D2, a third capacitor C3, a third diode D3, and a fourth capacitor C4. The driving power supply VCCX is connected to the LDO module and outputs from the Vccx terminal of the LDO module after passing through the first diode D1 inside the LDO module. The Vccx terminal is connected to the driving module and the first capacitor C1. The other end of the first capacitor C1 is connected to the first reference voltage SW. After the drive power supply VCCX is processed by the LDO module, the VCC terminal outputs the supply voltage. The VCC terminal of the LDO module is connected to the anode of the second capacitor C2, the second diode D2, and the third diode D3. The other end of the second capacitor C2 is grounded; The cathode of the second diode D2 is connected to one end of the third capacitor C3. The voltage at the cathode of the second diode D2 is the first bootstrap voltage Boot1. The other end of the third capacitor C3 is connected to the first reference voltage SW. The cathode of the third diode D3 is connected to the fourth capacitor C4, and the voltage at the cathode of the third diode D3 is the second bootstrap voltage Boot2. The other end of the fourth capacitor C4 is connected to the second reference voltage VS.

6. The high-side N-MOS drive circuit for a switching power supply according to claim 5, characterized in that: The voltage value at the Vccx terminal is the driving power supply VCCX voltage value minus the voltage drop of the first diode D1. The Vccx voltage is the gate drive voltage of the external power N-MOS transistor, which can be set to 12V, 20V or other voltage values ​​according to the specifications of the external power N-MOS transistor. The VCC terminal of the drive power supply VCCX is processed by the LDO module and the output voltage is 5V or 3.3V.

7. A driving method for a high-side N-MOS driving circuit of a switching power supply, applicable to the high-side N-MOS driving circuit of a switching power supply as described in any one of claims 1-6, characterized in that, include: When it is necessary to turn on or off the external power N-MOS transistor, the main controller module outputs a logic signal. The logic enhancement module enhances the logic input signal; The level conversion module converts the enhanced logic signal between the low-voltage domain and the high-voltage domain; The power supply module provides a drive level higher than the power supply voltage to the drive module; The drive module outputs a drive signal to the gate of an external power N-MOS to control its turn-on or turn-off. The logic enhancement module and the level conversion module use standard 5V CMOS devices.

8. The driving method for the high-side N-MOS driving circuit of the switching power supply according to claim 7, characterized in that: When the external power N-MOS transistor needs to be turned on, the main controller module generates a high-level logic signal, which is then amplified by the first logic enhancement module. The enhanced high-level logic signal is sent to the first level conversion module, which converts the high-level logic signal from GND to VCC voltage domain to SW to SW+Boot1 voltage domain. Then, after passing through the second logic enhancement module, the third logic enhancement module, the fourth logic enhancement module, and the second level conversion module, the second level conversion module converts the high-level logic signal from SW to SW+Boot1 voltage domain to VS to VS+Boot2 voltage domain, controls the gate voltage of the high-side driving transistor HS_NLDMOS to Boot2, and turns on the high-side driving transistor HS_NLDMOS; At the same time, the low level output by the fifth logic enhancement module makes the gate voltage of the low-side drive transistor LS_NLDMOS 0V, and the low-side drive transistor LS_NLDMOS is turned off. The high-side drive transistor HS_NLDMOS outputs a drive signal HS_DRV voltage that is raised to SW+VCCX, controlling the gate-source voltage of the external power N-MOS transistor to be the drive voltage Vccx, thus turning on the external power N-MOS transistor.

9. The driving method for the high-side N-MOS driving circuit of the switching power supply according to claim 7, characterized in that: When the external power N-MOS transistor needs to be turned off, the main controller module generates a low-level logic signal, which is then amplified by the first logic enhancement module. The enhanced low-level logic signal is sent to the first level conversion module, which converts the low level of the GND to VCC voltage to the SW to SW+Boot1 voltage domain. Then, after passing through the second logic enhancement module, the third logic enhancement module, the fourth logic enhancement module, and the second level conversion module, the second level conversion module converts the low-level signal from SW to SW+Boot1 voltage domain to VS to VS+Boot2 voltage domain, controls the gate voltage of the high-side driving transistor HS_NLDMOS to 0V, and turns off the high-side driving transistor HS_NLDMOS. At the same time, the high level output of the fifth logic enhancement module makes the gate voltage of the low-side driving transistor LS_NLDMOS the Boot1 voltage, and the low-side driving transistor LS_NLDMOS is turned on. The drive signal HS_DRV output by the low-side drive transistor LS_NLDMOS is pulled down to SW, controlling the gate voltage of the external power N-MOS transistor to 0V, and the external power N-MOS transistor is turned off.

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