Two-mode power-on synchronization method based on computer security platform

Abstract

The invention discloses a two-module power-on synchronization method based on a computer security platform, which comprises the following steps of: judging a system module which runs first in two system modules, taking the system module which runs first as the system module, and taking the system module which runs later as a relative system module; the system module judges whether the relative system module reaches a preset synchronous input trigger count or not through a relative system module counting pulse monitoring program, if not, the relative system module counting pulse continues to be monitored, and if yes, the relative system module is started. If yes, the system module judges whether the system module reaches a preset synchronous input trigger count or not through a counting pulse monitoring program of the system module, if not, counting pulses of the system module continue to be monitored, and if yes, power-on synchronization is achieved after time delay is conducted according to preset power-on synchronization interval time; and ensuring that all redundant computing units can be consistently transited to a stable and synchronous initial state from a disordered initial state, and starting to execute the same application program.

Description

Technical Field

[0001] This invention belongs to the field of computer security platform technology, and specifically relates to a method for power-on synchronization of two modes based on a computer security platform. Background Technology

[0002] Dual-mode power-on of a computer security platform refers to the process where, during startup, both system modules, typically referred to as Module A and Module B, simultaneously power on and enter operational status. This dual-redundancy design is a core technology of secure computer platforms, used to achieve high reliability and fault-tolerant protection. It is widely used in fields with extremely high safety requirements, such as rail transportation, industrial control, and power systems, effectively preventing system failures caused by single points of failure.

[0003] In existing technologies, power-on synchronization is entirely guaranteed by the power supply of the two modes to ensure the consistency of power-on for the two modes. Due to hardware differences, even chips from the same batch may have slight differences in their power-on reset timing and crystal oscillator startup time. In addition, the frequency deviation of the independent clock sources of each channel can also lead to asynchrony.

[0004] When the two modes power on and start asynchronously, their initial states are completely different, resulting in different execution results of the first instruction. The comparator will immediately detect the "difference," thereby triggering a system failure. This may force the system to crash or lock in a safe state, preventing it from starting normally. The asynchronous start point means that the so-called "redundant comparison" is invalid from the beginning, the safety mechanism fails, and the system cannot achieve its designed safety goals. Summary of the Invention

[0005] To solve the above-mentioned technical problems, the present invention provides a method for synchronizing power-on of two modes based on a computer security platform.

[0006] The specific plan is as follows: A method for two-mode power-on synchronization based on a computer security platform includes the following steps: S1): Write the relative system module counting pulse monitoring program and the local system module counting pulse monitoring program into the two system modules; S2): Determine the system module that runs first among the two system modules, and take the system module that runs first as this system module, and the system module that runs later as the relative system module; S3): This system module uses a relative system module counting pulse monitoring program to determine whether the relative system module has reached the preset synchronization input trigger count (SYNC_OUT_TOGGLE_TIME). If it has not reached the count, it continues to monitor the relative system module counting pulse; if it has reached the count, it proceeds to S4. S4): This system module uses its counting pulse monitoring program to determine whether it has reached the preset synchronization input trigger count (SYNC_OUT_TOGGLE_TIME). If it has not reached the target, it continues to monitor the counting pulses. If it has reached the target, it achieves power-on synchronization after a delay based on the preset power-on synchronization interval (POWER_ON_ST_SYNC_INTERVAL).

[0007] In the two system modules, the synchronous output pin of one system module is electrically connected to the synchronous input pin of the other system module.

[0008] The system module obtains the counting pulse relative to the system module or the counting pulse of the system module itself by reading the status of its own synchronization input pin.

[0009] The relative system module counting pulse monitoring program includes the following steps: P1): Determine whether the dynamic counting pulse value (rcv_pule) of the relative system module is less than the preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME). If it is not less than, then proceed to the counting pulse monitoring program of this system module; If it is less than, proceed to P2). P2): The state of the synchronous output pin of the relative system module toggles; P3): This system module reads the status of the synchronous output pins of the relative system module through its own synchronous input pins; P4): Determine whether the read pin status is consistent with the last read pin status. If they match, proceed to page 7). If there is a discrepancy, then execute P5) to P7). P5): This system module increments the dynamic counting pulse value (rcv_pulse) relative to the system module by one; P6): Update the pin status read this time to the previous pin status; P7: Delay based on the preset delay time (SYNC_OUT_TOGGLE_DELAY_TICK); P8): This system module checks again whether the read pin status is consistent with the previously read pin status. If they match, it indicates that the pin status update was successful. Alternatively, if the pin status does not change after the preset delay time, then execute P11). If they are inconsistent, it indicates that the pin status was not updated successfully, or that the pin status changed after the preset delay time, in which case P9) to P11) will be executed. P9): This system module increments the dynamic counting pulse value (rcv_pulse) relative to the system module by one; P10): Update the pin status read this time to the previous pin status; P11: Proceed to step P1 after a preset delay time (SYNC_OUT_TOGGLE_DELAY_TICK).

[0010] The module counting pulse monitoring program of this system includes the following steps: T1): Initialize the counting pulse value cnt of this system module to zero; T2: Determine whether the counting pulse value cnt of this system module is less than the preset synchronous input trigger count (SYNC_OUT_). TOGGLE_TIME). If it is not less than, then proceed to T6); If it is less than, then execute T3) to T5). T3): Toggle the state of the synchronous output pin of this system module; T4): The counting pulse value cnt of this system module increases by one; T5): After a delay, proceed to T2. The delay time is twice the preset delay time (SYNC_OUT_TOGGLE_DELAY_TICK). T6): Set the synchronous output pin of this system module to a high level.

[0011] The method also includes initialization variables, which include CPU clock configuration and GPIO configuration for two system modules.

[0012] This invention discloses a method for power-on synchronization of two-mode systems based on a computer security platform. The same program is written in both system modules. The two system modules perform power-on synchronization processing through the relative system module counting pulse monitoring program and the counting pulse monitoring program of the current system module, ensuring that all redundant computing units can transition consistently from a chaotic initial state to a stable and synchronized initial state and start executing the same application program. Attached Figure Description

[0013] Figure 1 This is a structural diagram showing the interconnection of the two-mode system of the present invention.

[0014] Figure 2 This is a schematic diagram of the overall process of the present invention.

[0015] Figure 3 This is a flowchart of the system module counting pulse monitoring program.

[0016] Figure 4 This is the flowchart of the module counting pulse monitoring program of this system. Detailed Implementation

[0017] The technical solutions in the embodiments of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the implementation of the present invention, and not all of it. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0018] like Figures 1 to 2 As shown, a method for two-mode power-on synchronization based on a computer security platform includes the following steps: S1): Write the relative system module counting pulse monitoring program 1 and the system module counting pulse monitoring program 2 into the two system modules; In this embodiment, the two system modules are system module A and system module B, which are abbreviated as module A and module B, respectively. Module A and module B are two completely identical system modules. S2): Determine the system module that runs first among the two system modules, and designate the first-running system module as this system module, and the later-running system module as the relative system module; for example... Figure 2 As shown, if module A runs first, then module A is the module of this system, and module B is the module of the relative system. If module B runs first, then module B is the module of this system, and module A is the module of the relative system. S3): This system module uses the relative system module counting pulse monitoring program 1 to determine whether the relative system module has reached the preset synchronization input trigger count (SYNC_OUT_TOGGLE_TIME). If it has not reached the count, it continues to monitor the relative system module counting pulse. If it has reached the count, it proceeds to S4. S4): This system module uses the system module counting pulse monitoring program 2 to determine whether the system module has reached the preset synchronization input trigger count (SYNC_OUT_TOGGLE_TIME). If it has not reached the target, the system module counting pulse will continue to be monitored. If it has reached the target, the system module will achieve power-on synchronization after a delay according to the preset power-on synchronization interval time (POWER_ON_ST_SYNC_INTERVAL).

[0019] In this embodiment, a synchronization input trigger count (SYNC_OUT_TOGGLE_TIME) is pre-written into both system modules A and B. When the pulse count of the relative system module reaches the synchronization input trigger count (SYNC_OUT_TOGGLE_TIME), the pulse count of this system module is restarted. After the pulse count of this system module is restarted, it reaches the synchronization input trigger count (SYNC_OUT_TOGGLE_TIME). At this point, the conditions for power-on synchronization are met, and then power-on synchronization is achieved after a delay.

[0020] In the two system modules, the synchronous output pin of one system module is electrically connected to the synchronous input pin of the other system module.

[0021] The system module obtains the counting pulse relative to the system module or the counting pulse of the system module itself by reading the status of its own synchronization input pin.

[0022] The relative system module counting pulse monitoring program 1 is used to monitor whether the pulse count of the relative system module reaches the synchronous input trigger count (SYNC_OUT_TOGGLE_TIME). If it does not reach the target, the state of the synchronous output pin of the relative system module is toggled. Each time it is toggled, the pulse count is incremented by one until the pulse count of the relative system module reaches the synchronous input trigger count (SYNC_OUT_TOGGLE_TIME).

[0023] like Figure 3 As shown, the relative system module counting pulse monitoring program 1 includes the following steps: P1): Determine whether the dynamic counting pulse value (rcv_pule) of the relative system module is less than the preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME). If it is not less than, then proceed to module counting pulse monitoring program 2 of this system; If it is less than, proceed to P2). P2): The state of the synchronous output pin of the relative system module toggles; P3): This system module reads the status of the synchronous output pins of the relative system module through its own synchronous input pins; P4): Determine whether the read pin status is consistent with the last read pin status. If they match, proceed to page 7). If there is a discrepancy, then execute P5) to P7). P5): This system module increments the dynamic counting pulse value (rcv_pulse) relative to the system module by one; P6): Update the pin status read this time to the previous pin status; P7: Delay based on the preset delay time (SYNC_OUT_TOGGLE_DELAY_TICK); P8): This system module checks again whether the read pin status is consistent with the previously read pin status. If they match, it indicates that the pin status update was successful. Alternatively, if the pin status does not change after the preset delay time, then execute P11). If they are inconsistent, it indicates that the pin status was not updated successfully, or that the pin status changed after the preset delay time, in which case P9) to P11) will be executed. P9): This system module increments the dynamic counting pulse value (rcv_pulse) relative to the system module by one; P10): Update the pin status read this time to the previous pin status; P11: After a preset delay time (SYNC_OUT_TOGGLE_DELAY_TICK), proceed to step P1). The system module counting pulse monitoring program 2 is used to monitor whether the pulse count of the system module reaches the synchronous input trigger count (SYNC_OUT_TOGGLE_TIME). If it does not reach the target, the state of the synchronous output pin of the system module is toggled. Each toggle increments the pulse count by one until the pulse count of the system module reaches the synchronous input trigger count (SYNC_OUT_TOGGLE_TIME).

[0024] like Figure 4 As shown, the counting pulse monitoring program 2 of this system module includes the following steps: T1): Initialize the counting pulse value cnt of this system module to zero; T2: Determine whether the counting pulse value cnt of this system module is less than the preset synchronous input trigger count (SYNC_OUT_). TOGGLE_TIME). If it is not less than, then proceed to T6); If it is less than, then execute T3) to T5). T3): Toggle the state of the synchronous output pin of this system module; T4): The counting pulse value cnt of this system module increases by one; T5): After a delay, proceed to T2. The delay time is twice the preset delay time (SYNC_OUT_TOGGLE_DELAY_TICK). T6): Set the synchronous output pin of this system module to a high level.

[0025] The method also includes initializing variables, which include CPU clock configuration and GPIO configuration performed by two system modules. Upon system power-on, after the CPU completes clock and GPIO configuration, a power-on synchronization operation is immediately performed.

[0026] This invention discloses a method for power-on synchronization of two-mode systems based on a computer security platform. The same program is written in both system modules. The two system modules perform power-on synchronization processing through the relative system module counting pulse monitoring program 1 and the system module counting pulse monitoring program 2 to ensure that all redundant computing units can transition from a chaotic initial state to a stable and synchronized initial state and start executing the same application.

[0027] Power-on synchronization is far more than simply "powering on simultaneously." It is a complex control system that integrates hardware design and safety concepts. It ensures that the redundant system can operate reliably as a coordinated whole from the moment of startup, and is an indispensable foundational element for building a highly reliable and secure computer platform.

[0028] The technical means disclosed in this invention are not limited to those disclosed in the above embodiments, but also include technical solutions composed of any combination of the above technical features. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of this invention, and these improvements and modifications are also considered within the scope of protection of this invention.

Claims

1. A method for synchronizing power-on of two modes based on a computer security platform, characterized in that: Includes the following steps: S1): Write the relative system module counting pulse monitoring program (1) and the system module counting pulse monitoring program (2) into the two system modules. S2): Determine the system module that runs first among the two system modules, and take the system module that runs first as this system module, and the system module that runs later as the relative system module; S3): This system module uses the relative system module counting pulse monitoring program (1) to determine whether the relative system module has reached the preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME). If it has not reached the target, it continues to monitor the relative system module counting pulse. If it has reached the target, it proceeds to S4). S4): The system module uses the system module counting pulse monitoring program (2) to determine whether the system module has reached the preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME). If it has not reached the preset count, the system module counting pulse will continue to be monitored. If it has reached the preset power-on synchronization interval time (POWER_ON_ST_SYNC_INTERVAL) will be used to delay the power-on synchronization and then achieve power-on synchronization.

2. The method for two-mode power-on synchronization based on a computer security platform according to claim 1, characterized in that: In the two system modules, the synchronous output pin of one system module is electrically connected to the synchronous input pin of the other system module.

3. The method for two-mode power-on synchronization based on a computer security platform according to claim 1, characterized in that: The system module obtains the counting pulse relative to the system module or the counting pulse of the system module itself by reading the status of its own synchronization input pin.

4. The method for two-mode power-on synchronization based on a computer security platform according to claim 1, characterized in that: The relative system module counting pulse monitoring program (1) includes the following steps: P1): Determine whether the dynamic counting pulse value (rcv_pule) of the relative system module is less than the preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME). If it is not less than, then proceed to the module counting pulse monitoring program (2) of this system. If it is less than, proceed to P2). P2): The state of the synchronous output pin of the relative system module toggles; P3): This system module reads the status of the synchronous output pins of the relative system module through its own synchronous input pins; P4): Determine whether the read pin status is consistent with the last read pin status. If they match, proceed to page 7). If there is a discrepancy, then execute P5) to P7). P5): This system module increments the dynamic counting pulse value (rcv_pulse) relative to the system module by one; P6): Update the pin status read this time to the previous pin status; P7: Delay based on the preset delay time (SYNC_OUT_TOGGLE_DELAY_TICK); P8): This system module checks again whether the read pin status is consistent with the previously read pin status. If they match, it indicates that the pin status update was successful. Alternatively, if the pin status does not change after the preset delay time, then execute P11). If they are inconsistent, it indicates that the pin status was not updated successfully, or that the pin status changed after the preset delay time, in which case P9) to P11) will be executed. P9): This system module increments the dynamic counting pulse value (rcv_pulse) relative to the system module by one; P10): Update the pin status read this time to the previous pin status; P11: Proceed to step P1 after a preset delay time (SYNC_OUT_TOGGLE_DELAY_TICK).

5. The method for two-mode power-on synchronization based on a computer security platform according to claim 1, characterized in that: The counting pulse monitoring program (2) of this system module includes the following steps: T1): Initialize the counting pulse value cnt of this system module to zero; T2: Determine whether the counting pulse value cnt of this system module is less than the preset synchronous input trigger count (SYNC_OUT_). TOGGLE_TIME). If it is not less than, then proceed to T6); If it is less than, then execute T3) to T5). T3): Toggle the state of the synchronous output pin of this system module; T4): The counting pulse value cnt of this system module increases by one; T5): After a delay, proceed to T2. The delay time is twice the preset delay time (SYNC_OUT_TOGGLE_DELAY_TICK). T6): Set the synchronous output pin of this system module to a high level.

6. The method for two-mode power-on synchronization based on a computer security platform according to claim 1, characterized in that: The method also includes initialization variables, which include CPU clock configuration and GPIO configuration for two system modules.

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