System-level simulation method for L-band switch filter module
By employing a system-level simulation method, the problems of low simulation efficiency and insufficient accuracy of L-band switched filter modules are solved, achieving efficient and accurate consistency between simulation and actual measurement, and supporting module structure optimization and ringing suppression.
Patent Information
- Application Number
- CN202610152597.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-02-03
- Publication Date
- 2026-05-12
AI Technical Summary
Existing simulation methods for L-band switched filter modules suffer from low simulation efficiency, inaccurate location of impedance discontinuities, and large deviations between simulation and actual measurements, leading to low R&D efficiency and difficulty in performance improvement.
A system-level simulation approach was adopted, including importing the 2D layout of the module into 3D electromagnetic simulation software to build a 3D model, performing single-channel cutting and S-parameter simulation, building a TDR simulation circuit to locate impedance discontinuities, and performing joint simulation and verification in ADS.
Significantly improves simulation efficiency, accurately locates impedance discontinuities, and reduces the deviation between simulation and actual measurement to less than 0.3dB, shortening the R&D cycle and reducing costs.
Smart Images
Figure CN122021532A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of radio frequency device simulation technology, specifically relating to a system-level simulation method for an L-band switching filter module. Background Technology
[0002] As a core component in satellite navigation, airborne communication, and the Internet of Things, L-band switching filter modules need to achieve 16-channel switching within the 967-1215MHz frequency band. Their performance directly determines the system's signal purity and operational stability. Existing module simulation methods suffer from the following problems: First, traditional 3D electromagnetic simulation is not optimized for multi-channel structures, with single-channel simulation taking up to 8 hours, resulting in low R&D efficiency. Second, there is a lack of precise impedance discontinuity location methods, making it difficult to effectively identify impedance abrupt changes at locations such as microstrip lines, vertical interconnect vias, and gold wire bonds, leading to difficulties in suppressing ringing phenomena. Third, electromagnetic simulation is disconnected from circuit simulation, failing to consider the synergistic effects of switches, filters, and interconnect structures, resulting in simulation-to-measure deviations exceeding 0.5dB, which is insufficient to guide engineering design.
[0003] While some existing technologies employ single tools like HFSS or ADS for simulation, they lack a complete workflow encompassing "3D electromagnetic modeling - single-channel optimization - impedance localization - co-simulation - experimental verification." This approach fails to balance simulation efficiency and accuracy, hindering the shortening of module development cycles and performance improvements. Therefore, an efficient and accurate system-level simulation method is urgently needed to address the simulation optimization challenges of multi-channel LTCC switching filter modules. Summary of the Invention
[0004] To address the aforementioned shortcomings in existing technologies, this invention provides a system-level simulation method for L-band switched filter modules, which solves the problems of low simulation efficiency, inaccurate location of impedance discontinuities, and large deviations between simulation and actual measurements in existing L-band switched filter module simulations.
[0005] To achieve the above-mentioned objectives, the technical solution adopted by this invention is as follows: a system-level simulation method for an L-band switched filter module, comprising the following steps: S1. Import the 2D layout of the module into the 3D electromagnetic simulation software to create a 3D model of the module. S2. Use a planar cutting method to cut the 3D model of the module into a single channel, retaining the target single channel; S3. Perform S-parameter simulation based on a single channel to extract the insertion loss, input reflection coefficient, and output reflection coefficient of the single channel; S4. Build a TDR simulation circuit in ADS and locate the impedance discontinuity points; S5. Build a co-simulation circuit in ADS and perform S-parameter co-simulation and verification.
[0006] Furthermore: S1 specifically refers to: S11. 3D Model Creation and Parameter Setting: Import the 2D layout of the module drawn in Altium Designer into ANSYS HFSS layer by layer. Set the height and thickness of each layer according to the stack-up structure of the module. Define the substrate material as Ferro-A6M and the via and trace material as copper. Ensure that the model size is 13.6×13.6×1.41mm and complete the electrical connection integrity check. S12. Port and excitation configuration: Based on the port positions in the layout, a single-channel simulation method is adopted. 12 lumped ports are set for each channel. The metal shell is set as an ideal electric wall, the open surface is set as a radiation boundary, and the excitation signal is a sine wave with a frequency range of 967-1215MHz and an amplitude of 2.3V.
[0007] Furthermore: In S11, before importing the 2D layout of the module layer by layer into ANSYSHFSS, create a tech format layer information file, with the layer name consistent with the CAD layout, the unit set to mm, and define the layer color, height and thickness parameters layer by layer.
[0008] Furthermore: In S12, when setting the lumped port, ensure that the port edge is aligned with the upper and lower stacks of the module, and select a ground plane that matches the layer where the port is located.
[0009] Furthermore: S2 specifically refers to: Boolean operations are used to perform planar cutting on the 3D model of the module, retaining the target single channel. The distance between the cutting surface and the port is greater than or equal to 5mm, in order to reduce the simulation computation load.
[0010] The beneficial effects of the above-mentioned further solution are: by using this method, the single-channel simulation time is shortened from 8 hours before cutting to 4 hours, and the simulation efficiency is improved by 50%.
[0011] Furthermore: S3 specifically refers to: S-parameter simulation was performed using a terminal-driven solver to obtain an S12P format file, which was then imported into ADS to extract the insertion loss, input reflection coefficient, and output reflection coefficient of a single channel.
[0012] Furthermore: S4 specifically refers to: A TDR simulation circuit was built in ADS. The pulse source rise time was set to 0.005μs, high level to 2.3V, low level to 0V, period to 12.8μs, and simulation duration to 20μs. The reflection coefficient was calculated based on the amplitude of the incident and reflected signals, and then the impedance to be measured at the reflection point was derived. The physical location of the impedance discontinuity point was determined by the time difference, thereby obtaining information on the impedance characteristics, transmission loss, and signal delay of the transmission line.
[0013] Further: Calculate the reflection coefficient The specific expression is: In the formula, The amplitude of the reflected step pulse. The amplitude of the incident step pulse; Calculate the impedance to be measured The specific expression is: In the formula, The instrument's output impedance; Transmission line length The specific expression is: In the formula, The time from when the signal is emitted to when it is reflected and then returns to the starting point. The relative permittivity of the medium, It is the speed of light.
[0014] Furthermore: S5 specifically refers to: A co-simulation circuit including switches, filters, and interconnect structure S-parameters was built in ADS. The frequency band was set to 0.9-1.3GHz and the step size was 0.001GHz. The trend consistency between the co-simulation results and the TDR simulation results was compared. A physical prototype of the module was made, and the S-parameters were measured by a vector network analyzer to verify the accuracy of the simulation model.
[0015] Furthermore, in S5, the environmental conditions for verifying the simulation model are a temperature of 25℃ and a humidity of 50%. Four typical channels with center frequencies of 967MHz, 1090MHz, 1159MHz, and 1215MHz are selected for comparison. The model is considered valid if the insertion loss deviation is less than or equal to 0.3dB and the reflection coefficient deviation is less than or equal to 0.5dB.
[0016] The beneficial effects of this invention are as follows: (1) Significantly improved simulation efficiency: Through single-channel model cutting technology, the single-channel simulation time is shortened from 8 hours to 4 hours, the efficiency of multi-scheme comparison is improved by more than 3 times, and the R&D cycle is greatly shortened.
[0017] (2) Accurate impedance positioning: With the help of TDR simulation, the discontinuity point of impedance fluctuation less than or equal to 5Ω can be located, and the impedance change at key positions such as vertical interconnect vias and gold wire bonding can be identified, providing accurate target points for ringing suppression.
[0018] (3) High simulation accuracy: HFSS and ADS joint simulation realize electromagnetic-circuit collaborative analysis. The insertion loss deviation between simulation and actual measurement is less than 0.3dB, which can effectively guide the optimization of module structure.
[0019] (4) Strong engineering applicability: The method and process are complete, covering the entire process of modeling, simulation, positioning and verification. It is applicable to the design and optimization of multi-channel switching filter modules on 15-layer LTCC substrates, and can reduce R&D costs by 30%-50%.
[0020] In summary, this invention achieves electromagnetic-circuit collaborative analysis, providing reliable support for module structure optimization and ringing suppression, and solving the technical problems of low simulation efficiency, inaccurate location of impedance discontinuities, and large deviation between simulation and actual measurement in existing L-band switching filter module simulations. Attached Figure Description
[0021] Figure 1 This is a flowchart of a system-level simulation method for an L-band switching filter module according to the present invention.
[0022] Figure 2 This is a schematic diagram of the HFSS3D simulation module.
[0023] Figure 3 This is a schematic diagram of the S-parameters obtained from the simulation.
[0024] Figure 4 This is the TDR simulation circuit diagram.
[0025] Figure 5 The image shows the results of the TDR simulation.
[0026] Figure 6 The circuit diagram for S-parameter co-simulation is shown.
[0027] Figure 7 The figure shows the joint simulation results for the S-parameters. Detailed Implementation
[0028] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.
[0029] Example 1: like Figure 1 As shown, in one embodiment of the present invention, a system-level simulation method for an L-band switched filter module includes the following steps: S1. Import the 2D layout of the module into the 3D electromagnetic simulation software to create a 3D model of the module. S2. Use a planar cutting method to cut the 3D model of the module into a single channel, retaining the target single channel; S3. Perform S-parameter simulation based on a single channel to extract the insertion loss, input reflection coefficient, and output reflection coefficient of the single channel; S4. Build a TDR simulation circuit in ADS and locate the impedance discontinuity points; S5. Build a co-simulation circuit in ADS and perform S-parameter co-simulation and verification.
[0030] S1 specifically refers to: S11. 3D Model Creation and Parameter Setting: Import the 2D layout of the module drawn in Altium Designer into ANSYS HFSS layer by layer. Set the height and thickness of each layer according to the stack-up structure of the module. Define the substrate material as Ferro-A6M and the via and trace material as copper. Ensure that the model size is 13.6×13.6×1.41mm and complete the electrical connection integrity check. In this embodiment, a 15-layer LTCC substrate is used for the module. The substrate is made of 15 layers of Ferro-A6M material, each layer is 0.1mm thick, with a relative permittivity of 5.9 and a tangent loss of 0.0015. Vias and traces are made of copper with a thickness of 10μm. After importing, the electrical connections of each layer are checked to ensure there are no short circuits or open circuits. The final model size is 13.6×13.6×1.41mm, consistent with the design drawings. The 15-layer LTCC substrate is imported into HFSS, a tech layer file is created, and layers 1 and 15 are defined as circuit layers, layers 2, 6, 10, and 14 as shielding layers, layers 3-5 as control signal layers, and the rest as RF signal layers. The 3D model after successful import is shown below. Figure 2 As shown.
[0031] S12. Port and Excitation Configuration: Based on the port positions in the layout, a single-channel, one-by-one simulation method is adopted. Twelve lumped ports are set for each channel. The metal casing is set as an ideal electric wall, and the open surface is set as a radiating boundary. The excitation signal is a sine wave with a frequency range of 967-1215MHz and an amplitude of 2.3V. In this embodiment, the specific method for port configuration is as follows: Port shape drawing: Draw the port shape one by one according to the port position in the layout. For circular and arc-shaped ports, the coordinate system needs to be re-established and clipped to ensure that the port shape is regular. Lumped Port Setting: Select the appropriate lumped port excitation signal for the ground plane, calculate the distance between the LTCC interconnect stacks, and ensure that the port edges are aligned with the upper and lower stacks; Boundary condition settings: The metal casing is set to an ideal electric wall (PerfectE), and the open surface is set to a radiation boundary (Radiation) to ensure simulation of the actual working environment; Excitation signal settings: The excitation signal is a sine wave with a frequency range of 967-1215MHz and an amplitude of 2.3V.
[0032] Since only a single filter operates at a time in the module, a single-channel, one-by-one simulation strategy is adopted. Each channel includes one bandpass filter, two SP2T switches (35dB isolation), and four SP8T switches (45dB isolation), for a total of 12 lumped ports. For circular and arc-shaped ports, the coordinate system was re-established and trimmed to ensure regularity of shape. When setting up lumped ports, the corresponding ground plane was selected as a reference to ensure that the port edges are aligned with the upper and lower stacked layers of the substrate. In the boundary condition settings, the metal shell is defined as an ideal electric wall (PerfectE), the open surface is defined as a radiation boundary (Radiation), and the excitation signal is a sine wave with a frequency range of 967-1215MHz and an amplitude of 2.3V.
[0033] In S11, before importing the 2D layout of the module into ANSYS HFSS layer by layer, create a tech format layer information file. The layer name should be consistent with the CAD layout, and the unit should be set to mm. Define the layer color, height, and thickness parameters layer by layer.
[0034] In S12, when setting the lumped port, ensure that the port edge is aligned with the upper and lower stacks of the module, and select a ground plane that matches the layer where the port is located.
[0035] S2 specifically refers to: Boolean operations are used to perform planar cutting on the 3D model of the module, retaining the target single channel. The distance between the cutting surface and the port is greater than or equal to 5mm, in order to reduce the simulation computation load.
[0036] In this embodiment, to reduce the computational load and improve efficiency, a planar cutting method is used to optimize the 3D model of the module. Utilizing HFSS's Boolean operation function, only the target single-channel structure is retained. The cutting surface must be far from the main channel body, with a distance of no less than 5mm from the port, to avoid simulation failure due to insufficient metal content at the port. Using this method, the single-channel simulation time is reduced from 8 hours before cutting to 4 hours, improving simulation efficiency by 50%.
[0037] S3 specifically refers to: S-parameter simulation was performed using a terminal-driven solver. The resulting S-parameter file was in S12P format. It was imported into ADS to extract the insertion loss, input reflection coefficient, and output reflection coefficient of each channel, clarifying the differences in transmission performance between channels. Port connections were then established. Figure 3 As shown.
[0038] The simulation results for each channel are shown in Table 1. From the table, we can see that: The module exhibits excellent in-band transmission characteristics with near-zero insertion loss, ranging from -0.213 to -0.359 dB. Both port reflection coefficients S11 and S22 are less than -12dB, indicating good impedance matching. Channel 9, with a center frequency of 1090MHz, has the best transmission performance (S21=-0.213dB, S11=-15.205dB). This is because this channel has the shortest wiring on the LTCC substrate, fewer layers traversed by the trace, and the lowest loss. Channel 12 (center frequency 1141MHz) has the highest insertion loss (-0.359dB), mainly due to the long wiring and the number of layers it passes through, resulting in the accumulation of conductor and dielectric losses.
[0039] Table 1 Simulation results of each channel of the RF module S4 specifically refers to: Build a TDR simulation circuit in ADS, as shown in the example below. Figure 4 As shown, the pulse source rise time is set to 0.005μs, high level to 2.3V, low level to 0V, period to 12.8μs, and simulation duration to 20μs. The reflection coefficient is calculated based on the amplitudes of the incident and reflected signals, and then the impedance to be measured at the reflection point is derived. The physical location of the impedance discontinuity point is determined by the time difference, thereby obtaining information on the impedance characteristics, transmission loss, and signal delay of the transmission line.
[0040] The TDR simulation results are as follows Figure 5 As shown in the simulation results, the module exhibits good impedance matching. The simulation results indicate that the overall impedance matching of the module is good, with the impedance in most areas approaching 50Ω. Slight impedance fluctuations occur within a 1-3μs timeframe, with a maximum fluctuation of 5Ω, corresponding to the locations of the vertical interconnect vias and gold wire bonds. This suggests a slight impedance discontinuity in these interconnect structures. There are no significant abrupt impedance changes, indicating that the overall layout and structural design of the module are reasonable, and there are no serious impedance mismatch issues.
[0041] In this embodiment, the impedance fluctuations at locations such as vertical interconnect vias and gold wire bonds can be accurately located using the TDR simulation analysis method described above, providing target points for subsequent impedance matching optimization.
[0042] Calculate the reflection coefficient The specific expression is: In the formula, The amplitude of the reflected step pulse. The amplitude of the incident step pulse; Calculate the impedance to be measured The specific expression is: In the formula, The instrument's output impedance; Transmission line length The specific expression is: In the formula, The time from when the signal is emitted to when it is reflected and then returns to the starting point. The relative permittivity of the medium, It is the speed of light.
[0043] S5 specifically refers to: A co-simulation circuit including switches, filters, and interconnect structure S-parameters was built in ADS. The frequency band was set to 0.9-1.3GHz and the step size was 0.001GHz. The trend consistency between the co-simulation results and the TDR simulation results was compared. A physical prototype of the module was made, and the S-parameters were measured by a vector network analyzer to verify the accuracy of the simulation model.
[0044] In this embodiment, a system is built in ADS as follows: Figure 6 The co-simulation circuit shown was set with a simulation frequency range of 0.9-1.3 GHz and a step size of 0.001 GHz to comprehensively analyze the transmission characteristics of each component working together. A physical prototype of the module was built, and the S-parameters were measured using a Keysight vector network analyzer in an environment of 25℃ and 50% humidity. Four typical channels were selected to compare the simulation and measured data to ensure that the insertion loss deviation was ≤0.3dB and the reflection coefficient deviation was ≤0.5dB, thus verifying the accuracy and reliability of the simulation model.
[0045] In this embodiment, parametric co-simulation comprehensively considers the S-parameters of each component and their mutual influences to form the S-matrix of the entire circuit, thereby obtaining the transmission characteristics of the circuit (such as gain, insertion loss, reflection loss, etc.). An S-parameter co-simulation circuit for the L-band switched filter module is built in ADS, with the simulation frequency range set to 0.9-1.3 GHz and a step size of 0.001 GHz. The S-parameters of each component are obtained through actual measurement or simulation.
[0046] The joint simulation results of the S-parameters are as follows: Figure 7 As shown in Table 2, the joint simulation results for each channel are as follows.
[0047] Table 2 Simulation results of insertion loss for different center frequency channels The results show that: The insertion loss in the co-simulation was -4.079 to -5.240 dB, of which the substrate insertion loss was -0.233 to -0.462 dB and the module body (switch + filter) insertion loss was -3.473 to -4.726 dB. The insertion loss of channel 13, with a center frequency of 1159MHz, is the largest (-5.240dB), mainly due to the large insertion loss of the filter in this channel and the significant coupling loss with the switch. The joint simulation results show a consistent trend with the simulation results of the single-channel interconnect structure, verifying the consistency and reliability of the simulation model.
[0048] In S5, the environmental conditions for verifying the simulation model are a temperature of 25℃ and a humidity of 50%. Four typical channels with center frequencies of 967MHz, 1090MHz, 1159MHz, and 1215MHz are selected for comparison. The model is considered valid if the insertion loss deviation is less than or equal to 0.3dB and the reflection coefficient deviation is less than or equal to 0.5dB.
[0049] In this embodiment, to verify the accuracy of the simulation model, a physical prototype of the module was fabricated, and S-parameter measurements were conducted. The measured results were then compared with the simulation results. The measurements were performed using a Keysight vector network analyzer, with a test frequency range of 0.9-1.3 GHz, a step size of 0.001 GHz, an ambient temperature of 25°C, and a humidity of 50%.
[0050] Four typical channels (channel 1, channel 9, channel 13, and channel 16) were selected for comparison, and the results are shown in Table 3.
[0051] Table 3 Comparison of Simulation and Measured Data As can be seen from the table, the insertion loss deviation between simulation and actual measurement is less than 0.3dB, and the reflection coefficient deviation is less than 0.5dB, which is within the acceptable range. The main reasons for the deviation include: slight differences between the actual dielectric constant of the LTCC substrate and the simulation setting value; incomplete and inaccurate modeling of the parasitic parameters of the components; and environmental interference and test errors during the actual measurement process. The simulation model can accurately reflect the transmission characteristics of the module and can be used for subsequent optimization design.
[0052] Example 2: To verify the effectiveness of the present invention, the following specific implementation examples are provided: Step 1: Module 3D Model Creation and Simulation Importing the layout: Import the 15-layer LTCC module layout drawn in Altium Designer into HFSS, create a tech layer file, define layers 1 and 15 as circuit layers, layers 2, 6, 10, and 14 as shielding layers, layers 3-5 as control signal layers, and the rest as RF signal layers. Material parameter settings: substrate Ferro-A6M, relative permittivity 5.9, tangent loss 0.0015, copper trace thickness 10μm, metal via diameter 100μm; Port settings: 12 lumped ports are set for channel 9 (center frequency 1090MHz), and the circular ports are regularized by rotating and trimming the coordinate system; Model cutting: Boolean operation is used to cut and retain channel 9, with a distance of 5mm between the cut surface and the port; S-parameter simulation: With the frequency set at 0.9-1.3GHz and the convergence criterion ΔS≤0.02, the simulation results show that the insertion loss S21=-0.213dB and the input reflection coefficient S11=-15.205dB. TDR simulation: When building the ADSTDR circuit, a 5Ω impedance fluctuation was found at the location of the vertical interconnect via. Co-simulation: By importing the S-parameters of the switch and filter, the co-simulation yielded an insertion loss of -4.286 dB, consistent with the trend observed in single-channel simulation. Actual test verification: The prototype module was fabricated and tested. The insertion loss of channel 9 was -0.357dB, which is 0.144dB different from the simulation, and meets the requirements.
[0053] Step 2: Multi-channel simulation comparison: Simulations were performed on 16 channels using the method of this invention. The results showed that the in-band insertion loss ranged from -0.213 to -0.359 dB, and the port reflection coefficients were all less than -12 dB. TDR simulations located impedance fluctuations of 3-5 Ω at the gold wire bonding positions of 8 channels, providing a clear direction for subsequent collaborative optimization.
[0054] This invention solves the core challenge of system-level simulation of L-band switched filter modules by deeply collaborating HFSS and ADS, combined with single-channel cutting and TDR impedance positioning technology. It provides an effective technical means for high-performance design and rapid development of modules and has broad engineering application prospects.
[0055] In the description of this invention, the above are merely preferred embodiments and are not intended to limit the scope of protection of this invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A system-level simulation method for an L-band switched filter module, characterized in that, Includes the following steps: S1. Import the 2D layout of the module into the 3D electromagnetic simulation software to create a 3D model of the module. S2. Use a planar cutting method to cut the 3D model of the module into a single channel, retaining the target single channel; S3. Perform S-parameter simulation based on a single channel to extract the insertion loss, input reflection coefficient, and output reflection coefficient of the single channel; S4. Build a TDR simulation circuit in ADS and locate the impedance discontinuity points; S5. Build a co-simulation circuit in ADS and perform S-parameter co-simulation and verification.
2. The system-level simulation method for the L-band switched filter module according to claim 1, characterized in that, S1 specifically refers to: S11. 3D Model Creation and Parameter Setting: Import the 2D layout of the module drawn in Altium Designer into ANSYS HFSS layer by layer. Set the height and thickness of each layer according to the stack-up structure of the module. Define the substrate material as Ferro-A6M and the via and trace material as copper. Ensure that the model size is 13.6×13.6×1.41mm and complete the electrical connection integrity check. S12. Port and excitation configuration: Based on the port positions in the layout, a single-channel simulation method is adopted. 12 lumped ports are set for each channel. The metal shell is set as an ideal electric wall, the open surface is set as a radiation boundary, and the excitation signal is a sine wave with a frequency range of 967-1215MHz and an amplitude of 2.3V.
3. The system-level simulation method for the L-band switched filter module according to claim 2, characterized in that, In S11, before importing the 2D layout of the module into ANSYS HFSS layer by layer, create a tech format layer information file. The layer name should be consistent with the CAD layout, and the unit should be set to mm. Define the layer color, height, and thickness parameters layer by layer.
4. The system-level simulation method for the L-band switched filter module according to claim 3, characterized in that, In S12, when setting the lumped port, ensure that the port edge is aligned with the upper and lower stacks of the module, and select a ground plane that matches the layer where the port is located.
5. The system-level simulation method for the L-band switched filter module according to claim 1, characterized in that, S2 specifically refers to: Boolean operations are used to perform planar cutting on the 3D model of the module, retaining the target single channel. The distance between the cutting surface and the port is greater than or equal to 5mm, in order to reduce the simulation computation load.
6. The system-level simulation method for the L-band switched filter module according to claim 1, characterized in that, S3 specifically refers to: S-parameter simulation was performed using a terminal-driven solver to obtain an S12P format file, which was then imported into ADS to extract the insertion loss, input reflection coefficient, and output reflection coefficient of a single channel.
7. The system-level simulation method for the L-band switched filter module according to claim 1, characterized in that, S4 specifically refers to: A TDR simulation circuit was built in ADS. The pulse source rise time was set to 0.005μs, high level to 2.3V, low level to 0V, period to 12.8μs, and simulation duration to 20μs. The reflection coefficient was calculated based on the amplitude of the incident and reflected signals, and then the impedance to be measured at the reflection point was derived. The physical location of the impedance discontinuity point was determined by the time difference, thereby obtaining information on the impedance characteristics, transmission loss, and signal delay of the transmission line.
8. The system-level simulation method for the L-band switched filter module according to claim 7, characterized in that, Calculate the reflection coefficient The specific expression is: In the formula, The amplitude of the reflected step pulse. The amplitude of the incident step pulse; Calculate the impedance to be measured The specific expression is: In the formula, The instrument's output impedance; Transmission line length The specific expression is: In the formula, The time from when the signal is emitted to when it is reflected and then returns to the starting point. The relative permittivity of the medium, It is the speed of light.
9. The system-level simulation method for the L-band switched filter module according to claim 1, characterized in that, S5 specifically refers to: A co-simulation circuit including switches, filters, and interconnect structure S-parameters was built in ADS. The frequency band was set to 0.9-1.3GHz and the step size was 0.001GHz. The trend consistency between the co-simulation results and the TDR simulation results was compared. A physical prototype of the module was made, and the S-parameters were measured by a vector network analyzer to verify the accuracy of the simulation model.
10. The system-level simulation method for the L-band switched filter module according to claim 9, characterized in that, In S5, the environmental conditions for verifying the simulation model are a temperature of 25℃ and a humidity of 50%. Four typical channels with center frequencies of 967MHz, 1090MHz, 1159MHz, and 1215MHz are selected for comparison. The model is considered valid if the insertion loss deviation is less than or equal to 0.3dB and the reflection coefficient deviation is less than or equal to 0.5dB.