Semiconductor device

Abstract

Provided is a semiconductor device capable of suppressing unexpected application of reduction protection of a control power supply voltage during an initial charging period, and capable of performing reduction protection of the control power supply voltage even during a stable period of the control power supply voltage. A semiconductor device (100) according to an embodiment includes an IGBT (41), a control IC (1), a control IC (2A), and a bootstrap circuit (3) that generates a control power supply voltage (VccU) supplied to the control IC (1) by a bootstrap operation using a control power supply voltage (VccL) supplied to the control IC (2A), and the control IC (2A) includes a control voltage detection circuit (22A) that detects a decrease in the control power supply voltage (VccL). The control voltage detection circuit (22A) has a period detection circuit (221A) that detects an initial charging period during which the bootstrap circuit (3) is initially charged by the bootstrap action.

Description

Technical Field

[0001] This disclosure relates to a semiconductor device. Background Technology

[0002] An intelligent power module (IPM) is known, which integrates an insulated-gate bipolar transistor (IGBT) for power conversion, a freewheeling diode (FWD), and an integrated circuit (IC) for drive protection functions into a single package. In an IPM used as a three-phase inverter circuit to drive motors such as three-phase motors, for example, four control voltages (three in the upper arm and one in the lower arm) are required. However, by applying a bootstrap circuit with a bootstrap diode (BSD), capacitors, and limiting resistors, the power supply for the upper arm can be replaced with a capacitor. This reduces the component footprint of power conversion devices including the IPM.

[0003] The bootstrap circuit needs to charge the capacitor (initial charging) through the switching action of the IGBT in the lower arm before the IGBT starts driving the load device such as the motor. During initial charging, current (inrush current) flows from the control power supply of the lower arm to the bootstrap circuit. If this inrush current is excessively large, the control power supply of the lower arm may be insufficient, resulting in the application of power reduction protection in the lower arm. The bootstrap circuit has a limiting resistor, as described above, to suppress this power reduction protection.

[0004] Patent Document 1 discloses a power conversion device that can suppress excessive surge current flowing to the capacitor due to abnormal switching of the initial charging circuit, and can detect abnormal switching state of the initial charging circuit.

[0005] Patent document 2 discloses the following invention: when initial charging of multiple capacitors in a power converter, the timing of delaying the end of the initial charging is determined based on the magnitude of the current generated when the initial charging ends first, thereby reducing inrush current.

[0006] Existing technical documents

[0007] Patent documents

[0008] Patent Document 1: Japanese Patent Application Publication No. 2022-40631

[0009] Patent Document 2: Japanese Patent Application Publication No. 2023-162789 Summary of the Invention

[0010] The problem the invention aims to solve

[0011] In existing control power supply voltage drop protection technologies, the operating voltage level is designed based on the stable state of the control power supply voltage to protect against voltage drops. Therefore, the control power supply voltage drop protection is prone to operation during periods of large voltage fluctuation, such as the initial charging period. However, if the power supply voltage drop protection is applied to the lower arm, the bootstrap circuit capacitor will not be charged, resulting in the control power supply voltage in the upper arm not reaching the desired voltage level. On the other hand, if the operating voltage of the control power supply voltage drop protection is set based on voltage fluctuations during the initial charging period, the protection operation may be insufficient when the control power supply voltage stabilizes at the desired level.

[0012] The purpose of this disclosure is to provide a semiconductor device capable of suppressing accidental application of control power supply voltage reduction protection during initial charging and capable of providing control power supply voltage reduction protection even during stable periods of control power supply voltage.

[0013] Solution for solving the problem

[0014] To achieve the above objectives, one aspect of the semiconductor device disclosed herein includes: a first switching element; a second switching element connected in series with the first switching element and disposed at a position lower than the first switching element at a lower potential; a first control circuit that controls a driving action of the first switching element; a second control circuit that controls a driving action of the second switching element and a protection action of the first and second switching elements; and a bootstrap circuit that generates a first control power supply voltage supplied to the first control circuit by using a bootstrap action of a second control power supply voltage supplied to the second control circuit, wherein the second control circuit has a voltage drop detection circuit for detecting a decrease in the second control power supply voltage, the voltage drop detection circuit having a period detection circuit for detecting an initial charging period during which the bootstrap action initially charges the bootstrap circuit.

[0015] The effects of the invention

[0016] According to one aspect of this disclosure, it is possible to suppress the accidental application of control power supply voltage reduction protection during initial charging, and to provide control power supply voltage reduction protection even during periods of stable control power supply voltage. Attached Figure Description

[0017] Figure 1 This is a block diagram illustrating an example of the general structure of a semiconductor device according to the first embodiment of this disclosure.

[0018] Figure 2This is a block diagram illustrating an example of the outline structure of a control IC for the lower arm included in the semiconductor device of the first embodiment of this disclosure.

[0019] Figure 3 This is a block diagram illustrating an example of the outline structure of a control voltage reduction detection circuit provided in a control IC for the lower arm of a semiconductor device according to the first embodiment of this disclosure.

[0020] Figure 4 This is a schematic diagram illustrating an example of the waveforms of the charging current flowing through the bootstrap circuit of the semiconductor device according to the first embodiment of this disclosure, as well as the control power supply voltages for the upper and lower arms.

[0021] Figure 5 This is a schematic diagram illustrating an example of the charging current flowing through the bootstrap circuit of a conventional semiconductor device and the waveforms of the control power supply voltages for the upper and lower arms.

[0022] Figure 6 This is a block diagram illustrating an example of the outline structure of a control voltage reduction detection circuit provided in a control IC for the lower arm of a semiconductor device, a modified example of the first embodiment of this disclosure.

[0023] Figure 7 This is a block diagram illustrating an example of the outline structure of a control voltage reduction detection circuit provided in a control IC for the lower arm of a semiconductor device according to the second embodiment of this disclosure.

[0024] Figure 8 This is a block diagram illustrating an example of the outline structure of a voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device, a modified example of the second embodiment of this disclosure.

[0025] Figure 9 This is a block diagram illustrating an example of the outline structure of a voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device according to the third embodiment of this disclosure.

[0026] Figure 10 This is a block diagram illustrating an example of the outline structure of a voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device according to the fourth embodiment of this disclosure.

[0027] Figure 11 This is a block diagram illustrating an example of the outline structure of a voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device according to the fifth embodiment of this disclosure. Detailed Implementation

[0028] The embodiments for carrying out this disclosure are described with reference to the accompanying drawings. Furthermore, the dimensions and scales of the elements in the drawings may sometimes differ from those of the actual product. Additionally, the following description is an illustrative approach contemplated for carrying out this disclosure. Therefore, the scope of this disclosure is not limited to the illustrative approaches described below.

[0029] [First Implementation]

[0030] use Figures 1 to 5 The semiconductor device according to the first embodiment of this disclosure will be described. Regarding the semiconductor device of this embodiment, a smart power module will be used as an example for description; however, the semiconductor device of this embodiment can be applied to devices that perform functions such as generating a high-potential voltage from a low-potential voltage, like a bootstrap operation.

[0031] 1-1. Overall structure of a semiconductor device:

[0032] use Figure 1 The overall structure of the semiconductor device 100 of this embodiment will be described. Figure 1 This is a block diagram illustrating an example of the general structure of a semiconductor device 100.

[0033] like Figure 1 As shown, the semiconductor device 100 includes a control IC 1 for the upper arm, a control IC 2A for the lower arm, a bootstrap circuit 3, a drive element 4 for the upper arm, and a drive element 5 for the lower arm. The semiconductor device 100 includes a positive-side voltage input terminal 10P, a negative-side voltage input terminal 10N, an intermediate terminal 10M, a control power supply voltage input terminal 10VU for the upper arm, a reference potential terminal 10GU for the upper arm, and a control signal input terminal 10SU for the upper arm. The semiconductor device 100 also includes a control power supply voltage input terminal 10VL for the lower arm, a reference potential terminal 10GL for the lower arm, and a control signal input terminal 10SL for the lower arm. Hereinafter, the "control power supply voltage input terminal" will sometimes be simply referred to as the "power input terminal".

[0034] The upper arm control IC 1 (an example of the first control circuit) is an HVIC (High Voltage Integrated Circuit) that controls the high-potential side, i.e., the upper arm drive element 4. Control IC 1 is an integrated circuit that controls the drive operation of IGBT 41 (an example of the first switching element) based on the upper arm input signal SinU input via the control signal input terminal 10SU. The input signal SinU is input from the control device (not shown) of the control semiconductor device 100. Control IC 1 operates using the upper arm reference potential VggU applied to the reference potential terminal 10GU as the reference potential and the upper arm control power supply voltage VccU (an example of the first control power supply voltage) generated by the bootstrap operation of the bootstrap circuit 3 (details described later) as the power supply.

[0035] The lower arm control IC 2A (an example of the second control circuit) is an LVIC (Low Voltage IC) that controls the low-potential side, i.e., the lower arm drive element 5. Control IC 2A controls the drive operation of IGBT 51 (an example of the second switching element) and the protection operation of IGBT 41 and IGBT 51 based on the lower arm input signal SinL input via control signal input terminal 10SL. The input signal SinL is input from the control device (not shown) of the control semiconductor device 100. Control IC 2A operates using the lower arm reference potential VggL applied to the reference potential terminal 10GL as the reference potential and the lower arm control power supply voltage VccL (an example of the second control power supply voltage) provided via the lower arm power input terminal 10VL as the power supply.

[0036] The control power supply voltage VccL is generated by a voltage generation circuit 6 connected to the power input terminal 10VL and the reference potential terminal 10GL. The voltage generation circuit 6 is, for example, constructed from a DC power supply. The positive terminal of the voltage generation circuit 6 is connected to the power input terminal 10VL, and the negative terminal of the voltage generation circuit 6 is connected, for example, to the reference potential terminal (e.g., ground terminal) of the semiconductor device 100 and the reference potential terminal 10GL. Therefore, the reference potential terminal 10GL is connected to the ground terminal of the semiconductor device 100.

[0037] The driving element 4 includes an IGBT 41 and a freewheeling diode 42. The gate of the IGBT 41 is connected to the output terminal of the control IC 1, the collector of the IGBT 41 is connected to the positive side voltage input terminal 10P, and the emitter of the IGBT 41 is connected to the intermediate terminal 10M and the reference potential terminal 10GU. The freewheeling diode 42 is connected in reverse parallel with the IGBT 41. Specifically, the cathode of the freewheeling diode 42 is connected to the collector of the IGBT 41, and the anode of the freewheeling diode 42 is connected to the emitter of the IGBT 41.

[0038] The driving element 5 includes an IGBT 51, a freewheeling diode 52, and a temperature sensor 53 (in Figure 1 Not shown in the image, please refer to the diagram. Figure 2 ) and current sensor 54 (in Figure 1 Not shown in the image, please refer to the diagram. Figure 2 Details of temperature sensor 53 and current sensor 54 will be described later. The gate of IGBT 51 is connected to the output terminal of control IC 2A. The collector of IGBT 51 is connected to the emitter of IGBT 41, the anode of freewheeling diode 42, the intermediate terminal 10M, and the reference potential terminal 10GU. The emitter of IGBT 51 is connected to the negative side voltage input terminal 10N and the reference potential terminal 10GL. Freewheeling diode 52 is connected in reverse parallel with IGBT 51. Specifically, the cathode of freewheeling diode 52 is connected to the collector of IGBT 51, and the anode of freewheeling diode 52 is connected to the emitter of IGBT 51.

[0039] IGBTs 41 and 51, controlled by ICs 1 and 2A, repeatedly switch between on and off states with their phases reversed. This allows the semiconductor device 100 to supply AC power from the intermediate terminal 10M to load devices such as motors. Thus, the intermediate terminal 10M functions as an AC power output terminal.

[0040] Thus, the semiconductor device 100 includes driving elements 4 and 5 with IGBTs 41 and 51. Driving elements 4 and 5 are connected in series between the positive-side voltage input terminal 10P and the negative-side voltage input terminal 10N. Driving element 4 is positioned on the positive-side voltage input terminal 10P side, i.e., the high-potential side. Driving element 5 is positioned on the negative-side voltage input terminal 10N side, i.e., the low-potential side. Therefore, the semiconductor device 100 includes IGBT 41 (an example of a first switching element) and IGBT 51 (an example of a second switching element) connected in series with IGBT 41 and positioned on a lower potential side than IGBT 41.

[0041] The bootstrap circuit 3 generates the upper arm control power supply voltage VccU supplied to the control IC 1 by using the bootstrap action of the lower arm control power supply voltage VccL supplied to the control IC 2A. The bootstrap circuit 3 includes a bootstrap diode 31, a bootstrap capacitor 32, and a limiting resistor 33. One terminal of the limiting resistor 33 is connected to the positive terminal of the voltage generation circuit 6 via the lower arm power input terminal 10VL. The other terminal of the limiting resistor 33 is connected to the anode of the bootstrap diode 31. The cathode of the bootstrap diode 31 is connected to one electrode of the bootstrap capacitor 32 via the upper arm power input terminal 10VU. The other electrode of the bootstrap capacitor 32 is connected to the upper arm reference potential terminal 10GU. Thus, the bootstrap circuit 3 is positioned between the lower arm power input terminal 10VL and the upper arm reference potential terminal 10GU. The limiting resistor 33, the bootstrap diode 31, and the bootstrap capacitor 32 are connected in series between the power input terminal 10VL and the reference potential terminal 10GU.

[0042] Here, the lift-up motion is explained. Figure 1 In this circuit, the bootstrap diode 31 forms a charging path α for charging the bootstrap capacitor 32. The limiting resistor 33 limits the current flowing through the bootstrap diode 31. When IGBT 41 is off and IGBT 51 is on, current flows along the charging path α, thereby charging the bootstrap capacitor 32 and generating a voltage across it. Then, when IGBT 41 is on and IGBT 51 is off, the charge on the bootstrap capacitor 32 is discharged, generating a voltage higher than the input voltage on the upper side of the bootstrap capacitor 32. As a result, the gate potential of IGBT 41 is higher than the emitter potential, thus enabling IGBT 41 to be driven.

[0043] 1-2. The structure of the control IC in a semiconductor device:

[0044] The control ICs 1 and 2A included in the semiconductor device 100 will be described using the lower arm control IC 2A as an example. Furthermore, the temperature detection circuit 23 and current detection circuit 24 provided in the control IC 2A are not provided in the upper arm control IC 1. Also, the structure in the control IC 2A that switches the determination voltage for detecting the control power supply voltage during and after the initial charging period is not provided in the control IC 1. Figure 2 This is a block diagram illustrating an example of the general structure of the control IC 2A. Figure 2 For ease of understanding, the diagram illustrates the controlled object of control IC 2A, namely drive element 5. Additionally, in... Figure 2 The freewheeling diode 52, which is located on the driving element 5, is omitted from the illustration.

[0045] like Figure 2 As shown, the control IC 2A has a gate drive circuit 21, a control voltage detection circuit 22A, a temperature detection circuit 23, a current detection circuit 24, an OR gate 25a, an alarm signal generation circuit 25b, a transistor 25c, a constant current source 25d, and a resistor element 25e.

[0046] The gate drive circuit 21 has an on / off control circuit 211. The on / off control circuit 211 drives the IGBT 51 disposed on the drive element 5 by means of, for example, PWM control, based on the input signal SinL input from the control device (not shown) via the control signal input terminal 10SL.

[0047] The control voltage detection circuit 22A (an example of a voltage drop detection circuit) included in the control IC 2A is a circuit that detects a drop in the control power supply voltage VccL. Details will be described later. The control voltage detection circuit 22A outputs a low-level voltage when the control power supply voltage VccL input from the power input terminal 10VL is higher than a specified voltage. Conversely, the control voltage detection circuit 22A outputs a high-level voltage when the control power supply voltage VccL input from the power input terminal 10VL is lower than this specified voltage. This specified voltage is, for example, set to the minimum voltage at which the gate drive circuit 21 can operate.

[0048] like Figure 2 As shown, the temperature detection circuit 23 includes a comparator 231, a voltage generation circuit 232, and a constant current source 233. The voltage generation circuit 232 is, for example, constructed from a DC power supply. The comparator 231 is, for example, constructed from an operational amplifier. The negative terminal of the voltage generation circuit 232 is connected to a reference potential terminal (e.g., a ground terminal) of the semiconductor device 100. Therefore, the voltage generation circuit 232 is connected to the reference potential terminal 10GL (see reference 10GL). Figure 1 The positive terminal of the voltage generation circuit 232 is connected to the non-inverting input terminal (+) of the comparator 231. The inverting input terminal (-) of the comparator 231 is connected to the temperature sensor 53 disposed on the drive element 5. The temperature sensor 53 is made of, for example, a diode formed of silicon. The anode of the temperature sensor 53 is connected to the inverting input terminal (-) of the comparator 231, and the cathode of the temperature sensor 53 is connected to the reference potential terminal 10GL. The output terminal of the constant current source 233 is connected to the anode of the temperature sensor 53.

[0049] Generally, the forward voltage of a silicon diode decreases when the ambient temperature is high compared to when the ambient temperature is low. Therefore, when a constant current is input from the constant current source 233 to the temperature sensor 53, if the temperature of the IGBT 51 rises, the voltage drop in the temperature sensor 53 decreases. Consequently, the voltage input from the temperature sensor 53 to the temperature detection circuit 23 decreases as the temperature of the IGBT 51 increases.

[0050] The voltage output from the voltage generation circuit 232 is set to be higher than the voltage detected by the temperature sensor 53 when the temperature of the IGBT 51 is higher than its absolute maximum rated temperature. Therefore, the comparator 231 outputs a low voltage level when the temperature of the IGBT 51 is lower than its absolute maximum rated temperature. Conversely, the comparator 231 outputs a high voltage level when the temperature of the IGBT 51 is higher than its absolute maximum rated temperature. In this way, the temperature detection circuit 23 can detect whether the temperature of the IGBT 51 exceeds its absolute maximum rated temperature by using a voltage input from the temperature sensor 53 that varies according to the temperature of the IGBT 51.

[0051] like Figure 2 As shown, the current detection circuit 24 includes a resistor element 241, a comparator 242, and a voltage generation circuit 243. The resistor element 241 is connected between the current sensor 54 disposed on the drive element 5 and the reference potential terminal 10GL. The current sensor 54 outputs a detection current corresponding to the current flowing through the IGBT 51. One terminal of the resistor element 241 is connected to the output terminal of the current sensor 54, and the other terminal of the resistor element 241 is connected to the reference potential terminal 10GL. The current detection circuit 24 is configured to use the voltage drop generated in the resistor element 241 due to the detection current output from the current sensor 54 flowing through the resistor element 241 as the detection voltage. In other words, the current detection circuit 24 sets the voltage at one terminal of the resistor element 241 connected to the current sensor 54 as the detection voltage corresponding to the current flowing through the IGBT 51.

[0052] The voltage generation circuit 243 is, for example, constructed using a DC power supply. The negative terminal of the voltage generation circuit 243 is connected to the reference potential terminal (e.g., ground terminal) of the control IC 2A. Therefore, the voltage generation circuit 243 is connected to the reference potential terminal 10GL. The positive terminal of the voltage generation circuit 243 is connected to the inverting input terminal (-) of the comparator 242. The voltage generation circuit 243 generates a comparison voltage at a predetermined voltage level. The comparison voltage is set, for example, to a voltage corresponding to the absolute maximum rated current of the IGBT 51.

[0053] The non-inverting input terminal (+) of comparator 242 is connected to the current sensor 54 and one terminal of the resistive element 241. When the voltage drop across the resistive element 241, i.e., the detected voltage, is lower than the comparison voltage generated by the voltage generation circuit 243, comparator 242 outputs a low-level voltage. Conversely, when the detected voltage is higher than the comparison voltage, comparator 242 outputs a high-level voltage.

[0054] The probe current output from the current sensor 54 is proportional to the current output from the IGBT 51. Therefore, when the voltage corresponding to the probe current output from the current sensor 54 is lower than the voltage corresponding to the absolute maximum rated current of the IGBT 51 (i.e., when the IGBT 51 is in normal operation), the current detection circuit 24 outputs a low-level output signal. On the other hand, when the voltage corresponding to the probe current output from the current sensor 54 is higher than the voltage corresponding to the absolute maximum rated current of the IGBT 51 (i.e., when an overcurrent is flowing in the IGBT 51), the current detection circuit 24 outputs a high-level output voltage.

[0055] like Figure 2 As shown, one of the three input terminals of OR gate 25a is connected to the output terminal of control voltage detection circuit 22A. One of the remaining input terminals of OR gate 25a is connected to the output terminal of comparator 231, which becomes the output terminal of temperature detection circuit 23. The other of the remaining input terminals of OR gate 25a is connected to the output terminal of comparator 242, which becomes the output terminal of current detection circuit 24. The output terminal of OR gate 25a is connected to on / off control circuit 211.

[0056] Therefore, when the control power supply voltage VccL, the current flowing through IGBT 51, and the temperature of IGBT 51 are all normal, OR gate 25a outputs a low-level voltage to the on / off control circuit 211. On the other hand, when at least one of the control power supply voltage VccL, the current flowing through IGBT 51, and the temperature of IGBT 51 is abnormal, OR gate 25a outputs a high-level voltage to the on / off control circuit 211.

[0057] When the output voltage level input from OR gate 25a is low, the on / off control circuit 211 continuously operates based on the voltage level of the input signal SinL. Conversely, when the output voltage level input from OR gate 25a is high, the on / off control circuit 211 stops the operation of IGBT 51 regardless of the voltage level of the input signal SinL. Therefore, the on / off control circuit 211 can stop the operation of IGBT 51 if at least one of the control power supply voltage VccL, the current flowing through IGBT 51, or the temperature of IGBT 51 becomes abnormal.

[0058] like Figure 2 As shown, the output terminals of the control voltage detection circuit 22A, the temperature detection circuit 23, and the current detection circuit 24 are connected to the three input terminals of the alarm signal generation circuit 25b in a one-to-one correspondence. The transistor 25c, configured on the output side of the alarm signal generation circuit 25b, is, for example, an N-type field-effect transistor. The gate of transistor 25c is connected to the output terminal of the alarm signal generation circuit 25b. The drain of transistor 25c is connected to the output terminal of the constant current source 25d. The source of transistor 25c is connected to the reference potential terminal 10GL.

[0059] If no abnormality is detected by the control voltage detection circuit 22A, temperature detection circuit 23, and current detection circuit 24, the alarm signal generation circuit 25b outputs a low-level output voltage to the gate of transistor 25c. Conversely, if at least one of the control voltage detection circuit 22A, temperature detection circuit 23, and current detection circuit 24 detects an abnormality, the alarm signal generation circuit 25b outputs a high-level output voltage to the gate of transistor 25c only for a specified period. Therefore, when at least one of the control IC 2A and IGBT 51 changes from a normal state to an abnormal state, the alarm signal generation circuit 25b outputs a high-level pulse-shaped output voltage to the gate of transistor 25c only for a specified period.

[0060] Therefore, if no abnormal state is detected by the control voltage detection circuit 22A, temperature detection circuit 23, and current detection circuit 24, the transistor 25c is in the off state. On the other hand, if at least one of the control voltage detection circuit 22A, temperature detection circuit 23, and current detection circuit 24 detects an abnormal state, the transistor 25c is in the on state only while the voltage level of the output voltage from the alarm signal generation circuit 25b is high.

[0061] A resistor 25e is connected to one terminal of the drain of transistor 25c and the output terminal of constant current source 25d. The other terminal of resistor 25e is connected to the alarm signal output terminal 10VFO of semiconductor device 100.

[0062] The alarm signal output terminal 10VFO is connected to the drain of transistor 25c via resistor 25e, thus becoming an open-drain output. When no abnormality is detected by the control voltage detection circuit 22A, temperature detection circuit 23, and current detection circuit 24, the output voltage from the alarm signal generation circuit 25b is low, and transistor 25c is turned off. Therefore, the voltage at the alarm signal output terminal 10VFO is high. Conversely, when at least one of the control voltage detection circuit 22A, temperature detection circuit 23, and current detection circuit 24 detects an abnormality, the output voltage from the alarm signal generation circuit 25b is high, and transistor 25c is turned on. Therefore, the voltage at the alarm signal output terminal 10VFO becomes the potential of the reference potential terminal 10GL (e.g., 0V). Thus, the voltage at the alarm signal output terminal 10VFO is the inverted output voltage from the alarm signal generation circuit 25b. Therefore, an alarm signal based on the output voltage from the alarm signal generation circuit 25b is output from the alarm signal output terminal 10VFO.

[0063] 1-3. Structure of a voltage drop detection circuit in a semiconductor device:

[0064] Reference Figure 1 and Figure 2 Use Figure 3 The voltage drop detection circuit provided in the second control circuit of the semiconductor device of this embodiment will be described. Figure 3 This is a circuit block diagram illustrating an example of the general structure of the control voltage detection circuit (an example of a voltage drop detection circuit) 22A in this embodiment.

[0065] like Figure 3 As shown, the control voltage detection circuit 22A includes a period detection circuit 221A, a voltage conversion circuit 222, a comparator 223, and a signal output terminal 224.

[0066] The period detection circuit 221A is a circuit that detects the initial charging period of the bootstrap circuit 3 during initial charging via the bootstrap action. The period detection circuit 221A includes a differential amplifier circuit 2211 and a comparator circuit 2212. The differential amplifier circuit 2211 amplifies the difference between the charging voltage Vb based on the charging current Ib flowing through the bootstrap circuit 3 and the comparator voltage Vc11, which has the same voltage level as the control power supply voltage VccL. The comparator circuit 2212 compares the output voltage V2211 from the differential amplifier circuit 2211 with the comparator voltage Vc12.

[0067] The differential amplifier circuit 2211 includes an amplifier 2211a, an input resistor 2211b, a feedback resistor 2211c, and a voltage generation circuit 2211d.

[0068] The voltage generation circuit 2211d is constructed, for example, by a DC power supply. The negative terminal of the voltage generation circuit 2211d is connected to a reference potential terminal (e.g., a ground terminal) of the semiconductor device 100. Therefore, the negative terminal of the voltage generation circuit 2211d and the reference potential terminal 10GL are at the same potential. The voltage generation circuit 2211d is configured to output the same voltage as the voltage generation circuit 6. The voltage generation circuits 2211d and 6 are configured to output the same voltage. However, the outputs of the voltage generation circuits 2211d and 6 may sometimes differ within a permissible error range. In this case, the outputs of the voltage generation circuits 2211d and 6 are also considered to be the same voltage. Therefore, the voltage output by the voltage generation circuit 2211d, i.e., the comparison voltage Vc11, becomes a voltage with the same voltage level as the voltage output by the voltage generation circuit 6, i.e., the control power supply voltage VccL.

[0069] Amplifier 2211a is, for example, an operational amplifier. The non-inverting input terminal (+) of amplifier 2211a is connected to the positive side of voltage generation circuit 2211d. The inverting input terminal (-) of amplifier 2211a is connected to another terminal of input resistor 2211b and another terminal of feedback resistor 2211c. The output terminal of amplifier 2211a is connected to one terminal of feedback resistor 2211c.

[0070] One terminal of the input resistor 2211b is connected to the charging voltage input terminal 10CT of the control IC 2A. The charging voltage input terminal 10CT is connected to the anode of the bootstrap diode 31 located in the bootstrap circuit 3 and the other terminal of the limiting resistor 33. Therefore, one terminal of the input resistor 2211b is connected to the anode of the bootstrap diode 31 and the other terminal of the limiting resistor 33 via the charging voltage input terminal 10CT. The charging voltage Vb input to the charging voltage input terminal 10CT is equivalent to the voltage drop generated in the limiting resistor 33 due to the charging current Ib flowing through it. The charging current Ib is the current supplied from the voltage generation circuit 6 via the power input terminal 10VL. Therefore, the charging voltage Vb is a voltage that is lower than the control power supply voltage VccL by the amount of voltage drop generated in the limiting resistor 33.

[0071] A charging voltage Vb is input to the inverting input terminal (-) of amplifier 2211a via input resistor 2211b, and a comparison voltage Vc11 is input to the non-inverting input terminal (+) of amplifier 2211a. Therefore, the differential amplifier circuit 2211 outputs a voltage V2211 by multiplying the voltage obtained by subtracting the charging voltage Vb from the comparison voltage Vc11 (i.e., the control power supply voltage VccL) by the resistance value of the feedback resistor 2211c divided by the resistance value of the input resistor 2211b. If the charge of the bootstrap capacitor 32 increases as time passes during the initial charging period, the charging current Ib decreases, thus reducing the voltage drop across the limiting resistor 33 and increasing the charging voltage Vb. That is, the voltage level of the charging voltage Vb approaches the voltage level of the control power supply voltage VccL as time passes during the initial charging period. Consequently, the output voltage V2211 decreases as time passes during the initial charging period.

[0072] The comparator circuit 2212 includes a comparator 2212a and a voltage generation circuit 2212b. The voltage generation circuit 2212b is configured, for example, by a DC power supply. The negative terminal of the voltage generation circuit 2212b is connected to a reference potential terminal (e.g., a ground terminal) of the semiconductor device 100. Therefore, the negative terminal of the voltage generation circuit 2212b is at the same potential as the reference potential terminal 10GL. The voltage generation circuit 2212b is configured to output a comparison voltage Vc12, which has a voltage level obtained by multiplying the output voltage V2211 of the differential amplifier circuit 2211 (considered to be 0 volts) by the value obtained by dividing the resistance value of the feedback resistor 2211c by the resistance value of the input resistor 2211b. That is, the comparison voltage Vc12 is set to have a voltage level that can be considered as the same as the charging voltage Vb and the control power supply voltage VccL, amplified based on the amplification ratio of the input resistor 2211b and the feedback resistor 2211c.

[0073] Comparator 2212a is, for example, constructed from an operational amplifier. The non-inverting input terminal (+) of comparator 2212a is connected to the output terminal of differential amplifier circuit 2211 (i.e., the output terminal of amplifier 2211a) and one terminal of feedback resistor 2211c. The inverting input terminal (-) of comparator 2212a is connected to the positive side of voltage generation circuit 2212b. The output terminal of comparator 2212a is connected to voltage conversion circuit 222. Therefore, when the output voltage V2211 input from differential amplifier circuit 2211 is higher than the comparison voltage Vc12, comparator circuit 2212 outputs a high-level signal signal SgA to voltage conversion circuit 222 (details described later). Conversely, when the output voltage V2211 input from differential amplifier circuit 2211 is lower than the comparison voltage Vc12, comparator circuit 2212 outputs a low-level signal signal SgA to voltage conversion circuit 222.

[0074] In bootstrap capacitor 32 (reference) Figure 1 When the initial charging of the bootstrap circuit 3 is completed, the initial charging of the bootstrap circuit 3 is finished, and the charging current Ib no longer flows. Therefore, the voltage level of the charging voltage Vb is approximately the same as the voltage level of the control power supply voltage VccL. Thus, the initial charging period at which the initial charging is completed can be detected based on the difference between the charging voltage Vb and the control power supply voltage VccL. Therefore, in this embodiment, the period detection circuit 221A detects the end of the initial charging period by calculating the difference between the charging voltage Vb and the comparison voltage Vc11 in the differential amplifier circuit 2211 and comparing the output voltage V2211 with the comparison voltage Vc12 in the comparison circuit 2212. Thus, in this embodiment, the period detection circuit 221A detects the initial charging period based on the difference between the charging voltage Vb and the comparison voltage Vc11, where the charging voltage Vb is based on the charging current Ib flowing through the bootstrap circuit 3, and the comparison voltage Vc11 has the same voltage level as the control power supply voltage VccL.

[0075] The voltage conversion circuit 222 is a circuit that, after the period detection circuit 221A detects the end of the initial charging period, increases the determination voltage V222 used to determine the decrease in the control power supply voltage VccL compared to before the period detection circuit 221A detected the end of the initial charging period. The prompt signal SgA output from the period detection circuit 221A indicates whether the initial charging period has ended through its signal level. That is, a high-level prompt signal SgA indicates that the initial charging period has not ended. Conversely, a low-level prompt signal SgA indicates that the initial charging period has ended.

[0076] Therefore, when the signal level of the prompt signal SgA input from the period detection circuit 221A is high, the voltage conversion circuit 222 determines that the period detection circuit 221A has not detected the end of the initial charging period, and outputs a determination voltage V222 with a predetermined signal level (i.e., voltage level). On the other hand, when the signal level of the prompt signal SgA input from the period detection circuit 221A is low, the voltage conversion circuit 222 determines that the period detection circuit 221A has detected the end of the initial charging period, and outputs a determination voltage V222 with a higher signal level than before the initial charging period was detected.

[0077] As detailed later, the control power supply voltage VccL during the initial charging period is sometimes lower than the protection voltage used to protect the control IC 2A from the decrease in control power supply voltage VccL when the control IC 2A drives a load device such as a motor (not shown) via the drive element 5. Additionally, when the control IC 2A performs the initial charging operation via the bootstrap circuit 3, it is also necessary to protect the control IC 2A from the decrease in control power supply voltage VccL. However, the protection voltage during the initial charging operation can be lower than the protection voltage when a load device such as a motor (not shown) is driven via the drive element 5. Therefore, after the initial charging period ends, the voltage conversion circuit 222 sets the judgment voltage V222 corresponding to this protection voltage to a higher value than during the initial charging period for output.

[0078] like Figure 3 As shown, the comparator 223, located on the output side of the control voltage detection circuit 22A, is, for example, constructed from an operational amplifier. The non-inverting input terminal (+) of the comparator 223 is connected to the output terminal of the voltage conversion circuit 222. The inverting input terminal (-) of the comparator 223 is connected to the power input terminal 10VL. The output terminal of the comparator 223 is connected to the signal output terminal 224 located in the control voltage detection circuit 22A. The signal output terminal 224 is connected to the input terminal of the alarm signal generation circuit 25b and the OR gate 25a (see reference). Figure 2 The input terminal is connected to the signal output terminal 224. The signal output terminal 224 is used to output an output signal Sout that indicates whether the control power supply voltage VccL has decreased through voltage level.

[0079] Therefore, comparator 223 compares the judgment voltage V222 input from voltage conversion circuit 222 with the control power supply voltage VccL input from voltage generation circuit 6 via power input terminal 10VL. When the control power supply voltage VccL is higher than the judgment voltage V222 (i.e., normal operation), comparator 223 outputs a low-level output signal to alarm signal generation circuit 25b and OR gate 25a via signal output terminal 224. Conversely, when the control power supply voltage VccL is lower than the judgment voltage V222 (i.e., abnormal operation), comparator 223 outputs a high-level output signal to alarm signal generation circuit 25b and OR gate 25a via signal output terminal 224.

[0080] As described above, the voltage conversion circuit 222 outputs a different judgment voltage V222 to the comparator 223 based on whether the initial charging period has ended. Therefore, the comparator 223 can compare the optimal judgment voltage V222 with the control power supply voltage VccL based on whether the initial charging period has ended. Thus, the control voltage detection circuit 22A can appropriately detect whether it is necessary to protect the control IC 2A from the decrease in the control power supply voltage VccL, regardless of whether it is during the initial charging period or during the control voltage stabilization period after the initial charging period ends.

[0081] 1-4. Operation of semiconductor devices:

[0082] As an example of the operation of the semiconductor device in this embodiment, refer to Figures 1 to 3 Use Figure 4 The protection action of the protection control IC during the bootstrap operation to prevent it from being affected by the decrease in control power supply voltage is explained. Figure 4 It is a diagram that schematically represents the waveforms of the charging current, the control power supply voltage for the upper arm, and the control power supply voltage for the lower arm during the self-lifting action. Figure 4 In this context, "Ib" represents the charging current. Figure 4 In this context, "VccU" indicates the control power supply voltage used by the upper arm. Figure 4 In this context, "VccL" indicates the control power supply voltage used by the lower arm. Figure 4 In this context, "V222" represents the judgment voltage output from the voltage conversion circuit 222. Figure 4 In this context, "Pic" indicates the initial charging period. Figure 4 In this context, "Pso" indicates the control voltage stabilization period after the initial charging period ends.

[0083] In the semiconductor device 100 of this embodiment, while the control IC 1 keeps the driving element 4 in the off state, the control IC 2A repeatedly controls the driving element 5 to be in the on and off states, thereby initiating a bootstrap operation. A bootstrap mechanism is formed by controlling the driving element 5 to be in the on state. Figure 1 The charging path α.

[0084] The charging path α is a current path that passes through the aforementioned components in the following order: voltage generation circuit 6, power input terminal 10VL, limiting resistor 33, bootstrap diode 31, bootstrap capacitor 32, reference potential terminal 10GU, IGBT 51, reference potential terminal 10GL, and voltage generation circuit 6. Charging current Ib flows through charging path α, thereby charging bootstrap capacitor 32. Specifically, the voltage between the two electrodes of bootstrap capacitor 32 is maintained by charging via charging path α as the potential difference between the control power supply voltage VccL and the reference potential VggU for the upper arm. Therefore, the control power supply voltage VccU supplied to power input terminal 10VU is set to be higher than the reference potential of reference potential terminal 10GU by a factor of VccL. In this way, semiconductor device 100 generates control power supply voltage VccU for the upper arm by utilizing the bootstrap operation of IGBT 51 and bootstrap circuit 3.

[0085] In this embodiment, during the bootstrap operation, the drive element 5 is repeatedly switched on and off, thereby charging the bootstrap capacitor 32. In this case, the charging current Ib flowing through the bootstrap circuit 3 has a pulsed current waveform. The pulsed charging current Ib exhibits a current waveform where the smaller the amount of charge in the bootstrap capacitor 32, the larger the current value. Figure 4 As shown, assuming no charge is charged in the bootstrap capacitor 32, initial charging begins at time t1 when the control power supply voltage VccU is 0V (i.e., the same potential as the reference potential terminal 10GU). Therefore, during the initial charging period, at time t1, the charging current Ib is at its maximum. From time t1 onwards, the drive element 5 is repeatedly switched on / off, thereby increasing the charge in the bootstrap capacitor 32 and thus raising the control power supply voltage VccU. During this time, the charging current Ib gradually decreases.

[0086] Because the charging current Ib flows through it, the control power supply voltage VccL varies. For example... Figure 4 As shown, the larger the charging current Ib, the greater the fluctuation of the control power supply voltage VccL. Therefore, the fluctuation of the control power supply voltage VccL is the largest at time t1. By repeatedly switching the drive element 5 on / off over time from time t1, the fluctuation of the control power supply voltage VccL is reduced. The voltage conversion circuit 222 in this embodiment (refer to...) Figure 3 The voltage level Vpic of the determination voltage V222 is set to be lower than the voltage level at which the control power supply voltage VccL fluctuates to its maximum. Therefore, the semiconductor device 100 is suppressed from stopping during the initial charging period due to the control voltage drop protection of Pic.

[0087] From the differential amplifier circuit 2211 (reference) Figure 3 The output voltage V2211 is highest at time t1 when the charging voltage Vb is highest, and decreases as time progresses from time t1 by repeatedly switching the drive element 5 on / off. When the charge in the bootstrap capacitor 32 is at its maximum, thus controlling the power supply voltage VccU to reach the target level Vtg, the differential amplifier circuit 2211 (refer to...)... Figure 3 The output voltage V2211 is lower than the comparison voltage Vc12. Therefore, for example, at time t2, the voltage level of the prompt signal SgA output from the period detection circuit 221A switches from a high level to a low level. As a result, at time t2, the determination voltage V222 output from the voltage conversion circuit 222 becomes a voltage level Vpso that is higher than the voltage level Vpic during the initial charging period of Pic. Thus, during the control voltage stabilization period Pso after the initial charging period of Pic ends, the semiconductor device 100 can detect a decrease in the control power supply voltage VccL based on the determination voltage V222 of the voltage level Vpso and perform a protection action to prevent the control power supply voltage from decreasing.

[0088] 1-5. Effects of semiconductor devices:

[0089] Reference Figures 1 to 4 Use Figure 5 The effects of the semiconductor device in this embodiment will be explained. Conventional semiconductor devices, like semiconductor device 100, generate control power supply voltage for the upper arm through a bootstrap action; however, the period detection circuit 221A and voltage conversion circuit 222 (see reference 100) in this embodiment... Figure 3 The voltage detection circuit is not configured to control the voltage. Therefore, in existing semiconductor devices, the voltage is input to comparator 223 (see reference 223). Figure 3 The judgment voltage of the corresponding comparator is also set during the initial charging period to the voltage level during the control voltage stabilization period after the initial charging period ends.

[0090] Figure 5 It is a diagram that schematically represents the waveforms of the charging current, the control power supply voltage for the upper arm, and the control power supply voltage for the lower arm during the bootstrap operation of an existing semiconductor device. Figure 5 In this context, "Ib" represents the charging current. Figure 5 In this context, "VccU" indicates the control power supply voltage used by the upper arm. Figure 5 In this context, "VccL" indicates the control power supply voltage used by the lower arm. Figure 5 In this context, "Vdtm" represents the decision voltage input to the comparator. Figure 5 In this context, "Pic" indicates the initial charging period. Figure 5 In this context, "Pso" indicates the period during which the control voltage is stable.

[0091] As described above, the determination voltage Vdtm is set to the same voltage level Vpso during the initial charging period Pic and the control voltage stabilization period Pso after the initial charging period Pic ends. The voltage level Vpso is the same as the voltage level Vpso of the determination voltage V222 in this embodiment (refer to...). Figure 4 For example, the same. Figure 5 As shown, at time t1a after the start of the bootstrap action, if the control power supply voltage VccL for the lower arm becomes lower than the judgment voltage Vdtm, a control power supply voltage reduction protection is applied. Therefore, at time t1b, a predetermined time has elapsed since time t1a, the bootstrap action stops, and the control power supply voltage VccU for the upper arm decreases. At time t1c, a predetermined time has elapsed since time t1b, the bootstrap action restarts. Then, at time t2, the voltage level of the control power supply voltage VccU reaches the target level Vtg, and the bootstrap action ends.

[0092] Thus, in existing semiconductor devices, the voltage level Vpso of the determination voltage Vdtm within the Pic during the initial charging period is set to be the same as the voltage level Pso during the control voltage stabilization period. Therefore, the bootstrap operation (e.g., when the charge in the bootstrap capacitor is low) is achieved. Figure 5 During the operation at time t1 (as shown), the control power supply voltage VccL is lower than the determination voltage Vdtm, resulting in a pause in the bootstrap operation. As a result, in existing semiconductor devices, this leads to a problem where the PIC length increases during the initial charging period.

[0093] In contrast, in the semiconductor device 100 of this embodiment, the voltage level Vpic of the determination voltage V222 within Pic during the initial charging period is set lower than the voltage level Vpso within Pso during the control voltage stabilization period. Therefore, the semiconductor device 100 can suppress unexpected drops in the control power supply voltage VccL applied to Pic during the initial charging period, thus preventing prolonged initial charging times. Furthermore, by setting the voltage level Vpso of the determination voltage V222 within Pso during the control voltage stabilization period to be higher than the voltage level Vpic, the semiconductor device 100 can perform the same protection operation against drops in the control power supply voltage as conventional semiconductor devices.

[0094] As described above, the semiconductor device 100 of this embodiment includes: an IGBT 41; an IGBT 51 connected in series with the IGBT 41 and disposed at a position lower than the IGBT 41; a control IC 1 that controls the driving operation of the IGBT 41; a control IC 2A that controls the driving operation of the IGBT 51 and the protection operation of the IGBT 41 and the IGBT 51; and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by using a bootstrap operation of a control power supply voltage VccL supplied to the control IC 2A. The control IC 2A has a control voltage detection circuit 22A that detects a decrease in the control power supply voltage VccL. The control voltage detection circuit 22A has a period detection circuit 221A that detects the initial charging period during which the bootstrap circuit 3 is initially charged by the bootstrap operation.

[0095] Therefore, the semiconductor device 100 can suppress the accidental application of control power supply voltage reduction protection during the initial charging period, and can also perform control power supply voltage reduction protection even during the stable period of the control power supply voltage.

[0096] 1-5. Variations:

[0097] Reference Figure 1 and Figure 2 Use Figure 6 A modified semiconductor device according to this embodiment will be described. Except for the different structure of the control voltage detection circuit, the modified semiconductor device has the same structure as the semiconductor device 100 of this embodiment. Therefore, for the constituent elements of the modified semiconductor device, those elements that perform the same function as the constituent elements of the semiconductor device 100 of this embodiment will be marked with the same reference numerals and their descriptions will be omitted. Figure 6 This is a circuit block diagram illustrating an example of the general structure of the control voltage detection circuit (an example of a voltage drop detection circuit) 22AM in this modified example.

[0098] like Figure 6 As shown, the control voltage detection circuit 22AM provided in the semiconductor device 100M of this modified example includes a delay circuit 225. This delay circuit 225 delays the prompt signal SgA, which indicates the end of the initial charging period detected by the period detection circuit 221A, for a predetermined time and outputs it to the voltage conversion circuit 222. The input terminal of the delay circuit 225 is connected to the output terminal of the comparator 2212a provided in the period detection circuit 221A. The output terminal of the delay circuit 225 is connected to the input terminal of the voltage conversion circuit 222. Thus, the delay circuit 225 can delay the prompt signal SgA input from the comparator 2212a for a predetermined time and output it to the voltage conversion circuit 222.

[0099] Therefore, the timing at which the voltage conversion circuit 222 changes the voltage level of the determination voltage V222 after the initial charging period is detected by the period detection circuit 221A is slower than the timing in this embodiment due to the delay amount in the delay circuit 225. Consequently, compared to the semiconductor device 100, the semiconductor device 100M can more reliably change the voltage level of the determination voltage V222 after the initial charging period ends. As a result, the semiconductor device 100M can more reliably suppress the accidental application of control power supply voltage reduction protection during the initial charging period, and can perform control power supply voltage reduction protection even during periods of stable control power supply voltage.

[0100] [Second Implementation]

[0101] use Figure 7 The semiconductor device according to the second embodiment of this disclosure will be described. Except for the difference in the structure of the control voltage detection circuit, the semiconductor device of this embodiment has the same structure as the semiconductor device 100 of the first embodiment described above. Therefore, regarding the constituent elements of the semiconductor device of this embodiment, constituent elements that perform the same functions and effects as the constituent elements of the semiconductor device 100 of the first embodiment are marked with the same reference numerals, and their descriptions are omitted.

[0102] 2-1. Overall structure of a semiconductor device:

[0103] The semiconductor device 200 of this embodiment has the same overall structure as the semiconductor device 100 of the first embodiment described above, so the description is omitted.

[0104] 2-2. The structure of the control IC in a semiconductor device:

[0105] The control IC for the upper arm (an example of the first control circuit) included in the semiconductor device 200 of this embodiment has the same structure as the control IC 1 for the upper arm in the first embodiment described above, so the description is omitted.

[0106] The lower arm control IC 2B (an example of a second control circuit) included in the semiconductor device 200 of this embodiment has the same structure as the lower arm control IC 2A in the first embodiment, except for the structure of the voltage drop detection circuit. Therefore, the description of the overall structure of the lower arm control IC 2B included in the semiconductor device 200 of this embodiment is omitted.

[0107] 2-3. Structure of a voltage drop detection circuit in a semiconductor device:

[0108] use Figure 7The control voltage detection circuit (an example of a voltage drop detection circuit) 22B provided in the control IC 2B of the semiconductor device 200 of this embodiment will be described. Figure 7 This is a circuit block diagram illustrating an example of the general structure of the control voltage detection circuit 22B in this embodiment.

[0109] like Figure 7 As shown, the control voltage detection circuit 22B includes a period detection circuit 221B, a voltage conversion circuit 222, a comparator 223, and a signal output terminal 224.

[0110] The period detection circuit 221B is a circuit that detects the initial charging period during which the bootstrap circuit 3 is initially charged by the bootstrap action. The period detection circuit 221B includes a comparator 2213 and a voltage generation circuit 2214. The voltage generation circuit 2214 is, for example, constructed from a DC power supply. The negative terminal of the voltage generation circuit 2214 is connected to a reference potential terminal (e.g., a ground terminal) of the semiconductor device 200. Therefore, the negative terminal of the voltage generation circuit 2214 is at the same potential as the reference potential terminal 10GL. The voltage generation circuit 2214 is configured to output a comparison voltage Vc13 that is lower than the control power supply voltage VccL by a predetermined value. This predetermined value is, for example, set to be the same voltage level as the voltage generated due to a predetermined charging current Ib flowing through the limiting resistor 33.

[0111] Comparator 2213 is, for example, constructed from an operational amplifier. The non-inverting input terminal (+) of comparator 2213 is connected to the charging voltage input terminal 10CT. The inverting input terminal (-) of comparator 2213 is connected to the positive side of the voltage generation circuit 2214. The output terminal of comparator 2213 is connected to the voltage conversion circuit 222. Therefore, when the charging voltage Vb input from the bootstrap circuit 3 via the charging voltage input terminal 10CT is higher than the comparison voltage Vc13, comparator 2213 outputs a high-level signal signal SgB to the voltage conversion circuit 222. Conversely, when the charging voltage Vb input from the bootstrap circuit 3 via the charging voltage input terminal 10CT is lower than the comparison voltage Vc13, comparator 2213 outputs a low-level signal signal SgB to the voltage conversion circuit 222.

[0112] In bootstrap capacitor 32 (reference) Figure 1When the initial charging of the bootstrap circuit 3 is completed, the charging current Ib no longer flows. Therefore, the voltage level of the charging voltage Vb is approximately the same as the voltage level of the control power supply voltage VccL. Thus, the initial charging period can be detected based on the comparison between the charging voltage Vb and the comparison voltage Vc13. In this embodiment, the period detection circuit 221B detects the initial charging period based on the charging voltage Vb based on the charging current Ib flowing through the bootstrap circuit 3.

[0113] As explained in the first embodiment above, the charging voltage Vb corresponds to the voltage drop generated in the limiting resistor 33 due to the charging current Ib flowing through it. This charging voltage Vb is a voltage that is lower than the control power supply voltage VccL by the amount of this voltage drop. The more charge is added to the bootstrap capacitor 32 as the bootstrap circuit 3 performs its bootstrap operation, the smaller the charging current Ib becomes. Therefore, the voltage drop in the limiting resistor 33 decreases as the bootstrap circuit 3 performs its bootstrap operation, and thus the charging voltage Vb increases as the bootstrap operation progresses, becoming approximately the same as the control power supply voltage VccL at the end of the initial charging period.

[0114] Therefore, when the charging voltage Vb is lower than the comparison voltage Vc13, the detection circuit 221B outputs a low signal level (i.e., voltage level) to the voltage conversion circuit 222, indicating that the initial charging period has not ended, as a prompt signal SgB. On the other hand, when the charging voltage Vb is higher than the comparison voltage Vc13, the detection circuit 221B outputs a high signal level (i.e., voltage level) to the voltage conversion circuit 222, indicating that the initial charging period has ended, as a prompt signal SgB.

[0115] The voltage conversion circuit 222 is a circuit that, after the period detection circuit 221B detects the end of the initial charging period, increases the determination voltage V222 used to determine the decrease in the control power supply voltage VccL compared to before the period detection circuit 221B detected the end of the initial charging period. The prompt signal SgB output from the period detection circuit 221B indicates whether the initial charging period has ended through its signal level. That is, a low signal level prompt signal SgB indicates that the initial charging period has not ended. On the other hand, a high signal level prompt signal SgB indicates that the initial charging period has ended.

[0116] Therefore, when the signal level of the prompt signal SgB input from the period detection circuit 221B is low, the voltage conversion circuit 222 determines that the period detection circuit 221B has not detected the end of the initial charging period, and outputs a determination voltage V222 of a predetermined signal level (i.e., voltage level). On the other hand, when the signal level of the prompt signal SgB input from the period detection circuit 221B is high, the voltage conversion circuit 222 determines that the period detection circuit 221B has detected the end of the initial charging period, and outputs a determination voltage V222 that is higher than the signal level before the initial charging period was detected.

[0117] The voltage conversion circuit 222 outputs a determination voltage V222 of different voltage levels to the comparator 223 depending on whether the initial charging period has ended. Therefore, the comparator 223 can compare the optimal determination voltage V222 with the control power supply voltage VccL based on whether the initial charging period has ended. Thus, similar to the control voltage detection circuit 22A in the first embodiment described above, the control voltage detection circuit 22B can appropriately detect whether it is necessary to protect the control IC 2B from the decrease in the control power supply voltage VccL, regardless of whether it is during the initial charging period or during the control voltage stabilization period after the initial charging period ends.

[0118] 2-4. Operation of semiconductor devices:

[0119] Regarding the operation of the semiconductor device 200 in this embodiment, specifically the operation to protect the control IC 2B from a drop in the control power supply voltage during bootstrapping, the only difference is the detection method used by the period detection circuit 221B to detect the end of the initial charging period. The rest is the same as the protection operation in the semiconductor device 100 of the first embodiment described above. Therefore, a description of the operation of the semiconductor device 200 is omitted.

[0120] 2-5. Effects of semiconductor devices:

[0121] The semiconductor device of this embodiment can detect the decrease of the control power supply voltage VccL based on the determination voltage V222 at different voltage levels during the initial charging period and after the initial charging period ends, thus achieving the same effect as the semiconductor device 100 of the first embodiment described above.

[0122] As described above, the semiconductor device 200 of this embodiment includes: an IGBT 41; an IGBT 51 connected in series with the IGBT 41 and disposed at a position lower than the IGBT 41; a control IC 1 that controls the driving operation of the IGBT 41; a control IC 2B that controls the driving operation of the IGBT 51 and the protection operation of the IGBT 41 and the IGBT 51; and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by using a bootstrap operation of a control power supply voltage VccL supplied to the control IC 2B. The control IC 2B has a control voltage detection circuit 22B that detects a decrease in the control power supply voltage VccL. The control voltage detection circuit 22B has a period detection circuit 221B that detects the initial charging period during which the bootstrap circuit 3 is initially charged by the bootstrap operation.

[0123] Therefore, the semiconductor device 200 of this embodiment can suppress the accidental application of control power supply voltage reduction protection during the initial charging period, and can also perform control power supply voltage reduction protection even during the stable period of the control power supply voltage.

[0124] 2-5. Variations:

[0125] use Figure 8 A modified semiconductor device according to this embodiment will be described. Except for the different structure of the control voltage detection circuit, the modified semiconductor device has the same structure as the semiconductor device 200 of this embodiment. Therefore, for the constituent elements of the modified semiconductor device, those that perform the same functions as the constituent elements of the semiconductor device 200 of this embodiment will be labeled with the same reference numerals and their descriptions will be omitted. Figure 8 This is a circuit block diagram illustrating an example of the general structure of the control voltage detection circuit (an example of a voltage drop detection circuit) 22BM of this modified example.

[0126] like Figure 8 As shown, the control voltage detection circuit 22BM provided in the semiconductor device 200M of this modified example has a delay circuit. This delay circuit delays the prompt signal SgB, which indicates the end of the initial charging period detected, input from the period detection circuit 221B, for a predetermined time and outputs it to the voltage conversion circuit 222. The input terminal of the delay circuit 225 is connected to the output terminal of the comparator 2213 provided in the period detection circuit 221B. The output terminal of the delay circuit 225 is connected to the input terminal of the voltage conversion circuit 222. Thus, the delay circuit 225 can delay the prompt signal SgB input from the comparator 2213 for a predetermined time and output it to the voltage conversion circuit 222.

[0127] Therefore, the timing at which the voltage conversion circuit 222 changes the voltage level of the determination voltage V222 after the initial charging period is detected by the period detection circuit 221B is slower than the timing in this embodiment due to the delay amount in the delay circuit 225. Consequently, the semiconductor device 200M can more reliably change the voltage level of the determination voltage V222 after the initial charging period ends, compared to the semiconductor device 200. As a result, the semiconductor device 200M can suppress the accidental application of control power supply voltage reduction protection during the initial charging period and can perform control power supply voltage reduction protection even during periods of stable control power supply voltage.

[0128] [Third Implementation Method]

[0129] use Figure 9 The semiconductor device according to the third embodiment of this disclosure will be described. Except for the different structure of the control voltage detection circuit, the semiconductor device of this embodiment has the same structure as the semiconductor device 100 of the first embodiment described above. Therefore, regarding the constituent elements of the semiconductor device of this embodiment, constituent elements that perform the same functions and effects as the constituent elements of the semiconductor device 100 of the first embodiment are marked with the same reference numerals, and their descriptions are omitted.

[0130] 3-1. Overall structure of a semiconductor device:

[0131] The semiconductor device 300 of this embodiment has the same overall structure as the semiconductor device 100 of the first embodiment described above, so the description is omitted.

[0132] 3-2. The structure of the control IC in a semiconductor device:

[0133] The control IC for the upper arm (an example of the first control circuit) included in the semiconductor device 300 of this embodiment has the same structure as the control IC 1 for the upper arm in the first embodiment described above, so the description is omitted.

[0134] The lower arm control IC 2C (an example of a second control circuit) included in the semiconductor device 300 of this embodiment has the same structure as the lower arm control IC 2A in the first embodiment, except for the structure of the voltage drop detection circuit. Therefore, the description of the overall structure of the lower arm control IC 2C included in the semiconductor device 300 of this embodiment is omitted.

[0135] 3-3. Structure of a voltage drop detection circuit in a semiconductor device:

[0136] use Figure 9The control voltage detection circuit (an example of a voltage drop detection circuit) 22C provided in the control IC 2C of the semiconductor device 300 of this embodiment will be described. Figure 9 This is a circuit block diagram illustrating an example of the general structure of the control voltage detection circuit 22C in this embodiment.

[0137] like Figure 9 As shown, the control voltage detection circuit 22C includes a period detection circuit 221C, a voltage conversion circuit 222, a comparator 223, and a signal output terminal 224.

[0138] The period detection circuit 221C is a circuit that detects the initial charging period of the bootstrap circuit 3 during the initial charging process via the bootstrap action. The period detection circuit 221C has a delay circuit 2215 that delays the charging start signal Scs, which indicates the start of the initial charging of the bootstrap circuit 3, by a predetermined time, so that the charging start signal Scs is output to the voltage conversion circuit 222 as a prompt signal SgC indicating the end of the detected initial charging period.

[0139] The delay circuit 2215 has two input terminals. One of these terminals is connected to the start signal input terminal 10CS of the control IC 2C, and the other is connected to the charging voltage input terminal 10CT. Therefore, a charging start signal Scs is input to the delay circuit 2215 via the start signal input terminal 10CS, and a charging voltage Vb is input to the delay circuit 2215 via the charging voltage input terminal 10CT. The charging start signal Scs is, for example, from the input signals SinU and SinL (refer to...) used to control the semiconductor device 300 and output them. Figure 1 The input is the control device (not shown).

[0140] The delay circuit 2215 is preset with a time corresponding to the initial charging period. The delay circuit 2215 sets the start time of the initial charging period as the moment when the charging start signal Scs is input via the start signal input terminal 10CS and the charging voltage Vb is first input via the charging voltage input terminal 10CT. The delay circuit 2215 starts measuring the elapsed time of the initial charging period from this start time. If the measured elapsed time is the same as the time corresponding to the initial charging period, the delay circuit 2215 outputs the charging start signal Scs to the voltage conversion circuit 222 as a prompt signal SgC.

[0141] The signal level of the charging start signal Scs switches from low to high, for example, when the initial charging begins. From the measurement of the elapsed time during the initial charging period until the time corresponding to the initial charging period has elapsed, the time set in the delay circuit 2215 has not elapsed. Therefore, the period detection circuit 221C outputs a signal level (i.e., voltage level) to the voltage conversion circuit 222 that is, for example, low, indicating that the initial charging period has not ended. On the other hand, after the time corresponding to the initial charging period has elapsed from the measurement of the elapsed time during the initial charging period, the time set in the delay circuit 2215 has elapsed. Therefore, the period detection circuit 221C outputs a signal level (i.e., voltage level) to the voltage conversion circuit 222 that is, for example, high, indicating that the initial charging period has ended because the charging start signal Scs has been delayed.

[0142] The voltage conversion circuit 222 is a circuit that, after the period detection circuit 221B detects the end of the initial charging period, increases the determination voltage V222 used to determine the decrease in the control power supply voltage VccL compared to before the period detection circuit 221B detected the end of the initial charging period. The prompt signal SgC output from the period detection circuit 221C indicates whether the initial charging period has ended through its signal level. That is, a low signal level prompt signal SgC indicates that the initial charging period has not ended. On the other hand, a high signal level prompt signal SgC indicates that the initial charging period has ended.

[0143] Therefore, when the signal level of the prompt signal SgC input from the period detection circuit 221C is low, the voltage conversion circuit 222 determines that the period detection circuit 221C has not detected the end of the initial charging period, and outputs a determination voltage V222 of a predetermined signal level (i.e., voltage level). On the other hand, when the signal level of the prompt signal SgC input from the period detection circuit 221C is high, the voltage conversion circuit 222 determines that the period detection circuit 221C has detected the end of the initial charging period, and outputs a determination voltage V222 that is higher than the signal level before the end of the initial charging period was detected.

[0144] The voltage conversion circuit 222 outputs a determination voltage V222 of different voltage levels to the comparator 223 depending on whether the initial charging period has ended. Therefore, the comparator 223 can compare the optimal determination voltage V222 with the control power supply voltage VccL based on whether the initial charging period has ended. Thus, similar to the control voltage detection circuit 22A in the first embodiment described above, the control voltage detection circuit 22C can appropriately detect whether it is necessary to protect the control IC 2C from the decrease in the control power supply voltage VccL, regardless of whether it is during or after the initial charging period.

[0145] 3-4. Operation of semiconductor devices:

[0146] Regarding the operation of the semiconductor device 300 in this embodiment, specifically the protection of the control IC 2C from a drop in the control power supply voltage during bootstrapping, the only difference is the detection method used by the period detection circuit 221C to detect the end of the initial charging period. The rest is the same as the protection operation in the semiconductor device 100 of the first embodiment described above. Therefore, a description of the operation of the semiconductor device 300 is omitted.

[0147] 3-5. Effects of semiconductor devices:

[0148] The semiconductor device 300 of this embodiment can detect the decrease of the control power supply voltage VccL based on the determination voltage V222 of different voltage levels during the initial charging period and after the initial charging period ends, thus achieving the same effect as the semiconductor device 100 of the first embodiment described above.

[0149] As described above, the semiconductor device 300 of this embodiment includes: an IGBT 41; an IGBT 51 connected in series with the IGBT 41 and disposed at a position lower than the IGBT 41; a control IC 1 that controls the driving operation of the IGBT 41; a control IC 2C that controls the driving operation of the IGBT 51 and the protection operation of the IGBT 41 and the IGBT 51; and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by using a bootstrap operation of a control power supply voltage VccL supplied to the control IC 2C. The control IC 2C has a control voltage detection circuit 22C that detects a decrease in the control power supply voltage VccL. The control voltage detection circuit 22C has a period detection circuit 221C that detects the initial charging period during which the bootstrap circuit 3 is initially charged by the bootstrap operation.

[0150] Therefore, the semiconductor device 300 of this embodiment can suppress the accidental application of control power supply voltage reduction protection during the initial charging period, and can also perform control power supply voltage reduction protection even during the stable period of the control power supply voltage.

[0151] [Fourth Implementation Method]

[0152] use Figure 10 A semiconductor device according to a fourth embodiment of this disclosure will be described. The semiconductor device of this embodiment is characterized in that the function of protecting against a decrease in control voltage is stopped during initial charging. Regarding the constituent elements of the semiconductor device of this embodiment, constituent elements that perform the same functions as the constituent elements of the semiconductor device 100 of the first embodiment are marked with the same reference numerals, and their descriptions are omitted.

[0153] 4-1. Overall structure of a semiconductor device:

[0154] The semiconductor device 400 of this embodiment has the same overall structure as the semiconductor device 100 of the first embodiment described above, so the description is omitted.

[0155] 4-2. The structure of the control IC in a semiconductor device:

[0156] The control IC for the upper arm (an example of the first control circuit) included in the semiconductor device 400 of this embodiment has the same structure as the control IC 1 for the upper arm in the first embodiment described above, so the description is omitted.

[0157] The lower arm control IC 2D (an example of a second control circuit) included in the semiconductor device of this embodiment has the same structure as the lower arm control IC 2A in the first embodiment, except for the structure of the voltage drop detection circuit. Therefore, the description of the overall structure of the lower arm control IC 2D included in the semiconductor device 400 of this embodiment is omitted.

[0158] 4-3. Structure of a voltage drop detection circuit in a semiconductor device:

[0159] use Figure 10 The control voltage detection circuit (an example of a voltage drop detection circuit) 22D provided in the control IC 2D of the semiconductor device 400 of this embodiment will be described. Figure 10 This is a circuit block diagram illustrating an example of the general structure of the control voltage detection circuit 22D in this embodiment.

[0160] like Figure 10As shown, the control voltage detection circuit 22D includes a period detection circuit 221A, a comparator 223, a signal output terminal 224, a voltage generation circuit 226, and a transistor 227.

[0161] The voltage generation circuit 226 is configured, for example, by a DC power supply. The positive terminal of the voltage generation circuit 226 is connected to the non-inverting input terminal (+) of the comparator 223. The negative terminal of the voltage generation circuit 226 is connected to the reference potential terminal (e.g., ground terminal) of the semiconductor device 400 of this embodiment. Therefore, the negative terminal of the voltage generation circuit 226 is at the same potential as the reference potential terminal 10GL. The voltage generation circuit 226 is configured to output a determination voltage V226 with the same voltage level as the determination voltage V222 output by the voltage conversion circuit 222 in the first embodiment after the initial charging period ends. Therefore, in this embodiment, the same voltage is input to the voltage generation circuit 226 regarding the determination voltage V226 input to the comparator 223, regardless of whether it is during the initial charging period or after the initial charging period ends (i.e., always).

[0162] Signal output terminal 224 is used to output an output signal Sout that indicates whether the control power supply voltage VccL has decreased through voltage level.

[0163] Transistor 227 (an example of a fixed circuit) is a circuit that, before the end of the initial charging period is detected by the period detection circuit 221A, fixes the voltage level of the signal output terminal 224 so that the output signal Sout does not represent a decrease in the control power supply voltage VccL. Transistor 227 is, for example, an N-type field-effect transistor. The drain of transistor 227 is connected to the output terminal of comparator 223 and the signal output terminal 224. The source of transistor 227 is connected to the reference potential terminal (e.g., ground terminal) of semiconductor device 400. Therefore, the source of transistor 227 is at the same potential as the negative side of voltage generation circuit 226 and the reference potential terminal 10GL.

[0164] The gate of transistor 227 is connected to the output terminal of period detection circuit 221A. Specifically, the gate of transistor 227 is connected to the output terminal of comparator 2212a provided in comparator circuit 2212 of period detection circuit 221A. Thus, the prompt signal SgA output by period detection circuit 221A is input to the gate of transistor 227. As described in the first embodiment above, the voltage level of prompt signal SgA is high during the initial charging period and low during the control voltage stabilization period after the initial charging period ends.

[0165] Therefore, transistor 227 is in the ON state during the initial charging period, and thus the potential of signal output terminal 224 is low (e.g., ground potential) during the initial charging period. Consequently, during the initial charging period, regardless of whether the control power supply voltage VccL is higher or lower than the judgment voltage V226, the control voltage detection circuit 22D outputs a low-level output signal Sout to the alarm signal generation circuit 25b. The low-level output signal Sout is the voltage output to the alarm signal generation circuit 25b when the control power supply voltage VccL has not decreased. Therefore, during the initial charging period, the control voltage detection circuit 22D is in a state where the function of controlling voltage reduction protection is stopped.

[0166] On the other hand, transistor 227 is in an off state during the control voltage stabilization period after the initial charging period ends. As a result, signal output terminal 224 is electrically disconnected from the reference potential terminal of semiconductor device 400. Therefore, during the control voltage stabilization period after the initial charging period ends, an output signal Sout corresponding to the voltage level of the comparator 223 is output from signal output terminal 224 to alarm signal generation circuit 25b.

[0167] 4-4. Operation of semiconductor devices:

[0168] Regarding the operation of the semiconductor device 400 in this embodiment, specifically the operation of protecting the control IC from a drop in the control power supply voltage during bootstrapping, a prompt signal SgA output from the period detection circuit 221A is used to stop the control voltage protection function during the initial charging period and to release the control voltage protection function after the initial charging period ends. Furthermore, the detection method used by the period detection circuit 221A in this embodiment to detect the end of the initial charging period is the same as the detection method used by the period detection circuit 221A in the first embodiment described above. Therefore, a description of the operation of the semiconductor device in this embodiment is omitted.

[0169] 4-5. The effect of semiconductor devices:

[0170] The semiconductor device 400 of this embodiment stops the protection function against control voltage drop during the initial charging period, thus suppressing unexpected drops in the control power supply voltage VccL applied during the initial charging period. Furthermore, the semiconductor device 400 can perform the control voltage drop protection function after the initial charging period ends. Therefore, the semiconductor device 400 can achieve the same effects as the semiconductor device 100 of the first embodiment described above.

[0171] As described above, the semiconductor device 400 of this embodiment includes: an IGBT 41; an IGBT 51 connected in series with the IGBT 41 and disposed at a position lower than the IGBT 41; a control IC 1 that controls the driving operation of the IGBT 41; a control IC 2D that controls the driving operation of the IGBT 51 and the protection operation of the IGBT 41 and the IGBT 51; and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by using a bootstrap operation of a control power supply voltage VccL supplied to the control IC 2D. The control IC 2D has a control voltage detection circuit 22D that detects a decrease in the control power supply voltage VccL. The control voltage detection circuit 22D has a period detection circuit 221A that detects the initial charging period during which the bootstrap circuit 3 is initially charged by the bootstrap operation.

[0172] Therefore, the semiconductor device 400 of this embodiment can suppress the accidental application of control power supply voltage reduction protection during the initial charging period, and can also perform control power supply voltage reduction protection even during the stable period of the control power supply voltage.

[0173] Additionally, the control voltage detection circuit 22D provided in the semiconductor device 400 includes: a signal output terminal 224 for outputting an output signal indicating whether the control power supply voltage VccL has decreased by means of a voltage level; and a transistor 227 for fixing the voltage level of the signal output terminal 224 to a voltage level at which the output signal does not indicate a decrease in the control power supply voltage VccL until the end of the initial charging period is detected by the period detection circuit 221A.

[0174] Therefore, the semiconductor device 400 can stop the control voltage reduction protection function during the initial charging period, thus suppressing the unexpected reduction protection of the control power supply voltage VccL during the initial charging period.

[0175] [Fifth Implementation Method]

[0176] use Figure 11 A semiconductor device according to a fifth embodiment of this disclosure will be described. The semiconductor device of this embodiment is characterized in that the function of protecting against a decrease in control voltage is stopped during initial charging. Regarding the constituent elements of the semiconductor device of this embodiment, constituent elements that perform the same function as at least one constituent element in the semiconductor device of the second embodiment and the semiconductor device of the fourth embodiment described above are marked with the same reference numerals, and their descriptions are omitted.

[0177] 5-1. Overall structure of a semiconductor device:

[0178] The semiconductor device 500 of this embodiment has the same overall structure as the semiconductor device 200 of the second embodiment described above, so the description is omitted.

[0179] 5-2. The structure of the control IC in a semiconductor device:

[0180] The control IC for the upper arm (an example of the first control circuit) included in the semiconductor device of this embodiment has the same structure as the control IC for the upper arm in the second embodiment described above, so the description is omitted.

[0181] The lower arm control IC 2E (an example of a second control circuit) included in the semiconductor device 500 of this embodiment has the same structure as the lower arm control IC 2B in the second embodiment described above, except for the structure of the voltage drop detection circuit. Therefore, the description of the overall structure of the lower arm control IC 2E included in the semiconductor device of this embodiment is omitted.

[0182] 5-3. Structure of a voltage drop detection circuit in a semiconductor device:

[0183] use Figure 11 The control voltage detection circuit (an example of a voltage drop detection circuit) 22E provided in the control IC 2E of the semiconductor device 500 of this embodiment will be described. Figure 11 This is a circuit block diagram illustrating an example of the general structure of the control voltage detection circuit 22E provided in the semiconductor device 500 of this embodiment.

[0184] like Figure 11 As shown, the control voltage detection circuit 22E includes a period detection circuit 221B, a comparator 223, a signal output terminal 224, a voltage generation circuit 226, a transistor 227, and an NOT gate 228.

[0185] The input terminal of NOT gate 228 is connected to the output terminal of period detection circuit 221B. The output terminal of NOT gate 228 is connected to the gate of transistor 227. Therefore, an inverted signal SgBI, representing the voltage level of the prompt signal SgB output by period detection circuit 221B, is input to the gate of transistor 227. As explained in the second embodiment above, the voltage level of the prompt signal SgB is low during the initial charging period and high during the control voltage stabilization period after the initial charging period ends. Therefore, the voltage level of the inverted signal SgBI is high during the initial charging period and low during the control voltage stabilization period after the initial charging period ends.

[0186] Therefore, transistor 227 in this embodiment operates in the same way as transistor 227 in the fourth embodiment described above. Thus, the control voltage detection circuit 22E is in a state where the function of protecting against a decrease in control voltage is stopped during the initial charging period. On the other hand, after the initial charging period ends (i.e., during the control voltage stabilization period), an output signal Sout corresponding to the voltage level of the comparator 223 is output from the signal output terminal 224 to the alarm signal generation circuit 25b.

[0187] 5-4. Operation of semiconductor devices:

[0188] Regarding the operation of the semiconductor device 500 in this embodiment, as an example of its operation, the operation of protecting the control IC from the impact of a drop in the control power supply voltage during bootstrapping is performed by using a prompt signal SgB output from the period detection circuit 221B. The control voltage protection function is stopped during the initial charging period, and the stop is released after the initial charging period ends. Furthermore, the detection method used by the period detection circuit 221B in this embodiment to detect the end of the initial charging period is the same as the detection method used by the period detection circuit 221B in the second embodiment described above. Therefore, a description of the operation of the semiconductor device 500 in this embodiment is omitted.

[0189] 5-5. The effect of semiconductor devices:

[0190] The semiconductor device 500 of this embodiment stops the control voltage drop protection function during the initial charging period, thus suppressing unexpected voltage drop protection when the control power supply voltage VccL is applied during the initial charging period. Furthermore, the semiconductor device 500 can perform the control voltage drop protection function after the initial charging period ends. Therefore, the semiconductor device 500 can achieve the same effects as the semiconductor device 400 of the fourth embodiment described above.

[0191] As described above, the semiconductor device 500 of this embodiment includes: an IGBT 41; an IGBT 51 connected in series with the IGBT 41 and disposed at a position lower than the IGBT 41; a control IC 1 that controls the driving operation of the IGBT 41; a control IC 2E that controls the driving operation of the IGBT 51 and the protection operation of the IGBT 41 and the IGBT 51; and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by using a bootstrap operation of a control power supply voltage VccL supplied to the control IC 2E. The control IC 2E has a control voltage detection circuit 22E that detects a decrease in the control power supply voltage VccL. The control voltage detection circuit 22E has a period detection circuit 221B that detects the initial charging period during which the bootstrap circuit 3 is initially charged by the bootstrap operation.

[0192] Therefore, the semiconductor device 500 of this embodiment can suppress the accidental application of control power supply voltage reduction protection during the initial charging period, and can also perform control power supply voltage reduction protection even during the stable period of the control power supply voltage.

[0193] Additionally, the control voltage detection circuit 22E provided in the semiconductor device 500 includes: a signal output terminal 224 for outputting an output signal indicating whether the control power supply voltage VccL has decreased through a voltage level; and a transistor 227 for fixing the voltage level of the signal output terminal 224 to a voltage level at which the output signal does not indicate a decrease in the control power supply voltage VccL until the end of the initial charging period is detected by the period detection circuit 221B.

[0194] Therefore, the semiconductor device 500 can stop the control voltage reduction protection function during the initial charging period, thus suppressing the unexpected reduction protection of the control power supply voltage VccL applied during the initial charging period.

[0195] This disclosure is not limited to the above-described embodiments and can be modified in various ways.

[0196] In the first to fifth embodiments described above, the voltage on the anode side of the bootstrap diode 31 is used as the charging voltage Vb, but this disclosure is not limited thereto. For example, even if the charging voltage Vb is the voltage on the cathode side of the bootstrap diode 31, the same effect as the semiconductor device in the first to fifth embodiments described above can be obtained.

[0197] In the first to fifth embodiments described above, the charging voltage Vb on the anode side of the bootstrap diode 31 was used to detect the end of the initial charging period, but this disclosure is not limited thereto. For example, the voltage between the two electrodes of the bootstrap capacitor 32 (i.e., the control power supply voltage VccU for the upper arm) can also be used to detect the end of the initial charging period. In this case, the same effect as the semiconductor device in the first to fifth embodiments described above can also be obtained.

[0198] In the fourth and fifth embodiments described above, the control voltage reduction protection function is stopped during the initial charging period by setting the potential of the signal output terminal 224 to, for example, the same potential as the reference potential terminal of the semiconductor device. However, this disclosure is not limited to this. For example, the voltage conversion circuit 222 in the first to third embodiments described above may also set the determination voltage V222 to 0 volts during the initial charging period. As a result, during the initial charging period, the control power supply voltage VccL is not lower than the determination voltage V222, and therefore the period detection circuits 221A, 221B, and 221C are in the same state as when the control voltage reduction protection function is stopped.

[0199] Explanation of reference numerals in the attached figures

[0200] 1, 2A, 2B, 2C, 2D, 2E: Control IC; 3: Bootstrap circuit; 4, 5: Driver element; 6, 226, 232, 243, 2211d, 2212b, 2214: Voltage generation circuit; 10CS: Start signal input terminal; 10CT: Charging voltage input terminal; 10GL, 10GU: Reference potential terminals; 10M: Intermediate terminal; 10N: Negative side voltage input terminal; 10P: Positive side voltage input terminal; 10SL, 10SU: Control signal input terminals; 10VFO: Alarm signal output terminal; 10VL, 10VU: Control power supply voltage Input terminals (power input terminals); 21: Gate drive circuit; 22A, 22AM, 22B, 22BM, 22C, 22D, 22E: Control voltage detection circuit; 23: Temperature detection circuit; 24: Current detection circuit; 25a: OR gate; 25b: Alarm signal generation circuit; 25c, 227: Transistor; 25d, 233: Constant current source; 25e, 241: Resistor; 31: Bootstrap diode; 32: Bootstrap capacitor; 33: Limiting resistor; 41, 51: IGBT; 42, 52: Freewheeling diode; 53: Temperature sensor; 54: Current sensor; 10 0, 100M, 200, 200M, 300, 400, 500: Semiconductor devices; 211: On / off control circuit; 221A, 221B, 221C: Period detection circuit; 222: Voltage conversion circuit; 223, 231, 242, 2212a, 2213: Comparators; 224: Signal output terminal; 225, 2215: Delay circuit; 228: NOT gate; 2211: Differential amplifier circuit; 2211a: Amplifier; 2211b: Input resistor; 2211c: Feedback resistor; 2212: Comparator circuit; Ib: Charging current; Pic: Initial current. During charging; Pso: Control voltage stabilization period; Scs: Charging start signal; SgA, SgB, SgC: Indication signals; SgBI: Inverting signal; SinL, SinU: Input signals; Sout: Output signal; V222, V226: Decision voltage; Vdtm: Decision voltage; V2211: Output voltage; Vb: Charging voltage; Vc11, Vc12, Vc13: Comparison voltage; VccL, VccU: Control power supply voltage; VggL, VggU: Reference potential; Vpic, Vpso: Voltage level; Vtg: Target level; α: Charging path.

Claims

1. A semiconductor device comprising: First switching element; The second switching element is connected in series with the first switching element and is positioned at a lower potential side than the first switching element. The first control circuit controls the driving action of the first switching element; The second control circuit controls the driving action of the second switching element and the protection action of the first switching element and the second switching element. as well as The bootstrap circuit generates the first control power supply voltage to the first control circuit by using a bootstrap action of a second control power supply voltage supplied to the second control circuit. The second control circuit includes a voltage drop detection circuit that detects a decrease in the voltage of the second control power supply. The voltage drop detection circuit has a period detection circuit that detects the initial charging period during which the bootstrap circuit is initially charged by the bootstrap action.

2. The semiconductor device according to claim 1, wherein, The voltage drop detection circuit includes a voltage conversion circuit that, after the period detection circuit detects the end of the initial charging period, increases the determination voltage used to determine the drop in the second control power supply voltage compared to before the period detection circuit detects the end of the initial charging period.

3. The semiconductor device according to claim 2, wherein, The voltage conversion circuit sets the determination voltage to 0 volts during the initial charging period.

4. The semiconductor device according to any one of claims 1 to 3, wherein, The period detection circuit detects the initial charging period based on the difference between the charging voltage and the comparison voltage, wherein the charging voltage is based on the voltage of the charging current flowing through the bootstrap circuit during the bootstrap action, and the comparison voltage has the same voltage level as the second control power supply voltage.

5. The semiconductor device according to any one of claims 1 to 3, wherein, The period detection circuit detects the initial charging period based on the charging voltage, wherein the charging voltage is based on the voltage of the charging current flowing through the bootstrap circuit during the bootstrap action.

6. The semiconductor device according to claim 2, wherein, The voltage drop detection circuit has a delay circuit that delays a prompt signal input from the period detection circuit indicating the end of the initial charging period by a predetermined time and outputs it to the voltage conversion circuit.

7. The semiconductor device according to claim 2, wherein, The period detection circuit has a delay circuit that delays a charging start signal, which indicates the start of the initial charging of the bootstrap circuit, by a predetermined time, so that the charging start signal is output to the voltage conversion circuit as a prompt signal indicating the end of the detected initial charging period.

8. The semiconductor device according to claim 1, wherein, The voltage drop detection circuit has the following features: The output terminal is used to output an output signal that indicates whether the voltage of the second control power supply has decreased through a voltage level; as well as A fixed circuit that, before the end of the initial charging period is detected by the period detection circuit, fixes the voltage level of the output terminal to a voltage level at which the output signal does not indicate a decrease in the second control power supply voltage.

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