Cavity structure of wafer level packaging crystal oscillator and metal thermocompression bonding method

Abstract

The invention discloses a cavity structure of a high-reliability wafer-level packaging crystal oscillator and a bonding method of the cavity structure, and belongs to the technical field of micro-electro-mechanical systems and semiconductor packaging. The structure comprises a device wafer and a cap wafer which are hermetically bonded through an annular composite metal bonding ring. A main cavity and an annular buffer microcavity surrounding the main cavity are arranged in the cap wafer, the buffer microcavity is located on the inner side of the bonding ring and adjacent to the bonding ring, the depth of the buffer microcavity is smaller than that of the main cavity, and the side wall of the buffer microcavity is of an inclined plane or a stepped structure to form a mechanical stress buffer and particle capture trap. The bonding ring is of a gradient composite structure at least comprising a plastic deformation layer and a self-healing alloy layer. Through collaborative design of a cavity structure and a material process, excellent stress isolation, ultrahigh air tightness, effective electromagnetic shielding and high production yield are synchronously realized, and the reliability bottleneck of a traditional wafer-level packaging crystal oscillator in high-end application is fundamentally solved.

Description

Technical Field

[0001] This invention relates to the fields of microelectromechanical systems and semiconductor packaging technology, specifically to a wafer-level packaged crystal oscillator cavity structure and a metal thermocompression bonding method. Background Technology

[0002] With the rapid development of 5G communication, the Internet of Things, automotive electronics, and high-performance computing, the performance requirements for clock sources, which serve as the "heartbeat" reference of electronic systems, are becoming increasingly stringent. Quartz crystal resonators and microelectromechanical systems (MEMS) resonators are widely used in various clock circuits due to their excellent frequency stability. To achieve smaller size, lower cost, and higher reliability, wafer-level packaging technology has become the mainstream packaging solution for these resonators.

[0003] Traditional wafer-level packaged crystal oscillators typically employ the following structure: a single cavity is formed on a silicon cap wafer through dry or wet etching, and then sealed to the device wafer containing the resonator using methods such as metal thermoforming bonding, eutectic bonding, or glass paste bonding, forming a protective cavity. However, this traditional architecture exposes several inherent technical bottlenecks when dealing with high-end applications:

[0004] Mechanical stress sensitivity issue: The bonding process itself generates significant thermomechanical stress, and the package will also be subjected to external stresses during subsequent module assembly and use. Traditional single-cavity structures lack effective stress buffering mechanisms, and stress is directly transferred through the rigid bonding interface to the stress-sensitive quartz wafer or MEMS resonant beam, causing a non-negligible drift in its resonant frequency, which directly affects the timing accuracy of the system.

[0005] Long-term challenges in airtightness and reliability: The quality of metal hot-press bonding is highly dependent on interface smoothness and cleanliness. Microscopic surface undulations, oxide layers, or contaminants can cause micron- or even nanometer-scale gaps at the bonding interface. These initial defects can expand under stress from temperature cycling and mechanical shock, leading to a gradual degradation of the airtightness of the encapsulation cavity, allowing moisture or harmful gases to intrude, accelerating resonator performance deterioration or even failure. Although using ductile metals such as Au and Cu can improve adhesion, a single material system struggles to achieve the optimal balance between plastic deformation capacity, interfacial diffusion barrier, and high-temperature stability.

[0006] Insufficient electromagnetic interference shielding: Silicon materials have limited shielding effectiveness against electromagnetic waves. In complex electromagnetic environments, high-frequency noise can easily penetrate the silicon cap cavity, interfering with the electromechanical energy conversion process of the resonator, causing phase noise degradation or the generation of spurious frequencies. This problem is particularly prominent for clock chips integrated near high-speed SerDes, RF front-ends, etc. Existing solutions often add a metal shielding cover to the outside of the package, but this increases size, weight, and assembly complexity, which does not conform to the original intention of highly integrated wafer-level packaging.

[0007] Challenges in controlling particulate contamination during wafer-level bonding: Tiny particulate contaminants are inevitably generated during wafer-level bonding. In traditional planar bonding interfaces, these particles may be directly present in the sealing ring area, causing localized bonding failures, creating leakage channels, and severely reducing yield.

[0008] To partially address the aforementioned issues, the industry has attempted some improvements. For example, some technical solutions propose designing raised sealing dams or complex multi-layered metal structures around the bonding ring to improve sealing; others involve coating the inner wall of the cavity with a conductive layer to provide some electromagnetic shielding. However, these improvements often focus on a single problem or introduce new complexity and cost, failing to fundamentally and systematically address the multiple challenges of stress, airtightness, shielding, and contamination control. For instance, complex multi-layered metal rings may exacerbate thermal mismatch stress; and the inner wall coating offers no benefit for low-frequency stress isolation.

[0009] Therefore, there is an urgent need for an innovative wafer-level packaged crystal oscillator structure and bonding method that can be co-designed from the perspectives of physical architecture and material system, and simultaneously achieve excellent stress isolation, ultra-high and stable long-term hermeticity, effective intrinsic electromagnetic shielding and high production yield without significantly sacrificing process feasibility and cost. Summary of the Invention

[0010] To address the shortcomings of existing technologies, a wafer-level packaged crystal oscillator structure and bonding method are provided that can simultaneously improve stress isolation, long-term hermeticity, and electromagnetic interference resistance, while maintaining high process compatibility and production yield.

[0011] To achieve the above objectives, the present invention provides the following technical solution: a cavity structure for wafer-level packaged crystal oscillators, comprising a device wafer with a resonator and a cap wafer with a cavity, wherein the device wafer and the cap wafer are sealed and bonded by an annular bonding ring; the cap wafer has a main cavity and an annular buffer microcavity surrounding the main cavity at its bottom, the annular buffer microcavity being located inside and adjacent to the bonding ring; the depth of the annular buffer microcavity is less than the depth of the main cavity; the bonding ring is a composite metal structure symmetrically distributed at the bottom of the cap wafer and the top of the device wafer, comprising at least a plastically deformable metal layer and a self-healing alloy layer located on the surface of the plastically deformable metal layer.

[0012] Preferably, the sidewall of the annular buffer microcavity is an inclined surface or a stepped structure; the width of the annular buffer microcavity is 5-50 μm, the depth is 5-30 μm, and the depth is 20%-60% of the depth of the main cavity.

[0013] Preferably, the inner wall of the annular buffer microcavity is provided with an electromagnetic shielding layer.

[0014] Preferably, the composite metal structure further includes a diffusion barrier layer located beneath the plastically deformable metal layer.

[0015] Preferably, the plastic deformation metal layer is ultrafine-grained copper or ultrafine-grained gold with an average grain size of less than 200 nm; the self-healing alloy layer is an Au-Sn, Au-Ge, or Au-In eutectic alloy; and the diffusion barrier layer contains at least one of Ti, TiN, TaN, or Ru.

[0016] Preferably, the thickness of the plastically deformable metal layer is 1-5 μm, and the thickness of the self-healing alloy layer is 0.5-2 μm.

[0017] Preferably, a bonding method for a wafer-level packaged crystal oscillator includes the following steps: providing the device wafer and the cap wafer; applying a first temperature T1 and a first pressure P1 in a vacuum or inert atmosphere to cause plastic deformation of the plastic deformation metal layer of the bonding ring, thereby achieving pre-bonding; performing post-processing on the pre-bonded bonding ring, and activating the self-healing alloy layer at a second temperature T2 to achieve self-healing reinforced bonding.

[0018] Preferably, the first temperature T1 is 150-250℃, the first pressure P1 is 50-200MPa, and the second temperature T2 is 10-50℃ higher than the melting point of the self-healing alloy layer.

[0019] Preferably, the post-processing is laser selective annealing, which uses a laser beam with a wavelength of 808nm or 1064nm to scan the region of the bonding ring at a scanning speed of 200-800mm / s.

[0020] Preferably, the post-processing is global thermal annealing, in which the pre-bonded wafer pairs are annealed at a temperature of 230-320°C for 30 seconds to 15 minutes.

[0021] The beneficial effects of this invention are as follows:

[0022] 1. Excellent mechanical stress isolation capability, significantly improving frequency stability.

[0023] This invention constructs an innovative stress buffering and dissipation structure by designing a ring-shaped buffer microcavity surrounding the main cavity within the cap wafer. This ring-shaped buffer microcavity acts as a mechanical decoupler, and its inclined or stepped sidewalls effectively convert longitudinal compressive stress transmitted from the bonding process and the external environment into shear and bending stresses. Experimental data shows that, compared to traditional single-cavity structures, this invention can reduce the peak stress transmitted to the sensitive region of the resonator by 60% to 85%. Under the same 10g mechanical vibration test conditions, the frequency deviation of the resonator is reduced from ±35ppm in the traditional structure to within ±8ppm, improving frequency stability by more than three times. This is crucial for high-reliability applications such as 5G communication base stations and automotive electronics.

[0024] 2. Exceptional long-term airtightness and interface self-healing ability.

[0025] This invention employs a composite metal bonding ring with gradient functions, combined with a self-healing post-treatment process, to synergistically ensure the hermeticity of the encapsulation from both the material system and process perspectives. The plastically deformable metal layer flows fully during the pre-bonding stage, filling macroscopic and microscopic unevenness. The self-healing alloy layer partially melts during subsequent laser or thermal annealing treatments, actively flowing towards and filling residual nanoscale micro-defects at the interface through capillary action, achieving self-healing. Helium mass spectrometry leak detection shows an encapsulation leakage rate of less than 5 × 10⁻⁶. -18 The atm cc / s He meets ultra-high airtightness standards. After 1000 cycles of accelerated aging tests at temperatures ranging from -55°C to 125°C, no detectable degradation in leakage rate was observed, demonstrating its excellent long-term reliability.

[0026] 3. Effective electromagnetic interference shielding from intrinsic integration

[0027] This invention creatively proposes integrating an electromagnetic shielding layer on the sidewalls and / or bottom of a ring-shaped buffer microcavity. This shielding layer is electrically connected to the surrounding metal bonding ring, together forming a complete Faraday cage shield surrounding the resonator. Unlike bulky solutions that use externally attached shielding covers, this is an intrinsically integrated design that does not add extra volume or assembly steps. Measured shielding effectiveness is greater than 30dB in the 1-10GHz frequency band and can reach over 32dB at the 2.4GHz frequency point. It can effectively suppress external high-frequency noise interference on the electromechanical conversion process of the resonator, reducing phase noise degradation by an order of magnitude, making it particularly suitable for highly integrated RF front-end modules.

[0028] 4. Proactive process particulate contamination control and high production yield

[0029] The annular buffer microcavity is designed as a particle trap surrounding the main cavity. Micron-sized particulate contaminants generated during wafer-level bonding are naturally swept into and confined within this annular groove under pressure and airflow, preventing particle residue at critical sealing interfaces or active areas of the main cavity. This passive cleaning mechanism reduces the risk of bonding failure due to particulate contamination by approximately 70%. Combined with the tolerance of self-healing bonding technology to microscopic interface defects, the overall packaging yield can be increased from 85-88% in traditional processes to over 92%, significantly reducing manufacturing costs.

[0030] 5. Good process compatibility and flexible implementation path.

[0031] The core of this invention lies in the microcavity design of the cap wafer, which can be achieved simply by adding a mask and optimizing the etching parameters to the standard deep silicon etching process, making it highly compatible with existing MEMS production lines. The gradient metal layer of the bonding ring can be prepared using conventional PVD and electroplating processes. The post-processing stage offers two options: laser selective annealing and global rapid thermal annealing. The former is suitable for high-performance requirements, while the latter prioritizes cost and economics, providing a clear and feasible technical path for different levels of product needs. The entire solution requires no disruptive equipment investment, facilitating industrialization and promotion.

[0032] 6. Collaboratively address multiple technical challenges to achieve a leap in performance.

[0033] The greatest benefit of this invention lies in its systematic design philosophy. Instead of improving a single performance indicator in isolation, it achieves a deep synergy between cavity structure innovation and bonding material and process innovation, simultaneously overcoming the four core challenges that have long plagued wafer-level packaged crystal oscillators: stress sensitivity, hermeticity degradation, electromagnetic interference, and particulate contamination. This synergistic effect brings about a leap in overall performance, enabling the packaged crystal oscillator to meet the extremely stringent reliability, stability, and anti-interference requirements of clock sources in aerospace, defense, and high-end communication equipment fields. It represents the development direction of next-generation high-performance wafer-level packaging technology. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a complete cross-sectional view of the packaging of the present invention;

[0036] Figure 2 This is a cross-sectional view of region A of the present invention;

[0037] Figure 3 This is a flow chart of the bonding process of the present invention.

[0038] In the figure: 1. Cap wafer; 2. Device wafer; 3. Main cavity; 4. Ring buffer microcavity; 5. Resonator; 6. Bonding ring; 7. Plastic deformation metal layer; 8. Self-healing alloy layer; 9. Electromagnetic shielding layer; 10. Diffusion barrier layer. Detailed Implementation

[0039] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] Example 1: Basic High-Reliability Packaging Structure

[0041] according to Figure 1 , Figure 3 As shown, a cavity structure for a wafer-level packaged crystal oscillator is illustrated. The cap wafer 1 is made of single-crystal silicon material with a thickness of 650 μm. A main cavity 3 and a ring-shaped buffer microcavity 4 surrounding the main cavity 3 are formed at the bottom of the cap wafer 1 using deep reactive ion etching (DRIE). The main cavity 3 is a 2000 μm × 2000 μm square structure with a depth of 80 μm, a bottom flatness of less than 0.5 μm, and a sidewall verticality of 89° ± 1°. The ring-shaped buffer microcavity 4 is located around the main cavity 3, 10 μm from its edge, with a width of 15 μm and a depth of 20 μm, which is 25% of the depth of the main cavity 3. The inner sidewall of the ring-shaped buffer microcavity 4 near the main cavity 3 is designed as a 55° inclined surface, and the outer sidewall near the bonding ring 6 is a near-vertical wall at 88°. The width of the bonding ring 6 region is 150 μm, and it is 20 μm away from the outer wall of the buffer microcavity. The surface of this region has been chemically and mechanically polished, and the surface roughness Ra is less than 8 nm.

[0042] Device wafer 2 also uses single-crystal silicon material with a thickness of 625 μm. A MEMS silicon resonant beam is fabricated on it as resonator 5, with dimensions of 1200 μm × 100 μm × 15 μm. The resonant frequency under vacuum conditions is 26 MHz, and the quality factor Q value is greater than 80,000.

[0043] The composite metal bonding rings 6 are symmetrically distributed at the bottom of the cap wafer 1 and the top of the device wafer 2, employing a three-layer gradient structure. The first layer is a diffusion barrier layer 10, formed by sequentially depositing a 50 nm thick titanium layer and a 100 nm thick titanium nitride layer via magnetron sputtering. The titanium layer deposition parameters are: power 500 W, argon pressure 3 mTorr, and deposition rate 0.5 nm / s. The titanium nitride layer is deposited using reactive sputtering with a nitrogen to argon flow rate ratio of 1:4 and a power of 600 W. This layer provides strong adhesion and effectively blocks the diffusion of subsequent copper layer atoms.

[0044] The second layer, a plastically deformable metal layer 7, is composed of ultrafine-grained electroplated copper with a thickness of 2.5 μm and an average grain size of 75 nm. The preparation process includes: first, sputtering a 200 nm thick copper seed layer, followed by electroplating in a copper sulfate electroplating solution at a current density of 2.5 A / dm², with the addition of sulfur- and nitrogen-containing organic grain refiners. After electroplating, the layer is annealed at 200°C under vacuum for 30 minutes to release internal stress. This copper layer has a Vickers hardness of 1.2 GPa, an elongation greater than 15%, and exhibits good plastic deformation capability.

[0045] The third layer is a self-healing alloy layer 8, composed of a gold-20 tin eutectic alloy, with a thickness of 1.2 μm and a melting point of 280℃. It was prepared using a magnetron co-sputtering process: gold target power 300 W, tin target power 75 W, substrate temperature 100℃, and deposition rate 0.2 nm / s. The resulting film has a uniform composition, with gold content ranging from 79.5% to 80.5% and tin content ranging from 19.5% to 20.5%.

[0046] The bonding method in this embodiment includes the following steps: First, under a vacuum pressure lower than 5 × 10⁻⁶... -4 In the cavity of Pa, device wafer 2 and cap wafer 1 were precisely aligned using an infrared alignment system, achieving an alignment accuracy of ±1.5 μm. The alignment marks were cross-shaped, 20 μm × 20 μm in size and 2 μm in depth. Subsequently, thermo-pressing pre-bonding was performed: under a nitrogen protective atmosphere, the pressure was increased to 50 MPa at a rate of 10 MPa / s, then to 120 MPa at a rate of 5 MPa / s, while the temperature was raised to 220 °C and held for 8 minutes. Finally, laser selective annealing was performed: a 1064 nm fiber laser was used at a power density of 1.8 × 10⁻⁶. 4 A circular scan was performed along the centerline of bonding ring 6 at a scanning speed of 500 mm / s and a beam density of 100 μm, with a scanning overlap of 30%. Infrared thermal imaging showed that the bonding ring 6 region reached a peak temperature of 305°C within 3-5 milliseconds, which is higher than the melting point of the self-healing alloy layer 8 (25°C), and then rapidly cooled.

[0047] Testing showed that the helium mass spectrometry leak detection rate of the encapsulation structure prepared in this embodiment was less than 2 × 10⁻⁶. -18atm cc / sHe. Under external vibration of 10g, sweeping from 100-2000Hz, the resonator 5 exhibited a frequency shift of only ±8ppm, a 77% improvement compared to the ±35ppm of the conventional structure. The average bond shear strength reached 85MPa, with the failure mode being silicon matrix fracture rather than bond interface failure. 97.5% of intentionally introduced alumina particles were effectively trapped within the buffer microcavity.

[0048] Example 2: Enhanced structure with electromagnetic shielding function

[0049] according to Figure 2 As shown, this embodiment, based on Embodiment 1, adds an electromagnetic shielding layer 9 to the inner wall and bottom of the annular buffer microcavity 4. The shielding layer is made of permalloy and has a titanium / nickel-iron double-layer structure: first, the surface of the annular buffer microcavity 4 is cleaned with argon plasma for 5 minutes at a power of 200W; then, a 30nm thick titanium adhesion layer is sputtered; finally, an 800nm ​​thick nickel-iron alloy layer is deposited by co-sputtering with a nickel target and an iron target, wherein the nickel target power is 400W and the iron target power is 100W, and the background vacuum is less than 5×10⁻⁶. - 6 The working pressure was 4 mTorr, the substrate temperature was 200℃, and the deposition rate was 0.3 nm / s. The shielding layer was patterned using photolithography and ion beam etching, remaining only on the inner wall and bottom region of the annular buffer microcavity 4. Etching was performed using a mixture of chlorine and argon gas at a flow rate ratio of 1:3.

[0050] The electromagnetic shielding layer 9 extends into the bonding ring 6 region, forming an electrical contact with the titanium adhesion layer of the bonding ring 6. The contact resistance is less than 0.5Ω, and the overall resistance is less than 2Ω. Shielding effectiveness was tested using a vector network analyzer in the 1-10GHz frequency range: at 2.4GHz, the shielding effectiveness reached 32dB; at 10GHz, the shielding effectiveness remained at 27dB, meeting the requirements of the MIL-STD-461G standard.

[0051] Example 3: Economical Hot Annealing Scheme

[0052] This embodiment provides a cost-optimized implementation. The composite metal bonding ring 6 maintains a three-layer structure but is appropriately thinned: the plastically deformable metal layer 7 has a thickness of 1.8 μm, and the self-healing alloy layer 8 has a thickness of 0.8 μm. The sidewall tilt angle of the annular buffer microcavity 4 is adjusted to 60° to simplify manufacturing. In the bonding process, the pre-bonding temperature is set to 200°C, the pressure is set to 150 MPa, and the holding time is 10 minutes. Post-processing uses global rapid thermal annealing instead of laser annealing: using a single-chamber rapid thermal annealing system, the wafer pair is heated to 290°C in a nitrogen atmosphere at a heating rate of 50°C / s, held for 90 seconds, and then allowed to cool naturally. This process has a wide window, achieving an interface void filling rate of over 95% within a temperature range of 285-295°C for 60-120 seconds.

[0053] Compared to the traditional structure, this embodiment increases material costs by about 18% and equipment investment by about 12%, but improves product yield by 5.2% and resonator frequency stability by 3 times, demonstrating good cost-effectiveness.

[0054] Example 4: Stepped buffer microcavity structure

[0055] In this embodiment, the sidewalls of the annular buffer microcavity 4 adopt a three-stage stepped structure instead of a sloped structure. Each step has a height of 6.7 μm, and the total depth of the three stages is 20 μm. Each step consists of a 5 μm wide inner sidewall, a 5 μm wide planar platform, and a 5 μm wide outer sidewall. The manufacturing method is as follows: first, a first-stage 6.7 μm deep trench is formed by deep reactive ion etching; then, a second-stage 6.7 μm deep etching is performed by defining a smaller opening through photolithography; this process is repeated to form the third stage; finally, the main cavity is etched to a depth of 360 μm. This stepped structure provides more stress reflection interfaces. Finite element analysis shows that the stress at the anchor point of the resonator 5 is reduced from 185 MPa in the traditional structure to 42 MPa, a reduction of 77.3%.

[0056] Example 5: Process Compatibility and Manufacturing Flow

[0057] The implementation of this invention is highly compatible with standard MEMS production lines. Only one additional mask is needed to define the buffer microcavity pattern, and the deep reactive ion etching process parameters need to be adjusted to control the sidewall angle. Metal deposition uses existing physical vapor deposition and electroplating equipment, requiring only optimization of process parameters. Post-processing can optionally include the addition of a laser system or rapid thermal annealing equipment. Pilot production data based on 100 wafers shows: buffer microcavity etching yield of 98.7%, composite metal ring deposition yield of 97.2%, pre-bonding yield of 96.8%, and post-processing yield of 98.5%. The final product's overall yield reaches 92.5%, higher than the 85-88% of traditional structures.

[0058] Example 6: Long-term reliability verification

[0059] Accelerated aging tests were performed on the samples prepared in Example 1. After storage at 150°C for 1000 hours, the frequency drift of resonator 5 was +32 ppm, far below the failure standard of 100 ppm. After 1000 temperature cycles from -55°C to 125°C, the helium leakage rate remained below 3 × 10⁻⁶. -18 atm cc / s He. After 500 hours of testing at 85℃ / 85% relative humidity, no corrosion or delamination was observed. Under a mechanical impact of 1500g at 0.5ms, repeated 5 times on each of the three axes, no structural abnormalities or frequency jumps were observed. Using the Arrenius model, it is estimated that under 25℃ operating conditions, the mean time to failure of this invention exceeds 25 years, significantly longer than the approximately 8 years of traditional structures.

[0060] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A cavity structure for a wafer-level packaged crystal oscillator, comprising a device wafer (2) having a resonator (5) and a cap wafer (1) with a cavity, wherein the device wafer (2) and the cap wafer (1) are sealed and bonded by an annular bonding ring (6), characterized in that: The cap wafer (1) has a main cavity (3) and an annular buffer microcavity (4) surrounding the main cavity (3) at its bottom. The annular buffer microcavity (4) is located inside and adjacent to the bonding ring (6). The depth of the annular buffer microcavity (4) is less than the depth of the main cavity (3); The bonding ring (6) is a composite metal structure symmetrically distributed at the bottom of the cap wafer (1) and the top of the device wafer (2), which includes at least a plastic deformation metal layer (7) and a self-healing alloy layer (8) located on the surface of the plastic deformation metal layer (7).

2. The cavity structure of the wafer-level packaged crystal oscillator according to claim 1, characterized in that: The sidewalls of the annular buffer microcavity (4) are inclined surfaces or stepped structures; The width of the annular buffer microcavity (4) is 5-50 μm, the depth is 5-30 μm, and the depth is 20%-60% of the depth of the main cavity (3).

3. The cavity structure of the wafer-level packaged crystal oscillator according to claim 1, characterized in that: The inner wall of the annular buffer microcavity (4) is provided with an electromagnetic shielding layer (9).

4. The cavity structure of the wafer-level packaged crystal oscillator according to claim 1, characterized in that: The composite metal structure also includes a diffusion barrier layer (10) located below the plastically deformable metal layer (7).

5. The cavity structure of the wafer-level packaged crystal oscillator according to claim 4, characterized in that: The plastic deformation metal layer (7) is ultrafine-grained copper or ultrafine-grained gold with an average grain size of less than 200 nm; the self-healing alloy layer (8) is an Au-Sn, Au-Ge or Au-In eutectic alloy; the diffusion barrier layer (10) contains at least one of Ti, TiN, TaN or Ru.

6. The cavity structure of the wafer-level packaged crystal oscillator according to any one of claims 1-5, characterized in that: The thickness of the plastic deformation metal layer (7) is 1-5 μm, and the thickness of the self-healing alloy layer (8) is 0.5-2 μm.

7. A bonding method for a wafer-level packaged crystal oscillator, characterized in that, Includes the following steps: Provide a device wafer (2) and a cap wafer (1) as described in any one of claims 1-6; In a vacuum or inert atmosphere, a first temperature T1 and a first pressure P1 are applied to cause the plastic deformation metal layer (7) of the bonding ring (6) to undergo plastic deformation, thereby achieving pre-bonding; The bonded ring (6) after pre-bonding is post-treated, and the self-healing alloy layer (8) is activated at the second temperature T2 to achieve self-healing reinforced bonding.

8. The bonding method according to claim 7, characterized in that: The first temperature T1 is 150-250℃, and the first pressure P1 is 50-200MPa; the second temperature T2 is 10-50℃ higher than the melting point of the self-healing alloy layer (8).

9. The bonding method according to claim 7 or 8, characterized in that: The post-processing is laser selective annealing, which uses a laser beam with a wavelength of 808nm or 1064nm to scan the region of the bonding ring (6) at a scanning speed of 200-800mm / s.

10. The bonding method according to claim 7 or 8, characterized in that: The post-processing is global thermal annealing, in which the pre-bonded wafer pairs are annealed at a temperature of 230-320°C for 30 seconds to 15 minutes.

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