Circuit board manufacturing method for conducting copper base on circuit layer and circuit board

Abstract

The invention relates to the field of circuit boards, and discloses a circuit board manufacturing method for conducting a copper base on a circuit layer and a circuit board, the manufacturing method comprises the following steps: a cavity forming step: forming a plurality of cavities at preset positions on a base material structure consisting of a copper plate, a dielectric layer and a copper foil, the cavities penetrating through the dielectric layer and exposing the surface of the copper plate; a slurry filling step: filling conductive slurry into the cavity to form a filling type conduction body for connecting the copper plate and the copper foil; a flattening step: carrying out surface treatment on the area filled with the conductive slurry to enable the upper surface of the filling type conduction body and the upper surface of the copper foil to reach preset flatness; and a circuit forming step: forming a predetermined circuit pattern on the copper foil. The circuit board is manufactured by the manufacturing method. The method has the beneficial effect that the contradiction that efficiency, cost and quality are difficult to consider at the same time in the prior art is successfully broken through.

Description

Technical Field

[0001] This invention relates to the field of circuit boards, and more specifically to a method for manufacturing a circuit board with a copper-based conductive circuit layer and the circuit board itself. Background Technology

[0002] In electronic devices involving high-power heat dissipation (such as LED lighting and power modules), circuit boards that connect the circuit layer to a metal substrate (such as a copper base) are a key technology. The core of these boards lies in constructing a reliable vertical conductive structure (often called a boss) within the dielectric layer to achieve electrical connection and heat dissipation between the upper circuitry and the lower copper base. Currently, the mainstream technology for manufacturing such conductive structures, whether through etching or laser processing to create pits / vias, or through mechanical rolling to deform the substrate and create protrusions, ultimately relies on selective electroplating thickening processes to achieve electrical connection. This involves gradually accumulating a copper layer in a specific area through chemical deposition and electroplating until the required conductor is formed or connected.

[0003] However, this technology paradigm, which relies on selective electroplating for thickness enhancement, has the following drawbacks. First, the process is inevitably lengthy: to fill a deep-to-wide groove or cover the side of a boss, multiple repeated electroplating cycles are often required, significantly extending the production cycle. Second, it is costly and has low material utilization: multiple electroplating processes consume a large amount of energy and chemical materials; if whole-board electroplating is used followed by etching to reduce copper, it results in serious copper waste. Furthermore, it gives rise to persistent quality problems: copper whiskers, which are difficult to completely remove, are easily generated during the electroplating process, becoming a potential hazard that could cause short circuits; at the same time, the process has extremely stringent requirements for the alignment accuracy of the preceding pattern, the uniformity of etching, or the control of rolling stress; any deviation can easily lead to incomplete lamination or unreliable connections, ultimately reducing product yield and long-term reliability. Therefore, existing technologies are always trapped in the contradiction between efficiency, cost, and quality. Summary of the Invention

[0004] To address the aforementioned technical issues, the aim is to provide a method for manufacturing a circuit board with a conductive copper base and a circuit board in which costs are reduced, material utilization is improved, and copper whiskers are completely avoided, thereby improving both product cost and quality.

[0005] This invention is achieved through the following technical solution:

[0006] A method for manufacturing a circuit board with a conductive copper substrate includes a cavity forming step: forming several cavities at predetermined positions on a substrate structure composed of a copper plate, a dielectric layer, and a copper foil, wherein the cavities penetrate the dielectric layer and expose the surface of the copper plate; a paste filling step: filling the cavities with conductive paste to form a filled conductive body connecting the copper plate and the copper foil; a planarization step: performing surface treatment on the area filled with the conductive paste to achieve a preset flatness between the upper surface of the filled conductive body and the upper surface of the copper foil; and a circuit forming step: forming a predetermined circuit pattern on the copper foil.

[0007] The beneficial effects of this invention are that, by adopting a novel process paradigm of prefabricated cavities and conductive paste filling, this method avoids the traditional selective electroplating thickening technique. Specifically, firstly, by replacing lengthy multiple electroplating cycles with one-step paste filling, the production cycle is significantly shortened and efficiency is improved; secondly, costs are significantly reduced and material utilization is improved, avoiding the energy and material consumption of multiple electroplating processes, and eliminating metal waste caused by etching to reduce copper after whole-board electroplating; thirdly, the quality problems derived from electroplating processes are eliminated, as there is no need for electroplating growth within the cavity, completely avoiding the generation of copper whiskers, improving the inherent reliability of the product, and increasing both product cost and quality.

[0008] In some embodiments, the cavity forming step includes: forming a first opening at a predetermined position on the copper foil, and removing all of the dielectric layer directly below the first opening to expose the surface of the copper plate, wherein the lower end of the filling conductor is in direct contact with the upper surface of the copper plate. By employing a technical solution that forms a first opening at a predetermined position on the copper foil and provides a through-hole in the dielectric layer, thus forming a filling cavity together, the two processes of opening the dielectric layer and etching the first opening on the copper foil are cleverly separated. This transforms the stringent, multi-step pattern or mask alignment precision requirements of traditional solutions into a one-time fabrication and alignment of the through-hole in the dielectric layer, significantly enhancing the tolerance of this process and further reducing the technological difficulty. It avoids the extreme difficulty of electroplating the inner walls of deep holes in traditional electroplating filling solutions and also circumvents the high-precision alignment problem of synchronous punching of multi-layer materials in roll forming solutions, successfully overcoming the contradiction between efficiency, cost, and quality in existing technologies.

[0009] In some embodiments, the cavity forming step includes: forming a first opening at a predetermined position on the copper foil, removing all of the dielectric layer directly below the first opening, drilling a groove into the copper plate using a laser, the groove being located directly below the first opening, the depth of the groove being greater than the thickness of the dielectric layer, and embedding the lower end of the filled conductor into the copper plate. Because the structure of forming a first opening at a predetermined position on the copper foil, providing a through hole in the dielectric layer, and providing a groove in the copper plate together constitutes a cavity, and the groove depth is greater than the dielectric layer thickness, the structure allows the lower end of the filled conductor to be embedded inside the copper plate. This creates a three-dimensional mechanical interlock and electrical connection between the conductor and the copper plate, increasing the effective contact area. Compared to traditional electroplated surface adhesion layers or rolled shoulder connections, it exhibits superior resistance to thermal stress fatigue and higher mechanical connection strength, significantly improving the reliability of the conductive interface under long-term high temperature, high power, or vibration environments.

[0010] In some embodiments, during the slurry filling step, the conductive slurry is a copper slurry with a solid content of not less than 80%, and the cured copper slurry constitutes the filled conductor. Because a high-solids-content copper slurry with not less than 80% solids is used as the filling material, the high solids content ensures that the cured conductor has a high electrical conductivity close to that of pure copper, meeting the high current carrying requirements of the circuit board. Simultaneously, its excellent rheological properties facilitate complete filling of the cavity through methods such as screen printing, avoiding problems such as sedimentation, voids, or shrinkage cracking caused by excessively thin slurry. This material selection directly ensures the dual reliability of the filled conductor in terms of electrical performance and physical integrity, and is key to replacing electroplating growth and achieving functional conductivity.

[0011] In some embodiments, the planarization step includes grinding the filled conductor, wherein the height difference between the upper surface of the filled conductor and the upper surface of the copper foil does not exceed 30 μm. Due to the use of a planarization process that first fills the vias with resin and then grinds the entire surface, and strictly controlling the height difference between the upper surface of the final filled conductor and the surface of the copper foil to not exceed 30 μm, the circuit board achieves extremely high surface flatness after the conductor fabrication is completed. This extremely small coplanarity tolerance completely eliminates surface protrusions caused by the dog-bone effect or uneven grinding in traditional electroplating filling processes. It is also superior to the precision fluctuations that may occur during post-rolling grinding, providing a near-perfect planar substrate for subsequent fine circuit photolithography, etching, and other processes, ensuring the forming accuracy and signal transmission quality of ultra-fine circuits.

[0012] In some embodiments, an electroplating thickening step is included between the planarization step and the circuit formation step. This electroplating thickening step involves a single copper plating and electroplating process on the surface of the copper foil and the surface of the filled conductor to uniformly thicken the surface copper layer. Since only one uniform copper plating and electroplating thickening process is required on the copper foil and conductor surfaces after paste filling and planarization, the entire process is greatly simplified while achieving excellent conductivity. The purpose of this electroplating is no longer the time-consuming and material-intensive growth of the main conductive structure (this function has already been completed by the copper paste filling), but simply to uniformly thicken and strengthen the existing excellent conductive surface. This completely avoids the lengthy and costly process caused by multiple repeated electroplating cycles in the prior art, and also eliminates alignment errors and copper whisker risks caused by multiple pattern electroplating processes, improving production efficiency and product quality.

[0013] In some embodiments, the bottom of the groove is provided with at least one stepped hole, and the filling conductor is filled in the stepped hole. Because at least one stepped hole is provided at the bottom of the groove, and the filling conductor is filled therein, the structure forms a multi-level three-dimensional mechanical interlock and multiple stress buffer interface. The stepped structure significantly increases the effective contact area and micro-anchoring points between the copper paste curing body and the copper plate, not only greatly improving the tensile strength in the vertical direction, but also efficiently dispersing the interface stress caused by the difference in thermal expansion coefficients by converting longitudinal shear stress into horizontal compressive stress, thereby enhancing the fatigue reliability of the connection structure under harsh thermal cycling conditions. Simultaneously, the stepped conductive path optimizes the current distribution and reduces contact resistance and the risk of localized overheating.

[0014] The present invention also provides a circuit board with a copper substrate through a circuit layer, which is manufactured using the aforementioned method for manufacturing a circuit board with a copper substrate through a circuit layer, comprising:

[0015] Copper coin;

[0016] A dielectric layer is disposed on the copper plate, and the dielectric layer is a prepreg.

[0017] A copper foil is disposed on the dielectric layer, and a predetermined circuit pattern is formed on the copper foil;

[0018] At least one filled conductor penetrates the dielectric layer and connects the copper plate and the copper foil;

[0019] The filled conductor is formed by solidifying conductive paste filled in the cavity, and the height difference between its upper end face and the upper surface of the copper foil does not exceed 30μm.

[0020] In some embodiments, the lower end of the filled conductor is embedded within the copper plate. This embedded structure creates a three-dimensional, interlocking mechanical and electrical connection between the conductor and the copper plate, increasing the effective contact area and microscopic bonding strength. This results in mechanical anchoring force and thermomechanical stability far exceeding those of traditional surface contact connections, improving the interface's fatigue resistance under long-term high and low temperature cycling, power shock, or vibration environments. It effectively prevents interface delamination or failure due to thermal expansion coefficient mismatch. Simultaneously, the embedded structure provides lower and more stable contact resistance, ensuring the reliability of high current carrying capacity and the integrity of long-term signal transmission.

[0021] In some embodiments, the lower end of the filled conductor is in direct contact with the upper surface of the copper plate. By employing a structure that allows the lower end of the filled conductor to directly contact the upper surface of the copper plate, this process solution achieves maximum process simplification and cost optimization while ensuring reliable electrical connection. This design significantly reduces the stringent requirements for the precision of preceding processing steps, simplifies the production process, shortens the cycle time, and significantly reduces equipment investment and manufacturing costs, providing an optimized structural basis for achieving high-efficiency, low-cost, and high-reliability thermoelectric separation circuit boards.

[0022] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0023] By prefabricating cavities on a laminated substrate and filling them with a high-solids-content conductive paste in a single step to directly form a conductor, this invention replaces lengthy multiple electroplating cycles with a one-step paste filling process, significantly shortening the production cycle and improving efficiency. Secondly, it significantly reduces costs and improves material utilization, avoiding the energy and material consumption of multiple electroplating processes and eliminating metal waste caused by etching to reduce copper content after full-board electroplating. Furthermore, it eliminates the persistent quality problems arising from electroplating processes, as the absence of electroplating growth within the cavity avoids the formation of copper whiskers. Simultaneously, it simplifies the multiple high-precision pattern alignments required in traditional processes to a single alignment of prefabricated vias in the dielectric layer, thereby reducing the difficulty and risk of alignment accuracy control and significantly improving product yield and long-term reliability. Therefore, this invention successfully overcomes the contradiction between efficiency, cost, and quality in existing technologies. Attached Figure Description

[0024] To more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be considered as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In the drawings:

[0025] Figure 1 This is a flowchart illustrating Embodiment 1 of the present invention;

[0026] Figure 2 This is a flowchart illustrating Embodiment 2 of the present invention.

[0027] The attached diagram shows the markings and corresponding component names:

[0028] Through hole 10, filled conductor 20, groove 30, first opening 40. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0030] Throughout this specification, references to "an embodiment," "an example," or "an example" mean that a particular feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment of the invention. Therefore, the phrases "an embodiment," "an example," "an example," or "an example" appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. Furthermore, specific features, structures, or characteristics can be combined in one or more embodiments or examples in any suitable combination and / or sub-combination. Moreover, those skilled in the art will understand that the illustrations provided herein are for illustrative purposes and are not necessarily drawn to scale. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0031] In the description of this invention, the terms "front", "rear", "left", "right", "up", "down", "vertical", "horizontal", "high", "low", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting the scope of protection of this invention.

[0032] The terms "first," "second," etc., used in this invention are merely for clarity of description and are not intended to limit any order or emphasize importance. Furthermore, the term "connection" as used herein, unless otherwise specified, can refer to a direct connection or an indirect connection via other components.

[0033] Example 1

[0034] like Figure 1As shown, this embodiment provides a method for manufacturing a circuit board with a conductive copper substrate, including a cavity forming step: forming several cavities at predetermined positions on a substrate structure composed of a copper plate, a dielectric layer, and a copper foil, wherein the cavities penetrate the dielectric layer and expose the surface of the copper plate; a paste filling step: filling the cavities with conductive paste to form a filled conductive body 20 connecting the copper plate and the copper foil; a planarization step: performing surface treatment on the area filled with the conductive paste to achieve a preset flatness between the upper surface of the filled conductive body 20 and the upper surface of the copper foil; and a circuit forming step: forming a predetermined circuit pattern on the copper foil 30.

[0035] See Figure 1 The cavity forming step includes: forming a first opening 40 at a predetermined position on the copper foil, and removing all the dielectric layer directly below the first opening 40 to expose the surface of the copper plate, with the lower end of the filling conductor 20 in direct contact with the upper surface of the copper plate. By employing a technical solution that forms a first opening 40 at a predetermined position on the copper foil and provides a through-hole 10 on the dielectric layer, thus forming a filling cavity together, the two processes of opening the dielectric layer and etching the first opening 40 on the copper foil are cleverly separated. This transforms the stringent, multi-step pattern or mask alignment precision requirements of traditional solutions into a one-time fabrication and alignment of the through-hole 10 in the dielectric layer, significantly enhancing the tolerance of this process and further reducing the technological difficulty. It avoids the extreme difficulty of electroplating the inner walls of deep holes in traditional electroplating filling solutions and also circumvents the high-precision alignment problem of synchronous punching of multi-layer materials in roll forming solutions, successfully overcoming the contradiction between efficiency, cost, and quality in existing technologies.

[0036] See Figure 1 In the slurry filling step, the conductive slurry is a copper slurry with a solid content of not less than 80%, and the cured copper slurry constitutes the filled conductor 20. Because a high solids content copper slurry of not less than 80% is used as the filling material, the high solids content ensures that the cured conductor has a high conductivity close to that of pure copper, meeting the high current carrying requirements of the circuit board. At the same time, its good rheological properties facilitate complete filling of the cavity through methods such as screen printing, avoiding problems such as sedimentation, voids, or shrinkage cracking caused by excessively thin slurry. This material selection directly ensures the dual reliability of the filled conductor 20 in terms of electrical performance and physical integrity, and is the key to replacing electroplating growth and achieving functional conductivity.

[0037] See Figure 1The planarization step includes grinding the filled conductor 20 (i.e., the copper paste overflowing after curing), wherein the height difference between the upper surface of the filled conductor 20 and the upper surface of the copper foil does not exceed 30μm. Since SMT mounting accuracy is ±20μm -50μm, 30μm is the critical value at which mounting offset does not affect soldering. The maximum height difference of solder wetting and spreading during reflow soldering is approximately 30μm; exceeding this can easily lead to voids / bridging. Therefore, the final height difference between the upper surface of the filled conductor 20 and the surface of the copper foil does not exceed 30μm, resulting in extremely high surface flatness of the circuit board after conductor fabrication. This extremely small coplanarity tolerance completely eliminates surface protrusions caused by the dog-bone effect or uneven grinding in traditional electroplating filling processes. It is also superior to the accuracy fluctuations that may exist after rolling and grinding, providing a near-perfect planar substrate for subsequent fine circuit photolithography, etching, and other processes, ensuring the forming accuracy and signal transmission quality of ultra-fine circuits.

[0038] See Figure 1 The process includes an electroplating thickening step between the planarization step and the circuit formation step. This electroplating thickening step involves a single copper plating and electroplating process on the surface of the copper foil and the surface of the filled conductor 20 to uniformly thicken the surface copper layer. Since only one uniform copper plating and electroplating thickening process is required on the copper foil and conductor surfaces after paste filling and planarization, the entire process is greatly simplified while achieving excellent conductivity. The purpose of this electroplating is no longer the time-consuming and material-intensive growth of the main conductive structure (this function has already been completed by copper paste filling), but simply to uniformly thicken and strengthen the existing excellent conductive surface. This completely avoids the lengthy and costly process caused by multiple repeated electroplating cycles in the prior art, and also eliminates alignment errors and copper whisker risks caused by multiple pattern electroplating processes, improving production efficiency and product quality.

[0039] The specific process flow is as follows: material preparation → cavity fabrication → copper paste screen printing → resin plugging (grinding the raised copper paste) → immersion copper plating → outer layer circuitry → solder mask → lettering → surface treatment → drilling → molding → electrical testing → FQC → FQA → packaging. Resin plugging: The depression and protrusion amplitude of the copper paste after plugging must be strictly controlled to ≤30μm. Exceeding this range will lead to incomplete bonding or poor surface flatness, affecting the accuracy of subsequent processes. Immersion copper plating: The copper thickness of the copper surface and the boss surface must be uniformly thickened (15µm-17µm). Insufficient or uneven copper thickness will reduce the product's current carrying capacity and cause circuit overheating. Outer layer circuitry: Line width and spacing tolerances must be ≤±20%, and PAD (pad) tolerances must be ≤±10%. Exceeding these tolerances will lead to poor circuit connections, affecting component soldering and signal transmission. Solder mask: The non-soldered areas must be completely covered with solder mask ink. If the coverage is incomplete or the ink peels off, it will cause oxidation of the exposed copper surface, leading to a short circuit. Character Marking: Character markings must be made strictly according to customer requirements. Blurred, misaligned, or missing characters will lead to component identification errors during subsequent assembly, increasing rework costs. Surface Treatment: Anti-oxidation surface treatment must be completed according to customer-specified standards. Substandard treatment will lead to surface corrosion during long-term use, shortening the product's lifespan. Finished Product Drilling: Hole diameter tolerance must be controlled within ±0.075mm. Hole diameter deviation will cause screws and pins to be incompatible, directly affecting product assembly compatibility. Molding Processing: The overall dimensional tolerance after molding must be ≤±0.125mm. Dimensional deviations will prevent the product from being inserted into the designated mounting position, causing assembly failure. Electrical Performance Testing: Comprehensive testing of circuit continuity is required. Failure to test this will result in products with open or short circuit issues flowing downstream, causing terminal equipment malfunctions. Full Quality Control (FQC): 100% full inspection of the product appearance is required. Failure to detect appearance defects (such as scratches or ink blemishes) will reduce the product appearance pass rate and affect customer acceptance. Factory Quality Assurance (FQA): Appearance is sampled and inspected according to standard proportions. Insufficient sampling coverage or relaxed standards increase the risk of batches of defective products leaving the factory. Packaging and Shipping: Packaging must strictly adhere to customer packaging requirements. Improper packaging can lead to product damage due to bumps, moisture, or other issues during transportation.

[0040] In the specific manufacturing process, firstly, on a substrate structure consisting of copper foil, a dielectric layer, and a copper plate, dry film patterning and etching processes are used to completely remove a portion of the copper foil at the predetermined location for the conductor, exposing the underlying insulating dielectric layer. Subsequently, laser ablation or drilling processes are used to remove the exposed insulating dielectric layer, forming a cavity that extends to the surface of the underlying copper plate. Next, conductive paste (such as copper paste) is precisely filled into this cavity using a screen printing process, ensuring direct contact between the paste and the copper plate surface. After the paste cures, a filled conductor 20 is formed, connecting the upper circuitry to the lower copper plate. Finally, the filled area undergoes surface smoothing treatment (such as grinding), followed by standard PCB processes such as circuit pattern fabrication and electroplating thickening, ultimately producing a circuit board with conductive lines between the circuit layer and the copper plate.

[0041] Example 2

[0042] See Figure 2 The difference between Embodiment 2 and Embodiment 1 lies in that the cavity forming step includes: forming a first opening 40 at a predetermined position on the copper foil, removing all the dielectric layer directly below the first opening 40, and drilling a groove 30 into the copper plate using a laser. The groove 30 is located directly below the first opening 40, and the depth of the groove 30 is greater than the thickness of the dielectric layer. The lower end of the filled conductor 20 is embedded in the copper plate. Because the first opening 40 is formed at a predetermined position on the copper foil, a through hole 10 is provided on the dielectric layer, and a groove 30 is provided on the copper plate, these three elements together constitute a cavity. The groove 30's depth is greater than the dielectric layer's thickness, allowing the lower end of the filled conductor to be embedded inside the copper plate. This structure creates a three-dimensional mechanical interlock and electrical connection between the conductor and the copper plate, increasing the effective contact area. Compared to traditional electroplated surface adhesion layers or rolled shoulder connections, it exhibits superior resistance to thermal stress fatigue and higher mechanical connection strength, significantly improving the reliability of the conductive interface under long-term high-temperature, high-power, or vibration environments.

[0043] See Figure 2 The sidewall roughness of the groove 30 formed by laser drilling is 3.0μm-8.0μm, and the dimensional tolerance of the groove 30 is ±0.05mm. Because both the sidewall roughness (3.0μm-8.0μm) and dimensional tolerance (±0.05mm) of the laser-processed groove 30 are controlled simultaneously, the appropriate roughness provides a strong mechanical anchoring point for the copper paste, enhancing the bonding force between the paste and the copper plate and preventing interface delamination. Meanwhile, the strict dimensional tolerance ensures the precise consistency of the cavity volume, thereby guaranteeing the stability of the amount of copper paste used in each filling and the final conductor size. These two precisely controlled parameters work synergistically to ensure the consistency and high reliability of the filled conductor 20's performance at both the microscopic and macroscopic levels.

[0044] See Figure 2The bottom of the groove 30 is provided with at least one stepped hole, and the filling conductor is filled in the stepped hole. Because at least one stepped hole is provided at the bottom of the groove, and the filling conductor is filled in it, the structure forms a multi-level three-dimensional mechanical interlock and multiple stress buffer interface. The stepped structure significantly increases the effective contact area and micro-anchoring points between the copper paste curing body and the copper plate, not only greatly improving the vertical tensile strength, but also efficiently dispersing the interface stress caused by the difference in thermal expansion coefficients by converting longitudinal shear stress into horizontal compressive stress, thereby enhancing the fatigue reliability of the connection structure under harsh thermal cycling conditions. Simultaneously, the stepped conductive path optimizes the current distribution and reduces contact resistance and the risk of localized overheating.

[0045] The specific process flow is as follows: material preparation → cavity fabrication → copper paste screen printing → resin plugging (grinding down protruding copper paste) → electroplating → outer layer circuitry → solder mask → lettering → surface treatment → drilling → molding → electrical testing → FQC → FQA → packaging. Among these, the laser-drilled groove 30: the core control groove 30 has a dimensional tolerance of ±0.05mm. Dimensional deviations directly affect the subsequent copper paste filling and electroplating effects, leading to substandard product structure.

[0046] In the specific manufacturing process, firstly, on a substrate structure consisting of copper foil, a dielectric layer, and a copper plate, dry film patterning and etching processes are used to completely remove a portion of the copper foil at the predetermined location for the conductive element, exposing the underlying insulating dielectric layer. Subsequently, laser ablation or drilling processes are used to remove the exposed portion of the insulating dielectric layer. Then, a groove 30 is drilled in the copper plate using a laser, forming a cavity that penetrates to the underlying copper plate. Next, conductive paste (such as copper paste) is precisely filled into the groove 30 using a screen printing process, ensuring the paste is positioned within the groove. After the paste cures, a filled conductive element 20 is formed, connecting the upper circuitry to the lower copper plate. Finally, the filled area undergoes surface smoothing treatment (such as grinding), followed by standard PCB processes such as circuit pattern fabrication and electroplating thickening, ultimately producing a circuit board with conductive lines between the circuit layer and the copper plate.

[0047] Example 3

[0048] See Figure 1 This embodiment 3 provides a circuit board with a copper substrate through a circuit layer, which is manufactured using the aforementioned method for manufacturing a circuit board with a copper substrate through a circuit layer, and includes: a copper plate;

[0049] A dielectric layer is disposed on the copper plate, and the dielectric layer is a prepreg.

[0050] A copper foil is disposed on the dielectric layer, and a predetermined circuit pattern is formed on the copper foil;

[0051] At least one filled conductor 20 penetrates the dielectric layer and connects the copper plate and the copper foil;

[0052] The filled conductor 20 is formed by solidifying conductive paste filled in the cavity, and the height difference between its upper end face and the upper surface of the copper foil does not exceed 30μm.

[0053] A copper foil 30 is disposed on the dielectric layer 20, and a predetermined circuit pattern is formed on the copper foil 30;

[0054] At least one filled conductor 20 penetrates the dielectric layer 20 and connects the copper plate 10 and the copper foil 30. The cavity filled by the filled conductor 20 is formed by the groove 30 on the copper plate 10 and the pre-made through hole 1021 on the prepreg.

[0055] The filled conductor 20 is formed by solidifying conductive paste filled in the cavity. The height difference between its upper end and the upper surface of the copper foil 30 does not exceed 30 μm, and its lower end is embedded in the copper plate 10.

[0056] See Figure 1 The lower end of the filled conductor 20 is in direct contact with the upper surface of the copper plate. By employing a structure that allows the lower end of the filled conductor 20 to directly contact the upper surface of the copper plate, this process solution achieves maximum process simplification and cost optimization while ensuring reliable electrical connection. This design significantly reduces the stringent requirements for the precision of preceding processing steps, simplifies the production process, shortens the cycle time, and significantly reduces equipment investment and manufacturing costs, providing an optimized structural basis for achieving high-efficiency, low-cost, and high-reliability thermoelectric separation circuit boards.

[0057] Example 4

[0058] See Figure 2 The difference between this embodiment 4 and embodiment 3 is that a groove 30 is provided on the copper plate, and at least one stepped hole is provided in the groove 30. The lower end of the filled conductor 20 is embedded in the groove 30 and the stepped hole of the copper plate. Because of the structure that embeds the lower end of the filled conductor 20 into the copper plate, a three-dimensional interlocking mechanical and electrical connection is formed between the conductor and the copper plate, increasing the effective contact area and microscopic bonding strength. This results in mechanical anchoring force and thermomechanical stability far exceeding those of traditional surface contact connections, improving the fatigue resistance of the interface under long-term high and low temperature cycling, power impact, or vibration environments, and effectively preventing interface delamination or failure due to thermal expansion coefficient mismatch. Simultaneously, the embedded structure provides lower and more stable contact resistance, ensuring the reliability of high current carrying capacity and the integrity of long-term signal transmission.

[0059] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for manufacturing a circuit board with a copper substrate having conductive circuit layers, characterized in that, Includes the following steps: Cavity forming step: Several cavities are formed at predetermined positions on a substrate structure consisting of a copper plate, a dielectric layer and a copper foil, each cavity penetrating the dielectric layer and the copper foil and exposing the upper surface of the copper plate; Slurry filling step: Fill the cavity with conductive slurry to form a filled conductor connecting the copper plate and the copper foil; Leveling step: Surface treatment is performed on the area filled with the conductive paste to make the upper surface of the filled conductor and the upper surface of the copper foil reach a preset flatness. Circuit formation step: A predetermined circuit pattern is formed on the copper foil.

2. The method for fabricating a circuit board with a conductive copper substrate according to claim 1, characterized in that, The cavity forming step includes: forming a first opening at a predetermined position on the copper foil, and removing all of the dielectric layer directly below the first opening to expose the surface of the copper plate, wherein the lower end of the filling conductor is in direct contact with the upper surface of the copper plate.

3. The method for fabricating a circuit board with a conductive copper substrate according to claim 1, characterized in that, The cavity forming step includes: forming a first opening at a predetermined position on the copper foil, removing all of the dielectric layer directly below the first opening, drilling a groove into the copper plate using a laser, the groove being located directly below the first opening, the depth of the groove being greater than the thickness of the dielectric layer, and the lower end of the filling conductor being embedded in the copper plate.

4. The method for fabricating a circuit board with a conductive copper substrate according to any one of claims 1-3, characterized in that, In the slurry filling step, the conductive slurry is a copper slurry with a solid content of not less than 80%, and the cured copper slurry constitutes the filled conductor.

5. The method for fabricating a circuit board with a conductive copper substrate according to claim 4, characterized in that, The planarization step includes grinding the filled conductor, wherein the height difference between the upper surface of the filled conductor and the upper surface of the copper foil does not exceed 30 μm.

6. The method for fabricating a circuit board with a conductive copper substrate according to claim 3, characterized in that, The bottom of the groove is provided with at least one stepped hole, and the filling conductor fills the stepped hole.

7. The method for fabricating a circuit board with a conductive copper substrate according to claim 1, characterized in that, The planarization step is followed by the circuit formation step, which includes an electroplating thickening step. The electroplating thickening step involves immersing copper and electroplating the surface of the copper foil and the surface of the filler conductor to uniformly thicken the surface copper layer.

8. A circuit board with a copper substrate through a circuit layer, manufactured using the method for manufacturing a circuit board with a copper substrate through a circuit layer as described in any one of claims 1-7, characterized in that, include: Copper coin; A dielectric layer is disposed on the copper plate, and the dielectric layer is a prepreg. A copper foil is disposed on the dielectric layer, and a predetermined circuit pattern is formed on the copper foil; At least one filled conductor penetrates the dielectric layer and connects the copper plate and the copper foil; The filled conductor is formed by solidifying conductive paste filled in the cavity, and the height difference between its upper end face and the upper surface of the copper foil does not exceed 30μm.

9. The circuit board with copper-based conductive lines according to claim 8, characterized in that, The copper plate is provided with a groove, and the groove is provided with at least one stepped hole. The lower end of the filling conductor is embedded in the groove of the copper plate.

10. The circuit board with copper substrate conductive circuitry according to claim 8, characterized in that, The lower end of the filled conductor is in direct contact with the upper surface of the copper plate.

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