Light emitting diode and preparation method thereof
By creating first and second step surfaces on the second semiconductor layer, the ineffective areas at the edges of the current spreading layer and the semiconductor layer are reduced, thereby improving the brightness of the Micro-LED chip and solving the problem of the influence of chip size on brightness.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HC SEMITEK ZHEJIANG CO LTD
- Filing Date
- 2026-04-13
- Publication Date
- 2026-05-12
AI Technical Summary
As the size of Micro-LED chips shrinks, the impact of chip size on LED chip brightness becomes increasingly severe, and existing technologies struggle to effectively reduce this impact.
A first step surface extending to the first semiconductor layer is formed on the surface of the second semiconductor layer, and a second step surface extending to the middle of the second semiconductor layer is further formed, so that the edge of the current spreading layer is at a certain distance from the surface edge of the second semiconductor layer, thereby reducing the area of the ineffective region.
By reducing the area of ineffective regions, the brightness of light-emitting diodes is improved, and the impact of chip size on LED chip brightness is reduced, making it particularly suitable for Micro-LED chips.
Smart Images
Figure CN122028563A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of light-emitting devices, and in particular to a light-emitting diode and a method for fabricating the same. Background Technology
[0002] Light-emitting diodes (LEDs) are semiconductor devices that emit light. They have advantages such as energy saving, high brightness, high durability, long life and light weight, and have been widely used in lighting and display fields.
[0003] Related technology provides a light-emitting diode (LED) comprising a first semiconductor layer, a light-emitting layer, a second semiconductor layer, and a current-spreading layer stacked together. A stepped surface extending from the second semiconductor layer to the first semiconductor layer is formed. The current-spreading layer is located on the surface of the second semiconductor layer, and the edge of the current-spreading layer is at a certain distance from the edge of the surface of the second semiconductor layer.
[0004] However, as LED chip sizes continue to shrink, such as with Micro-LED chips, the impact of chip size on LED brightness becomes increasingly significant. Therefore, reducing the influence of chip size on LED brightness is a pressing issue that needs to be addressed. Summary of the Invention
[0005] This disclosure provides a light-emitting diode and its fabrication method, which can improve the brightness of the light-emitting diode. The technical solution is as follows: On one hand, a light-emitting diode is provided, the light-emitting diode comprising: a first semiconductor layer, a light-emitting layer, a second semiconductor layer, and a current spreading layer; The first semiconductor layer, the light-emitting layer and the second semiconductor layer are stacked in sequence. The surface of the second semiconductor layer is provided with a first step surface extending to the first semiconductor layer, and the surface of the second semiconductor layer is also provided with a second step surface extending to the middle of the second semiconductor layer. The current spreading layer is located on the surface of the second semiconductor layer, and the distance A between the edge of the current spreading layer and the surface edge of the second semiconductor layer is less than the width B of the second step surface.
[0006] Optionally, the distance A is 0.5~5μm.
[0007] Optionally, the width B is 1~10μm.
[0008] Optionally, the angle α between the second step surface and the corresponding sidewall is 20 to 70 degrees.
[0009] Optionally, the height difference C between the second step surface and the surface of the second semiconductor layer is 500~5000 angstroms.
[0010] On the other hand, a method for fabricating a light-emitting diode is provided, the method comprising: Fabricate a first semiconductor layer, a light-emitting layer, and a second semiconductor layer that are stacked sequentially; The first semiconductor layer, the light-emitting layer, and the second semiconductor layer are patterned to form a first step surface extending from the surface of the second semiconductor layer to the first semiconductor layer; A current spreading layer is formed on the surface of the second semiconductor layer; The surface of the second semiconductor layer not covered by the current spreading layer is patterned to form a second step surface extending from the surface of the second semiconductor layer to the middle of the second semiconductor layer. The distance A between the edge of the current spreading layer and the edge of the surface of the second semiconductor layer is less than the width B of the second step surface.
[0011] Optionally, the distance A is 0.5~5μm.
[0012] Optionally, the width B is 1~10μm.
[0013] Optionally, the angle α between the second step surface and the corresponding sidewall is 20 to 70 degrees.
[0014] Optionally, the height difference C between the second step surface and the surface of the second semiconductor layer is 500~5000 angstroms.
[0015] The beneficial effects of the technical solutions provided in this disclosure are: In this embodiment, a first semiconductor layer, a light-emitting layer, and a second semiconductor layer are stacked sequentially. A current-spreading layer is located on the surface of the second semiconductor layer, and the edge of the current-spreading layer is a certain distance from the surface edge of the second semiconductor layer. This area is, on the one hand, an ineffective region that does not emit light (generally, recombination light emission is rare under current), and on the other hand, it absorbs light. Therefore, in this embodiment, when creating the stepped surface, in addition to creating a first stepped surface extending to the first semiconductor layer, a second stepped surface extending to the middle of the second semiconductor layer is further created. The width of this second stepped surface is greater than the distance between the edge of the current-spreading layer and the surface edge of the second semiconductor layer, thereby significantly reducing the area of the aforementioned ineffective region, reducing the brightness absorption of the ineffective region, and improving the brightness of the light-emitting diode. Furthermore, this solution can reduce the impact of chip size on LED chip brightness and is suitable for Micro-LED chips. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure; Figure 2 This is a schematic diagram of the structure of a second semiconductor layer provided in an embodiment of this disclosure; Figure 3 This is a top view of a light-emitting diode provided in an embodiment of this disclosure; Figure 4 This is a flowchart of a method for fabricating a light-emitting diode provided in an embodiment of this disclosure; Figure 5 This is a flowchart of another method for fabricating a light-emitting diode provided in this embodiment.
[0018] The attached figures are labeled as follows: 100: Substrate; 101: First semiconductor layer; 102: Light-emitting layer; 103: Second semiconductor layer; 104: Current spreading layer; 105: Current blocking layer; 106: Passivation layer; 107: First electrode; 108: Second electrode; 109: First pad; 110: Second pad; 200: First step surface; 300: Second step surface; 1000: Protrusion; 161: First through hole; 162: Second through hole. Detailed Implementation
[0019] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.
[0020] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure. See also... Figure 1 The light-emitting diode includes: a first semiconductor layer 101, a light-emitting layer 102, a second semiconductor layer 103, and a current spreading layer 104.
[0021] The first semiconductor layer 101, the light-emitting layer 102 and the second semiconductor layer 103 are stacked in sequence. The surface of the second semiconductor layer 103 is provided with a first step surface 200 extending to the first semiconductor layer 101, and the surface of the second semiconductor layer 103 is also provided with a second step surface 300 extending to the middle of the second semiconductor layer 103.
[0022] The current spreading layer 104 is located on the surface of the second semiconductor layer 103.
[0023] Figure 2 This is a schematic diagram of the structure of a second semiconductor layer provided in an embodiment of this disclosure. See also... Figure 1 and Figure 2 The distance A between the edge of the current spreading layer 104 and the surface edge of the second semiconductor layer 103 is less than the width B of the second step surface 300.
[0024] In this embodiment, a first semiconductor layer, a light-emitting layer, and a second semiconductor layer are stacked sequentially. A current-spreading layer is located on the surface of the second semiconductor layer, and the edge of the current-spreading layer is a certain distance from the surface edge of the second semiconductor layer. This area is both an ineffective region that does not emit light and also absorbs light. Therefore, in this embodiment, in addition to creating a first step surface extending to the first semiconductor layer, a second step surface extending to the middle of the second semiconductor layer is further created. The width of this second step surface is greater than the distance between the edge of the current-spreading layer and the surface edge of the second semiconductor layer, thereby significantly reducing the area of the ineffective region, reducing the light absorption by the ineffective region, and improving the brightness of the light-emitting diode. Furthermore, this solution can reduce the impact of chip size on LED chip brightness and is suitable for Micro-LED chips.
[0025] In this embodiment of the disclosure, the distance A is 0.5~5μm.
[0026] In this implementation, the distance A is 0.5~5μm, which ensures that the area of the invalid region is small enough after the second step surface is opened, and also ensures that the process requirements are not too high when opening the second step surface.
[0027] For example, the distance A is 1 μm, 2 μm or 3 μm.
[0028] In this embodiment of the disclosure, the width B is 1~10μm.
[0029] In this implementation, the width B is 1~10μm, which can ensure that the area of the invalid region is reduced sufficiently by opening the second step surface, while avoiding the second step surface area being too large and affecting the light-emitting area.
[0030] For example, the width B is 3μm, 5μm or 7μm.
[0031] In this embodiment of the disclosure, the angle α between the second step surface 300 and the corresponding sidewall is 20 to 70 degrees. The corresponding sidewall refers to the step sidewall corresponding to the step surface.
[0032] In this implementation, the aforementioned angle facilitates the etching formation of the second step surface.
[0033] For example, the angle α between the second step surface 300 and the corresponding sidewall is 40 or 50 degrees.
[0034] In this embodiment of the disclosure, the height difference C between the second step surface 300 and the surface of the second semiconductor layer 103 is 500~5000 angstroms.
[0035] In this implementation, the etching depth of the second step surface 300 is 500~5000 angstroms. On the one hand, it can etch away a sufficient volume to reduce light absorption; on the other hand, it avoids damage to the light-emitting layer due to excessive etching depth, and the requirements for etching process are low.
[0036] For example, the height difference C between the second step surface 300 and the surface of the second semiconductor layer 103 is 1000, 2000 or 4000 angstroms.
[0037] like Figure 1 As shown, the light-emitting diode also includes a substrate 100, and a first semiconductor layer 101 is located on the substrate.
[0038] The substrate 100 may be a patterned substrate, and the side of the patterned substrate facing the first semiconductor layer 101 has a plurality of protrusions 1000.
[0039] In this implementation, a patterned substrate is used, which is beneficial to the growth quality of the epitaxial structure on the substrate.
[0040] See you again Figure 1 The light-emitting diode also includes a current blocking layer 105.
[0041] The current blocking layer 105 is located on the surface of the second semiconductor layer 103, and the current spreading layer 104 covers the current blocking layer 105 and is electrically connected to the second semiconductor layer 103.
[0042] In this implementation, the current spreading effect can be enhanced by designing a current blocking layer and a current spreading layer.
[0043] See you again Figure 1 The light-emitting diode also includes a first electrode 107 and a second electrode 108.
[0044] The first electrode 107 is electrically connected to the current spreading layer 104, and the second electrode 108 is electrically connected to the first stepped surface 200.
[0045] See you again Figure 1The light-emitting diode further includes a passivation layer 106, which covers the current spreading layer 104, the first step surface 200, the second step surface 300, the first electrode 107, and the second electrode 108.
[0046] See you again Figure 1 The light-emitting diode further includes a first pad 109 and a second pad 110, the first pad 109 and the second pad 110 being located on the passivation layer 106.
[0047] The passivation layer 106 has a first through hole 161 and a second through hole 162.
[0048] The first pad 109 is electrically connected to the first electrode 107 through the first through hole 161, and the second pad 110 is electrically connected to the second electrode 108 through the second through hole 162.
[0049] In the above implementation, the electrical connection of the light-emitting diode chip is facilitated by setting electrodes and pads.
[0050] In this embodiment of the disclosure, the substrate 100 can be any one of a sapphire substrate, a Si substrate, or a SiC substrate, and the material of the substrate 100 is not limited in this embodiment of the disclosure.
[0051] For example, substrate 100 is a sapphire substrate.
[0052] In this embodiment of the disclosure, the first semiconductor layer 101 can be an N-type semiconductor layer, and the second semiconductor layer 103 can be a P-type semiconductor layer.
[0053] For example, the first semiconductor layer 101 can be an N-type GaN layer, and the second semiconductor layer 103 can be a P-type GaN layer.
[0054] In other embodiments, the first semiconductor layer 101 may be a P-type semiconductor layer, and the second semiconductor layer 103 may be an N-type semiconductor layer.
[0055] In this embodiment of the disclosure, the light-emitting layer 102 can be a multi-quantum well layer, such as an InGaN / GaN multi-quantum well structure.
[0056] In this embodiment of the disclosure, the current spreading layer 104 may be an indium tin oxide (ITO) layer.
[0057] In this embodiment of the disclosure, the current blocking layer 105 can be an AlGaN or SiO2 layer.
[0058] For example, the current blocking layer 105 is an AlGaN current blocking layer.
[0059] In this embodiment of the disclosure, the passivation layer 106 may include a first dielectric layer covering the second semiconductor layer 103 and a second dielectric layer covering the first dielectric layer.
[0060] Within the wavelength range of light emitted by the light-emitting layer 102, the refractive index of the first dielectric layer is greater than that of the second dielectric layer.
[0061] The first dielectric layer can be a silicon compound layer, such as SiO2, Si3N4, or SiN. x Or a SiON layer, where x is greater than 0.
[0062] For example, the first dielectric layer may be a SiO2 layer.
[0063] The second dielectric layer can be a distributed Bragg reflector (DBR) layer, such as a film formed by overlapping titanium dioxide and silicon dioxide.
[0064] The first dielectric layer mainly serves as insulation and prevents leakage, while the second dielectric layer mainly serves as a highly efficient light reflector.
[0065] In this embodiment of the disclosure, the first electrode 107 and the second electrode 108 can be a combination of one or more metal or alloy layers such as Cr, Al, AlCu, Ti, Ni, Pt and Au.
[0066] For example, the first electrode 107 and the second electrode 108 are Cr, Al, AlCu, Ti, Ni, Pt and Au stacks.
[0067] In this embodiment of the disclosure, the first pad 109 and the second pad 110 can be a combination of one or more metal or alloy layers such as Cr, Al, AlCu, Ti, Ni, Pt and Au.
[0068] For example, the first pad 109 and the second pad 110 are Cr, Al, AlCu, Ti, Ni, Pt and Au stacks.
[0069] Figure 3 This is a top view of a light-emitting diode provided in an embodiment of this disclosure. The top view only shows a portion of the film layers. Figure 1 yes Figure 3 A cross-sectional view of S-S'. (See diagram below.) Figure 3 As shown, the shape of the second step surface 300 is the same as the inner circle shape of the first step surface 200.
[0070] It is worth noting that, in the embodiments of this disclosure, the structure can be selectively added or reduced based on the structure of the light-emitting diode described above, and this disclosure does not limit this.
[0071] For example, the light-emitting diode may also include a buffer layer, an undoped layer, etc., located between the substrate and the first semiconductor layer.
[0072] In the fabrication of the above-described light-emitting diode, a first semiconductor layer, a light-emitting layer, and a second semiconductor layer can be deposited on a substrate first; then the first step surface and the second step surface can be etched sequentially; a current blocking layer and a current spreading layer can be fabricated; then the first electrode and the second electrode can be fabricated; then a passivation layer can be fabricated; and finally the first pad and the second pad can be fabricated.
[0073] Figure 4 This is a flowchart illustrating a method for fabricating a light-emitting diode (LED) according to an embodiment of this disclosure. See also... Figure 4 The method includes the following steps: S11. Fabricate a first semiconductor layer, a light-emitting layer, and a second semiconductor layer that are stacked sequentially.
[0074] S12. The first semiconductor layer, the light-emitting layer and the second semiconductor layer are patterned to form a first step surface extending from the surface of the second semiconductor layer to the first semiconductor layer.
[0075] S13. A current spreading layer is formed on the surface of the second semiconductor layer.
[0076] S14. The surface of the second semiconductor layer not covered by the current spreading layer is patterned to form a second step surface extending from the surface of the second semiconductor layer to the middle of the second semiconductor layer.
[0077] Wherein, the distance A between the edge of the current spreading layer and the surface edge of the second semiconductor layer is less than the width B of the second step surface.
[0078] In this embodiment, a first semiconductor layer, a light-emitting layer, and a second semiconductor layer are stacked sequentially. A current-spreading layer is located on the surface of the second semiconductor layer, and the edge of the current-spreading layer is a certain distance from the surface edge of the second semiconductor layer. This area is both an ineffective region that does not emit light and also absorbs light. Therefore, in this embodiment, in addition to creating a first step surface extending to the first semiconductor layer, a second step surface extending to the middle of the second semiconductor layer is further created. The width of this second step surface is greater than the distance between the edge of the current-spreading layer and the surface edge of the second semiconductor layer, thereby significantly reducing the area of the ineffective region, reducing the light absorption by the ineffective region, and improving the brightness of the light-emitting diode. Furthermore, this solution can reduce the impact of chip size on LED chip brightness and is suitable for Micro-LED chips.
[0079] Figure 5 This is a flowchart of another method for fabricating a light-emitting diode provided in this disclosure. See also... Figure 5 The method includes the following steps: S21. A first semiconductor layer, a light-emitting layer, and a second semiconductor layer are sequentially formed on a substrate, and the second semiconductor layer, the light-emitting layer, and the first semiconductor layer constitute an epitaxial structure.
[0080] The substrate can be any one of sapphire substrate, Si substrate, or SiC substrate.
[0081] For example, the substrate is a sapphire substrate.
[0082] In this embodiment of the disclosure, the side of the substrate closest to the first semiconductor layer can be a rough surface.
[0083] In one example, step S21 includes: The first step is to fabricate the first semiconductor layer.
[0084] In this embodiment of the disclosure, the first semiconductor layer is an N-type GaN layer.
[0085] The second step is to create the light-emitting layer.
[0086] In this embodiment of the disclosure, the light-emitting layer is a multi-quantum-well layer, such as an InGaN / GaN multi-quantum-well structure.
[0087] The third step is to fabricate the second semiconductor layer.
[0088] In this embodiment of the disclosure, the second semiconductor layer is a P-type GaN layer.
[0089] In this embodiment of the present disclosure, a first semiconductor layer, a light-emitting layer, and a second semiconductor layer are sequentially stacked on a substrate.
[0090] In the embodiments disclosed herein, the above-mentioned semiconductor layer can be grown using a Veeco K465i, C4, or RB MOCVD (Metal Organic Chemical Vapor Deposition) apparatus or an AIXTRON MOCVD apparatus. High-purity H2 (hydrogen), high-purity N2 (nitrogen), or a mixture of high-purity H2 and high-purity N2 is used as the carrier gas; high-purity NH3 is used as the N source; trimethylgallium (TMGa) and triethylgallium (TEGa) are used as gallium sources; trimethylindium (TMIn) is used as the indium source; silane (SiH4) is used as the N-type dopant; trimethylaluminum (TMAl) is used as the aluminum source; and magnesium pyrocene (CP2Mg) is used as the P-type dopant.
[0091] S22. The epitaxial structure is patterned to form a first step surface extending from the surface of the second semiconductor layer to the first semiconductor layer.
[0092] For example, step S22 may include: The first step is to form a first mask layer on the epitaxial structure.
[0093] The second step involves performing a first patterning process on the epitaxial structure under the cover of the first mask layer, forming the first step surface.
[0094] S23. Fabricate a current blocking layer on the surface of the epitaxial structure.
[0095] In this embodiment, the current blocking layer can be an AlGaN or SiO2 layer.
[0096] For example, the current blocking layer is an AlGaN current blocking layer.
[0097] For example, step S23 may include: The first step is to deposit a current-blocking film.
[0098] A current-blocking thin film was deposited on the surface of the second semiconductor layer of the epitaxial structure using a plasma-enhanced chemical vapor deposition (PECVD) device.
[0099] The second step is to form a patterned mask layer on the surface of the current blocking film.
[0100] The third step involves etching the current blocking film under the cover of a mask layer to obtain the current blocking layer.
[0101] In this embodiment of the disclosure, a mask is formed by photolithography, and then the second semiconductor layer is exposed on both sides of the current blocking film by wet etching to obtain the current blocking layer.
[0102] S24. Fabricate a current spreading layer on the surface of the epitaxial structure.
[0103] The current spreading layer covers the current blocking layer and is a certain distance away from the edge of the epitaxial structure surface. The area within this distance is an ineffective area that absorbs light and affects light emission.
[0104] For example, step S24 may include: The first step is to deposit a transparent conductive film.
[0105] In this embodiment of the disclosure, the transparent conductive film can be an ITO film.
[0106] The second step is to form a patterned mask layer on the surface of the transparent conductive film.
[0107] The third step involves etching the current spreading layer under the cover of the mask layer to form the current spreading layer.
[0108] The low etching precision results in a certain distance between the edge of the current spread layer and the edge of the epitaxial structure surface, which needs to be improved by etching in step S25.
[0109] S25. The epitaxial structure is patterned again to form a second step surface extending from the surface of the second semiconductor layer to the middle of the second semiconductor layer.
[0110] In this step, the aforementioned ineffective area is reduced by forming a second step surface.
[0111] For example, step S25 may include: The first step is to form a second mask layer covering the current spreading layer on the epitaxial structure.
[0112] The second step involves performing a second patterning process on the epitaxial structure under the cover of the second mask layer to form the second step surface.
[0113] The first and second patterning processes can be performed using inductively coupled plasma (ICP) etching.
[0114] In this embodiment of the disclosure, the distance A between the edge of the current spreading layer and the surface edge of the second semiconductor layer is less than the width B of the second step surface.
[0115] In this embodiment of the disclosure, the distance A is 0.5~5μm.
[0116] In this implementation, the distance A is 0.5~5μm, which ensures that the area of the invalid region is small enough after the second step surface is opened, and also ensures that the process requirements are not too high when opening the second step surface.
[0117] For example, the distance A is 1 μm, 2 μm or 3 μm.
[0118] In this embodiment of the disclosure, the width B is 1~10μm.
[0119] In this implementation, the width B is 1~10μm, which can ensure that the area of the invalid region is reduced sufficiently by opening the second step surface, while avoiding the second step surface area being too large and affecting the light-emitting area.
[0120] For example, the width B is 3μm, 5μm or 7μm.
[0121] In this embodiment of the disclosure, the angle α between the second step surface and the corresponding sidewall is 20 to 70 degrees.
[0122] In this implementation, the aforementioned angle facilitates the etching formation of the second step surface.
[0123] For example, the angle α between the second step surface and the corresponding sidewall is 40 or 50 degrees.
[0124] In this embodiment of the disclosure, the height difference C between the second step surface and the surface of the second semiconductor layer is 500~5000 angstroms.
[0125] In this implementation, the etching depth of the second step surface 300 is 500~5000 angstroms. On the one hand, it can etch away a sufficient volume to reduce light absorption; on the other hand, it avoids damage to the light-emitting layer due to excessive etching depth, and the requirements for etching process are low.
[0126] For example, the height difference C between the second step surface and the surface of the second semiconductor layer is 1000, 2000 or 4000 angstroms.
[0127] S26. Fabricate the electrode structure.
[0128] In this embodiment, the electrode structure includes a first electrode and a second electrode. The first electrode is electrically connected to the current spreading layer, and the second electrode is electrically connected to the first stepped surface.
[0129] In this embodiment of the disclosure, the first electrode and the second electrode can be fabricated using a sputtering process.
[0130] In the embodiments of this disclosure, the first electrode and the second electrode can be a combination of one or more metal or alloy layers such as Cr, Al, AlCu, Ti, Ni, Pt and Au.
[0131] For example, the first electrode and the second electrode are a stack of Cr, Al, AlCu, Ti, Ni, Pt and Au.
[0132] S27. Create a passivation layer.
[0133] The passivation layer covers the aforementioned current extension layer, the first step surface, the second step surface, the first electrode, and the second electrode.
[0134] In this embodiment, the passivation layer is fabricated using PECVD.
[0135] In this embodiment of the disclosure, the passivation layer may include a first dielectric layer covering the second semiconductor layer and a second dielectric layer covering the first dielectric layer.
[0136] Within the wavelength range of light emitted by the light-emitting layer, the refractive index of the first dielectric layer is greater than that of the second dielectric layer.
[0137] The first dielectric layer can be a silicon compound layer, such as SiO2, Si3N4, or SiN. x Or a SiON layer.
[0138] For example, the first dielectric layer may be a SiO2 layer.
[0139] The second dielectric layer can be a DBR layer, such as a film formed by overlapping titanium dioxide and silicon dioxide.
[0140] The first dielectric layer mainly serves as insulation and prevents leakage, while the second dielectric layer mainly serves as a highly efficient light reflector.
[0141] When the passivation layer includes a DBR layer, the light emitted by the epitaxial structure will be reflected by the DBR and then absorbed through the aforementioned ineffective region. This absorption can be reduced by etching the second step surface.
[0142] S28. Make openings in the passivation layer corresponding to the electrode structure.
[0143] In this embodiment of the disclosure, the passivation layer is perforated by wet etching or dry etching.
[0144] A first through hole is opened on the passivation layer corresponding to the first electrode in the electrode structure, and a second through hole is opened on the passivation layer corresponding to the second electrode in the electrode structure.
[0145] S29. Fabricate the electrode pad structure.
[0146] In this embodiment of the disclosure, the electrode pad structure includes a first pad and a second pad. The first pad is electrically connected to the first electrode through the first through-hole, and the second pad is electrically connected to the second electrode through the second through-hole.
[0147] In this embodiment of the disclosure, the first pad and the second pad can be fabricated using a sputtering process.
[0148] In this embodiment of the disclosure, the first pad and the second pad can be a combination of one or more metal or alloy layers such as Cr, Al, AlCu, Ti, Ni, Pt and Au.
[0149] For example, the first pad and the second pad are Cr, Al, AlCu, Ti, Ni, Pt and Au stacks.
[0150] Experiments have shown that after designing the second step surface, the brightness of the light-emitting diode (LED) increases by more than 5%, and the smaller the size, the greater the brightness increase, making it particularly suitable for micro LEDs.
[0151] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.
Claims
1. A light-emitting diode, characterized in that, The light-emitting diode includes: a first semiconductor layer (101), a light-emitting layer (102), a second semiconductor layer (103), and a current spreading layer (104). The first semiconductor layer (101), the light-emitting layer (102) and the second semiconductor layer (103) are stacked in sequence. The surface of the second semiconductor layer (103) is provided with a first step surface (200) extending to the first semiconductor layer (101), and the surface of the second semiconductor layer (103) is also provided with a second step surface (300) extending to the middle of the second semiconductor layer (103). The current spreading layer (104) is located on the surface of the second semiconductor layer (103), and the distance A between the edge of the current spreading layer (104) and the surface edge of the second semiconductor layer (103) is less than the width B of the second step surface (300).
2. The light-emitting diode according to claim 1, characterized in that, The distance A is 0.5~5μm.
3. The light-emitting diode according to claim 1 or 2, characterized in that, The width B is 1~10μm.
4. The light-emitting diode according to claim 1 or 2, characterized in that, The angle α between the second step surface (300) and the corresponding side wall is 20 to 70 degrees.
5. The light-emitting diode according to claim 1 or 2, characterized in that, The height difference C between the second step surface (300) and the surface of the second semiconductor layer (103) is 500~5000 angstroms.
6. A method for fabricating a light-emitting diode, characterized in that, The method includes: Fabricate a first semiconductor layer, a light-emitting layer, and a second semiconductor layer that are stacked sequentially; The first semiconductor layer, the light-emitting layer, and the second semiconductor layer are patterned to form a first step surface extending from the surface of the second semiconductor layer to the first semiconductor layer; A current spreading layer is formed on the surface of the second semiconductor layer; The surface of the second semiconductor layer not covered by the current spreading layer is patterned to form a second step surface extending from the surface of the second semiconductor layer to the middle of the second semiconductor layer. The distance A between the edge of the current spreading layer and the edge of the surface of the second semiconductor layer is less than the width B of the second step surface.
7. The method according to claim 6, characterized in that, The distance A is 0.5~5μm.
8. The method according to claim 6 or 7, characterized in that, The width B is 1~10μm.
9. The method according to claim 6 or 7, characterized in that, The angle α between the second step surface and the corresponding sidewall is 20 to 70 degrees.
10. The method according to claim 6 or 7, characterized in that, The height difference C between the second step surface and the surface of the second semiconductor layer is 500~5000 angstroms.