Cutting channel alignment mark generation method and device, storage medium, equipment and product
By acquiring and utilizing a database of basic components for dicing alignment marks, dicing alignment marks for each layer of the chip can be automatically generated, eliminating the risk of errors that occur during manual generation and improving chip design and manufacturing efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CHENGDU ZIGUANG SEMICON TECH CO LTD
- Filing Date
- 2024-11-04
- Publication Date
- 2026-05-12
AI Technical Summary
In existing technologies, the generation of dicing alignment marks in chip design and manufacturing processes requires manual calculation and modification, which is time-consuming, labor-intensive, and prone to errors.
By acquiring the basic component database of the basic components of the dicing alignment mark, the placement rules of each chip stack are established, and the dicing alignment mark is generated using script files and drawing software.
This reduces the risk of errors in aligning the dicing marks, improving chip design efficiency and production yield.
Smart Images
Figure CN122028671A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of chip technology, and more specifically, to a method, apparatus, storage medium, device, and product for generating dicing alignment marks. Background Technology
[0002] In existing technologies related to chip design and manufacturing processes, different dicing alignment marks are typically calculated and drawn manually on the outer dicing surface. This requires repeated communication and modification by the team, which is often time-consuming, labor-intensive, and prone to errors and omissions. Summary of the Invention
[0003] To address the aforementioned technical problems, this disclosure provides a method, apparatus, storage medium, device, and product for generating cutting alignment marks.
[0004] According to a first aspect of the present disclosure, a method for generating cutting track alignment marks is provided, the method comprising:
[0005] Obtain a basic component database of basic components for cut track alignment marks, wherein the basic component database includes descriptive information of various basic components for cut track alignment marks;
[0006] Based on the basic component database, establish the placement rules for the basic components of the chip stack with alignment marks for the dicing tracks;
[0007] Based on the placement rules, alignment marks for the cutting paths of each stack of the chip are generated.
[0008] Optionally, before establishing the placement rules for the cleavage alignment marks of the basic components for each stack of the chip based on the basic component database, the method further includes:
[0009] Each of the basic components of the cutting track alignment mark is encoded and descriptive information is added to establish the basic component database. Different basic components of the cutting track alignment mark correspond to different component codes and descriptive information.
[0010] Optionally, establishing the placement rules for the dicing alignment marks of basic components in each chip stack based on the basic component database includes:
[0011] Establish a mapping relationship between each layer of the chip and the encoding of each dicing mark of the basic component in the basic component database;
[0012] Establish alignment criteria for each stack layer of the chip;
[0013] Establish description information, width information, and spacing information for each stack of the chip.
[0014] Optionally, establishing the placement rules for the dicing alignment marks of basic components in each chip stack based on the basic component database includes:
[0015] Based on the basic component database, a spreadsheet is used to establish the placement rules for the basic components of the cut track alignment marks for each stack, wherein the spreadsheet includes an Excel spreadsheet.
[0016] Optionally, the cleavage alignment marks for each stack of the generated chip include:
[0017] The script file is used to read the placement rules of the basic components of the cut track alignment mark of each stack of the chip and generate an intermediate drawing file;
[0018] Based on the intermediate drawing file and the database, the drawing software is used to generate the cleavage alignment marks for each stack of the chip.
[0019] Optionally, the description information includes at least one of the shape, component name, size information, and data stream type of the basic component of the cutting alignment mark.
[0020] According to a second aspect of the present disclosure, a cutting track alignment mark generating apparatus is provided, the apparatus comprising:
[0021] The acquisition module is used to acquire a basic component database of the basic components of the cutting track alignment mark, wherein the basic component database includes descriptive information of various basic components of the cutting track alignment mark;
[0022] A module is established to create placement rules for the basic components of each chip stack based on the basic component database, using the alignment marks of the dicing tracks.
[0023] The generation module is used to generate cleavage alignment marks for each stack of the chip according to the placement rules.
[0024] According to a third aspect of the present disclosure, a non-transitory computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, implements the steps of the method described in any of the first aspects.
[0025] According to a fourth aspect of the present disclosure, an electronic device is provided, comprising:
[0026] A memory on which computer programs are stored;
[0027] A processor for executing the computer program in the memory to implement the steps of the method of any one of the first aspects.
[0028] According to a fifth aspect of the present disclosure, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps of the method described in any one of the first aspects.
[0029] In summary, this disclosure provides a method for generating scribe alignment marks. The method includes: acquiring a basic component database of basic scribe alignment mark components, the basic component database including descriptive information of various different basic scribe alignment mark components; establishing placement rules for the basic scribe alignment mark components of each chip stack based on the basic component database; and generating scribe alignment marks for each chip stack based on the placement rules. This disclosure can reduce the risk of errors in scribe alignment marks and improve chip design efficiency and production yield.
[0030] Other features and advantages of this disclosure will be described in detail in the following detailed description section. Attached Figure Description
[0031] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings:
[0032] Figure 1a This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment.
[0033] Figure 1b This is a schematic diagram illustrating a basic component database according to an exemplary embodiment.
[0034] Figure 2 This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment.
[0035] Figure 3 This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment.
[0036] Figure 4 This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment.
[0037] Figure 5a This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment.
[0038] Figure 5b This is a schematic diagram illustrating a cutting track alignment mark according to an exemplary embodiment.
[0039] Figure 6This is a block diagram illustrating a cutting track alignment mark generation apparatus according to an exemplary embodiment.
[0040] Figure 7 This is a block diagram illustrating an electronic device according to an exemplary embodiment. Detailed Implementation
[0041] The specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.
[0042] It should be understood that the term "comprising" and its variations as used herein are open-ended, meaning "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Definitions of other terms will be given in the following description.
[0043] It should be noted that the concepts of "first," "second," etc., mentioned in this disclosure are used only to distinguish different devices, modules, or units, and are not used to limit the order of functions performed by these devices, modules, or units or their interdependencies. The modifiers "a" and "a plurality of" mentioned in this disclosure are illustrative rather than restrictive, and those skilled in the art should understand that, unless explicitly stated in the context, they should be understood as "one or more." In the description of this disclosure, unless otherwise stated, "a plurality of" means two or more, and other quantifiers are similar; "at least one," "one or more," or similar expressions refer to any combination of these items, including any combination of single or multiple items.
[0044] Although operations or steps are described in a specific order in the accompanying drawings in the embodiments of this disclosure, it should not be construed as requiring these operations or steps to be performed in the specific order or serial order shown, or requiring all of the shown operations or steps to be performed to obtain the desired result. In the embodiments of this disclosure, these operations or steps may be performed serially; they may be performed in parallel; or a portion of these operations or steps may be performed.
[0045] The names of messages or information exchanged between multiple devices in the embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of these messages or information. It is understood that before using the technical solutions disclosed in the embodiments of this disclosure, users should be informed of the types, scope of use, and usage scenarios of the personal information involved in this disclosure in an appropriate manner in accordance with relevant laws and regulations, and user authorization should be obtained.
[0046] First, the application scenarios of this disclosure will be explained. In existing related technologies for chip design and manufacturing processes, different dicing alignment marks are generally calculated and drawn manually on the outer dicing surface. This requires repeated communication and modification by the team, which is often time-consuming and labor-intensive, and prone to errors and omissions.
[0047] In view of the above, this disclosure provides a method, apparatus, storage medium, device, and product for generating dicing alignment marks. The aim is to solve the aforementioned problems, reduce the risk of errors in dicing alignment marks, and improve chip design efficiency and production yield. The disclosure will now be described in conjunction with specific embodiments.
[0048] Figure 1a This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment. Figure 1a As shown, this disclosure provides a method for generating cutting track alignment marks, the method including the following steps:
[0049] In step S10, a basic component database of the basic components of the cutting track alignment mark is obtained. The basic component database includes descriptive information of various basic components of the cutting track alignment mark.
[0050] In this step, a basic component database of the kerf alignment mark basic components is obtained. This basic component database includes descriptive information and codes for various different kerf alignment mark basic components. For example, the descriptive information may include at least one of the following: shape, component name, size information, and data stream type of the kerf alignment mark basic component.
[0051] Figure 1b This is a schematic diagram illustrating a basic component database according to an exemplary embodiment. For example... Figure 1b As shown, the first column on the left is the code of the basic component, the second column is the type information of the basic component, the third column is the name of the basic component, the fourth column is the size of the basic component, the fifth column (Tone) is the data flow type of the basic component, and the sixth column (Type) is the optional type of the basic component.
[0052] In step S20, based on the basic component database, a placement rule for the basic components of the chip stack is established to align the dicing marks of each layer.
[0053] In this step, based on the basic component database, placement rules for the dicing alignment marks of the basic components in each chip stack are established. For example, a mapping relationship can be first established between each chip stack and the encoding of each dicing alignment mark in the basic component database. Then, alignment criteria for each chip stack are established, followed by description information, width information, and spacing information for each chip stack. By establishing a mapping relationship between the chip stack information, alignment criteria, and the encoding of the dicing alignment marks, the placement rules for the dicing alignment marks of the basic components in each chip stack can be obtained.
[0054] In step S30, according to the placement rules, cleaving alignment marks are generated for each stack of the chip.
[0055] In this step, alignment marks for the dicing tracks of each chip stack are generated according to the placement rules. For example, a script file can first be used to read the placement rules of the basic components for the alignment marks of each chip stack, generating an intermediate drawing file. Then, based on this intermediate drawing file and information from the basic component database, drawing software is used to generate the alignment marks for each chip stack. For example, the script file can be written in Phython or C++. The drawing software can be EDA (Electronic Design Automation) software such as Skipper or Laker.
[0056] In summary, this disclosure provides a method for generating scribe alignment marks. The method includes: acquiring a basic component database of basic scribe alignment mark components, the basic component database including descriptive information of various different basic scribe alignment mark components; establishing placement rules for the basic scribe alignment mark components of each chip stack based on the basic component database; and generating scribe alignment marks for each chip stack based on the placement rules. This disclosure can reduce the risk of errors in scribe alignment marks and improve chip design efficiency and production yield.
[0057] Figure 2 This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment. Figure 2 As shown, before establishing the placement rules for the cleavage alignment marks of the basic components for each chip stack based on the basic component database, the method may include the following steps:
[0058] In step S1, each of the basic components of the cutting track alignment mark is encoded and descriptive information is added to establish the basic component database. Different basic components of the cutting track alignment mark correspond to different component codes and descriptive information.
[0059] In this step, each basic component of the cutter alignment mark is encoded and descriptive information is added to establish a basic component database. Different basic components of the cutter alignment mark correspond to different component codes and descriptive information. For example, specific encoding of basic components of the cutter alignment mark can be found in [link to documentation]. Figure 1b As shown, the first column on the left is the encoding of the basic component, and the specific characteristics of the basic component are defined by the corresponding description information.
[0060] Figure 3 This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment. Figure 3 As shown, establishing the placement rules for the dicing alignment marks of basic components in each chip stack based on the basic component database may include the following steps:
[0061] In step S201, a mapping relationship is established between each layer of the chip and the encoding of each dicing alignment mark basic component in the basic component database.
[0062] In this step, a mapping relationship is established between each edge of the dicing track of each chip stack and the encoding of the dicing alignment mark basic component in the basic component database. Table 1 is a mapping table of the placement rules of the dicing alignment mark basic components.
[0063] Table 1:
[0064]
[0065] As shown in Table 1, the second column from the left of the table lists the names of each chip stack, and the four columns from the right correspond to the four sides of the dicing traces of the chip stack. Taking Table 1 as an example, the second side of the dicing trace of the DNW (Deep Nwell implant, Nmos region) layer of the chip is equipped with the basic component of the dicing trace alignment marker numbered 3, the second side of the dicing trace of the PW (Core Pwell implant, Core Pmos region) layer of the chip is equipped with the basic component of the dicing trace alignment marker numbered 1, and the second side of the dicing trace of the IOPW (IO Pwell implant, IO Pmos region) layer of the chip is equipped with the basic component of the dicing trace alignment marker numbered 1.
[0066] In step S202, alignment criteria for each stack of the chip are established.
[0067] In this step, alignment criteria for each layer of the chip are established. For example, using Table 1 as an example, the fourth column from the left in the table shows the alignment criteria for each layer of the chip. In the figure, the alignment criteria for the DNW layer is aligned with the AA layer, the PW layer is aligned with the AA layer, and the IOPW layer is aligned with the AA layer. The AA layer is the first layer, so its alignment criterion is NA.
[0068] In step S203, description information, width information, and spacing information of each stack of the chip are established.
[0069] In this step, description information, width information, and spacing information for each chip stack are established. For example, using Table 1 as an example, the third column from the left contains the description information of the chip stack, which can be understood as the name of the stack. The fifth column from the left contains the width information of the chip stack, and the sixth column from the left contains the spacing information of the chip stack. The stack width and stack spacing can be set according to actual needs.
[0070] Figure 4 This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment. Figure 4 As shown, establishing the placement rules for the dicing alignment marks of basic components in each chip stack based on the basic component database may include the following steps:
[0071] In step S204, based on the basic component database, a spreadsheet is used to establish the placement rules for the basic components of the cutting track alignment marks for each layer, wherein the spreadsheet includes an Excel spreadsheet.
[0072] In this step, based on the basic component database, a spreadsheet is used to establish the placement rules for the cutter alignment marks of the basic components for each stack, where the spreadsheet includes an Excel spreadsheet. For example, Table 1 can be a reference to this spreadsheet, which may be an Excel spreadsheet.
[0073] Figure 5a This is a flowchart illustrating a method for generating cutting alignment marks according to an exemplary embodiment. Figure 5a As shown, the alignment of the dicing marks for each stack of the generated chip may include the following steps:
[0074] In step S301, the script file is used to read the placement rules of the basic components of the cut track alignment mark of each stack of the chip, and an intermediate drawing file is generated.
[0075] In this step, a script file is used to read the alignment rules of the cut tracks for each layer of the chip to mark the placement of basic components, generating an intermediate drawing file. For example, this script file can be written in Phython or C++. Below is an example of Phython code for a script file:
[0076] For I inrange(start_col,len(df.columns)):
[0077] ifdf.iloc[index,i]==6:
[0078] y1=Decimal('20')+Decimal(i-start_col)*Decimal('60')
[0079] y2 = y1 + Decimal('20')
[0080] y3 = y2 + Decimal('3')
[0081] y4 = y3 + Decimal('2')
[0082] y5=y1
[0083] y6=y2
[0084] y7 = y1 - Decimal('5')
[0085] y8 = y1 - Decimal('3')
[0086] y9 = y1 - Decimal('19')
[0087] The above is an example of using Python to define the graphic size of the cutting alignment mark based on the read data.
[0088] tcl_content+=f"dbCreateRect-libId0-cellNameTOP_OVL-lpp{layer_no}.{
[0089] datatype}-box{{(5,{y1}),(7,{y2})}}\n"
[0090] tcl_content+=f"dbCreateRect-libId0-cellNameTOP_OVL-lpp{layer_no}.{
[0091] datatype}-box{{(10,{y3}),(30,{y4})}}\n"
[0092] tcl_content+=f"dbCreateRect-libId0-cellNameTOP_OVL-lpp{layer_no}.{
[0093] datatype}-box{{(33,{y5}),(35,{y6})}}\n"
[0094] tcl_content+=f"dbCreateRect-libId0-cellNameTOP_OVL-lpp{layer_no}.{
[0095] datatype}-box{{(10,{y7}),(30,{y8})}}\n"
[0096] The above is an example of how Python generates intermediate files (Tcl, ToolCommandLanguage) for the Skipper plotting software. The intermediate file Tcl is provided to Skipper for execution, which then generates a graphic of the cut alignment marks.
[0097] Below is an example code snippet for a Tcl plotting intermediate file:
[0098] skiAddLayer-lib[skiCurLib]-lpp0.0-layerNameBoundary-purposeNameDrawing
[0099] skiAddLayer-lib[skiCurLib]-lpp1.1-layerNameAA_Mark-purposeNameDrawing
[0100] dbCreateRect-libId0-cellNameTOP_OVL-lpp1.1-box{(5,20),(7,40)}
[0101] dbCreateRect-libId0-cellNameTOP_OVL-lpp1.1-box{(10,43),(30,45)}
[0102] dbCreateRect-libId0-cellNameTOP_OVL-lpp1.1-box{(33,20),(35,40)}
[0103] dbCreateRect-libId0-cellNameTOP_OVL-lpp1.1-box{(10,15),(30,17)}
[0104] dbCreateTextPoly-libId0-cellName{TOP_OVL}-lpps{1.1}-txtPos(2,1)-stri
[0105] ng{100}-height7.000000-txtOrtR0-justifylowerLeft-space1.000000-orthogo
[0106] nal
[0107] The above is sample code for the intermediate file Tcl generated by the Python language. After the drawing software Skipper executes this code, it can automatically generate a graphic of the cutting path alignment mark.
[0108] In step S302, the cleavage alignment marks for each stack of the chip are generated using drawing software based on the intermediate drawing file and the database.
[0109] In this step, alignment marks for the cut paths of each layer of the chip are generated using drawing software based on the intermediate drawing file (Tcl) and the basic component database. For example, Skipper drawing software can be used to automatically generate these alignment marks based on the intermediate drawing file (Tcl) and the basic component database. Figure 5b This is a schematic diagram illustrating a cutting track alignment mark according to an exemplary embodiment. Cutting track alignment marks generated by drawing software can be found in [reference needed]. Figure 5b As shown in 10 and 20.
[0110] In some embodiments, the description information includes at least one of the shape, component name, size information, and data stream type of the cut alignment mark basic component.
[0111] In summary, this disclosure provides a method for generating scribe alignment marks. The method includes: acquiring a basic component database of basic scribe alignment mark components, the basic component database including descriptive information of various different basic scribe alignment mark components; establishing placement rules for the basic scribe alignment mark components of each chip stack based on the basic component database; and generating scribe alignment marks for each chip stack based on the placement rules. This disclosure can reduce the risk of errors in scribe alignment marks and improve chip design efficiency and production yield.
[0112] Figure 6This is a block diagram illustrating a cutting track alignment mark generation apparatus according to an exemplary embodiment. Figure 6 As shown, this disclosure provides a cutting track alignment mark generation device 600, which may include the following modules:
[0113] The acquisition module 610 is used to acquire a basic component database of the basic components of the cutting track alignment mark, the basic component database including descriptive information of various basic components of the cutting track alignment mark.
[0114] The module 620 is used to establish, based on the basic component database, the placement rules for the alignment marks of the basic components of the chip's various stacks.
[0115] The generation module 630 is used to generate cleavage alignment marks for each stack of the chip according to the placement rules.
[0116] Optionally, before establishing the placement rules for the cleavage alignment marks of the basic components for each stack of the chip based on the basic component database, the establishment module 620 is further configured to:
[0117] Each of the basic components of the cutting track alignment mark is encoded and descriptive information is added to establish the basic component database. Different basic components of the cutting track alignment mark correspond to different component codes and descriptive information.
[0118] Optionally, the establishment module 620 is further configured to:
[0119] Establish a mapping relationship between each layer of the chip and the encoding of each dicing mark of the basic component in the basic component database;
[0120] Establish alignment criteria for each stack layer of the chip;
[0121] Establish description information, width information, and spacing information for each stack of the chip.
[0122] Optionally, the establishment module 620 is further configured to:
[0123] Based on the basic component database, a spreadsheet is used to establish the placement rules for the basic components of the cut track alignment marks for each stack, wherein the spreadsheet includes an Excel spreadsheet.
[0124] Optionally, the generation module 630 is further configured to:
[0125] The script file is used to read the placement rules of the basic components of the cut track alignment mark of each stack of the chip and generate an intermediate drawing file;
[0126] Based on the intermediate drawing file and the database, the drawing software is used to generate the cleavage alignment marks for each stack of the chip.
[0127] Optionally, the description information includes at least one of the shape, component name, size information, and data stream type of the basic component of the cutting alignment mark.
[0128] In summary, this disclosure provides a scribe line alignment mark generation apparatus. The apparatus includes: an acquisition module for acquiring a basic component database of basic scribe line alignment mark components, the basic component database including descriptive information of various different basic scribe line alignment mark components; an establishment module for establishing placement rules for the basic scribe line alignment mark components of each chip stack based on the basic component database; and a generation module for generating scribe line alignment marks for each chip stack based on the placement rules. This disclosure can reduce the risk of errors in scribe line alignment marks and improve chip design efficiency and production yield.
[0129] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.
[0130] Figure 7 This is a block diagram illustrating an electronic device according to an exemplary embodiment. Figure 7 As shown, the electronic device 700 may include a processor 701 and a memory 702. The electronic device 700 may also include one or more of a multimedia component 703, an input / output (I / O) interface 704, and a communication component 705.
[0131] The processor 701 controls the overall operation of the electronic device 700 to complete all or part of the steps in the above-described method for generating slit alignment marks. The memory 702 stores various types of data to support the operation of the electronic device 700. This data may include, for example, instructions for any application or method operating on the electronic device 700, and application-related data such as contact data, sent and received messages, pictures, audio, video, etc. The memory 702 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. Multimedia component 703 may include a screen and an audio component. The screen may be, for example, a touchscreen, and the audio component is used to output and / or input audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signals may be further stored in memory 702 or transmitted via communication component 705. The audio component also includes at least one speaker for outputting audio signals. I / O interface 704 provides an interface between processor 701 and other interface modules, such as a keyboard, mouse, buttons, etc. These buttons may be virtual or physical buttons. Communication component 705 is used for wired or wireless communication between the electronic device 700 and other devices. Wireless communication, such as Wi-Fi, Bluetooth, Near Field Communication (NFC), 2G, 3G, 4G, NB-IoT, eMTC, or other 5G technologies, or combinations thereof, is not limited here. Therefore, the corresponding communication component 705 may include: a Wi-Fi module, a Bluetooth module, an NFC module, etc.
[0132] In an exemplary embodiment, the electronic device 700 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above-described cutting path alignment mark generation method.
[0133] In another exemplary embodiment, a computer-readable storage medium including program instructions is also provided, which, when executed by a processor, implement the steps of the above-described kerf alignment mark generation method. For example, the computer-readable storage medium may be the memory 702 including the program instructions, which may be executed by the processor 701 of the electronic device 700 to complete the above-described kerf alignment mark generation method.
[0134] In another exemplary embodiment, a computer program product is also provided, the computer program product comprising a computer program executable by a programmable device, the computer program having a code portion for performing the above-described cutting kerf alignment mark generation method when executed by the programmable device.
[0135] The preferred embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. However, this disclosure is not limited to the specific details of the above embodiments. Within the scope of the technical concept of this disclosure, various simple modifications can be made to the technical solutions of this disclosure, and these simple modifications all fall within the protection scope of this disclosure.
[0136] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, this disclosure will not describe the various possible combinations separately.
[0137] Furthermore, various different embodiments of this disclosure can be combined in any way, as long as they do not violate the spirit of this disclosure, they should also be regarded as the content disclosed in this disclosure.
Claims
1. A method for generating cutting track alignment marks, characterized in that, The method includes: Obtain a basic component database of basic components for cut track alignment marks, wherein the basic component database includes descriptive information of various basic components for cut track alignment marks; Based on the basic component database, establish the placement rules for the basic components of the chip stack with alignment marks for the dicing tracks; Based on the placement rules, alignment marks for the cutting paths of each stack of the chip are generated.
2. The method according to claim 1, characterized in that, Before establishing the placement rules for the dicing alignment marks of the basic components for each chip stack based on the basic component database, the method further includes: Each of the basic components of the cutting track alignment mark is encoded and descriptive information is added to establish the basic component database. Different basic components of the cutting track alignment mark correspond to different component codes and descriptive information.
3. The method according to claim 1, characterized in that, The step of establishing placement rules for the cleavage alignment marks of basic components in each chip stack based on the basic component database includes: Establish a mapping relationship between each layer of the chip and the encoding of each dicing mark of the basic component in the basic component database; Establish alignment criteria for each stack layer of the chip; Establish description information, width information, and spacing information for each stack of the chip.
4. The method according to claim 1, characterized in that, The step of establishing placement rules for the cleavage alignment marks of basic components in each chip stack based on the basic component database includes: Based on the basic component database, a spreadsheet is used to establish the placement rules for the basic components of the cut track alignment marks for each stack, wherein the spreadsheet includes an Excel spreadsheet.
5. The method according to claim 1, characterized in that, The cleavage alignment marks for each stack of the generated chip include: The script file is used to read the placement rules of the basic components of the cut track alignment mark of each stack of the chip and generate an intermediate drawing file; Based on the intermediate drawing file and the database, the drawing software is used to generate the cleavage alignment marks for each stack of the chip.
6. The method according to any one of claims 1-5, characterized in that, The descriptive information includes at least one of the following: the shape of the basic component of the cutting alignment mark, the component name, the size information, and the data stream type.
7. A cutting track alignment mark generation device, characterized in that, The device includes: The acquisition module is used to acquire a basic component database of the basic components of the cutting track alignment mark, wherein the basic component database includes descriptive information of various basic components of the cutting track alignment mark; A module is established to create placement rules for the basic components of each chip stack based on the basic component database, using the alignment marks of the dicing tracks. The generation module is used to generate cleavage alignment marks for each stack of the chip according to the placement rules.
8. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the program implements the steps of the method described in any one of claims 1-6.
9. An electronic device, characterized in that, include: A memory on which computer programs are stored; A processor for executing the computer program in the memory to implement the steps of the method according to any one of claims 1-6.
10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1-6.