Etching system and etching method

Abstract

The present disclosure provides an etching system. The etching system comprises a process cavity, an image and temperature control element and an artificial intelligence control module. The process chamber is configured to perform an etch process on a first wafer according to a first etch recipe. The image and temperature control element is configured to generate a thermal image of the first wafer during the etch process. The artificial intelligence control module is configured to determine whether the thermal image meets a predetermined requirement. When the thermal image does not meet the predetermined requirement, the artificial intelligence control module is configured to update the first etching formula according to a plurality of parameters to generate a second etching formula.

Description

TECHNICAL FIELD

[0001] This application claims priority to U.S. Patent Application No. 18 / 934,443 (i.e., priority date of “November 1, 2024”), the contents of which are incorporated herein in their entirety.

[0002] The present disclosure relates to an etching system and an etching method. In particular, the present disclosure relates to an etching system and an etching method employing an artificial intelligence control module. BACKGROUND

[0003] Semiconductor devices are used in different electronic applications, such as personal computers, cell phones, digital cameras, or other electronic devices. The size of semiconductor devices is gradually reduced to meet the increasing demand for computing power. However, during the process of size reduction, different problems are increased, and such problems continue to increase. In addition, temperature variation can also cause the risk of wafer breakage, especially for thinner wafers or wafers that have undergone scaling processes. Therefore, there are still ongoing challenges in achieving improved quality, yield, performance, and reliability, as well as reducing complexity.

[0004] The foregoing “background” description is for the purpose of generally presenting the context of the disclosure. The subject matter of the foregoing “background” description is not, and should not be assumed to be, prior art to the present disclosure. Any SUMMARY

[0005] One embodiment of the present disclosure provides an etching system. The etching system includes a process chamber, an image and temperature control element, and an artificial intelligence control module. The process chamber is configured to perform an etching process on a first wafer according to a first etching recipe. The image and temperature control element is configured to generate a thermal image of the first wafer during the etching process. The artificial intelligence control module is configured to determine whether the thermal image meets a predetermined requirement. When the thermal image does not meet the predetermined requirement, the artificial intelligence control module is configured to update the first etching recipe according to a plurality of parameters to generate a second etching recipe.

[0006] Another embodiment of the present disclosure provides an etching method. The etching method includes obtaining a thermal image of a first wafer, performing an etching process on the first wafer according to a first etching recipe, determining, by an artificial intelligence control module, whether the thermal image meets a predetermined requirement, when the thermal image does not meet the predetermined requirement, updating, by the artificial intelligence control module, the first etching recipe according to the thermal image to generate a second etching recipe, and performing an etching process on a second wafer according to the second etching recipe.

[0007] By employing an artificial intelligence control module, wafer temperature can be controlled more precisely and in a more timely manner. This can improve wafer yield and / or reliability.

[0008] The foregoing has provided a fairly broad overview of the technical features and advantages of this disclosure, enabling a better understanding of the detailed description that follows. Other technical features and advantages constituting the subject matter of the claims will be described below. Those skilled in the art to which this disclosure pertains will understand that the concepts and specific embodiments disclosed below can be readily used to achieve the same purpose as this disclosure by modifying or designing other structures or processes. Those skilled in the art will also understand that such equivalent constructions cannot depart from the spirit and scope of this disclosure as defined by the appended claims. Attached Figure Description

[0009] When with attachment Figure One When reading this document, the best understanding of all aspects of this disclosure can be obtained from the following detailed description. It should be understood that, according to industry standard practice, the various features are not drawn to scale. In fact, the dimensions of the various features can be increased or decreased arbitrarily for clarity of discussion.

[0010] Figure 1 This is a structural schematic diagram illustrating an etching system according to some embodiments of the present disclosure.

[0011] Figure 2 This is a structural schematic diagram illustrating the process cavity of some embodiments of this disclosure.

[0012] Figure 3 This is a schematic diagram illustrating the electro-adhesion between a wafer and an electrostatic chuck in some embodiments of this disclosure.

[0013] Figure 4 This is a structural schematic diagram illustrating the process cavity of other embodiments of this disclosure.

[0014] Figure 5 This is a structural schematic diagram illustrating electro-adhesion between a wafer and an electrostatic chuck in some other embodiments of this disclosure.

[0015] Figure 6 and Figure 7 This is a structural schematic diagram illustrating the electro-adhesion between a wafer and an electrostatic chuck in some different embodiments of this disclosure.

[0016] Figure 8 This is a flowchart illustrating etching methods according to some embodiments of this disclosure.

[0017] The reference numerals in the attached figures are explained as follows:

[0018] 10: Etching System

[0019] 100: Process cavity

[0020] 110: Base

[0021] 112: Channel

[0022] 114: Entrance

[0023] 116: Export

[0024] 120: Electrostatic Chuck Holder (ESC)

[0025] 122: Electrode

[0026] 122a: First electrode

[0027] 122b: Second electrode

[0028] 124: Voltage supply

[0029] 126: Dielectric

[0030] 126T: Upper surface

[0031] 130: Thermal sensor

[0032] 200: Process control components

[0033] 300: Artificial Intelligence (AI) Control Module

[0034] 400: Measuring element

[0035] 500: Imaging and temperature control components

[0036] 800: Etching Method

[0037] AG: Air gap

[0038] DR: Voltage

[0039] E: Electric field

[0040] E1: Electric field

[0041] E2: Electric field

[0042] E3: Electric field

[0043] E4: Electric field

[0044] E5: Electric field

[0045] F: Force

[0046] F1: Force

[0047] F2: Force

[0048] F3: Force

[0049] F4: Force

[0050] F5: Force

[0051] FR: Flow

[0052] HTG: Heat transfer gas

[0053] HTL: Heat Transfer Liquid

[0054] PM: Parameters

[0055] PP: Purging pressure

[0056] PR: Booking Requirements

[0057] R1: Etching Formula

[0058] R2: Etching Formula

[0059] S1: First State

[0060] S2: Second State

[0061] S802: Steps

[0062] S804: Steps

[0063] S806: Steps

[0064] S808: Steps

[0065] S810: Steps

[0066] S812: Steps

[0067] S814: Steps

[0068] S816: Steps

[0069] THI: Thermal Imaging

[0070] TP: Temperature Information

[0071] W1: Wafer

[0072] W2: Wafer

[0073] Z: Direction Detailed Implementation

[0074] The following describes specific examples of components and configurations to simplify embodiments of this disclosure. Of course, these embodiments are merely illustrative and are not intended to limit the scope of this disclosure. For example, in the description, a first component is formed on top of a second component, which may include embodiments where the first and second components are in direct contact, or embodiments where an additional component is formed between the first and second components such that the first and second components do not directly contact each other. Furthermore, reference numerals and / or letters may be repeated in many examples of embodiments of this disclosure. These repetitions are for simplicity and clarity and, unless specifically stated herein, do not in themselves represent a specific relationship between the various embodiments and / or the configurations discussed.

[0075] Furthermore, for ease of explanation, spatial relative terms such as "beneath," "below," "lower," "above," and "upper" may be used herein to describe the relationship between one element or feature shown in the figures and another element or feature. These spatial relative terms are intended to encompass not only the orientations shown in the figures but also different orientations of the elements during use or operation. The device may have other orientations (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein can be interpreted accordingly.

[0076] It should be understood that when a component is formed on, connected to, and / or coupled to another component, it may include embodiments in which these components are in direct contact, and may also include embodiments in which additional components are formed between these components so that these components are not in direct contact.

[0077] It should be understood that although the terms first, second, third, etc., may be used herein to describe various elements, components, regions, layers, or sections, these elements, components, regions, layers, or sections are not limited by these terms. Rather, these terms are used only to distinguish one element, component, region, layer, or section from another region, layer, or section. Therefore, without departing from the teachings of the inventive concept of the present invention, the first element, component, region, layer, or section discussed below may be referred to as a second element, component, region, layer, or section.

[0078] Unless otherwise specified herein, when referring to orientation, layout, location, shapes, sizes, amounts, or other measures, terms such as "same," "equal," "planar," or "coplanar" as used herein do not necessarily mean an exact identical orientation, layout, location, shape, size, amount, or other measure, but rather mean, within acceptable differences, substantially identical orientation, layout, location, shape, size, amount, or other measure, for example, that may occur due to manufacturing processes. The term "substantially" may be used herein to convey this meaning. For example, "substantially the same," "substantially equal," or "substantially planar" can mean exactly the same, equal, or planar, or it can be the same, equal, or planar within an acceptable range of differences, for example, which may occur due to the manufacturing process.

[0079] In this disclosure, a semiconductor device generally means a device that can operate by utilizing semiconductor characteristics, and an electro-optic device, a light-emitting display device, a semiconductor circuit, and an electronic device are all included in the scope of semiconductor devices.

[0080] It should be understood that in the description of this disclosure, "above" corresponds to the direction of the Z-direction arrow, while "below" corresponds to the opposite direction of the Z-direction arrow.

[0081] Figure 1 This is a schematic diagram illustrating an etching system 10 according to some embodiments of the present disclosure. The etching system 10 includes a process chamber 100, a process control element 200, an artificial intelligence (AI) control module 300, a measurement element 400, and an image and temperature control element 500.

[0082] Etching system 10 is configured to implement an etching recipe R1 on a wafer W1. In some embodiments, etching system 10 is configured to perform an etching process on wafer W1 according to etching recipe R1, and a state of wafer W1 is thereby transitioned from a first state S1 to a second state S2. In this embodiment, first state S1 represents the state of wafer W1 before etching, and second state S2 represents the state of wafer W1 after etching. In some embodiments, etching recipe R1 is stored in process control element 200, and is obtained by process cavity 100 when wafer W1 is to be processed. In some embodiments, etching recipe R1 is provided. In some embodiments, etching recipe R1 is generated by AI control module 300.

[0083] Wafer W1 is transferred to process cavity 100 and etched in process cavity 100. Although Figure 1 Only one wafer W1 is illustrated, but multiple wafers can be processed in batches. Therefore, the use of the singular form to refer to a wafer in this embodiment does not necessarily limit the disclosure to a single wafer, but can describe a batch including multiple wafers, multiple batches, or any such batch of materials.

[0084] In some embodiments, wafer W1 may be in the front-end-of-line stage, such as forming word lines, forming gate structures, or forming contacts, but is not limited thereto. In some embodiments, wafer W1 may be in the back-end-of-line stage, such as forming plugs, forming on-metal, or forming capacitors, but is not limited thereto.

[0085] In some embodiments, the etching system 10 may include one or more process cavities 100, not separately illustrated. A wafer W1 may be placed in a process cavity 100, and an etching process may be performed using an etching recipe. In some embodiments, the etching recipe R1 may be a nominal recipe.

[0086] In some embodiments, process control element 200 may include a graphical user interface (GUI) element (not shown for clarity) and a database (not shown for clarity). The GUI element may be provided to enable users to: view chamber status; create and edit xy plots of summary and raw (tracking) parameter data for selected wafers; view chamber alarm logs; configure data collection plans to specify conditions for writing data to the database or output files; input files for creating statistical process control (SPC) charts, modeling, and spreadsheet programs; examine wafer processing information for specific wafers and review data currently stored in the database; create and edit SPC charts of process parameters and set SPC alarms to generate email alerts; perform multivariate principal component analysis (PCA) and / or partial least squares (PLS) models; and / or view diagnostic screens to troubleshoot and report problems with process chamber 100.

[0087] In some embodiments, raw and tracking data from process control element 200 may be stored as files in a database. The amount of data may depend on the user-configured data collection plan, the frequency of processing, and which process chamber 100 is being processed. Data obtained from process control element 200 may be stored in tables. In some embodiments, a GUI component and database for process control element 200 may not be required. In some embodiments, process chamber 100 and process control element 200 are integrated into a single component.

[0088] In some embodiments, the AI ​​control module 300 is coupled to the process control element 200. In some embodiments, the AI ​​control module 300 and the process control element 200 are physically separate, independent components. Communication between the AI ​​control module 300 and the process control element 200 in the etching system 10 can use any suitable communication technology, such as analog technology (e.g., relay logic), digital technology (e.g., RS232, Ethernet, or wireless network), networking technology (e.g., local area network (LAN), wide area network (WAN), Internet), Bluetooth, near field communication technology, and / or any other suitable communication technology. Communication between the AI ​​control module 300 and other components in the etching system 10 conforms to the General Device Module / Semiconductor Device Communication Standard (GEM SECS) communication protocol.

[0089] In other embodiments, the AI ​​control module 300 is integrated into the process control element 200. In an alternative embodiment, the AI ​​control module 300 is integrated into the process cavity 100.

[0090] The AI ​​control module 300 and the measuring element 400 are physically separate, independent components. Communication between the AI ​​module 300 and the measuring element 400 can employ any suitable communication technology, such as analog technology (e.g., relay logic), digital technology (e.g., RS232, Ethernet, or wireless networks), network technology (e.g., local area network, wide area network, Internet), Bluetooth, near field communication technology, and / or any other suitable communication technology. Communication between the AI ​​control module 300 and the measuring element 400 conforms to the common device module / semiconductor device communication standard protocol.

[0091] In some embodiments, the AI ​​control module 300 may function as a single-input single-output (SISO) element, a single-input multiple-output (SIMO) element, a multiple-input single-output (MISO) element, and a multiple-input multiple-output (MIMO) element.

[0092] In some embodiments, for example, the AI ​​control module 300 may include any suitable hardware (which may execute software or an application in some embodiments), such as a computer, microprocessor, microcontroller, application-specific integrated circuit (ASIC), field-programmable gate array (FGPA), and digital signal processor (DSP) (any of which may be referred to as a hardware processor), encoder, circuitry for reading the encoder, memory elements (including one or more EPROMs, one or more EEPROMs, dynamic random access memory (“DRAM”), static random access memory (“SRAM”), and / or flash memory), and / or any other suitable hardware element.

[0093] In some embodiments, the AI ​​control module 300 may include a GUI element (not shown for clarity) and a database (not shown for clarity). The GUI element of the AI ​​control module 300 provides a means of interaction between the AI ​​control module 300 and the user. Authorized users and administrators can use the GUI element to modify the settings and preset parameters of the AI ​​control module 300. Configuration data can be stored in the database.

[0094] In some embodiments, the GUI elements of the AI ​​control module 300 may include a status element for displaying the current state of the AI ​​control module 300. Furthermore, the status element may include a chart element for presenting system-related data and process-related data to the user using one or more different types of charts.

[0095] In some embodiments, the database of the AI ​​control module 300 can be used to archive input and output data. For example, the AI ​​control module 300 can archive received inputs, sent outputs, and actions taken by the AI ​​control module 300 in a searchable database.

[0096] In some embodiments, the AI ​​control module 300 may include elements for data backup and recovery. Furthermore, the searchable database may include model information, configuration information, and historical information, and the AI ​​control module 300 may use the database elements to back up and restore historical and current model information and configuration information.

[0097] In some embodiments, the AI ​​control module 300 may include multiple applications, including at least one tool-related application, at least one module-related application, at least one sensor-related application, at least one interface-related application, at least one database-related application, at least one GUI-related application, and / or at least one configuration application.

[0098] In some embodiments, the AI ​​control module 300 may include one or more of the following algorithms, individually or in combination: machine learning, hidden Markov models, recurrent neural networks, convolutional neural networks, Bayesian symbolic methods, general adversarial networks, support vector machines, and / or any other suitable artificial intelligence algorithms.

[0099] In some embodiments, the AI ​​control module 300 may include at least one process model capable of predicting the second state S2 of wafer W1. For example, an etch depth may be calculated using an etch rate process model and processing time, and a deposition thickness may be calculated using a deposition rate process model and processing time. In some embodiments, the process model may include an SPC chart, a PLS model, a PCA model, a fault detection / correction (FDC) model, and a multivariate analysis (MVA) model. In some embodiments, the AI ​​control module 300 may receive and utilize external data provided by the process control element 200 and the measurement element 400 to constrain process parameters. For example, a GUI element of the AI ​​control module 300 may provide a method for manually inputting process parameter constraints.

[0100] In some embodiments, the AI ​​control module 300 can be used to configure any number of process modules. The AI ​​control module 300 can collect, provide, process, store, and display data from a process that includes process control elements 200 and / or measurement elements 400.

[0101] In some embodiments, the measuring element 400 is configured to measure a set of data from wafer W1 to generate a first state S1 and a second state S2. In some embodiments, the measuring element 400 measures wafer W1 to generate the first state S1 before the process cavity 100 performs the etching recipe R1 on wafer W1, and then measures wafer W1 to generate the second state S2 after the process cavity 100 performs the etching recipe R1 on wafer W1. In some embodiments, the first state S1 and state S2 are transmitted to the AI ​​control module 300. In some embodiments, the first state S1 can be given without measurement.

[0102] In some embodiments, the measuring element 400 includes an after-etching-inspection (AEI) measurement tool. The AEI measurement tool can inspect for defects, contamination, and critical dimensions (CD) after the etching process. In some embodiments, the measuring element 400 may include a spectral (e.g., optical critical dimension or OCD) measurement tool to measure the profile of the CD and / or etched features.

[0103] In some embodiments, the measuring element 400 may include a wafer probe configured to measure electronic characteristics. For example, the wafer probe may measure the gate leakage current via resistance, but is not limited thereto.

[0104] In some embodiments, the measuring element 400 may include a wafer acceptance test (WAT) module configured to measure electronic characteristics. For example, the WAT module may measure the gate current of a transistor or the drain current of a transistor via a resistor, but is not limited thereto.

[0105] In some embodiments, the measurement element 400 may include a statistical process control (SPC) module configured to provide data relating to the profile (or morphology) of a layer. For example, the SPC module may provide data relating to the profile (or morphology) of the tungsten layer of the word line or the thickness variation of the gate oxide layer, but is not limited thereto.

[0106] The imaging and temperature control element 500 is configured to generate a thermal image (THI) of wafer W1 during the etching process. In some embodiments, the imaging and temperature control element 500 is configured to acquire temperature information TP of wafer W1 from the process cavity 100 and generate a thermal image (THI) of wafer W1 based on the temperature information TP. In some embodiments, the thermal image (THI) indicates a temperature distribution profile of wafer W1.

[0107] The thermal image (THI) is transmitted to the process control element 200 and the AI ​​control module 300. The THI can be stored in the database of the process control element 200. The AI ​​control module 300 analyzes the THI, first state S1, and second state S2 of wafer W1, and is also configured to determine whether the second state S2 and / or the THI of wafer W1 meet a predetermined requirement PR (e.g., acceptance criteria or specifications). In some embodiments, the predetermined requirement PR is user input data.

[0108] When the second state S2 does not meet the predetermined requirement PR, the AI ​​control module 300 can update the etching recipe R1 according to the second state S2 and the thermal image THI to provide the process control element 200 with an updated etching recipe for the next wafer. For ease of understanding, the next wafer is also referred to as wafer W2, and the updated etching recipe is also referred to as etching recipe R2, wherein etching recipe R2 is different from etching recipe R1. Wafer W2 will undergo an etching process according to etching recipe R2, and wafer W2 will have the first state S1, the second state S2, and also have the thermal image THI.

[0109] When the thermal image THI does not meet the predetermined requirement PR, the AI ​​control module 300 may update the temperature control parameters to adjust the temperature of wafer W1. The temperature control parameters will be discussed later. In some embodiments, when the thermal image THI shows that the temperature distribution of wafer W1 is uneven across the entire wafer W1, the AI ​​control module 300 determines that the thermal image THI does not meet the predetermined requirement PR. In some embodiments, when the temperature deviation between any two regions of wafer W1 exceeds a predetermined value, the AI ​​control module 300 determines that the thermal image THI does not meet the predetermined requirement PR. In some embodiments, when the temperature of a certain region of wafer W1 exceeds an allowable range (above the maximum limit or below the minimum limit), the AI ​​control module 300 determines that the thermal image THI does not meet the predetermined requirement PR.

[0110] In some embodiments, wafer W1 may be at risk of damage when the thermal image (THI) does not meet the predetermined requirement (PR). The AI ​​control module 300 is used to prevent this risk of damage. Therefore, the yield of wafer W1 can be improved.

[0111] Measuring element 400 may be integrated within process cavity 100. In some embodiments, measuring element 400 may include a set of sensors that monitor process-related parameters, such as gas flow rate, gas ratio, or other applicable process-related parameters. These parameters are collectively referred to as parameters PM. Measuring element 400 is configured to transmit parameters PM to AI control module 300 in real time. In some embodiments, when second state S2 does not meet predetermined requirement PR, AI control module 300 is also configured to analyze parameters PM to generate etching recipe R2. In some embodiments, parameters PM include, but are not limited to, gas ratio, flow rate, tilt angle, and drive voltage. Conversely, when second state S2 meets predetermined requirement PR, etching recipe R1 may be retained and applied to wafer W2. In other words, etching recipe R1 can be updated or adjusted immediately within a wafer-to-wafer time frame.

[0112] In some embodiments, parameter PM is associated with etching recipe R1 and stored in process control element 200. Process control element 200 transmits parameter PM to process cavity 100 to cause process cavity 100 to execute etching recipe R1. However, when process cavity 100 performs the etching process, parameter PM may experience slight deviations due to some non-ideal factors. Therefore, parameter PM obtained by measuring element 400 can faithfully reflect the actual situation of the etching process.

[0113] In some embodiments, the AI ​​control module 300 can use parameter PM to calculate process deviation. The process deviation can be used to determine the correction of etching recipe R1 in order to generate etching recipe R2 for the wafer W2 to be processed.

[0114] In some embodiments, the AI ​​control module 300 may use table-based and / or formula-based techniques. For example, these formulas may be presented in a table, and the AI ​​control module 300 may look them up to determine which correction(s) provide the best solution. Alternatively, a set of formulas may be used to determine the corrections, and the AI ​​control module 300 may determine which correction(s) provide the best solution.

[0115] When the AI ​​control module 300 uses a table-based technique, the feedback control variable is configurable. For example, a variable can be a constant or coefficient in the table. Furthermore, multiple tables can be used, and rules can be switched based on an input range or an output range.

[0116] When the AI ​​control module 300 uses formula-based control, the feedback control variable is configurable. For example, a variable can be a constant or coefficient in the formula. Furthermore, there can be multiple formula combinations, and rules can be switched based on an input range or an output range.

[0117] In this embodiment, after the etching process is performed, the wafer W1 is also subjected to subsequent processes, which may be cleaning processes, deposition processes or other applicable processes.

[0118] By employing the AI ​​control module 300, relevant process recipes (such as the etching recipe in this embodiment) can be updated (or adjusted) online. The next wafer (i.e., wafer W2) can use the updated (or adjusted) recipe to obtain the second state S2 that meets the acceptance criteria. Therefore, the overall yield and / or reliability of the wafer can be improved.

[0119] Figure 2 This is a structural schematic diagram illustrating a process cavity 100 according to some embodiments of the present disclosure. The process cavity 100 includes a base 110, an electrostatic chuck (ESC) 120, and a plurality of thermal sensors 130.

[0120] The base 110 is configured as a support for the ESC 120 and the wafer W1. The ESC 120 is disposed on the base 110 and configured to attach the wafer W1 to the substrate via electro-adhesion between the ESC 120 and the wafer W1 during the etching process. Electro-adhesion is generated by applying a voltage DR to an electrode 122 of the ESC 120. The voltage DR is provided by a voltage supply 124.

[0121] ESC 120 includes a dielectric 126. Electrode 122 is embedded in dielectric 126. When voltage DR is applied to electrode 122, electrode 122 has a potential different from ground, and this potential induces charge and accumulates on a surface of wafer W1 near ESC 120.

[0122] During the etching process, wafer W1 may be heated due to ion bombardment or other reasons. When the temperature of wafer W1 exceeds a critical value (or a range), wafer W1 may break. The heat generated on wafer W1 is also transferred to ESC120 and base 110. Therefore, there are two mechanisms to maintain the temperature of wafer W1 in process cavity 100. The first mechanism is a fluid mechanism, and the second mechanism is a gas mechanism.

[0123] Regarding the fluid mechanism, the base 110 includes a channel 112 for conveying a heat transfer fluid HTL to carry heat out of the base 110 (or dissipate heat to the base 110). The heat transfer fluid HTL flows through the channel 112 to absorb heat and carry it out of the base 110 (or dissipate heat to the base 110). The heat transfer fluid HTL can be controlled to have a predetermined temperature. In some embodiments, the predetermined temperature may be a desired temperature of the wafer W1 during the etching process. When the temperature of the wafer W1 differs from the predetermined temperature, the heat transfer fluid HTL can provide or absorb heat energy to maintain the temperature of the wafer W1 at a desired state. The heat transfer fluid HTL is input into an inlet 114 of the channel 112 and output from an outlet 116 of the channel 112.

[0124] For the gas mechanism, a gas gap AG exists between wafer W1 and ESC 120 to transfer the heat transfer gas HTG to remove heat from wafer W1 (or provide heat to wafer W1). The heat transfer gas HTG is purged into the gas gap AG and heated (or cooled) by wafer W1, then escapes from the gas gap AG. In some embodiments, the heat transfer gas HTG is also referred to as the back heat transfer gas. In some embodiments, the heat transfer gas HTG comprises a rare gas. In some embodiments, the heat transfer gas HTG comprises helium (He).

[0125] Thermal sensors 130 are positioned above ESC 120. When wafer W1 is positioned on ESC 120, thermal sensors 130 can sense the temperature of wafer W1 to generate temperature information TP. Each thermal sensor 130 is configured to sense the temperature of a region of wafer W1, and each region is located below a corresponding thermal sensor 130. In other words, each temperature information TP represents the temperature of a corresponding region of wafer W1. Furthermore, thermal sensors 130 are configured to transmit the temperature information TP to the image and temperature control element 500. In some embodiments, thermal sensors 130 are uniformly distributed on wafer W1. In some embodiments, the distance between wafer W1 and any thermal sensor 130 is constant. In some embodiments, thermal sensors 130 are thermal imaging infrared cameras. It should be understood that the number and distribution of thermal sensors 130 are for illustrative purposes only and are not intended to be limiting. For example, in various embodiments, thermal sensors 130 are randomly distributed on wafer W1.

[0126] The purge pressure PP of the heat transfer gas HTG and the flow rate FR of the heat transfer liquid HTL are controlled by the process control element 200 and executed by the process chamber 100. The purge pressure PP and flow rate FR are parameters stored in and provided by the process control element 200. The measuring element 400 is configured to monitor the purge pressure PP and flow rate FR in real time and transmit them to the AI ​​control module 300. In some embodiments, the parameter PM includes the purge pressure PP and flow rate FR.

[0127] In some embodiments, the AI ​​control module 300 is further configured to analyze the thermal image THI, purge pressure PP, and flow rate FR to update the etching recipe R1, regardless of the second state S2. In some embodiments, the AI ​​control module 300 updates the purge pressure PP and flow rate FR based on the thermal image THI. For example, the AI ​​control module 300 can convert the thermal image THI into control signals corresponding to various regions of the wafer. The control signals are then transmitted to the process control element 200 and configured to control gas purging and liquid flow. In these embodiments, voltage and / or current signals are used as control signals. In such embodiments, the thermal image THI, purge pressure PP, and flow rate FR can be obtained before the etching recipe R1 is completed. That is, the AI ​​control module 300 can adjust the etching recipe R1 during execution and provide the updated recipe (i.e., etching recipe R2) to the process control element 200. In such embodiments, the process control element 200 can instruct the process chamber 100 to use etching recipe R2 on the wafer W2. This is beneficial for improving the productivity of the etching system 10. More specifically, this is particularly beneficial for etching systems 10 that have tight cycles between etching processes performed on wafers W1 and W2.

[0128] The AI ​​control module 300 is also configured to adjust the purge pressure PP and flow rate FR. Therefore, the purge pressure PP and flow rate FR are controlled in real time to accommodate any undesirable events that may occur during the etching process and cause deviations in the temperature profile of wafer W1.

[0129] In some conventional methods, it is impossible to obtain the temperature profile of wafer W1 within the process cavity 100. However, the temperature profile of wafer W1 can reveal a wealth of information, such as the risks associated with performing the etching recipe R1. Furthermore, in these conventional methods, the purge pressure and flow rate are set to constants, and these methods lack the ability to maintain the wafer temperature distribution during the etching process.

[0130] Compared to this disclosure, the temperature distribution profile of wafer W1 can be obtained online, and the purge pressure PP and flow rate FR can be controlled in real time. In this way, the temperature distribution profile of wafer W1 can be monitored in real time, reducing the chance of wafer W1 cracking.

[0131] In some embodiments, the etching process may employ plasma to etch wafer W1. In some embodiments, the etching process is reactive ion etching (RIE). In etching formulation R1 (or etching formulation R2), thermal sensor 130 senses the temperature of wafer W1 during a period when no plasma is generated. In some embodiments, thermal sensor 130 senses the temperature of wafer W1 before plasma is generated. In some embodiments, thermal sensor 130 senses the temperature of wafer W1 after the plasma has dissipated. In some embodiments, etching formulation R1 (or etching formulation R2) has multiple stages, each stage being separated by a period when no plasma is generated (also referred to as a steady-state period), and thermal sensor 130 senses the temperature of wafer W1 during the steady-state period.

[0132] Figure 3 This is a schematic diagram illustrating the electro-attachment between wafer W1 and electrostatic chuck (ESC) 120 in some embodiments of this disclosure. In some embodiments, the voltage DR is positive with respect to ground. When electrode 122 is subjected to voltage DR, positive charge accumulates on electrode 122, and this positive charge induces negative charge accumulated on wafer W1, such as... Figure 3 As shown.

[0133] An electric field E exists between ESC 120 and wafer W1, and electro-adsorption occurs using the electric field E and the charges present on wafer W1 and electrode 122. This electro-adsorption provides a force F to wafer W1 and ESC 120, causing wafer W1 to remain stationary on ESC 120.

[0134] Figure 2 and Figure 3 The ESC 120 shown is a unipolar ESC. However, this disclosure is not limited to the unipolar type. In other embodiments, ESC 120 is a bipolar ESC, such as... Figure 4 and Figure 5 As shown.

[0135] Figure 4 This is a structural schematic diagram illustrating the process cavity 100 of other embodiments of this disclosure. Figure 2 and Figure 3 Compared to the ESC 120 shown, Figure 4 The ESC 120 shown includes a first electrode 122a and a second electrode 122b, rather than a single electrode 122. The first electrode 122a and the second electrode 122b are electrically isolated. A voltage supply 124 is coupled between the first electrode 122a and the second electrode 122b and configured to provide a voltage DR.

[0136] Figure 5This is a schematic diagram illustrating electro-adhesion between wafer W1 and ESC 120 in some other embodiments of this disclosure. When a voltage DR is applied between the first electrode 122a and the second electrode 122b, positive charge accumulates on the first electrode 122a, while negative charge accumulates on the second electrode 122b. The positive charge on the first electrode 122a induces the accumulation of negative charge on a portion of wafer W1 above the first electrode 122a. Similarly, the negative charge on the second electrode 122b induces the accumulation of positive charge on another portion of wafer W1 above the second electrode 122b.

[0137] An electric field E1 exists between the first electrode 122a and this portion of the wafer W1, causing electro-adhesion based on the electric field E1 and the charges present on the wafer W1 and the first electrode 122a. This electro-adhesion provides a force F1 to the wafer W1 and the first electrode 122a, maintaining the wafer W1 on ESC 120. Similarly, an electric field E2 exists between the second electrode 122b and another portion of the wafer W1, causing electro-adhesion based on the electric field E2 and the charges present on the wafer W1 and the second electrode 122b. This electro-adhesion provides a force F2 to the wafer W1 and the second electrode 122b, maintaining the wafer W1 on ESC 120.

[0138] Figure 3 and Figure 5 The ESC 120 shown is a Coulomb-type ESC, with its charge primarily accumulating on electrode 122 (or the first electrode 122a and the second electrode 122b). In various embodiments, the ESC can be a Johnson-Rahbak type ESC, such as... Figure 6 and Figure 7 As shown.

[0139] Please refer to Figure 6 and Figure 7 The Johnson-Rahbak type ESC 120 is illustrated according to various embodiments of this disclosure. Figure 6 In the process, the charge on the unipolar ESC 120 accumulates on an upper surface 126T of the dielectric 126.

[0140] and Figure 3 Compared to the Coulomb-type ESC 120 shown, the distance between the accumulated charge layers is shorter, therefore the electric field E3 between wafer W1 and ESC 120 is greater than the electric field E. Consequently, the force F3 driven by the electric field E3 is greater than the force F.

[0141] exist Figure 7 In the bipolar ESC 120, charge accumulates on the upper surface 126T of the dielectric 126. (The last sentence appears to be incomplete and possibly contains errors.) Figure 5Compared to the Coulomb-type ESC 120 shown, due to the shorter distance between the accumulated charge layers, the electric fields E4 and E5 between wafer W1 and ESC 120 are greater than electric fields E1 and E2. Therefore, the forces F4 driven by electric field E4 and F5 driven by electric field E5 are greater than forces F1 and F2.

[0142] Please refer to Figure 8 . Figure 8 This is a flowchart illustrating an etching method 800 according to some embodiments of the present disclosure. Specifically, the etching method 800 can control a temperature of a wafer during the etching process. The etching method includes steps S802, S804, S806, S808, S810, S812, S814, and S816. In some embodiments, the etching method 800 is performed by an etching system 10. For ease of understanding, the etching system 10 and... Figures 1 to 7 The etching method 800 is described by the component designations of the etch system 10.

[0143] In step S802, a thermal image (THI) of wafer W1 is obtained. In step S804, an etching process is performed on wafer W1 according to etching formula R1. In step S806, the flow rate (FR) of the heat transfer liquid (HTL) and the purging pressure (PP) of the heat transfer gas (HTG) are monitored in real time.

[0144] In some embodiments, the flow rate and purge pressure are continuously monitored. That is, they are continuously monitored during the execution of etching method 800.

[0145] In step S808, the AI ​​control module 300 determines whether the thermal image THI meets the predetermined requirement PR. If the thermal image THI does not meet the predetermined requirement PR, the etching method 800 continues to step S810. If the thermal image THI meets the predetermined requirement PR, the etching method 800 proceeds to step S816.

[0146] In step S810, the AI ​​control module 300 updates the etching formula R1 based on the thermal image THI to generate the etching formula R2.

[0147] In step S812, the flow rate FR and purge pressure PP are updated by the AI ​​control module 300.

[0148] In step S814, an etching process is performed on wafer W2 according to etching formula R2.

[0149] When the thermal image THI meets the predetermined requirement PR, the etching process is performed on wafer W2 according to the etching formula R1. In other words, when the thermal image THI meets the predetermined requirement PR, the next wafer (i.e., wafer W2) will be etched using the same etching formula R1 as the previous wafer (i.e., wafer W1).

[0150] One embodiment of this disclosure provides an etching system. The etching system includes a process chamber, an imaging and temperature control element, and an artificial intelligence control module. The process chamber is configured to perform an etching process on a first wafer according to a first etching recipe. The imaging and temperature control element is configured to generate a thermal image of the first wafer during the etching process. The artificial intelligence control module is configured to determine whether the thermal image meets a predetermined requirement. When the thermal image does not meet the predetermined requirement, the artificial intelligence control module is configured to update the first etching recipe according to multiple parameters to generate a second etching recipe.

[0151] Another embodiment of this disclosure provides an etching method. The etching method includes: acquiring a thermal image of a first wafer; performing an etching process on the first wafer according to a first etching recipe; determining, by means of an artificial intelligence control module, whether the thermal image meets a predetermined requirement; when the thermal image does not meet the predetermined requirement, the artificial intelligence control module updates the first etching recipe according to the thermal image to generate a second etching recipe; and performing an etching process on a second wafer according to the second etching recipe.

[0152] Thanks to the use of the artificial intelligence (AI) control module 300, the temperature of wafers W1 / W2 can be controlled more accurately and in a more timely manner. Therefore, wafer yield and / or reliability can be improved.

[0153] While this disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions, and alternatives may be made without departing from the spirit and scope of this disclosure as defined in the claims. For example, many of the processes described above may be implemented using different methods, and other processes or combinations thereof may be substituted for many of the processes described above.

[0154] Furthermore, the scope of this application is not limited to the specific embodiments of the processes, machinery, manufacturing, material composition, means, methods, and steps described in the specification. Those skilled in the art will understand from the disclosure of this publication that existing or future processes, machinery, manufacturing, material composition, means, methods, or steps that have the same function or achieve substantially the same results as the corresponding embodiments described herein can be used based on this disclosure. Therefore, such processes, machinery, manufacturing, material composition, means, methods, or steps are included within the scope of the claims of this application.

Claims

1. An etching system, comprising: A process chamber configured to perform an etching process on a first wafer according to a first etching recipe; An image and temperature control element is configured to generate a thermal image of the first wafer during the etching process; and An artificial intelligence control module is configured to determine whether the thermal image meets a predetermined requirement. When the thermal image does not meet the predetermined requirement, the artificial intelligence control module is configured to update the first etching formula according to multiple parameters to generate a second etching formula.

2. The etching system of claim 1, wherein the artificial intelligence control module is integrated within the process cavity.

3. The etching system of claim 1, wherein the process cavity comprises: An electrostatic chuck is configured to attach the first wafer by electro-adhesion. Multiple thermal sensors are configured to sense multiple temperature information of the first wafer, respectively; as well as A base, configured to support the electrostatic chuck.

4. The etching system of claim 3, wherein the base comprises: A channel configured to transmit a heat transfer liquid to control a temperature of the first wafer.

5. The etching system of claim 4, wherein the flow rate of the heat transfer fluid is monitored in real time and the flow rate is transmitted to the artificial intelligence control module, wherein when the thermal image does not meet the predetermined requirements, the artificial intelligence control module updates the first etching formula according to the flow rate to generate the second etching formula.

6. The etching system of claim 5, wherein when the AI ​​control module updates the first etching recipe, the AI ​​control module is further configured to update the flow rate based on the thermal image.

7. The etching system of claim 3, wherein when the electrostatic chuck is attached to the first wafer, there is an air gap between the first wafer and the electrostatic chuck, wherein a heat transfer gas is blown into the air gap, the blowing pressure of the heat transfer gas is monitored in real time, and the blowing pressure is transmitted to the artificial intelligence control module.

8. The etching system of claim 7, wherein when the thermal image does not meet the predetermined requirements, the artificial intelligence control module updates the first etching formula according to the purge pressure.

9. The etching system of claim 8, wherein when the AI ​​control module updates the first etching recipe, the AI ​​control module is further configured to update the purge pressure based on the thermal image.

10. The etching system of claim 3, wherein the image and temperature control elements are configured to acquire the plurality of temperature information in order to generate the thermal image.

11. The etching system of claim 3, wherein the plurality of temperature information respectively indicates a temperature of a plurality of regions of the first wafer.

12. The etching system of claim 3, wherein the electrostatic chuck comprises: A dielectric; One electrode is embedded in the dielectric. as well as A voltage supply is configured to provide a voltage to the electrode. In this process, due to the effect of the voltage, a first charge accumulates on the electrode, and a second charge is formed and accumulated on the first wafer by induction of the first charge.

13. The etching system of claim 3, wherein the electrostatic chuck comprises: A dielectric; A first electrode is embedded in the dielectric. A second electrode is embedded in the dielectric and separated from the first electrode; as well as A voltage supply is coupled between the first electrode and the second electrode and configured to provide a voltage between the first electrode and the second electrode. Due to the effect of this voltage, a first positive charge and a first negative charge accumulate on the first electrode and the second electrode, respectively. A second negative charge is formed and accumulated on a portion of the first wafer by induction of the first positive charge, while a second positive charge is formed and accumulated on another portion of the first wafer by induction of the first negative charge.

14. The etching system of claim 1, further comprising: A measuring element is configured to monitor the multiple parameters of the etching process and transmit the multiple parameters to the artificial intelligence control module.

15. The etching system of claim 1, wherein the process cavity is further configured to perform the etching process on a second wafer according to the second etching formula, wherein the second etching formula is different from the first etching formula.

16. An etching method, comprising: Obtain a thermal image of a first wafer; An etching process is performed on the first wafer according to a first etching formula; An artificial intelligence control module determines whether the thermal image meets a predetermined requirement. When the thermal image does not meet the predetermined requirements, the artificial intelligence control module updates the first etching formula based on the thermal image to generate a second etching formula. as well as An etching process is performed on a second wafer according to the second etching formula.

17. The etching method of claim 16, wherein performing the etching process on the first wafer according to the first etching formula comprises: Multiple temperature data points from multiple regions of the first wafer are sensed respectively; A plasma is generated to etch the first wafer; A heat transfer gas is purged to control a temperature of the first wafer; and A heat transfer liquid is transferred to control the temperature of the first wafer.

18. The etching method of claim 17, further comprising: Real-time monitoring of the flow rate of the heat transfer liquid and the purging pressure of the heat transfer gas; as well as When the thermal image does not meet the predetermined requirements, the flow rate and the purging pressure are updated through the artificial intelligence control module.

19. The etching method of claim 18, wherein when the etching process is performed on the second wafer according to the second etching formula, the heat transfer gas is purged with a renewed purging pressure and the heat transfer liquid is transferred with a renewed flow rate.

20. The etching method of claim 17, wherein sensing the plurality of temperature information is performed when the plasma is not generated.

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