Method and system for processing back image of cut wafer and storage medium

Abstract

The invention provides a method for processing a back image of a cut wafer, a system for processing the back image of the cut wafer and a computer readable storage medium. The method for processing the back image of the cut wafer comprises the following steps: acquiring the back image of the cut wafer; and respectively carrying out integration along the X direction and the Y direction on the gray values of the plurality of pixel points in the back image so as to respectively detect a plurality of scribing channels extending along the X direction and the Y direction in the back image. The X direction is perpendicular to the Y direction; and respectively calculating coordinates of intersection points of the plurality of first scribing channels extending along the X direction and the plurality of second scribing channels extending along the Y direction, and generating a crystal grain distribution diagram on the back surface of the cut wafer according to the coordinates of the intersection points of the plurality of first scribing channels extending along the X direction and the plurality of second scribing channels extending along the Y direction. The method can be used for generating the crystal grain distribution diagram of the back surface of the cut wafer, so that defect detection is carried out on the back surface of the corresponding crystal grain, and the detection accuracy is improved.

Description

Methods, systems, and storage media for processing images of the back side of diced wafers. Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for processing images of the back side of a diced wafer, a system for processing images of the back side of a diced wafer, and a computer-readable storage medium. Background Technology

[0002] Currently in the semiconductor field, to perform defect detection on each die in a wafer, it is necessary to extract the image of each die and then use various methods for defect detection. To extract a complete image of each die, it is necessary to obtain the position of each die within the wafer.

[0003] In standard wafer fabrication, wafer manufacturers provide die maps. After wafer alignment, the die map provides the location of each die. However, after dicing, scribe lines exist between each die. These scribe lines increase the distance between dies, causing the actual die distribution to differ from the die map provided by the manufacturer. Therefore, the die map can no longer be used to determine the actual location of each die.

[0004] Furthermore, patents CN117132603B, CN116153818A, CN116612113A, and CN116542945A all use template matching to generate grain distribution maps. This involves first selecting a complete grain region as the matching template, then sequentially searching for each grain within the search area and recording its coordinates, ultimately finding all grains and generating a grain distribution map. Patent CN113538586A uses multiple selected grain images and their coordinates, employs Fourier transform to obtain the grain periodicity information, then performs a Fourier transform within the detection area, using the periodicity information to obtain a feature matrix describing the grains, and finally calculates the actual positions of all grains to generate a grain distribution map. However, these methods are primarily applicable to generating grain distribution maps on the front side of diced wafers. Since the back side of diced wafers currently lacks a stable and fixed pattern, template matching or searching for periodic distributions cannot be applied. Therefore, these methods cannot be used effectively on the back side of diced wafers.

[0005] In order to overcome the above-mentioned defects in the existing technology, there is an urgent need in the field for an improved method for processing the back side image of a diced wafer, which is used to generate a grain distribution map on the back side of the diced wafer, thereby performing defect detection on the back side of the corresponding grains to improve the accuracy of detection.

[0006] Summary of the Invention

[0007] The following provides a brief overview of one or more aspects to offer a basic understanding of them. This overview is not an exhaustive summary of all conceived aspects, nor is it intended to identify key or decisive elements of all aspects, nor to define the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed descriptions that follow.

[0008] To overcome the aforementioned deficiencies in the prior art, the present invention provides a method for processing images of the back side of a diced wafer, a system for processing images of the back side of a diced wafer, and a computer-readable storage medium. This method can generate a grain distribution map of the back side of the diced wafer by detecting multiple scribe lines in the X and Y directions, thereby enabling defect detection on the back side of the corresponding grains and improving detection accuracy.

[0009] Specifically, the processing method for the back side image of a diced wafer provided by the first aspect of the present invention includes the following steps: acquiring a back side image of the diced wafer; integrating the grayscale values ​​of multiple pixels in the back side image along the X and Y directions respectively to detect multiple scribe lines extending along the X and Y directions in the back side image respectively. The X direction is perpendicular to the Y direction; and calculating the intersection coordinates of multiple first scribe lines extending along the X direction and multiple second scribe lines extending along the Y direction respectively, and generating a grain distribution map of the back side of the diced wafer accordingly.

[0010] Furthermore, in some embodiments of the present invention, the step of acquiring the back image of the diced wafer includes: acquiring a first image of the back of the diced wafer under a preset first illumination brightness; parsing the first image to determine the noise influence therein; in response to the noise influence being greater than a preset influence threshold, increasing the illumination brightness, re-acquiring a second image of the back of the diced wafer, and parsing the second image until the noise influence therein is less than or equal to the influence threshold; and in response to the noise influence being less than or equal to the influence threshold, acquiring a back image of at least one diced wafer from the same batch under the current illumination brightness.

[0011] Furthermore, in some embodiments of the present invention, the step of obtaining the back side image of the diced wafer includes: scanning the back side of the diced wafer column by column along a preset first direction to obtain multiple line scan images of the back side of the diced wafer; and stitching the multiple line scan images along a preset second direction to obtain a back side image of the diced wafer. The second direction is perpendicular to the first direction.

[0012] Further, in some embodiments of the present invention, the step of integrating the gray values ​​of multiple pixels in the back image along the X and Y directions respectively to detect multiple scribbles extending along the X and Y directions in the back image includes: determining multiple first peaks of the gray value integration values ​​of the multiple pixels along the X direction and multiple second peaks of the gray value integration values ​​of the multiple pixels along the Y direction using a peak detection method; determining a first coordinate trajectory of the multiple first scribbles extending along the X direction based on the first positions of the multiple first peaks; and determining a second coordinate trajectory of the multiple second scribbles extending along the Y direction based on the second positions of the multiple second peaks.

[0013] Furthermore, in some embodiments of the present invention, before integrating the grayscale values ​​of multiple pixels in the back image along the X and Y directions respectively, the processing method further includes the following step: initially calibrating the first angle interval [θ] where the X direction is located. start_X θ end_X ], and define the first search step size θ step_X ; in the first angular interval [θ start_X θ end_X Within ], according to the first search step size θ step_X Calculate multiple angles θ separately i The grayscale integral array RadonResult i θ i =θ start_X +i×θ step_X The grayscale integral array RadonResult i Including along the angle θ i The grayscale integral value of the multi-row pixels in the third direction; and the angle θ of each of the above. i The grayscale integral array RadonResult i The angle θ of the most significant mid-peak feature i The third direction corresponding to ′ is determined as the X direction.

[0014] Furthermore, in some embodiments of the present invention, before integrating the grayscale values ​​of multiple pixels in the back image along the X and Y directions respectively, the processing method further includes the following step: initially calibrating the second angle interval [θ] where the Y direction is located. start_Y θ end_Y ], and define the second search step size θ step_Y ; in the second angular interval [θ start_Y θ end_Y Within ], according to the second search step size θ step_Y Calculate multiple angles θ separatelyj The grayscale integral array RadonResult j θ j =θ start_Y +j×θ step_Y The grayscale integral array RadonResult j Including along the angle θ j The grayscale integral value of multiple columns of pixels in the fourth direction; and the grayscale integral value of each angle θ j The grayscale integral array RadonResult j The angle θ of the most significant mid-peak feature i The fourth direction corresponding to ′ is determined to be the Y direction.

[0015] Furthermore, in some embodiments of the present invention, the peak characteristic is represented as:

[0016] Where length is the length of the grayscale integral array RadonResult. abs(·) represents the absolute value operation. The larger the value of RadonResultAbsDiffSum, the more significant the peak feature of the grayscale integral array RadonResult at the corresponding angle.

[0017] Furthermore, in some embodiments of the present invention, the step of determining the first coordinate trajectory of the plurality of first scribbling lanes extending along the X direction based on the first position of the plurality of first peaks includes: based on the angle θ i ′, and the corresponding grayscale integral array RadonResult i The intercepts of multiple first peaks in the X direction are used to determine the first straight line equations of the multiple first scribe lines in the back image of the diced wafer.

[0018] Furthermore, in some embodiments of the present invention, the step of determining the second coordinate trajectory of the plurality of second scribbling lanes extending along the Y direction based on the second positions of the plurality of second peaks includes: based on the angle θ j ′, and the corresponding grayscale integral array RadonResult j The intercepts of multiple second peaks in the Y direction are used to determine the second straight line equations of the multiple second dicing paths in the back image of the diced wafer.

[0019] Further, in some embodiments of the present invention, the step of calculating the intersection coordinates of the plurality of first scribe lines extending along the X direction and the plurality of second scribe lines extending along the Y direction, and generating the grain distribution map on the back side of the diced wafer accordingly, includes: determining the intersection coordinates of a plurality of intersection points of the plurality of first scribe lines and the plurality of second scribe lines based on the first coordinate trajectory of the plurality of first scribe lines and the second coordinate trajectory of the plurality of second scribe lines; and determining the intersection coordinates of a plurality of intersection points p of the plurality of first scribe lines and the plurality of second scribe lines based on the first coordinate trajectory of the plurality of first scribe lines and the second coordinate trajectory of the plurality of second scribe lines; and determining the intersection coordinates of a plurality of intersection points p of the plurality of first scribe lines and the plurality of second scribe lines adjacent to each other along the X direction and the Y direction. i，j、 p i，j +1、p i+1，j、 p i+1，j+1 The coordinates of the intersection points are used to determine the coordinate position, width, and height of a corresponding grain on the back side of the diced wafer; and a grain distribution map on the back side of the diced wafer is generated based on the coordinate position, width, and height of each grain on the back side of the diced wafer.

[0020] Furthermore, in some embodiments of the present invention, the step of generating a grain distribution map on the back side of the diced wafer based on the coordinate position, width, and height of each of the grains on the back side of the diced wafer includes: determining the sum of pixel values ​​of a plurality of pixels within each of the grains based on the coordinate position, width, and height of each of the grains on the back side of the diced wafer; filtering out data on the coordinate position, width, and height of any of the grains in response to the sum of pixel values ​​of any of the grains being less than a preset threshold; and generating a grain distribution map on the back side of the diced wafer based on the coordinate position, width, and height of a plurality of grains on the back side of the diced wafer whose sum of pixel values ​​is greater than or equal to the preset threshold.

[0021] Furthermore, in some embodiments of the present invention, the method further includes the following steps: determining the coordinate position of at least one grain on the back side of the diced wafer according to the grain distribution map; and performing defect detection on the back side of the corresponding grain on the diced wafer according to the coordinate position.

[0022] Furthermore, the processing system for the back side image of a diced wafer provided according to a second aspect of the present invention includes a memory and a processor. The memory stores computer instructions. The processor is connected to the memory and configured to execute the computer instructions stored in the memory to implement the processing method for the back side image of a diced wafer as provided in the first aspect of the present invention.

[0023] Furthermore, in some embodiments of the present invention, the processing system further includes a line scan camera and a motion stage. The motion stage supports three degrees of freedom motion—horizontal and vertical translation and rotation around an axis—within the loading plane, used to move multiple detection areas on the back side of the diced wafer, carried on it, column by column, to the image acquisition range of the line scan camera, so that it can scan the back side of the diced wafer column by column to obtain multiple line scan images of the back side of the diced wafer, and / or rotate the diced wafer to calibrate the X direction and / or the Y direction.

[0024] Furthermore, the computer-readable storage medium provided according to the third aspect of the present invention stores computer instructions thereon. When the computer instructions are executed by a processor, a method for processing a back-side image of a diced wafer as provided in the second aspect of the present invention is implemented. Attached Figure Description

[0025] The above-described features and advantages of the present invention will be better understood after reading the following detailed description of embodiments of the present disclosure in conjunction with the accompanying drawings. In the drawings, components are not necessarily drawn to scale, and components having similar related properties or features may have the same or similar reference numerals.

[0026] Figure 1 shows a schematic diagram of a system for processing images of the back side of a diced wafer according to some embodiments of the present invention.

[0027] Figure 2 shows a schematic diagram of a front view of a diced wafer provided according to some embodiments of the present invention.

[0028] Figure 3 shows a flowchart illustrating a method for processing images of the back side of a diced wafer according to some embodiments of the present invention.

[0029] Figure 4 shows a schematic diagram of the back side image of a diced wafer provided according to some embodiments of the present invention.

[0030] Figure 5 shows a schematic diagram of the back side image of a diced wafer provided according to some embodiments of the present invention.

[0031] Figure 6 shows a schematic diagram of a line scan image of the back side of a diced wafer, provided by some embodiments of the present invention.

[0032] Figure 7 shows a schematic diagram of the results of the Radon transform in the first direction provided by some embodiments of the present invention.

[0033] Figure 8 shows a schematic diagram of the back side of a spliced ​​and diced wafer provided according to some embodiments of the present invention.

[0034] Figure 9 shows a schematic diagram of an image to be detected in the X direction using the Radon transform method, according to some embodiments of the present invention.

[0035] Figure 10 shows a schematic diagram of the Radon transform results provided according to some embodiments of the present invention.

[0036] Figure 11 shows a schematic diagram of the Radon transform results provided according to some embodiments of the present invention.

[0037] Figure 12 shows an intersection distribution diagram provided according to some embodiments of the present invention.

[0038] Figure 13 shows an intersection distribution diagram provided according to some embodiments of the present invention.

[0039] Figure 14 shows a schematic diagram of incomplete grains provided according to some embodiments of the present invention. Detailed Implementation

[0040] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Although the description of the present invention is presented in conjunction with preferred embodiments, this does not mean that the features of the invention are limited to these embodiments. On the contrary, the purpose of describing the invention in conjunction with embodiments is to cover other options or modifications that may be derived based on the claims of the present invention. To provide a thorough understanding of the invention, many specific details will be included in the following description. The invention may also be implemented without using these details. Furthermore, to avoid confusion or obscuring the focus of the invention, some specific details will be omitted in the description.

[0041] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0042] Furthermore, the terms "upper," "lower," "left," "right," "top," "bottom," "horizontal," and "vertical" used in the following description should be understood as the orientations shown in the relevant paragraphs and accompanying drawings. These relative terms are for illustrative purposes only and do not imply that the described apparatus must be manufactured or operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0043] It is understood that although terms such as "first," "second," and "third" may be used herein to describe various components, regions, layers, and / or parts, these components, regions, layers, and / or parts should not be limited by these terms, and these terms are only used to distinguish different components, regions, layers, and / or parts. Therefore, the first components, regions, layers, and / or parts discussed below may be referred to as second components, regions, layers, and / or parts without departing from some embodiments of the present invention.

[0044] As mentioned above, existing methods for defect detection based on grain distribution maps of standard wafers are not applicable to defect detection on diced wafers. Furthermore, existing methods for generating grain distribution maps using template matching or Fourier transform are primarily suitable for generating the front-side grain distribution map of the diced wafer. Since the back side of the diced wafer currently lacks a stable and fixed pattern, template matching or searching for periodic distributions cannot be applied. Therefore, these methods cannot be used correctly on the back side of the diced wafer.

[0045] To overcome the aforementioned deficiencies in the prior art, the present invention provides a method for processing images of the back side of a diced wafer, a system for processing images of the back side of a diced wafer, and a computer-readable storage medium. This method can generate a grain distribution map of the back side of the diced wafer by detecting multiple scribe lines in the X and Y directions, thereby enabling defect detection on the back side of the corresponding grains and improving detection accuracy.

[0046] In some non-limiting embodiments, the method for processing the back side image of a diced wafer provided in the first aspect of the present invention can be implemented by the system for processing the back side image of a diced wafer provided in the second aspect of the present invention. Specifically, the process chamber is equipped with a memory and a processor. The memory includes, but is not limited to, the computer-readable storage medium provided in the third aspect of the present invention, on which computer instructions are stored. The processor is connected to the memory and is configured to execute the computer instructions stored in the memory to implement the method for processing the back side image of a diced wafer provided in the first aspect of the present invention.

[0047] Please refer to Figures 1 and 2 for details. Figure 1 shows a schematic diagram of a processing system for the back side image of a diced wafer according to some embodiments of the present invention. Figure 2 shows a schematic diagram of a diced wafer according to some embodiments of the present invention.

[0048] In the embodiments shown in Figures 1 and 2, the processing system for the back side image of the diced wafer provided in the second aspect of the present invention includes a line scan camera 11 and a motion stage 12. Here, the motion stage 12 supports three-degree-of-freedom motion within the carrying plane, including horizontal and vertical translation along a preset first and second direction, and rotation around an axis. This is used to move multiple detection areas on the back side of the diced wafer 13, carried on the camera, column by column, to the image acquisition range of the line scan camera 11, allowing it to scan the back side of the diced wafer 13 column by column to obtain multiple line scan images of the back side of the diced wafer 13, and / or rotate the diced wafer 13 to calibrate the X and / or Y directions of each dicing track on the back side of the diced wafer 13.

[0049] Furthermore, in the embodiment shown in FIG1, the processing system for the back side image of the diced wafer provided by the second aspect of the present invention further includes an objective lens 14, a light source 15, an autofocus system 16, a tube lens 17, a first beam splitter 181, a second beam splitter 182, and an area array camera 19. Here, the objective lens 14 includes an objective lens group and an objective lens switching system, enabling free switching between the objectives within the objective lens group. The objective lens group includes a low-magnification, large-depth-of-focus microscope objective and a high-magnification, small-depth-of-focus microscope objective. The light source 15 is used to provide light for bright-field or dark-field detection. The autofocus system 16 is used to move the objective lens 14 and, through the light reflected by the filter 161, ensures that the focal plane of the objective lens 14 is always located on the substrate surface of the diced wafer 13. The tube lens 17 is used to cooperate with the objective lens 14 for imaging. The first beam splitter 181 and the second beam splitter 182 can be semi-transparent and semi-reflective mirrors. The first beam splitter 181 is disposed before the tube lens 17 and is used for bright-field illumination. The second beam splitter 182 is positioned behind the telescope 17 to split the imaging light path, enabling it to be imaged on the linear array camera 11 and the area array camera 19. The area array camera 19 is used for alignment and defect inspection of the diced wafer 13.

[0050] The working principle of the above-described system for processing back-side images of diced wafers will be described below with reference to embodiments of some methods for processing back-side images of diced wafers. Those skilled in the art will understand that these embodiments are merely non-limiting implementations of the present invention, intended to clearly demonstrate the main concepts of the invention and provide specific solutions convenient for public implementation, rather than limiting all functions or operating methods of the system for processing back-side images of diced wafers. Similarly, the system for processing back-side images of diced wafers is also only one non-limiting implementation of the present invention and does not limit the executing entity or execution order of the steps in these methods for processing back-side images of diced wafers.

[0051] Please refer to Figures 3 through 5. Figure 3 shows a flowchart illustrating a method for processing the back side image of a diced wafer according to some embodiments of the present invention. Figure 4 shows a schematic diagram of a back side image of a diced wafer according to some embodiments of the present invention. Figure 5 shows a schematic diagram of a back side image of a diced wafer according to some embodiments of the present invention.

[0052] As shown in Figure 3, the processor can first acquire an image of the back side of the diced wafer 13. Specifically, the processor can first align the diced wafer 13 to move it to a preset position on the motion stage 12. Then, during the acquisition of the back side image of the diced wafer 13, the processor can acquire a first image of the back side of the diced wafer 13 under a preset first illumination brightness. Afterward, the processor can analyze the first image to determine the noise effects within it.

[0053] Subsequently, in response to noise impact exceeding a preset threshold, the processor can increase the illumination brightness, re-acquire a second image of the back side of the diced wafer, and analyze the second image until the noise impact is less than or equal to the threshold. As shown in Figure 4, when the noise in the back side image is heavy, the scribe line information between the grains in the back side image is relatively weak.

[0054] Subsequently, in response to the noise impact being less than or equal to the impact threshold, the processor may preferably record and save the current illumination brightness in the processing system's recipe file, so that the processor can retrieve the current illumination brightness to acquire a back-side image of at least one diced wafer from the same batch. As shown in Figure 5, after the noise inside the die is reduced, although there is less internal texture information in the back-side image, the scratch information between each die is more significant.

[0055] Please refer further to Figures 6 to 8. Figure 6 shows a schematic diagram of a line scan image of the back side of a diced wafer, scanned column by column, according to some embodiments of the present invention. Figure 7 shows a schematic diagram of the result of Radon transform in the first direction according to some embodiments of the present invention. Figure 8 shows a schematic diagram of the back side image of a diced wafer after splicing, according to some embodiments of the present invention.

[0056] As shown in Figure 6, the processor can scan the back side of the diced wafer column by column along a preset first direction to obtain multiple line scan images of the back side of the diced wafer. As shown in Figure 7, the processor can integrate the pixel grayscale values ​​of the back side image of the diced wafer 13 along the preset first direction, i.e., the direction of the horizontal arrow in Figure 6, to obtain the grayscale integral value of each pixel.

[0057] In some non-limiting embodiments, the integral can be implemented using the Radon transform to obtain the Radon transform results at each pixel. Compared to another implementation based on the Hough transform, the Radon transform can be directly calculated on unbinarized images, thus effectively reducing the hassle of setting binarization methods and thresholds required for binarization processing, thereby reducing the complexity of the method.

[0058] Then, as shown in Figure 8, the processor can stitch together multiple line scan images along a preset second direction to obtain a back-side image of the diced wafer. Here, the second direction is perpendicular to the first direction.

[0059] After acquiring the back side image of the diced wafer 13, the processor can integrate the grayscale values ​​of multiple pixels in the back side image along the X and Y directions to detect multiple scribe lines extending along the X and Y directions in the back side image, respectively. Here, the X direction is perpendicular to the Y direction.

[0060] Please refer to Figures 9 to 11. Figure 9 shows a schematic diagram of an image to be detected in the X direction using the Radon transform method according to some embodiments of the present invention. Figure 10 shows a schematic diagram of the Radon transform result provided by some embodiments of the present invention. Figure 11 shows a schematic diagram of the Radon transform result provided by some embodiments of the present invention.

[0061] Specifically, the processor can use peak detection methods, such as the findPeak method in Matlab, to determine multiple first peaks of the gray-scale integral values ​​of multiple pixels along the X direction and multiple second peaks of the gray-scale integral values ​​of multiple pixels along the Y direction.

[0062] Furthermore, before integrating the gray values ​​of multiple pixels in the back image along the X and Y directions, the processor can preferably use the Radon transform method to directly calculate the non-binarized image to reduce image preprocessing.

[0063] As shown in Figure 9, during the detection of the X direction, the processor can initially determine the first angular interval [θ] of the X direction. start_X θ end_X ], and define the first search step size θ step_X For example, θ start_X =88.0°, θ end_X =92.0°, θ step_X =0.05°.

[0064] Then, the processor can operate within the first angular range [θ] start_X θ end_X Within ], according to the first search step size θ step_XCalculate multiple angles θ separately i The grayscale integral array RadonResult i Here, θ i =θ start_X +i×θ step_X Grayscale integral array RadonResult i Including along the angle θ i The grayscale integral value of the multi-row pixels in the third direction.

[0065] The processor can determine the list of angles θ used for the Radon transform. list_X As shown below: θ list_X = (θ0, ..., θ) i ) i∈[0,n],i=0,1,2,...,n θ i =θ start_X +i×θ step_X

[0066] Then, the processor can convert each angle θ i The grayscale integral array RadonResult i The angle θ of the most significant mid-peak feature i The third direction corresponding to ′ is determined as the X direction.

[0067] Here, the aforementioned peak characteristics are expressed as:

[0068] Where length is the length of the grayscale integral array RadonResult, abs(·) represents the absolute value operation, and the larger the value of RadonResultAbsDiffSum, the more significant the peak feature of the grayscale integral array RadonResult at the corresponding angle.

[0069] As shown in Figures 10 and 11, θ in Figure 8 i It is -1.25 degrees, θ in Figure 9 i The value is 0 degrees. Therefore, the peak value in Figure 11 is more pronounced than in Figure 10. Based on the definition and characteristics of the Radon transform, the rotation angle of the X direction relative to the horizontal direction in Figure 9 can be determined to be 0 degrees.

[0070] Similarly, during the detection of the Y direction, the processor can initially determine the second angular interval [θ] where the Y direction lies. start_Y θ end_Y ], and define the second search step size θ step_Y For example, θ start_Y = -2.0°, θ end_X =2.0°, θ step_X=0.05°.

[0071] Then, the processor can operate in the second angular range [θ] start_Y θ end_Y Within ], according to the second search step size θ step_Y Calculate multiple angles θ separately j The grayscale integral array RadonResult j Here, θ j =θ start_Y +j×θ step_Y Grayscale integral array RadonResult j Including along the angle θ j The grayscale integral value of multiple columns of pixels in the fourth direction.

[0072] Then, the processor can convert each angle θ j The grayscale integral array RadonResult j The angle θ of the most significant mid-peak feature j The fourth direction corresponding to ′ is determined to be the Y direction. The specific steps for determining the Y direction are similar to those for determining the X direction, and will not be repeated here.

[0073] Then, the processor can determine the first coordinate trajectory of the multiple first slicing tracks extending along the X direction based on the first position of the multiple first peaks.

[0074] Specifically, the processor can determine the angle θ i ′, and the corresponding grayscale integral array RadonResult i The intercepts of multiple first peaks in the X direction are used to determine the first straight line equation y1=k1x+b1 in the back image of the cut wafer, and these equations are recorded in the line set horizon_line_set.

[0075] Similarly, the processor can also determine the second coordinate trajectory of multiple second slicing tracks extending along the Y direction based on the second positions of multiple second peaks.

[0076] Specifically, the processor can determine the angle θ j ′, and the corresponding grayscale integral array RadonResult j The intercepts of multiple second peaks in the Y direction are used to determine the equations of the second straight lines y2=k2x+b2 in the back image of the diced wafer, and these equations are recorded in the set of straight lines vertical_line_set.

[0077] Please refer to Figures 12 and 13. Figure 12 shows an intersection distribution diagram provided according to some embodiments of the present invention. Figure 13 shows an intersection distribution diagram provided according to some embodiments of the present invention.

[0078] Then, the processor can calculate the coordinates of the intersection points of the multiple first dicing tracks extending along the X direction and the multiple second dicing tracks extending along the Y direction, and generate a grain distribution map on the back side of the diced wafer based on this.

[0079] As shown in Figure 12, during the process of generating the wafer distribution map on the back side of the diced wafer 13, the processor can determine the intersection coordinates of multiple intersection points of multiple first dicing tracks and multiple second dicing tracks based on the first coordinate trajectory of multiple first dicing tracks and the second coordinate trajectory of multiple second dicing tracks.

[0080] For example, the processor can calculate the intersection point p of the i-th horizontal line in the horizontal_line_set and the j-th vertical line in the vertical_line_set. i，j for:

[0081] in, For p i,j x-coordinate, For p i,j y-coordinate, Let be the intercept of the j-th vertical line in the vertical_line_set. Let be the slope of the j-th vertical line in the vertical_line_set. The intercept of the i-th horizontal line in the horizon_line_set. Let be the slope of the i-th horizontal line in the horizon_line_set.

[0082] Then, as shown in Figure 13, the processor can determine the order based on each of the four adjacent intersection points p along the X and Y directions. i,j p i,j+1 p i+1，j p i+1，j+1 The coordinates of the intersection point determine the coordinate position, width, and height of a corresponding grain on the back side of the diced wafer. For example, using p... i,j Using the coordinates of the upper left corner of the grain, As the width of the grain, This refers to the height of the grain.

[0083] Then, the processor can generate a grain distribution map on the back of the diced wafer based on the coordinate position, width, and height of each grain on the back of the diced wafer.

[0084] Please refer to Figure 14. Figure 14 shows a schematic diagram of incomplete grains provided according to some embodiments of the present invention.

[0085] Specifically, the processor can determine the sum of pixel values ​​of multiple pixels within each die based on its coordinate position, width, and height on the back side of the diced wafer. Then, as shown in Figure 14, in response to the sum of pixel values ​​of any die being less than a preset threshold, the processor can determine that the die is an incomplete die and filter out the data of the die's coordinate position, width, and height.

[0086] Then, the processor can generate a grain distribution map on the back of the diced wafer based on the coordinates, width, and height of multiple grains whose sum of pixel values ​​is greater than or equal to a preset threshold on the back of the diced wafer.

[0087] Furthermore, in some preferred embodiments, after generating the grain distribution map, the processor can also determine the coordinate position of at least one grain on the back side of the diced wafer based on the grain distribution map, and perform defect detection on the back side of the corresponding grain on the diced wafer based on the coordinate position.

[0088] In summary, the above-mentioned processing method, system, and computer-readable storage medium for the back side image of a diced wafer provided by the present invention can all generate a grain distribution map on the back side of the diced wafer by detecting multiple scribe lines in the X and Y directions of the diced wafer, thereby performing defect detection on the back side of the corresponding grains and improving the accuracy of the detection.

[0089] Although the methods described above are illustrated and depicted as a series of actions for the sake of simplicity, it should be understood and appreciated that these methods are not limited by the order of the actions, as some actions may occur in a different order and / or concurrently with other actions from the illustrations and descriptions herein or not illustrated and described herein but which may be understood by those skilled in the art, according to one or more embodiments.

[0090] Those skilled in the art will understand that information, signals, and data can be represented using any of a variety of different techniques and arts. For example, the data, instructions, commands, information, signals, bits, symbols, and chips described throughout the above description can be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, light fields or optical particles, or any combination thereof.

[0091] Those skilled in the art will further appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, the various illustrative components, blocks, modules, circuits, and steps are described above in a generalized manner in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the invention.

[0092] The prior description of this disclosure is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not intended to be limited to the examples and designs described herein, but should be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for processing images of the back side of a diced wafer, characterized in that, Includes the following steps: Obtain the back image of the diced wafer; The gray values ​​of multiple pixels in the back image are integrated along the X and Y directions respectively to detect multiple scribbles extending along the X and Y directions in the back image, wherein the X direction is perpendicular to the Y direction; as well as The coordinates of the intersection points of the plurality of first dicing channels extending along the X direction and the plurality of second dicing channels extending along the Y direction are calculated respectively, and a grain distribution map of the back side of the diced wafer is generated accordingly.

2. The processing method as described in claim 1, characterized in that, The step of obtaining the back image of the diced wafer includes: Under a preset first illumination brightness, a first image of the back side of the diced wafer is acquired; The first image is analyzed to determine the influence of noise. In response to the noise impact exceeding a preset impact threshold, the illumination brightness is increased, a second image of the back side of the diced wafer is re-acquired, and the second image is analyzed until the noise impact therein is less than or equal to the impact threshold; and In response to the noise impact being less than or equal to the impact threshold, at least one back-side image of a diced wafer from the same batch is acquired under the current illumination brightness.

3. The processing method as described in claim 1, characterized in that, The step of obtaining the back image of the diced wafer includes: The back side of the diced wafer is scanned column by column along a preset first direction to obtain multiple line scan images of the back side of the diced wafer; and The multiple line scan images are stitched together along a preset second direction to obtain a back image of the diced wafer, wherein the second direction is perpendicular to the first direction.

4. The processing method as described in claim 1, characterized in that, The step of integrating the gray values ​​of multiple pixels in the back image along the X and Y directions respectively to detect multiple scribe lines extending along the X and Y directions in the back image includes: By using peak detection method, multiple first peak values ​​of the gray-scale integral values ​​of the multiple pixels along the X direction and multiple second peak values ​​of the gray-scale integral values ​​of the multiple pixels along the Y direction are determined respectively. Based on the first positions of the plurality of first peaks, determine the first coordinate trajectories of the plurality of first scribbling lanes extending along the X direction; and Based on the second position of the plurality of second peaks, the second coordinate trajectory of the plurality of second slicing lanes extending along the Y direction is determined.

5. The processing method as described in claim 4, characterized in that, Before integrating the grayscale values ​​of multiple pixels in the back image along the X and Y directions, the processing method also... Includes the following steps: The first angular interval [θ] of the X direction is initially defined. start_X θ end_X ], and define the first search step size θ step_X ; In the first angular interval [θ start_X θ end_X Within ], according to the first search step size θ step_X Calculate multiple angles θ separately i The grayscale integral array RadonResult i , where θ i =θ start_X +i×θ step_X The grayscale integral array RadonResult i Including along the angle θ i The grayscale integral value of multi-row pixels in a third-party direction; as well as Each of the aforementioned angles θ i The grayscale integral array RadonResult i The angle θ of the most significant mid-peak feature i The third direction corresponding to ′ is determined as the X direction.

6. The processing method as described in claim 5, characterized in that, Before integrating the grayscale values ​​of multiple pixels in the back image along the X and Y directions respectively, the processing method further includes the following steps: The second angular interval [θ] of the Y direction is initially determined. start_Y θ end_Y ], and define the second search step size θ step_Y ; In the second angular interval [θ start_Y θ end_Y Within ], according to the second search step size θ step_Y Calculate multiple angles θ separately j The grayscale integral array RadonResult j , where θ j =θ start_Y +j×θ step_Y The grayscale integral array RadonResult j Including along the angle θ j The grayscale integral value of multiple columns of pixels in the fourth direction; and Each of the aforementioned angles θ j The grayscale integral array RadonResult j The angle θ of the most significant mid-peak feature i The fourth direction corresponding to ′ is determined to be the Y direction. The larger the value of RadonResultAbsDiffSum, the more significant the peak feature of the gray-scale integral array RadonResult at the corresponding angle.

8. The processing method as described in claim 5, characterized in that, The step of determining the first coordinate trajectory of the plurality of first scribbling lanes extending along the X direction based on the first positions of the plurality of first peaks includes: According to the angle θ i ′, and the corresponding grayscale integral array RadonResult i The intercepts of multiple first peaks in the X direction are used to determine the first straight line equations of the multiple first scribe lines in the back image of the diced wafer.

9. The processing method as described in claim 6, characterized in that, The step of determining the second coordinate trajectory of the plurality of second scribbling tracks extending along the Y direction based on the second positions of the plurality of second peaks includes: According to the angle θ j ′, and the corresponding grayscale integral array RadonResult j The intercepts of multiple second peaks in the Y direction are used to determine the second straight line equations of the multiple second dicing paths in the back image of the diced wafer.

10. The processing method as described in claim 4, characterized in that, The step of calculating the coordinates of the intersection points of the plurality of first scribe lines extending along the X direction and the plurality of second scribe lines extending along the Y direction, and generating the grain distribution map on the back side of the diced wafer accordingly, includes: Based on the first coordinate trajectory of the plurality of first lanes and the second coordinate trajectory of the plurality of second lanes, determine the intersection coordinates of a plurality of intersection points of the plurality of first lanes and the plurality of second lanes; Based on every four adjacent intersection points p along the X direction and the Y direction i，j p i，j+1 p i+1，j p i+1，j+1 The intersection coordinates determine the coordinate position, width, and height of a corresponding grain on the back side of the diced wafer; and Based on the coordinate position, width, and height of each grain on the back side of the diced wafer, a grain distribution map is generated on the back side of the diced wafer.

11. The processing method as described in claim 10, characterized in that, The step of generating a grain distribution map on the back side of the diced wafer based on the coordinate position, width, and height of each grain on the back side of the diced wafer includes: Based on the coordinate position, width, and height of each grain on the back side of the diced wafer, the sum of the pixel values ​​of multiple pixels inside it is determined; In response to the sum of pixel values ​​of any of the aforementioned grains being less than a preset threshold, data regarding the coordinate position, width, and height of the aforementioned grains are filtered out; and Based on the coordinate positions, widths, and heights of multiple grains whose sum of pixel values ​​is greater than or equal to the preset threshold on the back side of the diced wafer, a grain distribution map is generated on the back side of the diced wafer.

12. The processing method as described in claim 1, characterized in that, It also includes the following steps: Based on the grain distribution map, determine the coordinate position of at least one grain on the back side of the diced wafer; and Based on the coordinate positions, defect detection is performed on the back side of the corresponding grain on the cut wafer.

13. A system for processing images of the back side of a diced wafer, characterized in that, include: Memory, on which computer instructions are stored; as well as A processor, connected to the memory, and configured to execute computer instructions stored in the memory to implement the processing method for the back side image of a diced wafer as described in any one of claims 1 to 12.

14. The processing system as described in claim 13, characterized in that, Also includes: Line scan camera; as well as The motion stage supports three degrees of freedom of movement, including horizontal and vertical translation and rotation around an axis, within the carrying plane. It is used to move multiple detection areas on the back side of the diced wafer, carried on the stage, column by column, to the image acquisition range of the line scan camera, so that the camera can scan the back side of the diced wafer column by column to obtain multiple line scan images of the back side of the diced wafer, and / or rotate the diced wafer to calibrate the X direction and / or the Y direction.

15. A computer-readable storage medium storing computer instructions thereon, characterized in that, When the computer instructions are executed by the processor, the method for processing the back side image of the diced wafer as described in any one of claims 1 to 12 is implemented.

Images