Display panel and manufacturing method thereof

Abstract

The invention discloses a display panel and a manufacturing method thereof, and the display panel comprises a substrate; the pixel definition layer is arranged on the surface of the substrate and forms a plurality of pixel openings; the first isolation structure is arranged on the surface, deviating from the substrate, of the pixel definition layer; the second isolation structure is arranged between the pixel opening and the first isolation structure; and the first electrode is arranged on one side, deviating from the substrate, of the surface of the pixel definition layer and is disconnected at the first isolation structure and / or the second isolation structure. Through the structure, the partition probability of the cathode is improved.

Description

Technical Field

[0001] This invention relates to the field of displays, and in particular to display panels and methods for manufacturing the same. Background Technology

[0002] Organic light-emitting diode (OLED) display products are gradually expanding their market share in mobile phone displays and TV panels due to their superior characteristics such as high contrast, short response time, high color saturation, thinness, and flexibility. They are hailed as the next generation display technology most likely to replace liquid crystal display (LCD).

[0003] In existing technologies, OLED display products require the formation of patterned cathodes, necessitating the use of isolation pillars to isolate the entire cathode surface. Current technologies typically employ inverted trapezoidal isolation pillars to achieve this isolation. However, when the isolation pillars are not thick enough, the slope of the inverted trapezoidal spacer layer may not completely isolate the cathode, resulting in incomplete isolation or areas where isolation is not achieved. Summary of the Invention

[0004] The main technical problem addressed by this application is to provide a display panel and its manufacturing method to improve the cathode rejection probability.

[0005] To address the aforementioned problems, the first technical solution provided in this application is: to provide a display panel, comprising: a substrate; a pixel definition layer disposed on the surface of the substrate and forming a plurality of pixel openings; a first isolation structure disposed on the surface of the pixel definition layer opposite to the substrate; a second isolation structure disposed between the pixel openings and the first isolation structure; and a first electrode disposed on the side of the surface of the pixel definition layer opposite to the substrate and disconnected at the first isolation structure and / or the second isolation structure.

[0006] The partition structure includes at least one first groove, preferably, the cross-section of the first groove along the thickness direction of the substrate is trapezoidal.

[0007] Wherein, at least one of the first grooves further includes at least one second groove, the size of which is smaller than that of the first groove; preferably, the second groove is located on the bottom surface of the first groove; preferably, the second groove has the same shape as the first groove.

[0008] The first isolation structure is an inverted trapezoid.

[0009] The display panel further includes an isolation film layer disposed between the pixel opening and the first isolation structure, wherein at least one first groove is formed in the isolation film layer; preferably, the thickness of the isolation film layer is less than the height of the first isolation structure; preferably, the thickness of the isolation film layer is not less than 100 angstroms.

[0010] Wherein, a portion of the isolation film layer remains in the first groove, and at least one second groove is formed in the portion of the isolation film layer; preferably, the thickness of the remaining portion of the isolation film layer is half the thickness of the isolation film layer.

[0011] To solve the above problems, the second technical solution provided in this application is: providing a substrate; forming a pixel definition layer with pixel openings on the surface of the substrate; fabricating a first isolation structure on the surface of the pixel definition layer; fabricating a second isolation structure on the surface of the pixel definition layer between the first isolation structure and the pixel openings; and depositing a first electrode to disconnect the first electrode at the first isolation structure and / or the second isolation structure.

[0012] The step of fabricating a second isolation structure on the surface of the pixel definition layer between the first isolation structure and the pixel opening includes: depositing an isolation film between at least the first isolation structure and the pixel opening; and etching the isolation film between the first isolation structure and the pixel opening using an etching process to form at least one first groove, thereby obtaining a second isolation structure having at least one first groove.

[0013] The step of etching the isolation film between the first isolation structure and the pixel opening using an etching process to form at least one first groove further includes: using a semi-etching process to semi-etch the isolation film to obtain the first groove; and using a plasma bombardment process to bombard the first groove to create a plurality of second grooves, thereby obtaining at least one second isolation structure having a plurality of second grooves within the first groove.

[0014] The barrier film comprises one or more of nitrides, oxides, metals or non-metals; preferably, the thickness of the barrier film is not less than 100 angstroms; preferably, the depth of the first groove is not less than 50 angstroms.

[0015] The beneficial effects of this application are: by setting a second isolation structure with the ability to isolate the cathode between the pixel opening and the first isolation structure, the probability of the cathode in the pixel opening being isolated from the cathode on the first isolation structure is increased, the cathode isolation due to insufficient thickness of the first isolation structure is reduced, and the situation where the cathode is not completely isolated is reduced, thereby improving the yield rate of the display panel manufacturing. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of the first embodiment of the display panel of this application;

[0018] Figure 2 This is a schematic diagram of the structure of the second embodiment of the display panel of this application;

[0019] Figure 3 This is a schematic flowchart of an embodiment of the method for manufacturing a display panel according to this application. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to limit the application. The singular forms “a,” “said,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms, unless otherwise clearly indicated above. “Multiple” generally includes at least two, but does not exclude the inclusion of at least one.

[0022] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0023] It should be understood that the terms "comprising," "including," or any other variations used herein are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0024] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0025] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in every place in the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0026] This application provides a display panel; please refer to the details. Figure 1 , Figure 1 This is a schematic diagram of the structure of the first embodiment of the display panel of this application. Figure 1 As shown, the display panel includes a substrate 10.

[0027] A pixel definition layer 20 is disposed on the surface of the substrate 10, and a portion of the surface of the substrate 10 is exposed to form a pixel opening 101.

[0028] The first isolation structure 30 is disposed on the surface of the pixel definition layer 20 away from the substrate 10.

[0029] The second isolation structure 40 is disposed on the surface of the pixel definition layer 20 between the pixel opening 101 and the first isolation structure 30.

[0030] The first electrode 50 covers the surfaces of the substrate 10 and the pixel definition layer 20, and is disconnected at least at the location of the second isolation structure 40. The first electrode 50 is a cathode.

[0031] In this embodiment, by placing the second isolation structure 40 at the position between the pixel opening 101 and the first isolation structure 30, the first electrode 50 formed within the pixel opening 101 is disconnected from the first electrode 50 formed on the first isolation structure 30 at least at the position of the second isolation structure 40. In other words, the second isolation structure 40 increases the probability of disconnection between the first electrode 50 within the pixel opening 101 and the first electrode 50 on the first isolation structure 30, thus avoiding poor disconnection. In a specific embodiment, the first isolation structure 30 is an inverted trapezoidal structure. The first electrode 50 will be disconnected once at the sidewall position of the first isolation structure 30. However, when the thickness of the first isolation structure 30 is insufficient, there is a 30%-66% probability of poor disconnection. Therefore, this application further increases the probability of disconnection between the first electrode and the pixel opening 101 by placing the second isolation structure 40 at the position between the pixel opening 101 and the first isolation structure 30, reducing poor disconnection caused by the thickness and angle of the first isolation structure 30. In this embodiment, a primary isolation is achieved through the first isolation structure 30, and a secondary isolation is achieved through the second isolation structure 40. This significantly increases the isolation probability, reduces the yield of defective isolation, and thus improves the yield of the display panel. In other embodiments, the yield of the first electrode isolation can also be improved by enhancing the isolation capability of the second isolation structure 40 (e.g., by creating a deeper groove). The first isolation structure 30 can be set as a common spacer structure, and is not limited here.

[0032] In one specific embodiment, the second isolation structure 40 includes at least one first groove 401. Preferably, the first groove 401 is a trapezoidal groove with an opening smaller than its bottom. Specifically, the first groove 401 is trapezoidal in shape, with its opening on the side away from the pixel definition layer 20 and its bottom on the side close to the pixel definition layer 20. In the direction parallel to the pixel definition layer 20 (or on the plane), the area of ​​the opening is smaller than the area of ​​the bottom, thus forming a first groove 401 that is narrower at the top and wider at the bottom. In other words, the first groove 401 tapers in a direction away from the pixel definition layer 20. In this embodiment, by setting the first groove 401 to a trapezoidal shape, the sidewall of the second isolation structure 40 forms an inwardly tapering slope, thereby enabling the first electrode 50 to be further disconnected at the second isolation structure 40 during subsequent vapor deposition of the first electrode 50. In other embodiments, the second isolation structure 40 may include N first grooves 401, where N≥1, and the shapes of the first grooves 401 may be identical.

[0033] In a second specific embodiment, the second isolation structure 40 includes a first groove 401, and the first groove 401 further includes at least one second groove 402. Please refer to further details. Figure 2 , Figure 2This is a schematic diagram of the structure of the second embodiment of the display panel of this application. Figure 2 As shown, at least one first groove 401 is provided with one or more second grooves 402, or each first groove 401 is provided with at least one or more second grooves 402. In this embodiment, the shape of the second groove 402 may be the same as or different from the shape of the first groove 401, and is not limited thereto. The size of the second groove 402 is much smaller than the size of the first groove 401.

[0034] In the above embodiments, preferably, the first isolation structure 30 is an inverted trapezoidal structure that is wider at the top and narrower at the bottom, thereby enabling the first electrode 50 to form a primary isolation on the sidewall of the first isolation structure 30. In specific application embodiments, the thickness of the first isolation structure 30 is 1.2 μm or 2.6 μm, or between. Experiments have shown that when the thickness of the first isolation structure 30 is 1.2 μm, the first electrode has a 66% probability of isolation failure, and when the thickness of the first isolation structure 30 is 2.6 μm, there is a 30% probability of isolation failure. Therefore, specifically, isolation failure may occur when the thickness of the first isolation structure 30 is less than 3 μm.

[0035] The second isolation structure 40 includes an isolation film layer 411 located between the pixel opening 101 and the first isolation structure 30 and covering the surface of the pixel definition layer 20, and at least one first groove 401 located in the isolation film layer 411. The isolation film layer 411 is formed of one or more substances such as nitride, oxide, metal, or non-metal. In a specific embodiment, the isolation film layer 411 may cover the entire surface of the pixel definition layer 20, or the entire surface of the pixel definition layer 20 except for the first isolation structure 30, which is not limited here. The first groove 401 is disposed in the isolation film layer 411 between the pixel opening 101 and the first isolation structure 30. Specifically, the first groove 401 is formed by etching the isolation film layer 411.

[0036] In one specific embodiment, the thickness of the isolation film layer 411 is not less than the height of the first isolation structure 30. That is, the thickness of the second isolation structure 40 is not less than the height of the first isolation structure 30. Specifically, the thickness of the isolation film layer 411 is not less than 100 angstroms (1 angstrom = 10⁻⁶ Å). ∧-10 (meters). When the thickness of the isolation membrane layer 411 is not less than 100 angstroms, the depth of the second groove 402 is not less than 50 angstroms.

[0037] In the above embodiment, the substrate 10 is specifically an array substrate. A plurality of anodes 11 are disposed on the surface of the substrate 10. A pixel definition layer 20 is formed on the surface of the substrate 10, exposing a portion of the anodes 11 to form a plurality of pixel openings 101. Before the first electrode 50 is formed within the pixel opening 101, an OLED layer 60 (including an organic light-emitting layer, a hole layer, etc.) is formed within at least the pixel opening 101. Preferably, the thickness of the isolation film layer 411 is not less than the thickness of the OLED layer 60 to ensure that the first electrode 50 can be disconnected within the first groove 401.

[0038] In the above embodiment, the isolation film layer 411 can be disposed on the entire surface of the pixel definition layer 20, and the first isolation structure 30 is disposed on the surface of the isolation film layer 411 (that is, the second isolation structure 40). Compared with the solution of fabricating the second isolation structure 40 on one side of the first isolation structure 30, this solution can fabricate the first isolation structure 30 on the surface of the isolation film layer 411, which can increase the height difference between the first isolation structure 30 and the first electrode 50 in the pixel opening 101 and the first electrode 50 on the surface of the pixel definition layer 20, thereby increasing the probability that the first electrode 50 will break at the sidewall of the first isolation structure 30.

[0039] In other embodiments, a groove can be formed in the pixel definition layer 20 between the pixel opening 101 and the first isolation structure 30 to obtain a second isolation structure 40 having at least a first groove 401; this is not limited here. In other embodiments, the second isolation structure 40 can also be a structure of other shapes, as long as it has the function of isolating the first electrode, such as a boss with a height higher than the first isolation structure 30; this is not limited here.

[0040] In one specific embodiment, one sidewall of the first groove 401 of the second isolation structure 40 may also overlap with the sidewall of the first isolation structure 30, that is, the first groove 401 is set close to the first isolation structure 30, which can also increase the height difference between the first isolation structure 30 and the first electrode 50 on the surface of the pixel definition layer 20. This is not specifically limited here.

[0041] This application also provides a method for manufacturing a display panel; please refer to the details below. Figure 3 , Figure 3 This is a schematic flowchart illustrating an embodiment of the method for manufacturing a display panel according to this application. Figure 3 As shown, the method for manufacturing the display panel includes:

[0042] Step S31: Provide a substrate.

[0043] In one specific embodiment, the substrate is an array substrate, and pixel circuits are disposed within the substrate. Multiple anodes are disposed on the surface of the substrate to provide light-emitting voltage for subsequent OLED layers.

[0044] Step S32: Form a pixel definition layer with pixel openings on the surface of the substrate.

[0045] This step specifically includes: forming a pixel definition layer on the entire surface of the substrate, and then patterning and etching the pixel definition layer to expose multiple partial / complete anodes, forming multiple pixel openings. These pixel openings are used to form the light-emitting areas of the subsequently fabricated OLED.

[0046] Step S33: Create the first isolation structure on the surface of the pixel definition layer.

[0047] The first isolation structure can be an inverted trapezoid, which is not limited here.

[0048] Step S34: Create a second isolation structure on the pixel definition layer surface between the first isolation structure and the pixel opening.

[0049] In one specific embodiment, this step specifically includes: Step 1, depositing an isolation film between at least the first isolation structure and the pixel opening; Step 2, using an etching process to etch the isolation film between the first isolation structure and the pixel opening to form at least one first groove, thereby obtaining a second isolation structure having at least one first groove. In another specific embodiment, Step 2 is fabricated in two steps, as detailed below.

[0050] In another specific embodiment, this step specifically includes step 1, depositing an isolation film between at least the first isolation structure and the pixel opening; step 2, using a semi-etching process to semi-etch the isolation film between the first isolation structure and the pixel opening to obtain a first groove; step 3, using a plasma bombardment process to bombard a plurality of second grooves in the first groove to obtain a second isolation structure in the first groove with a plurality of second grooves.

[0051] Step 1 includes depositing an isolation film of a predetermined thickness. Preferably, the thickness of the isolation film is not less than 100 angstroms. The depth of the first groove is not less than 50 angstroms.

[0052] Etching processes include wet etching, dry etching, and laser etching.

[0053] Specifically, step 2 above, which involves etching to form the first groove, further includes controlling the etching angle to create a groove with an opening smaller than the bottom (i.e., an inwardly recessed groove). The second groove is a pit, and the shapes of multiple second grooves can vary.

[0054] The isolation film is formed from one or more substances selected from nitrides, oxides, metals, or nonmetals.

[0055] Step S35: Deposit the first electrode to disconnect the first electrode at the first isolation structure and / or the second isolation structure.

[0056] This step specifically includes: depositing a first electrode across the entire surface of the substrate, so that the first electrode can be disconnected at the second isolation structure and / or the sidewall of the first isolation structure. This increases the probability of the pixel's first electrode disconnecting from the first electrode on the surface of the first isolation structure, thereby improving the yield of the first electrode isolation.

[0057] Prior to this step, the process includes: evaporating / depositing an OLED layer at least within the pixel opening. The OLED layer includes an organic light-emitting layer, a hole transport layer, an electron transport layer, etc. In one specific embodiment, the OLED layer can be evaporated over its entire surface, specifically including evaporating it onto the surface of a portion of the pixel definition layer, etc., without limitation.

[0058] The thickness of the first electrode is at least thinner than the thickness of the insulating film or half the thickness of the insulating film, so as to ensure that the first electrode with poor ductility can be disconnected within the groove of the second insulating structure.

[0059] It should be noted that the first electrode on the surface of the first isolation structure is generally connected to the touch traces in the touch panel, thus requiring the first electrode on the surface of the first isolation structure to be isolated from the first electrode in the pixel opening area.

[0060] In other specific embodiments, step S33 can be after step S34, that is, the second isolation structure is made first, and then the first isolation structure is made on the isolation film.

[0061] The beneficial effects of this application are: by setting a second isolation structure that isolates the first electrode between the pixel opening and the first isolation structure, the probability of isolation between the first electrode in the pixel opening and the first electrode on the first isolation structure is increased, the poor isolation of the first electrode due to insufficient thickness of the first isolation structure is reduced, and the situation where the isolation is not clean is caused, thereby improving the yield of the display panel manufacturing.

[0062] The above are merely embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A display panel, characterized in that, The display panel includes: substrate; A pixel definition layer is disposed on the surface of the substrate and forms multiple pixel openings; A first isolation structure is disposed on the surface of the pixel definition layer opposite to the substrate; A second isolation structure is disposed between the pixel opening and the first isolation structure; The first electrode is disposed on the side of the pixel definition layer surface facing away from the substrate, and is disconnected at the first isolation structure and / or the second isolation structure.

2. The display panel according to claim 1, characterized in that, The partition structure includes at least one first groove. Preferably, the cross-section of the first groove along the thickness direction of the substrate is trapezoidal.

3. The display panel according to claim 2, characterized in that, At least one of the first grooves further includes at least one second groove, the size of which is smaller than the size of the first groove; Preferably, the second groove is located on the bottom surface of the first groove; Preferably, the second groove has the same shape as the first groove.

4. The display panel according to any one of claims 1 to 3, characterized in that, The first isolation structure is an inverted trapezoid.

5. The display panel according to claim 1, characterized in that, The display panel further includes an isolation film layer disposed between the pixel opening and the first isolation structure, wherein at least one first groove is formed in the isolation film layer; Preferably, the thickness of the isolation membrane layer is less than the height of the first isolation structure; Preferably, the thickness of the isolation membrane layer is not less than 100 angstroms.

6. The display panel according to claim 5, characterized in that, The first groove contains a portion of the isolation film layer, and at least one second groove is formed in the portion of the isolation film layer; Preferably, the thickness of the residual portion of the isolation membrane layer is half the thickness of the isolation membrane layer.

7. A method for manufacturing a display panel, characterized in that, The method includes: Provide a substrate; A pixel definition layer with pixel openings is formed on the surface of the substrate; A first isolation structure is fabricated on the surface of the pixel definition layer; A second isolation structure is fabricated on the surface of the pixel definition layer between the first isolation structure and the pixel opening; A first electrode is vapor-deposited to disconnect the first electrode at the first isolation structure and / or the second isolation structure.

8. The method for manufacturing a display panel according to claim 7, characterized in that, The step of fabricating a second isolation structure on the surface of the pixel definition layer between the first isolation structure and the pixel opening includes: An isolation film is deposited between at least the first isolation structure and the pixel opening; An etching process is used to etch the isolation film between the first isolation structure and the pixel opening to form at least one first groove, thereby obtaining a second isolation structure having at least one first groove.

9. The method for manufacturing a display panel according to claim 8, characterized in that, The step of etching the isolation film between the first isolation structure and the pixel opening using an etching process to form at least one first groove further includes: The first groove is obtained by semi-etching the isolation film using a semi-etching process. Multiple second grooves are formed in the first groove by using plasma bombardment technology, resulting in at least one second isolation structure having multiple second grooves in the first groove.

10. The method for manufacturing a display panel according to claim 7, characterized in that, The barrier film comprises one or more of nitrides, oxides, metals, or non-metals; Preferably, the thickness of the barrier film is not less than 100 angstroms; Preferably, the depth of the first groove is not less than 50 angstroms.

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