Chip packaging structure based on conventional COB copper substrate
By setting positive electrode pads on the COB copper substrate that match the chip substrate, direct die bonding and simplified bonding process are achieved, solving the problem of chip leakage and short circuit caused by conductive adhesive overflow, improving packaging yield and reliability, and optimizing heat dissipation performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN CHENGSHUO OPTOELECTRONICS CO LTD
- Filing Date
- 2026-03-04
- Publication Date
- 2026-05-19
AI Technical Summary
Existing technologies require additional spacers when packaging chips with a single electrode at the bottom, which can cause conductive adhesive to overflow, leading to chip leakage and short circuits, resulting in low packaging yield and poor reliability.
A positive electrode pad matching the chip substrate is set on the COB copper substrate, which allows the chip to be directly die bonded, eliminating the need for additional pads. The negative electrode of the chip is connected to the negative electrode of the substrate through bonding wires, simplifying the process and allowing precise control of the conductive adhesive range.
It improves packaging yield and long-term reliability, simplifies production processes, optimizes heat dissipation performance, and ensures stable chip operation under high power.
Smart Images
Figure CN122069869A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor packaging technology, specifically to a chip packaging structure based on a conventional COB copper substrate. Background Technology
[0002] In the field of semiconductor lighting and packaging, chip-on-board (COB) packaging technology is widely used due to its advantages such as high integration, excellent heat dissipation, and high luminous efficiency. In the conventional COB packaging process, after the chip is fixed onto a copper substrate through the die bonding process, the critical electrical connection step needs to be completed through wire bonding. Specifically, this process involves using precision metal wires (such as gold wires) to connect the tiny positive and negative electrodes on the chip to the corresponding pre-set pads on the substrate one by one, thereby constructing a complete current path.
[0003] However, when processing chips with specific electrode structures, especially vertically oriented chips that use the entire substrate as a single electrode (e.g., the positive electrode), the aforementioned conventional processes reveal their inherent limitations. To achieve series or parallel connection of multiple such chips, existing technologies typically require adding an intermediate pad, such as a silicon wafer, at the bottom of the chip as a carrier for the common electrode. The chip is fixed to this pad using conductive silver paste, but controlling the amount of silver paste used and its overflow is a significant challenge in practice. Excessive conductive silver paste can easily flow and spread during curing, forming an unintended conductive layer on the chip's sides, leading to leakage or even short circuits between the chip's positive and negative electrodes or between the chip and adjacent circuitry. This short-circuit hazard, caused by the difficulty in process control, not only directly reduces product yield and increases manufacturing costs but also poses a serious threat to the long-term operational reliability of the packaged product. Summary of the Invention
[0004] To address the shortcomings of existing technologies, this invention provides a chip packaging structure based on a conventional COB copper substrate. This solves the problem that existing technologies, when packaging chips with a single electrode at the bottom, are prone to conductive adhesive overflow due to the need for additional spacers, which can lead to chip leakage, short circuits, low packaging yield, and poor reliability.
[0005] To achieve the above objectives, the present invention provides the following technical solution: a chip packaging structure based on a conventional COB copper substrate, comprising: A substrate having a positive electrode pad and a negative electrode connection area disposed thereon; A chip having a positive electrode and a negative electrode, the chip's substrate serving as its positive electrode, the chip being directly die-bonded onto the positive electrode pad, thereby forming an electrical connection between its positive electrode and the positive electrode pad; Bonding wires electrically connect the negative electrode of the chip to the negative electrode connection area on the substrate.
[0006] Preferably, the substrate is a COB copper substrate.
[0007] Preferably, the chip is an LED chip.
[0008] Preferably, the chip is die-bonded to the positive electrode pad through a conductive adhesive layer to achieve an electrical connection between the positive electrode of the chip and the positive electrode pad.
[0009] Preferably, the bonding wire is a gold wire.
[0010] Preferably, the substrate is further provided with a positive electrode trace connected to the positive electrode pad and a positive electrode input terminal connected to the positive electrode trace.
[0011] Preferably, the negative electrode connection area on the substrate includes a negative electrode trace that is connected to the negative electrode output terminal.
[0012] Preferably, the substrate is further provided with at least one positioning hole for die bonding and alignment of the chip.
[0013] Preferably, it also includes a mounting plate, wherein the substrate is disposed on the mounting plate.
[0014] Preferably, the mounting plate is provided with at least one mounting hole.
[0015] This invention provides a chip packaging structure based on a conventional COB copper substrate. It offers the following advantages:
[0016] 1. This invention structurally eliminates the potential for chip leakage or short circuits caused by conductive adhesive overflow. In existing technologies, the bottom silicon wafer introduced to connect single-electrode chips is precisely the source of uncontrolled silver paste leakage and short circuits. This invention, by directly setting a positive electrode pad on a copper substrate that matches the chip substrate, allows the chip to be directly fixed there, completely eliminating the need for additional pad structures. This design precisely limits the application of conductive adhesive to between the chip and the pad, physically isolating the possibility of accidental contact between the positive and negative electrodes, thereby greatly improving the packaging yield and long-term operational reliability.
[0017] 2. In traditional packaging processes, wire bonding is required for the positive and negative electrodes of the chip separately. This solution combines the electrical connection of the positive electrode and the mechanical fixation of the chip into one step by directly conducting and bonding the positive electrode to the positive electrode pad of the chip substrate. This completely eliminates the bonding process of the positive electrode lead. In production, only one bonding wire operation is required from the negative electrode of the chip to the negative electrode connection area of the substrate. Halving the process not only shortens the production cycle, but also reduces the risk of product scrap due to wire bonding errors.
[0018] 3. This packaging structure also optimizes the heat conduction path of the chip, which helps to improve the heat dissipation performance and lifespan of the device. Heat is a key factor affecting the luminous efficacy and lifespan of LED chips. This invention allows the chip substrate to be directly attached to a COB copper substrate with excellent thermal conductivity, eliminating the need for additional dielectric layers such as silicon wafers with relatively poor thermal conductivity. This more direct and shorter heat dissipation channel can conduct the heat generated during chip operation more quickly, effectively suppressing light decay caused by overheating and ensuring its stability and long-term durability under high power. Attached Figure Description
[0019] Figure 1 This is a perspective view of the present invention; Figure 2 This is a schematic diagram of the present invention.
[0020] The components are: 1. Mounting plate; 2. Mounting hole; 3. Substrate; 4. Negative electrode trace; 5. Positive electrode pad; 6. Negative electrode output terminal; 7. Positive electrode input terminal; 8. Positive electrode trace; 9. Positioning hole; 10. Chip; 11. Bonding wire. Detailed Implementation
[0021] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0022] Please see the appendix Figure 1 and attached Figure 2 This invention provides a chip packaging structure based on a conventional COB copper substrate, including a substrate 3. The substrate 3 has a positive electrode pad 5, which is a pre-defined conductive contact area on the substrate for the positive electrode of a chip 10. The size of the positive electrode pad 5 matches the substrate of the chip 10, and it is used to fix the chip 10 and directly introduce positive current through conductive adhesive. The chip 10 is a core semiconductor device that realizes photoelectric conversion. It adopts a special electrode structure with its bottom as the positive electrode. After being energized, the internal PN junction recombines and emits light under forward bias, converting electrical energy into light energy. The chip 10 has a positive electrode and a negative electrode. The substrate of the chip 10 serves as its positive electrode. The chip 10 is directly bonded to the positive electrode pad 5, forming an electrical connection between its positive electrode and the positive electrode pad 5. A bonding wire 11 serves as a conductive bridge connecting the negative electrode of the chip 10 to the negative electrode trace 4 on the substrate. The bonding wire 11 electrically connects the negative electrode of the chip 10 to the negative electrode connection area on the substrate 3.
[0023] Specifically, by directly bonding the positive electrode of the chip 10 to the positive electrode pad 5 of the substrate 3, the mechanical fixation of the chip and the electrical connection of the positive electrode are combined into one. Then, a bonding wire 11 is used to connect the negative electrode at the top of the chip, thus constructing a complete, reliable current loop that eliminates the need for the traditional positive electrode bonding process.
[0024] The substrate 3 is a COB copper substrate, and the chip 10 is an LED chip. The chip 10 is die-bonded to the positive electrode pad 5 through a conductive adhesive layer to achieve an electrical connection between the positive electrode of the chip 10 and the positive electrode pad 5. The bonding wire 11 is a gold wire. The substrate 3 is also provided with a positive electrode trace 8 connected to the positive electrode pad 5. The positive electrode trace 8 is a conductive pattern circuit formed on the surface of the substrate 3, and its function is to efficiently and with low resistance transmit the current from the positive electrode of the external power supply from the positive electrode input terminal 7 to the positive electrode pad 5 area. The positive electrode trace 8 is connected to the positive electrode input terminal 7, which is the interface between the package structure and the positive electrode of the external power supply. The negative electrode connection area on the substrate 3 includes a negative electrode trace. 4. The negative electrode trace 4 is a circuit part on the substrate 3 used to conduct negative electrode current. The current drawn from the bonding wire 11 is collected and guided to the unified negative electrode output terminal 6 to complete the current return path. The negative electrode trace 4 is connected to the negative electrode output terminal 6, which is the interface between the package structure and the negative electrode of the external power supply. It unifies the negative electrode current collected inside the substrate 3 to form a complete electrical circuit and is the end point of the current outflow. The substrate 3 is also provided with at least one positioning hole 9 for die bonding and alignment of the chip 10. The positioning hole 9 is a mechanical reference feature on the substrate 3 used to assist the production equipment in high-precision alignment, ensuring that the chip 10 can be accurately placed on the preset pad position during the die bonding process.
[0025] Specifically, the entire chip 10 packaging structure is concretized and completed at the substrate 3 level. It is introduced from the positive input terminal 7 through the positive trace 8 and conducted to the negative output terminal 6 through the negative trace 4. At the same time, by limiting the chip 10 type, connection material and positioning hole 9 for auxiliary production, the reliability of the solution in electrical performance and the high precision and operability in the actual manufacturing process are ensured.
[0026] It also includes a mounting plate 1, which serves as the support and heat dissipation base for the entire package structure. It is usually made of a metal material with better thermal conductivity, providing mechanical protection for the substrate 3 and assisting in conducting away the heat generated by the chip 10. The substrate 3 is disposed on the mounting plate 1, which has at least one mounting hole 2. The mounting hole 2 is a through hole provided on the mounting plate 1, which provides an interface for mechanical fixing. Users can use screws or other fasteners to firmly install the entire package module on the application device or heat sink.
[0027] Specifically, the standardized mounting holes 2 solve the problem of reliably fixing the entire module to external devices, thus transforming the packaging structure from a core component into a complete functional module that can be directly integrated and applied.
[0028] Working principle: After power is applied, the current in the chip 10 package structure enters from the positive terminal of the external power supply, flows through the positive input terminal 7 and the positive trace 8 on the substrate 3, and finally converges at the positive pad 5. Since the conductive substrate of the LED chip 10 is directly fixed on the positive pad 5, the current does not need to pass through the traditional bonding wire 11 and is directly introduced from the substrate 3 into the positive region of the PN junction of the chip 10, providing the necessary forward driving current for the chip 10 to emit light.
[0029] Driven by an electric current, electrons and holes recombine inside the LED chip 10, releasing energy in the form of photons, thus emitting light. After the photoelectric conversion is completed, the current continues to flow inside the chip 10, reaching the negative electrode at its top. At this point, a bonding wire 11 leads the current from the negative electrode of the chip 10 and safely transmits it to the pre-defined negative electrode trace 4 area on the substrate 3, completing the transfer of current from the chip 10 body to the negative electrode path of the substrate 3.
[0030] Finally, the current is conducted along the negative electrode trace 4 to the negative electrode output terminal 6, and flows back to the negative electrode of the external power supply from there, forming a complete and closed electrical circuit, ensuring that the LED chip 10 can work continuously and stably and emit light. In the entire package structure, the positioning hole 9 ensures the accuracy of chip 10 mounting during production, while the mounting plate 1 and its mounting holes 2 provide convenience for the final fixation and application of the entire module.
[0031] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A chip packaging structure based on a conventional COB copper substrate, characterized in that, include: The substrate (3) is provided with a positive electrode pad (5) and a negative electrode connection area; Chip (10), the chip (10) has a positive electrode and a negative electrode, the substrate of the chip (10) serves as its positive electrode, the chip (10) is directly die bonded to the positive electrode pad (5), so that its positive electrode and the positive electrode pad (5) form an electrical connection; Bonding wire (11) electrically connects the negative electrode of the chip (10) to the negative electrode connection area on the substrate (3).
2. The chip packaging structure based on a conventional COB copper substrate according to claim 1, characterized in that, The substrate (3) is a COB copper substrate.
3. A chip packaging structure based on a conventional COB copper substrate according to claim 1, characterized in that, The chip (10) is an LED chip.
4. A chip packaging structure based on a conventional COB copper substrate according to claim 1, characterized in that, The chip (10) is die-bonded to the positive electrode pad (5) through a conductive adhesive layer to achieve an electrical connection between the positive electrode of the chip (10) and the positive electrode pad (5).
5. A chip packaging structure based on a conventional COB copper substrate according to claim 1, characterized in that, The bonding wire (11) is a gold wire.
6. A chip packaging structure based on a conventional COB copper substrate according to claim 1, characterized in that, The substrate (3) is also provided with a positive electrode trace (8) connected to the positive electrode pad (5) and a positive electrode input terminal (7) connected to the positive electrode trace (8).
7. A chip packaging structure based on a conventional COB copper substrate according to claim 1, characterized in that, The negative electrode connection area on the substrate (3) includes a negative electrode trace (4) which is connected to the negative electrode output terminal (6).
8. A chip packaging structure based on a conventional COB copper substrate according to claim 1, characterized in that, The substrate (3) is also provided with at least one positioning hole (9) for die bonding and alignment of the chip.
9. A chip packaging structure based on a conventional COB copper substrate according to claim 1, characterized in that, It also includes a mounting plate (1), on which the substrate (3) is disposed.
10. A chip packaging structure based on a conventional COB copper substrate according to claim 9, characterized in that, The mounting plate (1) is provided with at least one mounting hole (2).