Integrated level components with active / passive regions

Abstract

The invention relates to an integrated power level component with active / passive regions. An assembly described herein includes a first semiconductor chip substrate including an active region and a passive region, the active region of the first semiconductor chip substrate being fabricated to include a first circuit arrangement, the first circuit arrangement being an active circuit arrangement, the passive region of the first semiconductor chip substrate being devoid of the active circuit arrangement; and a second circuit arrangement coupled to the first semiconductor chip substrate, the second circuit arrangement being secured to a passive region of the first semiconductor chip substrate, the passive region being operable to receive and transfer heat generated by the second circuit arrangement.

Description

Technical Field

[0001] This disclosure relates to integrated power stage components, and particularly to integrated power stage components having active / passive regions. Background Technology

[0002] Conventional power stage components can be configured to include multiple switches, such as high-side and low-side switches, which are operated to control current delivery to circuit components, such as inductors or multiple circuit components. In addition to multiple switches, conventional power stages can also include driver circuitry to control the multiple switches.

[0003] One type of conventional power stage component includes a so-called side-by-side solution, in which multiple corresponding switches in the power stage are arranged in a single circuit layer. Generally, side-by-side solutions for power stage components offer good thermal performance. However, side-by-side solutions inherently possess high stray inductance, which negatively impacts the performance associated with conventional power stage components.

[0004] Another type of conventional power stage component includes a so-called circuit component stacking solution, where circuit components are stacked on top of each other to fabricate a corresponding power converter component. This conventional stacking solution offers a smaller circuit footprint and reduced parasitic effects. However, in conventional power stage components, the top chip heats the corresponding top chip in the stack, potentially causing damage to it. Summary of the Invention

[0005] The implementation of clean energy (or green technologies) is crucial for reducing our impact on the environment as humans. Generally speaking, clean energy encompasses any evolving methods and materials that reduce the overall environmental toxicity of energy consumption.

[0006] This disclosure includes observations of the desire to fabricate switching circuit components to achieve better power efficiency and compactness. To this end, one or more examples discussed herein may provide one or more benefits, such as: - Minimum coverage area for proximity to loads (such as processors or other circuit components), - Minimal parasitic effects for high efficiency - Good thermal performance for high power density.

[0007] As a more specific example, components such as those associated with the power converter discussed herein can be configured to include: a first semiconductor chip substrate comprising an active region and a passive region. The active region of the first semiconductor chip substrate can be fabricated to include a first circuit device, wherein the first circuit device is a so-called active circuit device that potentially supports current flow. The passive region of the first semiconductor chip substrate may not have an active circuit device. A second circuit device of the component can be coupled to the first semiconductor chip substrate. The second circuit device can be attached to the passive region of the first semiconductor chip substrate, the passive region being operable for receiving and transferring heat generated by the second circuit device.

[0008] Note that a passive region, such as one without the active circuitry discussed herein, can be a region in which no current flows, because there is no active circuitry in the passive region. In one example, the absence of current flow through the passive region of the first semiconductor chip substrate results in the passive region not generating heat. In this instance, the passive region supports a good flow of heat (i.e., thermal energy) from the second circuitry to an entity such as the main substrate to which the first semiconductor chip substrate is attached.

[0009] In one example, the second circuit device may include a driver circuit device coupled to the first semiconductor chip substrate, the driver circuit device being operable for controlling the operation of the first circuit device. The first circuit device may include a first switch controlled by the driver circuit device; the second circuit device may include a second switch controlled by the driver circuit device.

[0010] In another example, the first circuit device may be a first vertical field-effect transistor (VFET). The second circuit device may be a second vertical field-effect transistor (FET). Furthermore, a first metal layer may be disposed on a first surface of the first semiconductor chip substrate; and a second metal layer may be disposed on a second surface of the first semiconductor chip substrate, the second surface being positioned opposite the first surface. The first circuit device may be a first switch. The source node of the first switch may be directly coupled to the first metal layer; the drain node of the second switch circuit device may be directly coupled to the first metal layer.

[0011] Furthermore, note that the second region of the first semiconductor chip substrate can be configured to provide a thermally conductive path between the first surface of the first semiconductor chip substrate and the second surface of the first semiconductor chip substrate via the second region.

[0012] In other examples, the first semiconductor chip substrate may be a first monolithic semiconductor substrate including active and passive regions; the second circuit device may include a second semiconductor chip substrate, which is a second monolithic semiconductor substrate.

[0013] According to another example, the first circuit device may be a first switch; the second circuit device may be a second switch. The component may also include a conductive path coupling the first switch and the second switch, the conductive path directly coupling the source node of the first switch to the drain node of the second switch.

[0014] Other examples discussed herein include embodiments in which the passive region comprises a first portion and a second portion separated from a portion of the active region. The first circuit device may be a first switch. The second circuit device may include a second switch and a driver circuit device operable to control the operation of the first and second switches. The driver circuit device may be coupled over the first portion of the passive region to the surface of the first semiconductor chip substrate, and the second switch may be coupled over the second portion of the passive region to the surface of the first semiconductor chip substrate.

[0015] The active region of the first semiconductor chip substrate is operable for generating heat; and the passive region of the first semiconductor chip substrate is not operable for generating heat.

[0016] Another example discussed herein includes a device comprising a main substrate and components as previously discussed. The components are coupled to the main substrate, wherein a first circuit device can be fixed to the surface of the main substrate, and a first semiconductor chip substrate can be disposed between the second circuit device and the main substrate.

[0017] In another example, the first circuit arrangement is a high-side switch of a power converter. The second circuit arrangement is a low-side switch of a power converter. The arrangement may further include: i) a first conductive path extending from the surface of the main substrate to a first node of the high-side switch, wherein the high-side switch is disposed between the first node of the high-side switch and the surface of the main substrate; and ii) a second conductive path extending from the surface of the main substrate to a first node of the low-side switch, wherein a combination of the low-side switch and the first semiconductor chip substrate is disposed between the first node of the low-side switch and the surface of the main substrate.

[0018] In another example, the first circuit device may be a low-side switch of a power converter; the second circuit device may be a high-side switch of a power converter. The device may also include: i) a first conductive path extending from the surface of the main substrate to a first node of the low-side switch, wherein the low-side switch is disposed between the first node of the low-side switch and the surface of the main substrate; and ii) a second conductive path extending from the surface of the main substrate to the first node of the high-side switch, wherein a combination of the high-side switch and the first semiconductor chip substrate is disposed between the first node of the high-side switch and the surface of the main substrate.

[0019] In another example, the components discussed herein may include a conductive path extending between a first node of a first switch and a first node of a second switch; and the first node of the first switch may be disposed between a first semiconductor chip substrate and the conductive path. A second circuit arrangement may be disposed between the conductive path and the first semiconductor chip substrate.

[0020] In one example, a first semiconductor chip substrate is disposed in a first material layer of a component stack. The component further includes: a first conductive path disposed in the first material layer adjacent to the first semiconductor chip substrate, the conductive path being coupled to a first node of a second circuit device; and a second conductive path directly connecting the first circuit device and the second circuit device in series. The first circuit device may include a first switch; the second circuit device may include a second switch. A passive region of the first semiconductor chip substrate may be disposed in the first material layer between the first switch and the first conductive path; and the second circuit device may include a driver circuit device disposed adjacent to the second switch and above the passive region of the first semiconductor chip substrate.

[0021] Furthermore, a first circuit device in the active region of the first semiconductor chip substrate may be disposed between the passive region and the first conductive path; and a second circuit device may include a driver circuit device disposed above the passive region adjacent to the second switching circuit device.

[0022] According to another example, the component discussed herein may be configured to include a first conductive path that connects a first circuit device and a second circuit device in series, the first conductive path extending to the surface of a host substrate to which the component is attached.

[0023] Based on other examples discussed herein, the component may include a second conductive path; wherein a first portion of the second conductive path is a circuit node that provides connectivity between the second circuit device and a passive region of the first semiconductor chip substrate; and wherein a second portion of the second conductive path extends between the circuit node and the surface of the main substrate.

[0024] Other examples discussed herein include methods comprising: receiving a first semiconductor chip substrate including an active region and a passive region, the active region of the first semiconductor chip substrate being fabricated to include a first circuit device, the first circuit device being an active circuit device, and the passive region of the first semiconductor chip substrate having no active circuit device; and coupling a second circuit device to the first semiconductor chip substrate, the second circuit device being fixed to a second region of the first semiconductor chip substrate.

[0025] As discussed herein, the techniques described herein are well-suited for use in implementing one or more switching circuit components to control current delivery through multiple switches. However, it should be noted that the examples described herein are not limited to such applications, and the techniques discussed herein are also well-suited for other applications.

[0026] Additionally, it should be noted that although each of the different features, techniques, configurations, etc., herein may be discussed in different places within this disclosure, it is intended that each concept in the ideas may optionally be practiced independently or in combination with each other, where appropriate. Therefore, one or more of the inventions described herein can be implemented and viewed in many different ways.

[0027] Furthermore, it should be noted that this preliminary discussion (detailed description) exemplified herein does not intentionally specify every example and / or incremental novel aspect of this disclosure or the claimed invention(s). Rather, this brief description merely presents general examples and corresponding points of novelty relative to conventional art. For additional details and / or possible perspectives (arrangements) of the invention(s), the reader is directed to the detailed description section of this disclosure (which is an overview of examples) and the corresponding figures, which are discussed further below. Attached Figure Description

[0028] Figure 1 This is an example diagram illustrating a switching circuit implemented in the switching circuit assembly discussed in this article.

[0029] Figure 2 This is an example diagram illustrating a switching circuit assembly as discussed in this article.

[0030] Figure 3 This is an example diagram illustrating a switching circuit assembly as discussed in this article.

[0031] Figure 4 This is an example diagram illustrating a switching circuit assembly including a flip-chip driver circuit, as discussed in this article.

[0032] Figure 5 This is an example diagram illustrating a switching circuit assembly including a flip-chip driver circuit, as discussed in this article.

[0033] Figure 6 This is an example diagram illustrating an implementation of one or more metal clips in a switching circuit assembly as discussed herein.

[0034] Figure 7 This is an example diagram illustrating an implementation of one or more metal clips in a switching circuit assembly as discussed herein.

[0035] Figure 8This is an example diagram illustrating an implementation of the conductive paths of multiple switches in a connection switch circuit assembly as discussed herein.

[0036] Figure 9 This is an example diagram illustrating an implementation of the conductive paths of multiple switches in a connection switch circuit assembly as discussed herein.

[0037] Figure 10 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0038] Figure 11 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0039] Figure 12 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0040] Figure 13 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0041] Figure 14 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0042] Figure 15 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from multiple switches in a switching circuit assembly to a main substrate, as discussed herein.

[0043] Figure 16 This is an example diagram illustrating an embodiment of a first conductive path that provides electrical connectivity from multiple switches in a switching circuit assembly to a main substrate, as discussed herein, and an embodiment of a second conductive path that provides input voltage to the switches in the switching circuit assembly.

[0044] Figure 17 This is an example method of manufacturing a switching circuit component as discussed in this article.

[0045] The foregoing and other objects, features, and advantages of the invention will become apparent from the more specific description of the preferred examples herein. As illustrated in the accompanying drawings, the same reference numerals refer to the same parts throughout the different views. The drawings are not necessarily to scale; rather, the emphasis is on illustrative examples, principles, concepts, etc. Detailed Implementation

[0046] Now, more specifically, Figure 1This is an example diagram illustrating a switching circuit as described herein for use in a switching circuit assembly.

[0047] In this example, such as Figure 1 The switch circuit 101 shown (such as those implemented via different examples of component 100 in the following figures and discussion) includes a controller 140, a driver circuit device 151, a first switch circuit device 131, a second switch circuit device 132, and an inductor L200.

[0048] In one example, a combination of switching circuit devices 131 and 132 is connected in series between a power supply 125 (input voltage source) that provides the input voltage (Vin) to the drain node D1 of switching circuit device 131. Switching circuit 101 can be referenced relative to a ground reference voltage 199. Switching node SW (such as a conductive path 122 made of metal or other suitable material) provides connectivity between switching circuit devices 131 and 132. Switching node SW also provides connectivity from switching circuit devices 131 and 132 to inductor L200.

[0049] It should also be noted that the switching circuit device and the corresponding switching circuit 101 discussed herein can be implemented in any suitable manner. In one example, the switching circuit device 131 is a first field-effect transistor (or a plurality of transistors connected in parallel) which includes a gate node G1, a drain node D1, and a source node S1. In a similar manner, the switching circuit device 132 can be a second field-effect transistor (or a plurality of transistors connected in parallel) which includes a gate node G2, a drain node D2, or a source node S2.

[0050] As also shown in the figure, conductive path 121 (such as metal or other suitable material) provides electrical connectivity between input voltage source 125 and drain node D1 of switching circuit device 131. As previously discussed, source node S1 of switching circuit device 131 can be directly connected to drain node D2 of switching circuit device 132 via switching node SW (such as one or more conductive paths including conductive path 122). Furthermore, source node S2 of switching circuit device 132 can be directly connected to ground reference 199, such as via conductive path 123.

[0051] During operation, controller 140 generates control signals 105 supplied to driver circuitry 151. The state of control signals 105 generated by controller 140 may depend on feedback 107, such as an input indicating the output voltage 123 supplied to dynamic load 118. Control signals 105 indicate how to control the corresponding switching circuitry 131 and 132. Driver circuitry 151 converts control signals 105 into control signals S11 and S12.

[0052] Generally, in one example, the driver circuit device 151 switches between activating the switch circuit device 131 and activating the switch circuit device 132, such that the current through the corresponding inductor L200 is supplied by the current through the switch circuit device 131 or the current through the switch circuit device 132.

[0053] More specifically, during the first part of the switching control cycle, driver circuitry 151 generates a logic high control signal S11 (applied to gate node G1) to activate the corresponding switching circuitry 131, providing a low-impedance path between drain node D1 and source node S1. Additionally, during the first part of the switching cycle, driver circuitry 151 generates a logic low control signal S12 (applied to gate node G2) to deactivate the corresponding switching circuitry 132, providing a high-impedance path between drain node D2 and source node S2. Therefore, during the first part of the switching control cycle, control signal S11 is logic high and control signal S12 is logic low.

[0054] During the second part of the switching control cycle, driver circuitry 151 generates a logic low control signal S11 to deactivate the corresponding switching circuitry 131, providing a high-impedance path between drain node D1 and source node S1. Additionally, during the second part of the switching cycle, driver circuitry 151 generates a logic high control signal S12 to activate the corresponding switching circuitry 132, providing a low-impedance path between drain node D2 and source node S2. Therefore, during the second part of the switching control cycle, control signal S11 is logic low and control signal S12 is logic high.

[0055] During one or more third parts of the switching cycle (such as during the so-called dead time period), the driver circuit device 151 generates control signals S11 and S12 to simultaneously deactivate both the switching circuit device 131 and the switching circuit device 132 to the OFF state.

[0056] Furthermore, by way of a non-limiting example, note again that switching circuit 101 can be configured to provide feedback 107 indicating the corresponding magnitude of the output voltage 123 from inductor L220 to load 118. As previously discussed, controller 140 can be configured to use feedback 107 as the basis for determining how to control the switching of the respective switching circuit devices 131 and 132 via one or more control signals 105.

[0057] As discussed in this article, such as Figure 1 The switch circuit 101 shown is illustrated by way of non-limiting example only. Component 100 as discussed herein can be configured in any suitable manner to include switch circuit devices 131 and 132 to control the transfer of current supplied by the switch node SW to any circuit.

[0058] Figure 2 This is an example diagram illustrating a switching circuit assembly as discussed in this article.

[0059] In this general example, the component 100-1 manufactured by the manufacturer 150 includes a stack 198-1 of layers and / or circuit components that supports the transfer of current supplied by the switching node SW to a target component such as an inductor (L200) or other suitable entity. Figure 2 The diagram shows a switching circuit 101 supported by component 100-1 (such as a first instance of component 100). Figure 1 Examples of ).

[0060] Specifically, in Figure 2 In this example, the manufacturer 150 produces component 100-1 (such as...). Figure 1 A first example of component 100 includes a main substrate 141 (such as a printed circuit board or other suitable entity) disposed in layer L1, a conductive path 121 (such as a metal or other suitable material) disposed in layer L2, a substrate (such as a first semiconductor chip substrate 171) disposed in layer L3, conductive paths 127 and 122 (such as a metal and other suitable material) disposed in layer L4, a conductive material 122-1 disposed in layer L5, a substrate (such as a second semiconductor chip substrate 172) disposed in layer L6, and a conductive material such as a gate node G2 and a source node layer such as that associated with a source node S2 in layer 7.

[0061] Stacking 198-1 can include any number of layers of circuit components or materials.

[0062] Note that the drain node D1 associated with the active regions (131-1, 131-2, 131-3, etc.) of the first semiconductor chip substrate 171 is connected to the conductive path 121 fixed to the main substrate 141. Therefore, the semiconductor chip substrate 171 and the corresponding active regions are fixed to the conductive path 121 in layer L2.

[0063] As also shown in the figure, and as previously discussed, the driver circuitry 151 receives control signal 105 from controller 140. Controller 140 can be fixed to any suitable part of component 100-1, or controller 140 can be located outside of component 100-1. Based on the received control signal 105, controller 140 generates control signals S11 and S12 to control the corresponding switches 131 in layer L3 and 132 in layer L6.

[0064] More specifically, driver circuitry 151 generates a control signal S11 and transmits it over conductive path 161 (such as a wiring connection or other suitable entity) to the gate node G1 of a first switching circuitry 131 disposed in a first semiconductor chip substrate at layer L3. Main substrate 141 or other suitable entity such as power supply 125 supplies the input voltage Vin and corresponding current to conductive path 121, which also supplies the input voltage Vin and corresponding current to the drain node D1 (also referred to as drain node region D1) of switching circuitry 131, which is coupled to the active regions (131-1, 131-2, 131-3, etc.) of substrate 171 in layer L3 of stack 198-1.

[0065] Based on the state of the control signal S11 applied to the gate G1, a first switching circuit device 131 implemented in the active region of the substrate 171 in layer L3 selectively controls the transmission of the input voltage and corresponding current from the input voltage source 125 through the first switching circuit device 131 to the source node S1 and the corresponding conductive path 122. For example, the gate node G1 is driven with a logic high control signal S11, thereby creating a low-impedance path between the drain node D1 and the source node S1.

[0066] Additionally, driver circuitry 151 generates a control signal S12 and transmits it over a conductive path 162 (such as a wiring connection or other suitable circuit path) to the gate node G2 of a first switching circuitry 132 disposed in a second substrate 172 (such as a second semiconductor chip substrate at layer 6). The source node S2 of switch 132 is connected to a ground reference voltage 199. When the signal S12 to be supplied to gate node G2 is logic high, switching circuitry 132 operates in an ON state, providing a low-impedance path between drain node D2 and source node S2. In this example, source node S2 supplies ground reference voltage 199 to drain node D2 of switching circuitry 132 disposed in the active region of layer L6. Therefore, depending on the state of the control signal S12 applied to gate G2, the second switching circuitry 132 implemented in the active region of layer L6 controls the transfer of ground reference voltage 199 and the corresponding current through the second switching circuitry 132 from source node S2 to drain node D2.

[0067] The implementation of so-called active regions (such as regions 131-1, 131-2, 131-3, etc.) in substrate 171 (such as the first semiconductor chip substrate in layer L3) represents the corresponding switching circuit device 131. The implementation of so-called active regions in substrate 172 (such as the second semiconductor chip substrate in layer L6) represents the corresponding switching circuit device 132.

[0068] As also shown in the figure, the substrate 171 in layer L3 advantageously includes passive regions, such as regions without active circuitry. In one example, the passive regions do not support current flow. Therefore, such regions do not generate heat.

[0069] During the activation of the corresponding switching circuit device 131 to the ON state, the active regions 131-1, 131-2, 131-3, etc. in the substrate 171 support the flow of the corresponding current from the input voltage Vin and the corresponding current received at the drain node D1 through the active regions to the corresponding source node S1. Heat generated by the current flow through the switching circuit 131 is transferred from the active regions of the substrate 171 to the main substrate 141. In other words, during the activation of the switching circuit device 131, because the path from the corresponding drain D1 to the source S1 has a certain amount of ON resistance, even when the switching circuit device 131 is ON, the activated switching circuit device 131 and the corresponding active regions generate heat H1 that is transferred to the substrate 141.

[0070] It should also be noted that the operation of the driver circuitry 151 results in the generation of heat H2 transferred through the passive regions 131-6 of the substrate 171. The absence of active circuitry in the passive regions 131-6 reduces heat generation; otherwise, if the passive regions 131-6 were active circuitry providing a low-impedance path, this heat would need to be transferred to the main substrate 141. In other words, because the passive regions 131-6 do not contain active circuitry supporting current flow, they themselves do not generate heat during the activation of the switching circuitry 131, enabling the passive regions 131-6 to support the transfer of heat H2 generated by the driver circuitry 151 through the passive regions 131-6 to the main substrate 141.

[0071] It should also be noted that the operation of the driver circuitry 151 to the ON state results in the generation of heat H3 originating from the switch 132, which is activated (ON state) to transfer the corresponding current from the ground reference voltage 199 through the active region of the substrate 172 (an example of the switch circuitry 132) to conductive paths such as the switch node SW, such as conductive path 122 (122-1). As previously discussed, the absence of active circuitry in the passive regions 131-7 reduces heat generation, which would otherwise need to be transferred to the main substrate 141 if the passive regions 131-7 were implemented as active regions. In other words, the passive regions 131-7 themselves do not generate heat during the activation of the switch circuitry 131, enabling the passive regions 131-7 to support the transfer of heat H3 generated by the switch circuitry 132 through the passive regions 131-7 to the main substrate 141 for dissipation.

[0072] Therefore, in summary, the component 100-1 discussed herein includes a first semiconductor chip substrate 171, which includes active regions or multiple active regions and passive regions or multiple passive regions. The fabricator 150 fabricates a switching circuit device 131 in the substrate 171 to include any number of active regions (131-1, 131-2, 131-3, etc.) that support the control of current from an input voltage source 125 to a switching node SW (such as conductive path 122 or conductive path 124). During operation, the control of current through the active regions of the first switching circuit device 131 in the first semiconductor chip substrate results in the generation of heat H1, which is transferred from the first semiconductor chip substrate 171 through conductive path 121 to a main substrate 141, wherein the main substrate 141 dissipates the received heat H1 generated based on the operation of the switching circuit device 131.

[0073] As previously discussed, substrate 171 includes one or more passive regions (such as passive regions 131-6, 131-7, etc.) that do not contain active circuitry that generates heat. A second circuitry, such as switching circuitry 132, is coupled to the first semiconductor chip substrate 171. More specifically, switching circuitry 132 is directly mounted above passive regions 131-7, wherein passive regions 131-7 of substrate 171 do not generate heat themselves, but are good conductors of heat H3 transferred to the main substrate 141 through passive regions 131-7. Therefore, because passive regions 131-7 do not generate heat themselves, they are able to transfer heat H3 without overheating of passive regions 131-7 or any circuitry components in the stack 198-1.

[0074] As previously discussed, in one example, note that the second circuit device in stack 198-1 may include driver circuit device 151 and corresponding switch circuit device 132.

[0075] It should also be noted that the switching circuit device 131 disposed in the substrate 171 in layer L3 can be implemented as a first vertical field-effect transistor disposed in stack 198-1. Furthermore, the switching circuit device 132 disposed in layer L6 can be implemented as a second vertical field-effect transistor disposed in stack 198-1.

[0076] Conductive path 121 (the metal layer in layer L2) may be a first metal layer disposed on a first surface of the first semiconductor chip substrate 171; and conductive path 122 (the metal layer in layer L4) may be a second metal layer disposed on a second surface of the first semiconductor chip substrate 171, wherein the second surface is configured to be opposite to the first surface. As previously discussed, the drain node D2 of the second switching circuit device 132 may be directly coupled (e.g., via conductive paths 122, 122-1) to the source node S1 of the first switching circuit device 131.

[0077] Furthermore, the passive regions of the first semiconductor chip substrate 171 (such as passive regions 131-7) provide a thermally conductive path between the first surfaces of the first semiconductor chip substrate 171 at the interface between layers L3 and L4, through the passive regions 131-7 to the second surface of the first semiconductor chip substrate 171 coupled to the conductive path 122 and the corresponding main substrate 141.

[0078] In other examples, the first semiconductor chip substrate 171 is a first monolithic semiconductor substrate comprising active regions (such as one or more active regions 131-1, 131-2, 131-3, etc.) and passive regions (such as passive regions 131-6, 131-7, etc.). Additionally, any circuit device coupled to substrate 171 may include semiconductor chip substrate 172.

[0079] In one example, each of substrates 171 and 172 is a monolithic semiconductor substrate.

[0080] Furthermore, as previously described, the second circuit arrangement above the substrate 171 in stack 198-1 may include a switching circuit arrangement 132 and a corresponding driver circuit arrangement 151. The driver circuit arrangement 151 may be coupled to the surface of the first semiconductor chip substrate 171 over the passive regions 131-6. The second switching circuit arrangement 132 may be coupled to the surface of the first semiconductor chip substrate 171 over the active regions 131-7.

[0081] Furthermore, as previously discussed, note that when this switching circuit device is activated, the active regions 131-1, 131-2, 131-3, etc., can generate corresponding heat. Conversely, the passive regions of the first semiconductor chip substrate 171 do not generate heat because they do not support the corresponding current transfer through the substrate 171.

[0082] Furthermore, note that the first switching circuit device 131 and the corresponding substrate 171 can be fixed to the main substrate 141. Also as shown, the substrate 171 can be disposed between the switching circuit device 132 and the main substrate 141.

[0083] Figure 3 This is an example diagram illustrating a switching circuit assembly as discussed in this article.

[0084] As shown in this example, component 100-3 is generally the same as component 100-1. However, in this example, passive region 131-7 is removed, so that only passive region 131-6 (and conductive path or material layer 127, and a portion of conductive path 121) of substrate 171 disposed between driver circuit device 151 and main substrate 141 is obtained.

[0085] Therefore, the substrate 171 in layer L3 advantageously includes passive regions, such as passive regions 131-6, which have no active circuit devices and are regions that do not support current flow from drain node D1 to source node S1 during the activation to on state of the corresponding switching circuit device 131. This prevents heat generation in the passive regions 131. Conversely, during the activation to on state of the corresponding switching circuit device 131, the active regions 131-1, 131-4, etc. in the substrate 171 support the flow of the corresponding current from the input voltage Vin and the corresponding current received at drain node D1 through the active regions (131-1, 131-4) to the corresponding source node S1.

[0086] As previously discussed, it should also be noted that the operation of the driver circuitry 151 results in the generation of heat H2 transferred through the passive regions 131-6 of the substrate 171. The absence of active circuitry in the passive regions 131-6 reduces this heat, which would otherwise need to be transferred to the main substrate 141 if the passive regions 131-6 were active circuitry providing a low-impedance path. In other words, because the passive regions 131-6 do not contain heat-generating circuitry, they themselves do not generate heat during the activation of the switching circuitry 131, allowing for easier transfer of the heat H2 generated by the driver circuitry 151 through the passive regions 131-6 to the main substrate 141.

[0087] Figure 4 This is an example diagram illustrating a switching circuit assembly including a flip-chip driver circuit, as discussed in this article.

[0088] Component 100-4 and the corresponding parts operate in a similar manner to those previously discussed. However, as Figure 4 The component 100-4 shown includes minor modifications associated with the driver circuitry 151 and corresponding connectivity to the switching circuitry.

[0089] More specifically, in this example, component 100-4 includes a conductive path 421 disposed in layer L5 to transmit a control signal S11 generated by driver circuitry 151 to the source node G1 of switch 131 fabricated in substrate 171. Additionally, component 100-4 includes a corresponding conductive path 422 to transmit a corresponding control signal S12 generated by driver circuitry 151 to the gate node G2 of switch circuitry 132 fabricated in substrate 172 of layer L6.

[0090] Figure 5 This is an example diagram illustrating a switching circuit assembly including a flip-chip driver circuit, as discussed in this article.

[0091] Component 100-5 and the corresponding parts operate in a similar manner as previously discussed. However, component 100-5 and the corresponding stack 198-5 include minor modifications associated with driver circuitry 151 and corresponding connectivity to switch circuitry 132.

[0092] More specifically, in this example, component 100-5 includes conductive paths 511 disposed in one or more layers of stack 198-5 to transmit a control signal S11 generated by driver circuitry 151 to the gate node G1 of switch 131 fabricated in substrate 171. Additionally, component 100-5 includes conductive paths 510 disposed in one or more layers of stack 198-5 to transmit a control signal S12 generated by driver circuitry 151 to the gate node G2 of switch 132 fabricated in substrate 172.

[0093] Figure 6 This is an example diagram illustrating an implementation of one or more metal clips in a switching circuit assembly as discussed herein.

[0094] As previously discussed, the switching circuit device 132 may be a low-side switch of a corresponding power converter. In this example, the stack of circuit components 198-6 may include: i) a first conductive path 121-1 and a conductive path 121 (such as one or more layers of conductive material, such as metal) extending from the surface 691 of the main substrate 141 to a first node (such as a drain node D1) of the switch 131 (such as a high-side switch), wherein the switch 131 is disposed between the source node S1 of the switch 131 and the surface 691 of the main substrate 141; and ii) a second conductive path 123 extending from the surface 691 of the main substrate 141 and a reference voltage 199 to the source node S2 of the switch 132, wherein a combination of the switch 132 and a portion of the first semiconductor chip substrate 171 is disposed between the source node S2 and the surface 691 of the main substrate 141.

[0095] Figure 7 This is an example diagram illustrating an implementation of one or more metal clips in a switching circuit assembly as discussed herein.

[0096] In this example, the components 100-7 implementing the switching circuit 101 include a stack 198-7 of circuit components (such as metal layers, active circuit devices, etc.). The stack 198-7 includes a second switching circuit device 132, such as one fabricated in a substrate 172, which is coupled to a substrate 141 via conductive paths 123-1 and 123-1. The substrate 141 provides a ground reference voltage 199 to the source node S2 of the switching circuit device 132 via conductive paths 123 and 123-1. Conductive paths 122 and 122-1 (such as switching node SW) extend from the drain node D2 of the switching circuit device 132 to the surface 691 of the main substrate 141 and the substrate 141 itself. Conductive path 121-1 carries an output current iout.

[0097] Therefore, component 100-7 and the corresponding stack 198-7 can be configured to include: i) a first conductive path (such as one or more conductive paths 123, 123-1) extending from the surface 691 of the main substrate 141 to the source node S2 of the switching circuit device 132, wherein the switching circuit device 132 is disposed between the drain node D2 of the switching circuit device 132 and the surface 691 of the main substrate 141; and ii) a second conductive path 122 extending from the surface 691 of the main substrate 141 to the drain node D1 of the switching circuit device 131, wherein a combination of the switching circuit device 131 and a portion of the semiconductor chip substrate 172 is disposed between the drain node D1 of the switching circuit device 131 and the surface 691 of the main substrate 141. In this example, active regions 132-1, 132-2, 132-3, etc. in the substrate 172 represent the switching circuit device 132 and provide control of the current passing through it. The substrate 172 includes passive regions 132-6 and passive regions 132-7.

[0098] In a similar manner to those previously discussed, passive regions 132-6 and 132-7 do not contain active circuitry or support current flow, and therefore do not generate heat. However, passive region 132-6 in substrate 172 is configured to provide a good thermal conductivity path to transfer heat H2 from driver circuitry 151 through passive region 132-6 to main substrate 141. Passive region 132-7 in substrate 172 is configured to provide a good thermal conductivity path to transfer heat H3 from switching circuitry 131 through passive region 132-7 to main substrate 141.

[0099] Figure 8 This is an example diagram illustrating an implementation of the conductive paths of multiple switches in a connection switch circuit assembly as discussed herein.

[0100] In this example, a switching circuit device 132 is disposed in a substrate 172 coupled to a main substrate 141 via a conductive path 123. The conductive path 123 provides a ground reference voltage 199 to the source node S2 of the switching circuit device 132. A drain node D2 is included on the top side of the switching circuit device 132 and the substrate 172. The drain node D2 is connected to the source node S1 of the switching circuit device 131 disposed in the substrate 171 via the conductive path 122.

[0101] In a similar manner as previously discussed, substrate 172 can be configured to include passive regions 132-6 that support the heat flow from driver circuitry 151 to main substrate 141.

[0102] As also shown, stack 198-8 can be configured to include connectivity of the source node S1 associated with the switching circuit device 131 fabricated in substrate 171 via conductive paths 891 (such as vias, silicon vias, etc.) fabricated in substrate 172. As shown, the input voltage Vin is transmitted from the input voltage source 125 to the source node S1 of the switching circuit device 131 via conductive path 121 of the conductive path in 891.

[0103] Therefore, the implementation of stacked 198-8 components 100-8 can be configured to include: a conductive path 122 extending between a first node of a source node S1, such as a first switching circuit device 131, and a first node of a drain node D2, such as a second switching circuit device 132.

[0104] Figure 9 This is an example diagram illustrating an implementation of a conductive path connecting multiple switches and switch circuit components as discussed herein.

[0105] The configuration of component 100-9 is similar to or the same as that of component 100-8, except that stack 198-9 includes conductive path 961 and conductive path 962.

[0106] For example, the stack 198-9 of component 100-9 includes a conductive path 961 to transmit a signal S11 generated by driver circuit device 151 to the gate node G1 of switching circuit device 131. The stack 198-9 of component 100-9 also includes a conductive path 962 to transmit a signal S12 generated by driver circuit device 151 to the gate node G2 of switching circuit device 132.

[0107] Figure 10 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0108] The configuration of component 100-10 is similar to or the same as that of component 100-9, except that stack 198-10 includes conductive paths 1025 made of metal or other suitable conductive materials.

[0109] For example, the stack 198-10 of components 100-10 includes a conductive path 961 to transmit a signal S11 generated by driver circuitry 151 to the gate node G1 of switching circuitry 131. The stack 198-10 of components 100-10 also includes a conductive path 962 to transmit a signal S12 generated by driver circuitry 151 to the gate node G2 of switching circuitry 132.

[0110] The source node S2 of the switching circuit device 132 fabricated in substrate 172 receives a ground reference voltage 199 from substrate 141 via conductive path 123. The drain node D2 of the switching circuit device 132 is electrically connected to the source node S1 of the switching circuit device 131 via conductive path 122, such as switching node SW. The active region 1032-1 of substrate 172 represents the switching circuit device 132 and provides high-impedance or low-impedance connectivity between drain node D2 and source node S2 based on a control signal 962 applied to gate node G2.

[0111] The active regions of the switching circuit device 131 and the corresponding substrate 171 partially overlap with the passive regions 1032-6 of the substrate 172. The passive regions 1032-6 support the transfer of heat from the driver circuit device 151 to the substrate 141 and from the switching circuit device 131 to the substrate 41. Additionally, the heat generated by the switching circuit device 131 in the substrate 171 can flow through the conductive path 1025 to the substrate 141. In the opposite direction, the power supply 125 associated with the substrate 141 supplies the input voltage Vin to the conductive path 1025. The conductive path 1025 transfers the input voltage Vin and the corresponding current to the drain node D1 of the switching circuit device 131. The switching circuit device 131 is activated via a control signal S11 transmitted over the conductive path 961 to create a low-impedance path from the drain node D1 to the source node S1, thereby creating connectivity of the input voltage Vin and the corresponding current to the conductive path 122.

[0112] Therefore, the components discussed herein may include a semiconductor chip substrate 172 disposed in a first material layer of a component stack. The stack 198-10 may be configured to include a conductive path 1025 adjacent to the substrate 172 and a corresponding layer. The conductive path 1025 directly couples the drain node D1 of the switching circuit device 131 to the power supply 125. Also as shown, the conductive path 122 directly connects the switching circuit device 131 and the switching circuit device 132 in series.

[0113] The driver circuit device 151 may be configured to be adjacent to the switching circuit device 131 and above the passive region 1031-6 of the substrate 172.

[0114] Figure 11 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0115] In this example, conductive path 122 is configured to include additional material 1122-1 to fabricate conductive path 122, wherein material 1122-1 is suspended above the left edge of substrate 172 to provide better heat dissipation. Additionally, note that conductive path 122 is also configured to include additional material 1122-2, which is suspended above the right edge of switching circuit device 131 and conductive path 1025.

[0116] Figure 12 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0117] In this example, a switching circuit device 131 is disposed in a substrate 171 and directly coupled to a main substrate 141 via a conductive path 121. The conductive path 121 provides an input voltage Vin received from an input voltage source 125 to the drain D1 of the switching circuit device 131 disposed in the substrate 171. The active region 1232-1 of the substrate 131 represents the switching circuit device 131. The top side of the switching circuit device 131 and the corresponding substrate 171 includes a source node S1 directly coupled to the conductive path 122. Therefore, the source node S1 is connected to the drain node D2 via the conductive path 122, as shown.

[0118] In a similar manner as previously discussed, substrate 171 may be configured to include passive regions 1232-6 that support the heat flow from driver circuitry 151 and / or switch circuitry 132 to the main substrate 141.

[0119] As also shown in the figure, the stack 198-12 of components 100-12 can be configured to include a conductive path 1025 to connect the source node S2 associated with the switching circuit device 132 (which is fabricated in the substrate 172) to a ground reference voltage 199 associated with the substrate 141. In other words, the combination of conductive path 1025 (such as metal or other suitable material) and activation of the switching circuit device 132 electrically connects conductive path 122 (switching node SW) to the ground reference voltage 199.

[0120] Therefore, activation of switching circuit device 131 transfers the input voltage Vin to conductive path 122. Activation of switching circuit device 132 electrically connects conductive path 122 to ground reference voltage 199.

[0121] Figure 13 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0122] In this example, component 100-13 includes a stack of components as previously discussed, 198-13, and circuitry 1310 (such as receiving and transmitting signals) extending over conductive paths 1351 (such as one or more wiring connections) and / or conductive paths 1352 (such as through silicon vias) to the circuitry in the stack 198-13.

[0123] Figure 14 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0124] In this example, driver circuitry 151 is disposed on the passive region 1432-6 of substrate 172. The active region of substrate 172 represents switching circuitry 132, which includes a source node S2 directly coupled to a ground reference voltage 199 and a drain node D1 directly connected to a conductive path 122. As previously discussed, driver circuitry 151 generates a control signal S12 applied to the gate node G2 of switching circuitry 132. Additionally, driver circuitry 151 generates a control signal S11 applied to the gate node G1 of switching circuitry 131 disposed in substrate 171.

[0125] Furthermore, in a similar manner as previously discussed, the heat H1 generated by the driver circuit device 151 is transferred to the main substrate 141 through the passive regions 1432-6 of the substrate 172. The heat H2 generated by the switching circuit device 132 is transferred to the substrate 141 through the conductive path 123. The heat H3 generated by the switching circuit device 131 is transferred to the main substrate 141 through the conductive path 1025.

[0126] Therefore, the switching circuit device 132 in the active region 1432-1 of the semiconductor chip substrate 172 is disposed in the first layer of the stack 198-14, wherein the first layer is disposed between the passive regions 1432-6 in the conductive path 1025. The switching circuit device 131 and the corresponding semiconductor chip substrate 171 are disposed in the layer of the stack 198-14 above the layer including the switching circuit device 132.

[0127] Figure 15This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0128] like Figure 15 As shown, Figure 14 Components 100-14 and the corresponding stack 198-14 can be modified to produce components 100-15 and the corresponding stack 198-15. For example, stack 198-15 and component 100-15 can be configured to additionally include a conductive path 122-1 coupled to conductive path 122 to transfer voltages (such as Vout) and corresponding output currents iout from switching node SW to substrate 141.

[0129] Therefore, stack 198-15 can be configured to include conductive path 122 and conductive path 122-1. Conductive path 122 connects switching circuit device 131 and switching circuit device 132 in series. Conductive path 122-1 extends to surface 1505 of main substrate 141 between conductive path 122 and corresponding switching node SW.

[0130] Figure 16 This is an example diagram illustrating an implementation of a metal layer that provides electrical connectivity from a switch to a main substrate in a switching circuit assembly, as discussed herein.

[0131] like Figure 16 As shown, Figure 15 Components 100-15 and the corresponding stack 198-15 can be modified to produce components 100-16 and the corresponding stack 198-16. For example, stack 198-16 and component 100-16 can thus be configured to include a conductive path 121 to transfer the input voltage Vin from the input voltage source 125 to the drain node D1 of the switching circuit device 131 disposed in the substrate 171.

[0132] Therefore, stack 198-16 can be configured to include conductive path 122, conductive path 122-1, and conductive path 121. Conductive path 122 connects switching circuit device 131 and switching circuit device 132 in series. Conductive path 122-1 extends between conductive path 122 and the corresponding switching node SW to the surface 1505 of main substrate 141. Conductive path 121 extends between the drain node D1 of switching circuit device 131 and main substrate 141 to transmit the input voltage from source 125.

[0133] As also shown in the figure, a first portion of the conductive path 121 (such as circuit node 1601) is sandwiched between passive regions 1632-6 of substrates 171 and 172, providing connectivity between the switching circuit device 131 (the active region of substrate 171) and the passive regions 1632-6 of substrate 172. A second portion of the conductive path 121 extends between circuit node 1601 and surface 1505 of the main substrate 141.

[0134] Figure 17 This is an example method associated with the operation of a switch driver circuit device, as discussed in this article.

[0135] In processing operation 1710 of flowchart 1700, fabricator 150 receives a first semiconductor chip substrate (such as substrate 131 or layer L3), the first semiconductor chip substrate comprising: i) one or more active regions, such as regions 131-1, 131-2, 131-3, etc., including so-called active circuit devices such as representing a first switch 131; and ii) one or more passive regions, such as one or more regions 131-6, 131-7, etc., including so-called passive circuit devices such as regions without active circuit devices (such as having no circuit devices at all or non-functional circuit devices). In one example, a combination of active regions such as active regions 131-1, 131-2, 131-3, etc., represents a first circuit device (or so-called active circuit device) such as the first switch 131. As previously discussed, the advantage of including regions such as passive silicon (such as one or more regions 131-6, 131-7, etc.) in the substrate 131 is that such regions support the transfer of heat to the corresponding main substrate 141 without generating heat themselves, since there are no active circuit devices.

[0136] In processing operation 1720, the fabricator 150 provides coupling of a second circuit device (such as including switch 132) to a first semiconductor chip substrate 131 (layer L3), wherein the second circuit device (such as including switch 132) is fixed to a second region of the first semiconductor chip substrate (layer L3) (such as one or more regions such as regions 131-6, 131-7, etc.).

[0137] It should be noted again that the techniques described herein are well-suited for use in switching circuit components. However, it should be understood that the examples described herein are not limited to this application, and the techniques discussed are also well-suited for other applications.

[0138] Based on the description set forth herein, numerous specific details have been set forth to provide a thorough understanding of the claimed subject matter. However, those skilled in the art will understand that the claimed subject matter can be practiced without these specific details. In other instances, methods, apparatuses, systems, etc., known to those skilled in the art have not been described in detail so as not to obscure the claimed subject matter. Some areas described in detail are presented in terms of algorithms or symbols relating to the operation of data bits or binary digital signals stored in the memory of a computing system (e.g., computer memory). These algorithm descriptions or representations are examples of techniques used by those skilled in the art of data processing to convey the substance of their work to others skilled in the art. The algorithms described herein are generally considered to be self-consistent sequences of operations or similar processes that result in desired results. In this context, the operation or process involves the physical manipulation of a physical quantity. Typically, although not essential, such a quantity may take the form of an electrical or magnetic signal capable of being stored, transmitted, combined, compared, or otherwise manipulated. Sometimes, primarily for reasons of common use, it is convenient to refer to such a signal as a bit, data, value, element, symbol, character, term, number, digital symbol, etc. However, it should be understood that all these and similar terms are associated with appropriate physical quantities and are merely convenient notations. Unless otherwise specifically stated, as is evident from the following discussion, it should be understood that throughout this specification, discussions using terms such as “processing,” “computing,” “calculating,” and “determining” refer to the actions or processes of a computing platform such as a computer or similar electronic computing device, the manipulation or transformation of which is expressed as physical electronic or magnetic data within the computing platform’s memory, registers, or other information storage devices, transmitting devices, or display devices.

[0139] Although the invention has been specifically shown and described with reference to preferred examples, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention as defined by the appended claims. Such changes are intended to be covered by the scope of the invention. Therefore, the foregoing description of the examples of the invention is not intended to be limiting. Rather, any limitation on the invention is set forth in the following claims.

Claims

1. A component comprising: A first semiconductor chip substrate includes an active region and a passive region, wherein the active region of the first semiconductor chip substrate is fabricated to include a first circuit device, the first circuit device being an active circuit device, and the passive region of the first semiconductor chip substrate having no active circuit device. as well as A second circuit device is coupled to the first semiconductor chip substrate and is fixed to the passive region of the first semiconductor chip substrate, the passive region being operable to receive and transmit heat generated by the second circuit device.

2. The component of claim 1, wherein the second circuit means includes a driver circuit means coupled to the first semiconductor chip substrate, the driver circuit means being operable to control the operation of the first circuit means.

3. The component of claim 2, wherein the first circuit device includes a first switch controlled by the driver circuit device; and The second circuit device includes a second switch controlled by the driver circuit device.

4. The component of claim 1, wherein the first circuit device is a first vertical field-effect transistor.

5. The component of claim 4, wherein the second circuit device is a second vertical field-effect transistor.

6. The component of claim 5, further comprising: A first metal layer is disposed on a first surface of the first semiconductor chip substrate; as well as A second metal layer is disposed on a second surface of the first semiconductor chip substrate, the second surface being configured to be opposite to the first surface.

7. The component of claim 6, wherein the first circuit device is a first switch; The source node of the first switch is directly coupled to the first metal layer; and The drain node of the second switching circuit device is directly coupled to the first metal layer.

8. The component of claim 1, wherein the passive region of the first semiconductor chip substrate provides a thermally conductive path from the first surface of the first semiconductor chip substrate through the passive region to the second surface of the first semiconductor chip substrate.

9. The component of claim 1, wherein the first semiconductor chip substrate is a first monolithic semiconductor substrate comprising the active region and the passive region; and The second circuit device includes a second semiconductor chip substrate, which is a second monolithic semiconductor substrate.

10. The component of claim 1, wherein the first circuit device is a first switch; The second circuit device is a second switch, and the component further includes: A conductive path couples the first switch and the second switch, the conductive path being operable to directly couple the source node of the first switch to the drain node of the second switch.

11. The component of claim 1, wherein the passive region comprises a first portion and a second portion separated from a portion of the active region.

12. The component of claim 1, further comprising: A conductive path extends between the first node of the first switch and the first node of the second switch; and The first node of the first switch is disposed between the first semiconductor chip substrate and the conductive path; and The second circuit device is disposed between the conductive path and the first semiconductor chip substrate.

13. The component of claim 11, wherein the first circuit device is a first switch; The second circuit device includes a second switch and a driver circuit device, the driver circuit device being operable to control the operation of the first switch and the second switch, the driver circuit device being coupled to the surface of the first semiconductor chip substrate over the first portion of the passive region, and the second switch being coupled to the surface of the first semiconductor chip substrate over the second portion of the passive region.

14. The component of claim 1, wherein the active region of the first semiconductor chip substrate is operable to generate heat; and The passive region of the first semiconductor chip substrate is not operable for generating heat.

15. The component of claim 1, wherein the first semiconductor chip substrate is disposed in a first material layer of the component stack, the component further comprising: A first conductive path is disposed in a first material layer adjacent to the first semiconductor chip substrate, and the conductive path is coupled to a first node of the second circuit device; as well as The second conductive path directly connects the first circuit device and the second circuit device in series.

16. The component of claim 15, wherein the first circuit device includes a first switch; The second circuit device includes a second switch; The passive region of the first semiconductor chip substrate is disposed in the first material layer between the first switch and the first conductive path; and The second circuit device includes a driver circuit device, which is configured to be adjacent to the second switch and above the passive region of the first semiconductor chip substrate.

17. An apparatus comprising: Main substrate; as well as The component of claim 1 is coupled to the main substrate, wherein the first circuit device is fixed to the surface of the main substrate, and the first semiconductor chip substrate is disposed between the second circuit device and the main substrate.

18. The apparatus of claim 17, wherein the first circuit device is a high-side switch of a power converter; The second circuit device is the low-side switch of the power converter; and The device further includes: i) a first conductive path extending from the surface of the main substrate to a first node of the high-side switch, wherein the high-side switch is disposed between the first node of the high-side switch and the surface of the main substrate; and ii) a second conductive path extending from the surface of the main substrate to a first node of the low-side switch, wherein a combination of the low-side switch and the first semiconductor chip substrate is disposed between the first node of the low-side switch and the surface of the main substrate.

19. The apparatus of claim 17, wherein the first circuit device is a low-side switch of a power converter; The second circuit device is the high-side switch of the power converter; and The device further includes: i) a first conductive path extending from the surface of the main substrate to a first node of the low-side switch, wherein the low-side switch is disposed between the first node of the low-side switch and the surface of the main substrate; and ii) a second conductive path extending from the surface of the main substrate to a first node of the high-side switch, wherein a combination of the high-side switch and the first semiconductor chip substrate is disposed between the first node of the high-side switch and the surface of the main substrate.

20. A method comprising: A first semiconductor chip substrate is received, comprising an active region and a passive region, wherein the active region of the first semiconductor chip substrate is fabricated to include a first circuit device, the first circuit device being an active circuit device, and the passive region of the first semiconductor chip substrate having no active circuit device. as well as A second circuit device is coupled to the first semiconductor chip substrate, and the second circuit device is fixed to the passive region of the first semiconductor chip substrate.

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