Metal interconnect structure and its fabrication method

By forming a protective layer on the sidewalls and bottom edges of vias and trenches, and etching away the metal barrier layer in uncovered areas, the problem of metal diffusion caused by etching offset is solved, improving the performance and stability of the metal interconnect structure and reducing resistance.

CN122094479APending Publication Date: 2026-05-26QINGDAO AUCMA YUNLIAN INFORMATION TECHNOLOGY CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
QINGDAO AUCMA YUNLIAN INFORMATION TECHNOLOGY CO LTD
Filing Date
2024-11-21
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

In the back-end process, via and trench etching offsets cause metal diffusion problems, affecting the performance and stability of the metal interconnect structure, and existing methods are difficult to effectively reduce the resistance of the metal barrier layer.

Method used

A protective layer is formed on the sidewalls and bottom edges of the vias and trenches. The protective metal barrier layer is protected by anisotropic etching. The metal barrier layer in the uncovered areas is etched away, and conductive pillars are filled under the protection to form a metal interconnect structure.

Benefits of technology

This effectively avoids leakage problems caused by metal diffusion into the dielectric layer, increases the etching process window, reduces the resistance of the metal barrier layer, and improves the performance and stability of the metal interconnect structure.

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Abstract

This invention provides a metal interconnect structure and its fabrication method. The fabrication method includes: forming a first dielectric layer with vias on a bottom metal layer; forming a first metal barrier layer on the first dielectric layer, the first metal barrier layer covering the top surface of the first dielectric layer and covering the sidewalls and bottom surface of the via; forming a first protective layer on the sidewalls of the via, the first protective layer covering the first metal barrier layer on the sidewalls of the via and covering the first metal barrier layer on the edge region of the bottom surface of the via; and under the cover of the first protective layer, etching away the first metal barrier layer on the top surface of the first dielectric layer and removing the area of ​​the first metal barrier layer on the bottom surface of the via not covered by the first protective layer. This avoids metal diffusion problems caused by via etching misalignment and protects the metal barrier layer on the sidewalls of the via. In the metal interconnect structure, the metal barrier layer covers the sidewalls of the via and extends to cover the edge region of the bottom surface of the via.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a metal interconnect structure and its fabrication method. Background Technology

[0002] In back-end of line (BEOL) metal interconnect processes, metal barriers play a crucial role in facilitating the transition between non-metallic and metallic materials, contributing to improved product performance and stability. Specifically, on one hand, metal barriers effectively bond the metal to the dielectric layer; on the other hand, they effectively prevent metal from diffusing into the dielectric layer, avoiding leakage. However, as feature sizes in device structures continue to shrink, reducing the resistance of the metal barriers is essential to meeting BEOL requirements in order to achieve performance and power consumption targets.

[0003] Currently, one method to reduce the resistance of the metal barrier layer is to remove the metal barrier layer at the bottom of the via by etching. However, this method can lead to metal diffusion problems due to etching offset of the via and / or lack of protection for the metal barrier layer between the metal and the dielectric layer on the via sidewalls. Summary of the Invention

[0004] One of the objectives of this invention is to avoid metal diffusion problems caused by etching offset of vias and / or trenches, protect the metal barrier layer on the sidewall of the via, and reduce the resistance of the metal barrier layer.

[0005] To achieve the above objectives, the present invention provides a method for fabricating a metal interconnect structure. The method includes: forming a first dielectric layer on a bottom metal layer, wherein a through-hole is formed in the first dielectric layer, exposing a portion of the metal in the bottom metal layer; forming a first metal barrier layer on the first dielectric layer, the first metal barrier layer covering the top surface of the first dielectric layer and covering the sidewalls and bottom surface of the through-hole; forming a first protective layer on the sidewalls of the through-hole, the first protective layer covering the first metal barrier layer on the sidewalls of the through-hole and covering the first metal barrier layer on the edge region of the bottom surface of the through-hole; under the cover of the first protective layer, etching away the first metal barrier layer on the top surface of the first dielectric layer and removing the portion of the first metal barrier layer on the bottom surface of the through-hole not covered by the first protective layer; removing the first protective layer; and filling the through-hole with metal material to form a first conductive pillar, the first conductive pillar being interconnected with the bottom metal layer.

[0006] Optionally, the method for forming a first protective layer on the sidewall of the via includes: forming a first protective material layer on the first metal barrier layer, the first protective material layer covering the first metal barrier layer; using an anisotropic etching process to etch away the first protective material layer on the top surface of the first dielectric layer and a portion of the first protective material layer on the bottom surface of the via, leaving the remaining first protective material layer on the sidewall of the via as the first protective layer.

[0007] Optionally, in the step of filling the through hole with metal material to form the first conductive pillar, the metal material is formed by electroplating or chemical vapor deposition.

[0008] Optionally, the step of filling the through hole with metal material to form the first conductive pillar includes: filling the through hole with metal material, and then removing at least a portion of the metal material by a chemical mechanical polishing process to form the first conductive pillar.

[0009] Optionally, the first protective layer includes a TiN layer, a nitrogen-free anti-reflective coating, or a SiN layer.

[0010] The present invention also provides a method for fabricating a metal interconnect structure. The method includes: forming a second dielectric layer on a first dielectric layer, the first dielectric layer having a first conductive pillar; etching the second dielectric layer and the first dielectric layer and stopping the formation of a trench in the first dielectric layer, the bottom surface of the trench being lower than the top surface of the first conductive pillar near the second dielectric layer and the trench surrounding the top surface of the first conductive pillar; forming a second metal barrier layer on the second dielectric layer, the second metal barrier layer covering the top surface of the second dielectric layer, the sidewalls and bottom surface of the trench, and the top surface of the first conductive pillar; forming a sacrificial layer at the bottom of the trench, the sacrificial layer covering the bottom surface of the trench, the top surface of the sacrificial layer being lower than the top surface of the first conductive pillar; forming a second protective layer, the second protective layer covering the sidewalls of the trench and exposing the top surface of the first conductive pillar; under the cover of the second protective layer and the sacrificial layer, etching away the second metal barrier layer on the top surface of the second dielectric layer and removing the second metal barrier layer on the top surface of the first conductive pillar; and filling the trench with metal material to form a second conductive pillar, the second conductive pillar being in contact with the first conductive pillar.

[0011] Optionally, after etching away the second metal barrier layer on the top surface of the second dielectric layer and removing the second metal barrier layer on the top surface of the first conductive pillar, and before filling the trench with metal material to form the second conductive pillar, the second protective layer and the sacrificial layer are removed.

[0012] Optionally, the second protective layer includes a TiN layer, a nitrogen-free anti-reflective coating, or a SiN layer; the sacrificial layer includes a bottom anti-reflective layer or a photoresist layer.

[0013] The present invention also provides a metal interconnect structure. The metal interconnect structure includes: a first dielectric layer located on a bottom metal layer; a via located in and penetrating the first dielectric layer, the via corresponding to at least a portion of the metal position in the bottom metal layer; a first metal barrier layer located in the via, covering the sidewalls of the via and extending inwards to cover the edge region of the bottom surface of the via; and a first conductive post filling the via and located on the first metal barrier layer, interconnecting with the bottom metal layer.

[0014] Optionally, the first metal barrier layer extends at least into the via to the metal surface of the bottom metal layer; an NDC layer 102 is disposed between the first dielectric layer and the bottom metal layer, and the via penetrates the NDC layer 102.

[0015] The present invention also provides a metal interconnect structure. The metal interconnect structure includes: a first dielectric layer having a first conductive pillar therein; a second dielectric layer located on the first dielectric layer; a trench penetrating the second dielectric layer and having its bottom surface located within the first dielectric layer, the bottom surface of the trench being lower than the top surface of the first conductive pillar near the second dielectric layer and the trench surrounding the top surface of the first conductive pillar; a second metal barrier layer covering the sidewalls of the trench and extending toward the first conductive pillar, covering the bottom surface of the trench, but not covering the top surface of the first conductive pillar; and a second conductive pillar filling the trench and surrounding the top surface of the first conductive pillar, the second conductive pillar being electrically connected to the first conductive pillar.

[0016] Optionally, the metal interconnect structure further includes a sacrificial layer and a second protective layer, the sacrificial layer covering the bottom surface of the trench and the top surface of the sacrificial layer being lower than the top surface of the first conductive post, the second protective layer covering the sidewall of the trench located on the sacrificial layer; the second conductive post is located on the sacrificial layer and the second protective layer.

[0017] In the metal interconnect structure and its fabrication method provided by this invention, the first protective layer can protect the first metal barrier layer on the sidewall and bottom edge of the via during the etching process. The retained first metal barrier layer covers the sidewall of the via and extends to cover the edge region of the bottom surface of the via. In this way, the retained first metal barrier layer can not only prevent the metal of the first conductive post from diffusing laterally into the dielectric layer, but also prevent the metal of the first conductive post from diffusing vertically downward into the dielectric even when there is etching offset in the via. This can avoid the metal diffusion problem caused by the etching offset of the via, effectively improve the leakage problem caused by the metal diffusion into the dielectric, help improve the performance and stability of the metal interconnect structure, and increase the etching process window of the via. Under the protection of the first protective layer, the etching removes the first metal barrier layer in the area of ​​the bottom surface of the via not covered by the first protective layer, which can reduce the resistance of the first metal barrier layer.

[0018] In the metal interconnect structure and its fabrication method provided by this invention, the second protective layer and the sacrificial layer can jointly protect the second metal barrier layer on the trench sidewalls and bottom edge during the etching process. The retained second metal barrier layer covers the trench sidewalls and extends towards the first conductive post to cover the bottom surface of the trench. In this way, the retained second metal barrier layer can prevent the metal of the second conductive post from diffusing laterally into the dielectric layer. Even when there is etching offset in the trench, the second metal barrier layer on the bottom surface of the trench can also prevent the metal of the second conductive post from diffusing vertically downward into the first dielectric layer. This can avoid the metal diffusion problem caused by trench etching offset, effectively improve the leakage problem caused by metal diffusion into the dielectric, help improve the performance and stability of the metal interconnect structure, and also increase the etching process window of the trench. Under the protection of the second protective layer and the sacrificial layer, the second metal barrier layer not covered by the first protective layer on the top surface of the first conductive post is etched away, which can reduce the resistance of the second metal barrier layer. Attached Figure Description

[0019] Figure 1 This is a flowchart illustrating a method for fabricating a metal interconnect structure according to Embodiment 1 of the present invention.

[0020] Figures 2 to 6 This is a step-by-step schematic diagram of the method for fabricating a metal interconnect structure provided in Embodiment 1 of the present invention.

[0021] Figure 7 This is a schematic diagram of the metal interconnect structure provided in Embodiment 1 of the present invention.

[0022] Figures 8 to 15 This is a schematic diagram illustrating the process of fabricating the metal interconnect structure provided in Embodiment 2 of the present invention.

[0023] Figure 16This is a schematic diagram of the metal interconnect structure provided in Embodiment 2 of the present invention.

[0024] Explanation of reference numerals in the attached figures: 101-bottom metal layer; 102-NDC layer; 103-first dielectric layer; 104-through hole; 105-first metal barrier layer; 106-first protective material layer; 107-first protective layer; 108-first conductive pillar; 201-first dielectric layer; 202-first conductive pillar; 202a-first metal barrier layer; 203-SiN layer; 204-second dielectric layer; 205-trench; 206-second metal barrier layer; 207-sacrificial material layer; 208-sacrificial layer; 209-second protective material layer; 210-second protective layer; 211-second conductive pillar. Detailed Implementation

[0025] To avoid metal diffusion problems caused by via etching offset, protect the metal barrier layer on the via sidewall, and reduce the resistance of the metal barrier layer, this invention provides a metal interconnect structure and its fabrication method.

[0026] The metal interconnect structure and its fabrication method proposed in this invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this invention.

[0027] As used herein, the singular forms “a,” “an,” and “the” include plural objects unless otherwise expressly indicated. As used herein, the term “or” is generally used to include “and / or” unless otherwise expressly indicated. As used herein, the term “a number” is generally used to include “at least one” unless otherwise expressly indicated. As used herein, the term “at least two” is generally used to include “two or more” unless otherwise expressly indicated. Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first,” “second,” or “third” may explicitly or implicitly include one or at least two of that feature.

[0028] Example 1

[0029] Figure 1 This is a flowchart illustrating a method for fabricating a metal interconnect structure according to Embodiment 1 of the present invention. Figure 1 As shown, the method for fabricating the metal interconnect structure provided in this embodiment includes:

[0030] Step S1: A first dielectric layer is formed on the bottom metal layer, and a through hole is formed in the first dielectric layer, exposing part of the metal of the bottom metal layer.

[0031] Step S2: A first metal barrier layer is formed on the first dielectric layer. The first metal barrier layer covers the top surface of the first dielectric layer and covers the sidewalls and bottom surface of the via.

[0032] Step S3: A first protective layer is formed on the sidewall of the through hole. The first protective layer covers the first metal barrier layer on the sidewall of the through hole and also covers the first metal barrier layer on the edge area of ​​the bottom surface of the through hole.

[0033] Step S4: Under the cover of the first protective layer, the first metal barrier layer on the top surface of the first dielectric layer and the first metal barrier layer in the area not covered by the first protective layer on the bottom surface of the via are etched away.

[0034] Step S5, remove the first protective layer; and

[0035] Step S6: Fill the through hole with metal material to form a first conductive pillar, and the first conductive pillar is interconnected with the bottom metal layer.

[0036] Figures 2 to 6 This is a step-by-step schematic diagram of the method for fabricating a metal interconnect structure provided in Embodiment 1 of the present invention. Figure 7 This is a schematic diagram of the metal interconnect structure provided in Embodiment 1 of the present invention.

[0037] The following combination Figure 1 , Figures 2 to 7 The fabrication method of the metal interconnect structure in this embodiment will be described.

[0038] like Figure 2 As shown, in step S1, a first dielectric layer 103 is formed on the bottom metal layer 101. A through hole 104 is formed in the first dielectric layer 103, and the through hole 104 exposes part of the metal of the bottom metal layer 101.

[0039] Specifically, the bottom metal layer 101 includes metal traces and a dielectric material filling the spaces between the metal traces. The material of the metal traces includes, but is not limited to, copper.

[0040] Step S1 may include: forming an NDC layer 102 (carbon-doped nitrogen layer) on the bottom metal layer 101, the NDC layer 102 covering the bottom metal layer 101; forming a first dielectric layer 103 on the NDC layer 102, the first dielectric layer 103 covering the NDC layer 102; forming a patterned mask layer (not shown in the figure) on the first dielectric layer 103; using the patterned mask layer as a mask, etching the first dielectric layer 103 and the NDC layer 102 to form a via 104; and removing the patterned mask layer.

[0041] It should be noted that the number of vias 104 formed in the first dielectric layer 103 can be multiple. The NDC layer 102 disposed between the first dielectric layer 103 and the bottom metal layer 101 can prevent the metal in the bottom metal layer 101 from diffusing upward into the first dielectric layer 103, and can also serve as an etching stop layer for etching the first dielectric layer 103.

[0042] For example, the material of the first dielectric layer 103 includes, but is not limited to, silicon oxide.

[0043] In step S2, a first metal barrier layer 105 is formed on the first dielectric layer 103. The first metal barrier layer 105 covers the top surface of the first dielectric layer 103 and the sidewalls and bottom surface of the through hole 104.

[0044] The first metal barrier layer 105 may include, but is not limited to, a TaN layer and a Ta layer sequentially formed on the first dielectric layer 103, or a TiN layer and a Ti layer sequentially formed on the first dielectric layer 103. In other embodiments, the first metal barrier layer 105 may also be a monolayer structure composed of a single material layer.

[0045] Perform step S3, such as Figure 4 As shown, a first protective layer 107 is formed on the sidewall of the through hole 104. The first protective layer 107 covers the first metal barrier layer 105 on the sidewall of the through hole 104 and also covers the first metal barrier layer 105 on the edge region of the bottom surface of the through hole 104.

[0046] Specifically, the method for forming the first protective layer 107 on the sidewall of the through hole 104 may include: such as Figure 3 As shown, a first protective material layer 106 is formed on the first metal barrier layer 105, and the first protective material layer 106 covers the first metal barrier layer 105; the first protective material layer 106 on the top surface of the first dielectric layer 103 and part of the first protective material layer 106 on the bottom surface of the through hole 104 are removed by an anisotropic etching process, and the remaining first protective material layer 106 on the sidewall of the through hole 104 serves as the first protective layer 107.

[0047] For example, the material of the first protective layer 107 is different from that of the first metal barrier layer 105. The first protective layer 107 includes, but is not limited to, a TiN layer, a nitrogen-free anti-reflective coating (NFDARC), or a SiN layer.

[0048] Perform step S4, such as Figure 5As shown, under the cover of the first protective layer 107, the first metal barrier layer 105 on the top surface of the first dielectric layer 103 and the area of ​​the first metal barrier layer 105 on the bottom surface of the through hole 104 not covered by the first protective layer 107 are removed by etching. The remaining first metal barrier layer 105 covers the sidewall of the through hole 104 and extends into the through hole 104 to cover the edge area of ​​the bottom surface of the through hole 104.

[0049] For example, an anisotropic etching process is used to etch the first metal barrier layer 105, but it is not limited thereto.

[0050] Perform step S5, such as Figure 6 As shown, the first protective layer 107 is removed. Exemplarily, a wet process can be used to remove the first protective layer 107, but it is not limited thereto.

[0051] Execute step S6, such as Figure 7 As shown, a first conductive post 108 is formed by filling the through-hole 104 with metal material, and the first conductive post 108 is interconnected with the bottom metal layer 101. Specifically, the first conductive post 108 and a portion of the bottom metal layer 101 are in metal contact connection.

[0052] For example, in the step of filling the through-hole 104 with metal material to form the first conductive pillar 108, the metal material can be formed using an electrochemical plating (ECP) process or a chemical vapor deposition (CVD) process. The material of the first conductive pillar 108 includes, but is not limited to, Cu or W.

[0053] When filling the metal material using an electroplating process, the metal material may protrude from the top surface of the first dielectric layer 103. When filling the metal material using a chemical vapor deposition process, the metal material may also cover the top surface of the first dielectric layer 103. Therefore, in this embodiment, after filling the through-hole 104 with metal material, the metal material on the top surface of the first dielectric layer 103 can be removed by a chemical mechanical polishing (CMP) process to form the first conductive pillar 108. Furthermore, in the chemical mechanical polishing process, a portion of the thickness of the first dielectric layer 103 can be removed to adjust the height of the first conductive pillar 108.

[0054] It should be noted that in this embodiment, the first protective layer 107 can protect the first metal barrier layer 105 on the sidewall and bottom edge of the via 104 during the etching process of the first metal barrier layer 105. The retained first metal barrier layer 105 covers the sidewall of the via 104 and extends to cover the edge area of ​​the bottom surface of the via 104. The retained first metal barrier layer 105 can not only prevent the metal of the first conductive post 108 from diffusing laterally into the dielectric layer, but also prevent the metal of the first conductive post 108 from diffusing vertically downward into the dielectric even when there is etching offset in the via 104. This can avoid the metal diffusion problem caused by the etching offset of the via, effectively improve the leakage problem caused by the metal diffusion into the dielectric, help improve the performance and stability of the metal interconnect structure, and also increase the etching process window of the via 104. Under the protection of the first protective layer 107, the etching removes the first metal barrier layer 105 in the area of ​​the bottom surface of the via that is not covered by the first protective layer, which can reduce the resistance of the first metal barrier layer 105.

[0055] The present invention also provides a metal interconnect structure. The metal interconnect structure can be manufactured using the above-described method for fabricating metal interconnect structures.

[0056] refer to Figure 7 As shown, the metal interconnect structure provided in this embodiment includes a first dielectric layer 103, a via 104, a first metal barrier layer 105, and a first conductive pillar 108. The first dielectric layer 103 is located on a bottom metal layer 101. The via 104 is located in and penetrates the first dielectric layer 103, and the via 104 corresponds to at least a portion of the metal position in the bottom metal layer 101. The first metal barrier layer 105 is located in the via 104, covers the sidewalls of the via 104, and extends into the via 104, covering the edge region of the bottom surface of the via 104. The first conductive pillar 108 fills the via 104 and is located on the first metal barrier layer 105, interconnecting with the bottom metal layer 101.

[0057] For example, the first metal barrier layer 105 extends at least into the through hole 104 to the metal surface of the bottom metal layer 101, so that the first metal barrier layer 105 can isolate the first conductive post 108 from the dielectric contact between the first conductive post 108 and the metal traces filled in the bottom metal layer 101, thereby effectively preventing the metal in the first conductive post 108 from diffusing into the dielectric.

[0058] refer to Figure 7 As shown, an NDC layer 102 may be disposed between the first dielectric layer 103 and the bottom metal layer 101, and a via 104 penetrates the NDC layer 102. The NDC layer 102 can prevent the metal in the bottom metal layer 101 from diffusing upward into the first dielectric layer 103, and can also serve as an etching stop layer for etching the first dielectric layer 103.

[0059] In the metal interconnect structure and fabrication method provided by the present invention, the first protective layer 107 can protect the first metal barrier layer 105 on the sidewall and bottom edge of the via 104 during the etching process. The retained first metal barrier layer 105 covers the sidewall of the via 104 and extends to cover the edge region of the bottom surface of the via 104. In this way, the retained first metal barrier layer 105 can not only prevent the metal of the first conductive post 108 from diffusing laterally into the dielectric layer, but also protect the first metal barrier layer 105 on the bottom edge region of the via 104 even when there is etching offset in the via 104. The metal barrier layer 105 can also prevent the metal of the first conductive post 108 from diffusing vertically downward into the medium. This can avoid the metal diffusion problem caused by the etching offset of the via 104, effectively improve the leakage problem caused by the metal diffusion into the medium, help improve the performance and stability of the metal interconnect structure, and also increase the etching process window of the via 104. Under the protection of the first protective layer 107, the first metal barrier layer 105 in the area of ​​the bottom surface of the via 104 not covered by the first protective layer is etched away, which can reduce the resistance of the first metal barrier layer 105.

[0060] Example 2

[0061] Figures 8 to 15 This is a schematic diagram illustrating the process of fabricating a metal interconnect structure according to Embodiment 2 of the present invention. It should be noted that the fabrication method of the metal interconnect structure in this embodiment is performed after the first conductive post 202 is fabricated. The first conductive post 202 can be the first conductive post 108 described above, but it can also be a conductive post whose side metal barrier layer has a different structure from the first metal barrier layer 105 described above. In other words, the fabrication method of the metal interconnect structure in this embodiment can be implemented after the fabrication method of Embodiment 1 is completed, but is not limited thereto.

[0062] like Figure 8 As shown, a second dielectric layer 204 is formed on the first dielectric layer 201, and the first dielectric layer 201 has a first conductive pillar 202.

[0063] For example, the first conductive post 202 may penetrate the first dielectric layer 201, and the sidewall of the first conductive post 202 may also have a first metal barrier layer 202a, which at least covers the sidewall of the first conductive post 202.

[0064] In this embodiment, a SiN layer 203 may be disposed between the first dielectric layer 201 and the second dielectric layer 204. The materials of the second dielectric layer 204 and the first dielectric layer 201 include, but are not limited to, silicon oxide.

[0065] Continue to refer to Figure 8As shown, the second dielectric layer 204, the SiN layer 203 and the first dielectric layer 201 are etched and a trench 205 is formed in the first dielectric layer 201. The bottom surface of the trench 205 is lower than the top surface of the first conductive post 202 near the second dielectric layer 204, and the trench 205 surrounds the top of the first conductive post 202.

[0066] The width of the groove 205 is greater than the width of the first conductive post 202, and the groove 205 and the through hole where the first conductive post 202 is located are connected to form a double damask structure.

[0067] like Figure 9 As shown, a second metal barrier layer 206 is formed on the second dielectric layer 204. The second metal barrier layer 206 covers the top surface of the second dielectric layer 204, the sidewalls and bottom surface of the trench 205, and the top surface of the first conductive pillar 202.

[0068] Next, the second metal barrier layer 206 on the top surface of the second dielectric layer 204 and the second metal barrier layer 206 on the top surface of the first conductive pillar 202 are etched away.

[0069] In this embodiment, the method for etching away the second metal barrier layer 206 on the top surface of the second dielectric layer 204 and removing the second metal barrier layer 206 on the top surface of the first conductive pillar 202 may include: as follows Figure 11 As shown, a sacrificial layer 208 is formed at the bottom of the trench 205, covering the bottom surface of the trench 205, and the top surface of the sacrificial layer 208 is lower than the top surface of the first conductive post 202; as shown Figure 13 As shown, a second protective layer 210 is formed, which covers the sidewalls of the trench 205 and exposes the top surface of the first conductive post 202; as Figure 14 As shown, under the cover of the second protective layer 210 and the sacrificial layer 208, the second metal barrier layer 206 on the top surface of the second dielectric layer 204 and the second metal barrier layer 206 on the top surface of the first conductive pillar 202 are etched away, and the remaining second metal barrier layer 206 covers the bottom surface and sidewalls of the trench 205.

[0070] More detailed, such as Figure 10 As shown, a sacrificial material layer 207 is formed on the second metal barrier layer 206, the sacrificial material layer 207 covering the top surface of the second dielectric layer 204 and filling the trench 205; as Figure 11 As shown, a portion of the sacrificial material layer 207 is etched away, and a sacrificial layer 208 is formed at the bottom of the trench 205. The sacrificial layer 208 covers the bottom surface of the trench 205, and the top surface of the sacrificial layer 208 is lower than the top surface of the first conductive pillar 202. This ensures that the second metal barrier layer 206 on the top surface of the first conductive pillar 202 is exposed. Figure 12As shown, a second protective material layer 209 is formed on the second metal barrier layer 206. The second protective material layer 209 covers the top surface of the sacrificial layer 208, the second dielectric layer 204, and the sidewalls of the trench 205 located on the sacrificial layer 208; as Figure 13 As shown, an anisotropic etching process is used to etch away the second protective material layer 209 on the top surface of the second dielectric layer 204 and the second protective material layer 209 on the top surface of the first conductive pillar 202, so as to form a second protective layer 210 on the sidewall of the trench 205. The second protective layer 210 covers the sidewall of the trench 205 located on the sacrificial layer 208; as Figure 14 As shown, under the cover of the second protective layer 210 and the sacrificial layer 208, the second metal barrier layer 206 on the top surface of the second dielectric layer 204 and the second metal barrier layer 206 on the top surface of the first conductive pillar 202 are etched away.

[0071] It should be noted that before forming the second protective layer 210, a sacrificial layer 208 is first filled into the bottom surface of the trench 205. Under the joint protection of the second protective layer 210 and the sacrificial layer 208, it can be ensured that the second metal barrier layer 206 can cover the bottom surface and sidewalls of the trench 205 during the etching process of the second metal barrier layer 206. Even if there is etching offset in the trench 205, it can be ensured that the second conductive pillar formed in the trench 205 will not contact the first dielectric layer 201 below it, and the metal of the second conductive pillar will not diffuse downward into the first dielectric layer 201. In addition, setting the sacrificial layer 208 can also reduce the thickness limitation of the second protective layer 210.

[0072] For example, the sacrificial layer 208 includes a material layer that provides some protection and is easy to remove, such as a bottom anti-reflective layer (BARC) or a photoresist layer. The second protective layer 210 includes, but is not limited to, a TiN layer, a nitrogen-free anti-reflective coating (NFDARC), or a SiN layer. In some embodiments, the material of the sacrificial layer 208 may be the same as the material of the second protective layer 210, but it is not limited thereto.

[0073] In other embodiments, the method of etching away the second metal barrier layer on the top surface of the second dielectric layer 204 and removing the second metal barrier layer 206 on the top surface of the first conductive pillar 202 may include: forming a second protective layer 210 on the sidewall of the trench 205, the second protective layer 210 covering the sidewall and bottom surface of the trench 205, and exposing the second metal barrier layer 206 on the top surface of the first conductive pillar 202; and etching away the second metal barrier layer 206 on the top surface of the second dielectric layer 204 and the second metal barrier layer 206 on the top surface of the first conductive pillar 202 under the cover of the second protective layer 210. It should be noted that this eliminates the need for a sacrificial layer, but the thickness of the second protective layer 210 needs to be selected based on the bottom width of the trench 205 and the width of the first conductive pillar 202 to ensure that the second protective layer 210 can cover the bottom surface of the trench 205. In some embodiments, the second protective layer may be a photoresist layer, which can be formed by exposure and development to cover the sidewall and bottom surface of the trench 205 and expose the top surface of the first conductive pillar 202.

[0074] In this embodiment, the material of the second metal barrier layer 206 includes a TaN layer and a Ta layer, or the material of the second metal barrier layer 206 includes a TiN layer and a Ti layer, but is not limited thereto.

[0075] Next, as Figure 15 As shown, the sacrificial layer 208 and the second protective layer 210 are removed. Exemplarily, a wet process is used to remove the sacrificial layer 208 and the second protective layer 210.

[0076] Figure 16 This is a schematic diagram of the metal interconnect structure provided in Embodiment 2 of the present invention. Figure 16 As shown, a second conductive post 211 is formed by filling the trench 205 with metal material. The second conductive post 211 is in contact with the first conductive post 202. Specifically, the second conductive post 211 is in contact with at least the top surface of the first conductive post 202.

[0077] In this embodiment, the first conductive post 202 and the second conductive post 211 may be made of the same material, but are not limited thereto.

[0078] In this embodiment, the through hole where the groove 205 and the first conductive post 202 are located forms a double damask structure. The first conductive post 202 and the second conductive post 211 in the double damask structure are formed by two fillings, which can reduce the amount of metal filled in one time and reduce the filling difficulty.

[0079] In some other embodiments, after etching away the second metal barrier layer 206 on the top surface of the second dielectric layer 204 and the second metal barrier layer 206 on the top surface of the first conductive pillar 202, under the masking of the second protective layer 210 and the sacrificial layer 208, the second protective layer 210 and the sacrificial layer 208 can be left unremoved, and the trench 205 can be directly filled with metal material to form the second conductive pillar 211. In this case, it is necessary to ensure that the materials of the sacrificial layer 208 and the second protective layer 210 do not affect the conductivity of the second conductive pillar 211 and must have a certain degree of stability. For example, the materials of the sacrificial layer 208 and the second protective layer 210 can be the same, for example, both being silicon oxide layers.

[0080] This embodiment also provides a metal interconnect structure, which can be manufactured using the method provided in this embodiment, but is not limited thereto.

[0081] refer to Figure 16 As shown, the metal interconnect structure may include a first dielectric layer 201, a first conductive pillar 202, a second dielectric layer 204, a trench 205, a second metal barrier layer 206, and a second conductive pillar 211.

[0082] Specifically, the first dielectric layer 201 has a first conductive post 202. A second dielectric layer 204 is located on the first dielectric layer 201. A trench 205 penetrates the second dielectric layer 204, with its bottom surface located within the first dielectric layer 201. The trench 205 corresponds to the position of the first conductive post 202, and its bottom surface is lower than the top surface of the first conductive post 202 near the second dielectric layer 204. The trench 205 surrounds the top surface of the first conductive post 202. A second metal barrier layer 206 covers the sidewalls of the trench 205 and extends towards the first conductive post 202, covering the bottom surface of the trench 205, but not the top surface of the first conductive post 202. The second conductive post 211 fills the trench 205 and surrounds the top surface of the first conductive post 202, and is electrically connected to the first conductive post 202.

[0083] In this embodiment, the trench 205 is connected to the through hole where the first conductive post 202 is located to form a double damask structure, and the width of the trench 205 is greater than the width of the through hole where the first conductive post 202 is located.

[0084] In this embodiment, the second conductive post 211 is in direct contact with the second metal barrier layer 206. In some other embodiments, the metal interconnect structure may further include a sacrificial layer and a second protective layer, wherein the sacrificial layer covers the bottom surface of the trench 205 and the top surface of the sacrificial layer is lower than the top surface of the first conductive post 202, the second protective layer covers the sidewall of the trench 205 located on the sacrificial layer, and the second conductive post 211 is located on the sacrificial layer and the second protective layer.

[0085] refer to Figure 16As shown, a SiN layer 203 may be disposed between the first dielectric layer and the second dielectric layer, and a trench 205 penetrates the SiN layer 203.

[0086] In this embodiment, a first metal barrier layer 202a may also be formed on the sidewall of the first conductive post 202, and the first metal barrier layer 202a wraps around the sidewall of the first conductive post 202. In some embodiments, the first metal barrier layer 202a may also extend toward the center of the bottom surface of the first conductive post 202 to cover the edge region of the bottom surface of the first conductive post 202, but is not limited thereto.

[0087] In the metal interconnect structure and fabrication method provided by this invention, the second protective layer 210 and the sacrificial layer 208 can jointly protect the second metal barrier layer 206 on the trench sidewalls and bottom edge during the etching process. The retained second metal barrier layer 206 covers the sidewalls of the trench 205 and extends towards the first conductive post 202, covering the bottom surface of the trench 205. In this way, the retained second metal barrier layer 206 can prevent the metal of the second conductive post 202 from laterally diffusing into the dielectric layer. Even when there is etching offset in the trench 205, the second metal barrier layer on the bottom surface of the trench 205 can still prevent the metal of the second conductive post 202 from laterally diffusing into the dielectric layer. The barrier layer 206 can also prevent the metal of the second conductive pillar 211 from diffusing vertically downward into the first dielectric layer 201. This can avoid the metal diffusion problem caused by trench etching offset, effectively improve the leakage problem caused by metal diffusion into the dielectric, help improve the performance and stability of the metal interconnect structure, and also increase the etching process window of the trench. Under the protection of the second protective layer 210 and the sacrificial layer 208, the second metal barrier layer 206 on the top surface of the first conductive pillar 202 that is not covered by the first protective layer is etched away, which can reduce the resistance of the second metal barrier layer 206.

[0088] It should be noted that this instruction manual uses a progressive approach, with later descriptions focusing on the differences from earlier descriptions. Similarities and similarities between different sections can be found by referring to each other.

[0089] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention by utilizing the methods and techniques disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the protection scope of the technical solutions of the present invention.

Claims

1. A method for fabricating a metal interconnect structure, characterized in that, include: A first dielectric layer is formed on a bottom metal layer, and a through-hole is formed in the first dielectric layer, the through-hole exposing a portion of the metal of the bottom metal layer. A first metal barrier layer is formed on the first dielectric layer, the first metal barrier layer covering the top surface of the first dielectric layer and covering the sidewalls and bottom surface of the through hole; A first protective layer is formed on the sidewall of the through hole, the first protective layer covering the first metal barrier layer on the sidewall of the through hole and covering the first metal barrier layer on the edge area of ​​the bottom surface of the through hole; Under the cover of the first protective layer, the first metal barrier layer on the top surface of the first dielectric layer and the first metal barrier layer in the area of ​​the bottom surface of the via not covered by the first protective layer are etched away. Remove the first protective layer; as well as A first conductive pillar is formed by filling the through hole with a metal material, and the first conductive pillar is interconnected with the bottom metal layer.

2. The method for fabricating the metal interconnect structure as described in claim 1, characterized in that, The method for forming a first protective layer on the sidewall of the through hole includes: A first protective material layer is formed on the first metal barrier layer, and the first protective material layer covers the first metal barrier layer; An anisotropic etching process is used to etch away the first protective material layer on the top surface of the first dielectric layer and a portion of the first protective material layer on the bottom surface of the via, leaving the remaining first protective material layer on the sidewall of the via as the first protective layer.

3. The method for fabricating the metal interconnect structure as described in claim 1, characterized in that, In the step of filling the through hole with metal material to form the first conductive pillar, the metal material is formed by electroplating or chemical vapor deposition.

4. The method for fabricating the metal interconnect structure as described in claim 3, characterized in that, The step of filling the through hole with metal material to form a first conductive pillar includes: filling the through hole with metal material, and then removing at least a portion of the metal material by a chemical mechanical polishing process to form the first conductive pillar.

5. The method for fabricating the metal interconnect structure as described in claim 1, characterized in that, The first protective layer includes a TiN layer, a nitrogen-free anti-reflective coating, or a SiN layer.

6. A method for fabricating a metal interconnect structure, characterized in that, include: A second dielectric layer is formed on a first dielectric layer, wherein the first dielectric layer has a first conductive pillar; The second dielectric layer and the first dielectric layer are etched and the formation of a trench in the first dielectric layer is stopped. The bottom surface of the trench is lower than the top surface of the first conductive post near the second dielectric layer and the trench surrounds the top of the first conductive post. A second metal barrier layer is formed on the second dielectric layer, the second metal barrier layer covering the top surface of the second dielectric layer, the sidewalls and bottom surface of the trench, and the top surface of the first conductive post; A sacrificial layer is formed at the bottom of the trench, the sacrificial layer covers the bottom surface of the trench, and the top surface of the sacrificial layer is lower than the top surface of the first conductive post; A second protective layer is formed, which covers the sidewalls of the trench and exposes the top surface of the first conductive post; Under the cover of the second protective layer and the sacrificial layer, the second metal barrier layer on the top surface of the second dielectric layer and the second metal barrier layer on the top surface of the first conductive pillar are etched away. as well as A second conductive post is formed by filling the trench with metal material, and the second conductive post is in contact with the first conductive post.

7. The method for fabricating the metal interconnect structure as described in claim 6, characterized in that, After etching away the second metal barrier layer on the top surface of the second dielectric layer and removing the second metal barrier layer on the top surface of the first conductive pillar, and before filling the trench with metal material to form the second conductive pillar, the second protective layer and the sacrificial layer are removed.

8. The method for fabricating the metal interconnect structure as described in claim 6, characterized in that, The second protective layer includes a TiN layer, a nitrogen-free anti-reflective coating, or a SiN layer; the sacrificial layer includes a bottom anti-reflective layer or a photoresist layer.

9. A metal interconnect structure, characterized in that, include: The first dielectric layer is located on the bottom metal layer; A via is located in and penetrates the first dielectric layer, and the via corresponds to at least a portion of the metal position in the bottom metal layer; A first metal barrier layer is located in the through hole, covering the sidewall of the through hole and extending inward to cover the edge area of ​​the bottom surface of the through hole; as well as A first conductive post fills the through-hole and is located on the first metal barrier layer, interconnecting with the bottom metal layer.

10. The metal interconnect structure as claimed in claim 9, characterized in that, The first metal barrier layer extends at least into the via to the metal surface of the bottom metal layer; an NDC layer is disposed between the first dielectric layer and the bottom metal layer, and the via penetrates the NDC layer.

11. A metal interconnect structure, characterized in that, include: A first dielectric layer, wherein the first dielectric layer has a first conductive pillar; The second dielectric layer is located on the first dielectric layer; A trench that penetrates the second dielectric layer and has its bottom surface located in the first dielectric layer, wherein the bottom surface of the trench is lower than the top surface of the first conductive post near the second dielectric layer and the trench surrounds the top of the first conductive post; A second metal barrier layer covers the sidewalls of the trench and extends toward the first conductive post to cover the bottom surface of the trench; And it does not cover the top surface of the first conductive post; as well as A second conductive post fills the groove and surrounds the top of the first conductive post, and the second conductive post is electrically connected to the first conductive post.

12. The metal interconnect structure as claimed in claim 11, characterized in that, It also includes a sacrificial layer and a second protective layer, the sacrificial layer covering the bottom surface of the trench and the top surface of the sacrificial layer being lower than the top surface of the first conductive post, the second protective layer covering the sidewall of the trench located on the sacrificial layer; the second conductive post is located on the sacrificial layer and the second protective layer.