Graphics processor based multi-satellite signal acquisition method
By working in concert with the central processing unit and the graphics processing unit, and utilizing CUDA streaming concurrency and Fourier transform pre-configuration schemes, the problems of insufficient computational complexity and real-time performance in multi-mode multi-frequency satellite signal acquisition methods are solved, and efficient and reliable multi-constellation signal acquisition is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SUN YAT SEN UNIV
- Filing Date
- 2026-04-22
- Publication Date
- 2026-05-29
AI Technical Summary
Existing multi-mode, multi-frequency satellite signal acquisition methods are insufficient in terms of computational complexity and real-time performance. Traditional CPU or FPGA-based serial/limited parallel schemes are difficult to meet the requirements of synchronous parallel acquisition of multi-constellation signals and do not fully utilize the characteristics of the CUDA programming model of graphics processors.
A multi-satellite signal acquisition method based on a graphics processor is adopted. By configuring parallel task parameters at the central processing unit, local code and intermediate frequency data are asynchronously uploaded to the graphics processor. The CUDA streaming concurrency strategy is used to allocate and perform parallel computing for the Doppler dimension. Combined with the Fourier transform pre-configuration plan and the mixing lookup table, a code phase correlation sequence is generated. The results are then summarized at the central processing unit to determine the acquisition validity.
It significantly improves the real-time acquisition speed of multi-mode and multi-frequency signals, enhances resource utilization and computational efficiency, supports unified processing of multi-mode signals, and ensures acquisition accuracy and reliability in high-noise environments.
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Figure CN122111684A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the fields of navigation and communication, and in particular to a method for acquiring multi-satellite signals based on a graphics processor. Background Technology
[0002] Current navigation satellite systems have entered an era of multi-system coexistence and interoperability. By using multi-mode, multi-frequency receivers, signals from different frequency bands and constellations are fused to improve the availability, accuracy, integrity, and reliability of positioning services. However, the fusion processing of multi-mode, multi-frequency signals has also led to a combinatorial explosion in the computational complexity of the baseband signal acquisition stage. Traditional serial / limited parallel solutions based on CPUs or FPGAs are no longer sufficient to meet real-time requirements.
[0003] For example, in one feasible implementation, the parallel dimension relies entirely on the organization of the thread grid, failing to utilize CUDA's streaming concurrency strategy to form a task-level pipeline. This undermines the full potential of the GPU's CUDA programming model and leads to unmerged access latency to GPU memory, reducing capture speed. Other feasible implementations focus on algorithm design and resource allocation around this single signaling system, failing to address the problem of synchronous parallel capture of multi-constellation signals in an architectural way.
[0004] Therefore, a multi-satellite signal acquisition method based on a graphics processor is needed to fully utilize the model characteristics of CUDA to improve the effectiveness and concurrency of the multi-mode, multi-frequency, and multi-system satellite signal acquisition process. Summary of the Invention
[0005] The purpose of this application is to at least address one of the aforementioned technical deficiencies, particularly the limitations in the effectiveness and concurrency characteristics of the existing multi-mode, multi-frequency, and multi-system satellite signal acquisition process.
[0006] Firstly, this application provides a multi-satellite signal acquisition method based on a graphics processor, including:
[0007] Configure parallel task parameters on the central processing unit and obtain the local code and intermediate frequency data corresponding to the target satellite signal, and asynchronously upload the local code and the intermediate frequency data to the graphics processing unit.
[0008] On the graphics processor, the local code and the intermediate frequency data are preprocessed to obtain the local code FFT and the target intermediate frequency data;
[0009] On the graphics processor, based on the Doppler dimension, parallel tasks are allocated according to the parallel task parameters to determine multiple parallel subtasks based on CUDA streams. According to the CUDA architecture, each of the parallel subtasks based on CUDA streams is executed in parallel on multiple CUDA streams in the code phase domain, and the execution results are asynchronously sent back to the central processing unit.
[0010] At the central processing unit, the execution results are summarized, target parameters are determined based on the execution results, and signal capture validity is determined based on the target parameters.
[0011] As an optional implementation, the parallel task parameters include a parallel CUDA stream and a Fourier transform pre-configuration plan. The parallel CUDA stream is used to perform asynchronous data transmission and parallel computation. The Fourier transform pre-configuration plan includes a Fast Fourier Transform plan or a Fast Fourier Transform plan. The parameters of the Fourier transform pre-configuration plan include transform length and transform type. Each Fourier transform pre-configuration plan corresponds to a parallel CUDA stream used to perform parallel computation.
[0012] As an optional implementation, the method of allocating parallel tasks based on the Doppler dimension and the parallel task parameters to determine multiple parallel subtasks based on CUDA streams, and executing each of the parallel subtasks based on CUDA streams in parallel on multiple CUDA streams in the code phase domain according to the CUDA architecture, and asynchronously transmitting the execution results back to the central processing unit, includes:
[0013] Based on the Doppler dimension, the full Doppler search range is divided into a first number of search units, and parallel subtasks based on CUDA streams corresponding to each search unit are determined. The parallel subtasks based on CUDA streams are then assigned to a second number of parallel CUDA streams.
[0014] On the second number of parallel CUDA streams, for each corresponding search unit, the CUDA kernel function and cuFFT library are called to execute each of the parallel subtasks based on the CUDA streams in parallel on multiple CUDA streams based on the Fourier transform pre-configured plan, obtain the execution results, and asynchronously send the execution results back to the central processing unit.
[0015] As an optional implementation, the step of calling CUDA kernel functions and the cuFFT library on the second number of parallel CUDA streams for each corresponding search unit, and executing each CUDA stream-based parallel subtask in parallel on multiple CUDA streams based on the Fourier transform pre-configured plan, obtaining the execution results, and asynchronously sending the execution results back to the central processing unit includes:
[0016] The CUDA kernel function is called to asynchronously downconvert the target intermediate frequency data to a baseband signal based on the frequency points corresponding to each search unit through a pre-stored mixing lookup table.
[0017] Based on the Fourier transform pre-configuration plan, the baseband signal is subjected to fast Fourier transform based on cuFFT, and then the CUDA kernel function is used to perform a dot multiplication operation with the local code FFT to obtain the frequency domain correlation result. The frequency domain correlation result is then subjected to inverse fast Fourier transform to generate a code phase correlation sequence.
[0018] The code phase correlation sequence is subjected to a first-level reduction process to obtain the execution result, and the execution result is asynchronously sent back to the central processing unit.
[0019] As an optional implementation, before performing first-level reduction processing on the code phase correlation sequence, the method further includes:
[0020] Incoherent accumulation is performed on the code phase correlation sequence within a preset time period, and the squares of the magnitudes of the code phase correlation sequence over multiple consecutive unit processing times are summed to obtain the enhanced signal;
[0021] And, the step of performing a first-level reduction process on the code phase correlation sequence to obtain the execution result and asynchronously transmitting the execution result back to the central processing unit includes:
[0022] The enhanced signal is subjected to a first-level reduction process to determine the local peak information of each search unit;
[0023] The local peak information includes the maximum value, mean value, and index information of the enhanced signal;
[0024] Based on each of the search units, the local peak information is asynchronously transmitted back to the central processing unit.
[0025] As an optional implementation, the step of summarizing the execution results at the central processing unit, determining target parameters based on the execution results, and determining signal capture validity based on the target parameters includes:
[0026] The execution results are aggregated at the central processing unit to determine the global index, global peak value, and global average value.
[0027] Based on the global index, determine the Doppler frequency shift result and the code phase result;
[0028] The carrier-to-noise ratio is calculated based on the global peak value and the global mean value.
[0029] The carrier-to-noise ratio (CNR) result is compared with a preset acquisition threshold. If the CNR result is greater than the acquisition threshold, the acquisition is considered successful. Based on the neighboring point information of the global index, the fine Doppler is calculated based on the Doppler frequency shift result and the code phase result, and the signal tracking stage begins.
[0030] Secondly, this application provides a multi-satellite signal acquisition device based on a graphics processor, comprising:
[0031] The acquisition module is used to configure parallel task parameters on the central processing unit and acquire the local code and intermediate frequency data corresponding to the target satellite signal, and asynchronously upload the local code and the intermediate frequency data to the graphics processing unit.
[0032] The processing module is used to preprocess the local code and the intermediate frequency data on the graphics processor side to obtain the local code FFT and the target intermediate frequency data;
[0033] The processing module is further configured to, on the graphics processor side, allocate parallel tasks based on the Doppler dimension and according to the parallel task parameters, determine multiple parallel subtasks based on CUDA streams, and execute each of the parallel subtasks based on CUDA streams in parallel on multiple CUDA streams in the code phase domain according to the CUDA architecture, and asynchronously send the execution results back to the central processing unit.
[0034] The processing module is further configured to, at the central processing unit, summarize the execution results, determine target parameters based on the execution results, and determine the signal capture validity based on the target parameters.
[0035] As an optional implementation, the parallel task parameters include a parallel CUDA stream and a Fourier transform pre-configuration plan. The parallel CUDA stream is used to perform asynchronous data transmission and parallel computation. The Fourier transform pre-configuration plan includes a Fast Fourier Transform plan or a Fast Fourier Transform plan. The parameters of the Fourier transform pre-configuration plan include transform length and transform type. Each Fourier transform pre-configuration plan corresponds to a parallel CUDA stream used to perform parallel computation.
[0036] Thirdly, this application provides a computer device including one or more processors and a memory storing computer-readable instructions that, when executed by the one or more processors, perform the steps of the method described in the first aspect.
[0037] Fourthly, this application provides a storage medium storing computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform the steps of the method described in the first aspect.
[0038] As can be seen from the above technical solutions, the embodiments of this application have the following advantages:
[0039] Based on any of the above embodiments, this application proposes a multi-level parallel CPU-GPU collaborative capture architecture. At the central processing unit (CPU), by configuring parallel task parameters and asynchronously uploading local code and intermediate frequency (IF) data, a foundation for efficient computation at the graphics processing unit (GPU) is laid. The GPU first preprocesses the data to generate local code FFT and IF data. Then, based on the Doppler dimension, the search range is divided into multiple subtasks, dynamically allocated to independent CUDA streams to form a task-level pipeline. Each CUDA stream calls a pre-bound Fourier transform plan, uses a mixing lookup table for rapid down-conversion to baseband, generates a code phase correlation sequence through frequency domain multiplication and inverse transform, enhances the signal-to-noise ratio (SNR) through incoherent accumulation, and finally extracts local peak values through a first-level reduction and asynchronously transmits them back. The CPU integrates all local results, calculates the global carrier-to-noise ratio (CNR), and determines the capture validity. Upon success, it outputs fine Doppler parameters by combining information from adjacent points.
[0040] Specifically, this architecture achieves the following effects:
[0041] Multi-level parallel optimization and multi-CUDA stream task allocation in the Doppler dimension enable task-level streaming concurrency. Thread-level parallelism in the code phase domain fully leverages GPU computing power, and asynchronous data transmission hides latency, significantly improving resource utilization.
[0042] Improved computational efficiency, pre-stored mixing lookup table avoids redundant calculation of downconversion parameters, pre-bound FFT / IFFT plan reduces transformation initialization overhead, frequency domain correlation operation reduces computational complexity, and incoherent accumulation enhances weak signal detection capability.
[0043] Multi-system compatibility and parametric design support unified processing of heterogeneous signal frequencies such as GPS and BeiDou, avoiding repeated development for a single signal;
[0044] End-to-end reliability, local peak reduction to compress data return scale, and global decision-making at the central processing unit combined with carrier-to-noise ratio and fine Doppler interpolation ensure acquisition accuracy in high-noise environments. In summary, this solution improves the real-time acquisition speed of multi-mode, multi-frequency signals while maintaining architectural flexibility and result reliability, providing technical support for the large-scale application of software receivers. Attached Figure Description
[0045] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0046] Figure 1 A flowchart illustrating a multi-satellite signal acquisition method based on a graphics processor provided in one embodiment of this application;
[0047] Figure 2 A complete flowchart illustrating a graphics processor-based multi-satellite signal acquisition method provided in one embodiment of this application, based on a real-world application scenario;
[0048] Figure 3 This is an internal structural diagram of a computer device provided in an embodiment of this application. Detailed Implementation
[0049] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0050] The following is an explanation of important terms and concepts:
[0051] GNSS: Global Navigation Satellite System.
[0052] CPU: Central Processing Unit, responsible for general computing and process control.
[0053] GPU: Graphics Processing Unit, which excels at large-scale parallel computing.
[0054] Software receivers transfer the core functions of carrier tracking, code tracking, and signal demodulation, which are implemented in hardware in traditional satellite receivers, to a general-purpose processor (CPU / GPU) and complete them in software. Only the front-end RF hardware is retained to perform signal down-conversion and analog-to-digital conversion. The core features are flexibility and reconfigurability, which is different from the fixed architecture of traditional all-hardware receivers.
[0055] CUDA: A general-purpose parallel computing architecture and programming model introduced by NVIDIA, which allows developers to perform computations on GPUs using languages such as C / C++.
[0056] CUDA streams: A queue of operations (such as memory copying and kernel execution) on the GPU. Operations in different streams can be executed concurrently to achieve task-level parallelism and hide data transfer latency.
[0057] cuFFT: A library function provided by the CUDA platform for efficiently performing Fast Fourier Transform / Inverse Transform on GPUs.
[0058] Intermediate frequency data: The intermediate frequency digital signal of the satellite signal after downconversion by the receiver's radio frequency front end, which has not yet been demodulated to the baseband.
[0059] Local code: A copy code generated internally by the receiver that has the exact same structure as the pseudo-random noise code broadcast by the target satellite.
[0060] Down-conversion: The process of shifting the carrier frequency of a signal from a higher intermediate frequency to a baseband frequency close to zero.
[0061] FFT / IFFT: Fast Fourier Transform and its inverse transform, used to efficiently convert signals between the time domain and the frequency domain.
[0062] Incoherent accumulation: Accumulates the signal power (usually the square of the magnitude of the correlation result) over multiple time periods to improve the signal-to-noise ratio.
[0063] Reduction: In parallel computing, the process of combining data scattered in multiple locations (such as multiple threads on a GPU) into a single or small number of results through specific operations (such as finding the maximum value or summing).
[0064] Doppler / Doppler frequency shift: The frequency shift of the received signal caused by the relative motion between the satellite and the receiver.
[0065] Doppler frequency: A preset Doppler frequency shift value during signal search.
[0066] Code phase: The time delay between the received satellite pseudocode and the locally copied code, corresponding to the signal propagation time.
[0067] Carrier-to-noise ratio (CNR): The ratio of carrier power to noise power spectral density, used to measure signal quality.
[0068] The Global Navigation Satellite System (GNSS) has entered an era of coexistence and interoperability among multiple systems, represented by GPS, BeiDou, Galileo, and QZSS. Multi-mode, multi-frequency receivers, by fusing signals from different frequency bands and constellations, can significantly improve the availability, accuracy, integrity, and reliability of positioning services, becoming a fundamental support for cutting-edge fields such as high-precision positioning and autonomous driving. Meanwhile, software receivers, as an important technological branch of GNSS receivers, are gradually demonstrating unique advantages in multi-mode, multi-frequency signal processing scenarios due to their flexible and reconfigurable characteristics.
[0069] However, the fusion processing of multi-mode and multi-frequency signals has led to a combined explosive increase in the computational complexity of the baseband signal acquisition stage, making it difficult for traditional CPU or FPGA-based serial / limited parallel solutions to meet real-time requirements.
[0070] One feasible implementation provides a technical path for using a GPU to achieve two-dimensional signal search (Doppler shift and code phase) on a GNSS signal software receiver platform. The entire two-dimensional search space (Doppler × code phase) is directly mapped to the GPU's thread-block parallel hardware architecture. Specifically, by carefully designing the dimensions (x, y, z) of the thread blocks and the number of threads in each block, thousands of GPU threads can simultaneously process different search units, thus achieving full spatial parallelism in the search process. The advantage of this approach is that it fully utilizes the GPU's thread-level parallelism capabilities. However, its parallelism dimension depends entirely on the organization of the thread grid, failing to leverage CUDA's streaming concurrency strategy to form a task-level pipeline, thus not fully utilizing the characteristics of the CUDA programming model, and leading to uncoordinated memory access latency on the GPU device, reducing acquisition speed.
[0071] Another implementation of parallel GPS signal acquisition based on a GPU explores the use of a CUDA architecture GPU to accelerate GPS signal acquisition on a GNSS signal software receiver platform. It employs the classic "parallel code phase search" algorithm and utilizes the GPU to process correlation calculations across multiple satellites and frequencies in parallel. However, these implementations often limit their scope to a single signal, such as the GPS L1 C / A signal. Their algorithm design and resource allocation revolve around this single signal system, failing to address the problem of synchronous parallel acquisition of multiple constellation signals in an architectural way.
[0072] In essence, the two-dimensional search for satellite signal acquisition is to complete grid traversal matching in the two-dimensional space formed by the two core unknowns of code phase and Doppler frequency shift that exist after the satellite signal arrives at the terminal. The core is to achieve simultaneous alignment of the two quantities from weak signals submerged by strong noise and complete signal detection.
[0073] Specifically, the satellite signal landing is a modulated signal with unknown code phase offset (i.e., the position of the initial code chip of the pseudo-random code is uncertain) and Doppler frequency shift (caused by the relative motion between the satellite and the terminal causing the carrier frequency to deviate from the nominal value). The terminal first generates a local pseudo-random code according to the target satellite's pseudo-random code sequence, and at the same time generates local carriers with different frequency offsets covering the Doppler search range. Then, the received signal is mixed with the local carrier to cancel the current frequency offset, down-converted to baseband to eliminate frequency mismatch, and then the baseband signal and the local pseudo-random code are cross-correlated and accumulated to improve the signal-to-noise ratio. After that, all combinations of code phase and frequency offset are traversed. When the correlation output peak exceeds the decision threshold, the acquisition is successful, the set of parameters is locked, and subsequent tracking begins. The core of the whole process is to rely on the combination of Doppler domain and code phase domain correlation accumulation to combat low signal-to-noise ratio, complete weak signal extraction and key parameter locking, and lay the foundation for subsequent carrier tracking and code tracking. Essentially, it is a two-dimensional simultaneous matching to achieve accurate acquisition of weak satellite signals in noise.
[0074] To address the shortcomings of existing signal acquisition technologies on GNSS signal software receiver platforms, such as insufficient computational throughput to meet real-time requirements, low hardware resource utilization resulting in poor energy efficiency, and inadequate support for multi-frequency and multi-mode signals, this application proposes a multi-level parallel CPU-GPU collaborative acquisition architecture. At the central processing unit (CPU), parallel task parameters are configured, and local code and intermediate frequency (IF) data are asynchronously uploaded, laying the foundation for efficient computation at the graphics processing unit (GPU). The GPU first preprocesses the data to generate local code FFT and IF data. Then, based on the Doppler dimension, the search range is divided into multiple subtasks, dynamically allocated to independent CUDA streams to form a task-level pipeline. Each CUDA stream invokes a pre-bound Fourier transform plan, rapidly downconverts to baseband using a mixing lookup table, generates a code phase correlation sequence through frequency domain multiplication and inverse transform, enhances the signal-to-noise ratio through incoherent accumulation, and finally extracts local peak values through a first-level reduction and asynchronously transmits them back. The central processing unit integrates all local results, calculates the global carrier-to-noise ratio, and determines the validity of the acquisition. When successful, it combines information from neighboring points to output fine Doppler parameters.
[0075] Specifically, this architecture achieves the following effects:
[0076] Multi-level parallel optimization and multi-CUDA stream task allocation in the Doppler dimension enable task-level streaming concurrency. Thread-level parallelism in the code phase domain fully leverages GPU computing power, and asynchronous data transmission hides latency, significantly improving resource utilization.
[0077] Improved computational efficiency, pre-stored mixing lookup table avoids redundant calculation of downconversion parameters, pre-bound FFT / IFFT plan reduces transformation initialization overhead, frequency domain correlation operation reduces computational complexity, and incoherent accumulation enhances weak signal detection capability.
[0078] Multi-system compatibility and parametric design support unified processing of heterogeneous signal frequencies such as GPS and BeiDou, avoiding repeated development for a single signal;
[0079] End-to-end reliability, local peak reduction to compress data return scale, and global decision-making at the central processing unit combined with carrier-to-noise ratio and fine Doppler interpolation ensure acquisition accuracy in high-noise environments. In summary, this solution improves the real-time acquisition speed of multi-mode, multi-frequency signals while maintaining architectural flexibility and result reliability, providing technical support for the large-scale application of software receivers.
[0080] The methods provided in this application will be described in detail below based on the corresponding implementation methods in some practical application scenarios.
[0081] Figure 1 A flowchart illustrating a multi-satellite signal acquisition method based on a graphics processor, as provided in one embodiment of this application, is shown below. Figure 1 As shown, this application provides a multi-satellite signal acquisition method based on a graphics processor, the method comprising:
[0082] S101. Configure parallel task parameters on the central processing unit and obtain the local code and intermediate frequency data corresponding to the target satellite signal, and asynchronously upload the local code and the intermediate frequency data to the graphics processing unit.
[0083] As an optional implementation, the parallel task parameters include a parallel CUDA stream and a Fourier transform pre-configuration plan. The parallel CUDA stream is used to perform asynchronous data transmission and parallel computation. The Fourier transform pre-configuration plan includes a Fast Fourier Transform plan or a Fast Fourier Transform plan. The parameters of the Fourier transform pre-configuration plan include transform length and transform type. Each Fourier transform pre-configuration plan corresponds to a parallel CUDA stream used to perform parallel computation.
[0084] This implementation predefines parallel CUDA streams and Fourier transform plans, binding each transform plan to an independent CUDA stream, enabling the reuse of parameters for the Fast Fourier Transform (FFT) and its inverse transform. This design avoids redundant initialization of computational resources, ensuring that transform tasks for different frequencies or satellite signals are executed in parallel across multiple CUDA streams within independent CUDA streams. This reduces idle waiting time for GPU computing units, thereby improving the efficiency of frequency domain correlation operations. Simultaneously, the strict correspondence between pre-configured transform lengths and types and CUDA streams further optimizes memory access patterns, reduces data transmission conflicts, and enhances the overall throughput of multi-frequency signal processing.
[0085] S102. On the graphics processor, the local code and the intermediate frequency data are preprocessed to obtain the local code FFT and the target intermediate frequency data.
[0086] S103. On the graphics processor, based on the Doppler dimension, parallel tasks are allocated according to the parallel task parameters to determine multiple parallel subtasks based on CUDA streams. According to the CUDA architecture, each of the parallel subtasks based on CUDA streams is executed in parallel on multiple CUDA streams in the code phase domain, and the execution results are asynchronously sent back to the central processing unit.
[0087] As an optional implementation, the method of allocating parallel tasks based on the Doppler dimension and the parallel task parameters to determine multiple parallel subtasks based on CUDA streams, and executing each of the parallel subtasks based on CUDA streams in parallel on multiple CUDA streams in the code phase domain according to the CUDA architecture, and asynchronously transmitting the execution results back to the central processing unit, includes:
[0088] Based on the Doppler dimension, the full Doppler search range is divided into a first number of search units, and parallel subtasks based on CUDA streams corresponding to each search unit are determined. The parallel subtasks based on CUDA streams are then assigned to a second number of parallel CUDA streams.
[0089] On the second number of parallel CUDA streams, for each corresponding search unit, the CUDA kernel function and cuFFT library are called to execute each of the parallel subtasks based on the CUDA streams in parallel on multiple CUDA streams based on the Fourier transform pre-configured plan, obtain the execution results, and asynchronously send the execution results back to the central processing unit.
[0090] As an optional implementation, the step of calling CUDA kernel functions and the cuFFT library on the second number of parallel CUDA streams for each corresponding search unit, and executing each CUDA stream-based parallel subtask in parallel on multiple CUDA streams based on the Fourier transform pre-configured plan, obtaining the execution results, and asynchronously sending the execution results back to the central processing unit includes:
[0091] The CUDA kernel function is called to asynchronously downconvert the target intermediate frequency data to a baseband signal based on the frequency points corresponding to each search unit through a pre-stored mixing lookup table.
[0092] Based on the Fourier transform pre-configuration plan, the baseband signal is subjected to fast Fourier transform based on cuFFT, and then the CUDA kernel function is used to perform a dot multiplication operation with the local code FFT to obtain the frequency domain correlation result. The frequency domain correlation result is then subjected to inverse fast Fourier transform to generate a code phase correlation sequence.
[0093] The code phase correlation sequence is subjected to a first-level reduction process to obtain the execution result, and the execution result is asynchronously sent back to the central processing unit.
[0094] Prior to performing first-level reduction processing on the code phase correlation sequence, the method further includes:
[0095] Incoherent accumulation is performed on the code phase correlation sequence within a preset time period, and the squares of the magnitudes of the code phase correlation sequence over multiple consecutive unit processing times are summed to obtain the enhanced signal;
[0096] And, the step of performing a first-level reduction process on the code phase correlation sequence to obtain the execution result and asynchronously transmitting the execution result back to the central processing unit includes:
[0097] The enhanced signal is subjected to a first-level reduction process to determine the local peak information of each search unit;
[0098] The local peak information includes the maximum value, mean value, and index information of the enhanced signal;
[0099] Based on each of the search units, the local peak information is asynchronously transmitted back to the central processing unit.
[0100] By incoherently accumulating the code phase correlation sequence before reduction, and enhancing the signal amplitude through modulus square summation, local peak information is extracted and asynchronously transmitted back. This design suppresses random noise by accumulating signal energy over multiple time periods, improving the signal-to-noise ratio in weak signal environments and making the detection of local peaks more robust. The first-level reduction retains only key information such as the maximum value, mean, and index, significantly compressing the amount of data to be transmitted back. At the same time, the asynchronous transmission mechanism avoids blocking GPU computing resources, thereby optimizing data transmission efficiency while ensuring signal detection capability and providing highly reliable input for global decision-making at the central processing unit.
[0101] Therefore, a pre-stored mixing lookup table replaces real-time calculation of down-conversion parameters. This is combined with a pre-bound Fourier transform plan to perform frequency domain dot multiplication and inverse transform, and finally, a first-level reduction is performed on the code phase correlation sequence. This design utilizes the lookup table to accelerate the mixing process, avoiding the computational overhead of repeatedly generating local carriers. Simultaneously, the frequency domain correlation operation improves the efficiency of complex number operations through a pre-configured FFT / IFFT plan. The first-level reduction compresses the data size and then asynchronously transmits it back, reducing the data processing load on the central processing unit. Thus, while ensuring the accuracy of correlation operations, the response latency of Doppler frequency point search is significantly reduced.
[0102] This implementation divides the Doppler search range into multiple search units and assigns them to independent CUDA streams. Each CUDA stream calls CUDA kernel functions and the cuFFT library to perform code phase domain computation. This design uses concurrent CUDA streams to form a pipelined scheduling, allowing search tasks at different Doppler frequencies to be executed overlappingly on the GPU, fully utilizing the asynchronous characteristics of the CUDA architecture. Simultaneously, parallel computation in the code phase domain reduces global memory access latency through thread-level optimization, thereby significantly accelerating the overall efficiency of the two-dimensional search process while ensuring dynamic load balancing of the Doppler dimension tasks.
[0103] S104. At the central processing unit, the execution results are summarized, target parameters are determined based on the execution results, and signal capture validity is determined based on the target parameters.
[0104] As an optional implementation, the step of summarizing the execution results at the central processing unit, determining target parameters based on the execution results, and determining signal capture validity based on the target parameters includes:
[0105] The execution results are aggregated at the central processing unit to determine the global index, global peak value, and global average value.
[0106] Based on the global index, determine the Doppler frequency shift result and the code phase result;
[0107] The carrier-to-noise ratio is calculated based on the global peak value and the global mean value.
[0108] The carrier-to-noise ratio (CNR) result is compared with a preset acquisition threshold. If the CNR result is greater than the acquisition threshold, the acquisition is considered successful. Based on the neighboring point information of the global index, the fine Doppler is calculated based on the Doppler frequency shift result and the code phase result, and the signal tracking stage begins.
[0109] This implementation aggregates local peak information at the central processing unit, calculates global parameters, and determines the acquisition validity based on the carrier-to-noise ratio (CNR). After successful acquisition, it refines the Doppler estimation using information from neighboring points. This design integrates scattered local results through centralized decision-making, avoiding missed or false detections and improving the accuracy of multi-satellite signal acquisition. The CNR calculation method combining peak and mean values enhances adaptability to noise fluctuations, while fine Doppler interpolation optimization further improves parameter estimation accuracy. This ensures that acquisition results can be directly used in the tracking stage even in complex signal environments, shortening the overall processing chain and improving the real-time response capability of the software receiver.
[0110] This application achieves unified parameter configuration and asynchronous data upload at the central processing unit (CPU). After data preprocessing at the graphics processing unit (GPU), it divides the data into parallel subtasks based on CUDA streams in the Doppler dimension. In the code phase domain, it invokes the CUDA architecture to perform parallel computations on multiple CUDA streams. Finally, it determines signal validity through asynchronous data return and aggregation at the CPU. This design achieves deep integration of task-level pipeline and thread-level parallelism. It dynamically allocates Doppler search tasks using multiple CUDA streams and fully leverages GPU computing power through parallel computation in the code phase domain. This effectively hides data transmission latency during multi-satellite signal acquisition, avoids non-merged access to device memory, and significantly improves the concurrent processing efficiency of multi-mode, multi-frequency signals. Furthermore, the centralized decision-making of dispersed results at the CPU ensures acquisition accuracy, thus balancing real-time performance and reliability in complex satellite signal environments.
[0111] The following section provides a detailed description of this application based on practical application scenarios. Please refer to [link / reference]. Figure 2 , Figure 2 This is a schematic diagram illustrating the complete process of a multi-satellite signal acquisition method based on a graphics processor (GPU) according to a real-world application scenario, as provided in one embodiment of this application. Steps 1 to 6a / 6b constitute the system initialization and host-side preprocessing stage, executed by the CPU to prepare data and execution plans for efficient parallel computing by the GPU. Corresponding to... Figure 1 The S101 section is shown.
[0112] Step 1: Parameter Initialization. Perform global configuration in CPU memory, preset the number of CUDA streams. Intermediate frequency data sampling rate Intermediate frequency Unit processing time (i.e., minimum coherence integration time) Incoherent cumulative time Search for a list of constellations and frequencies.
[0113] Step 2: Generate Local Codes. Based on the constellation / frequency configuration parameters and the pseudo-random codes of different signals transmitted by different satellites, modularly generate local pseudo-random code (local code) arrays corresponding to each frequency point to be processed. ( Indicates the first (Individual frequency point-satellite combination), stored in CPU memory.
[0114] Step 3: Read in intermediate frequency (IF) data. Read IF data from the data acquisition module. It supports both offline (reading from binary files) and real-time (reading from RF modules) modes, converts to a GPU-compatible format, and stores it in CPU memory.
[0115] Step 4: Create a CUDA stream. Provide an independent channel for asynchronous data transmission and parallel computation across multiple frequency points, allocating a length of [length missing] in CPU memory. An array of type cudaStream_t, storing A handle to a CUDA stream is used to create a loop of calls to the cudaStreamCreate() function. One CUDA stream.
[0116] Step 5: Create a cuFFT plan. Create a reusable pre-configured plan for GPU-side FFT / IFFT operations to improve parallel computing efficiency. Use the cufftPlan1d() function to create a forward FFT plan (time domain → frequency domain) and a reverse FFT plan (frequency domain → time domain). Parameters include FFT length and transform type (CUFFT_C2C, complex to complex). Then, use the cufftSetStream() function to bind the FFT plan to each CUDA stream, ensuring that the FFT operation of each CUDA stream is executed independently and in parallel on multiple CUDA streams.
[0117] Step 6a: Asynchronously upload local code. Call the cudaMemcpyAsync() function to upload the multi-frequency local code data from CPU memory. Uploaded to GPU memory via asynchronous transfer interface for further processing.
[0118] Step 6b: Asynchronously upload intermediate frequency data. Call the cudaMemcpyAsync() function to upload the intermediate frequency data from CPU memory. Uploaded to GPU memory via asynchronous transfer interface for further processing.
[0119] Steps 7 and 8 involve data preprocessing on the GPU device. This stage is performed by the GPU and mainly involves preprocessing the local code and intermediate frequency data to prepare the data format for parallel computing. Corresponding to Figure 1 The S102 part.
[0120] Step 7: Local code resampling and FFT result pre-storage. The local code on the GPU is resampled using a linear interpolation algorithm via CUDA kernel functions to ensure it is coherent with the intermediate frequency data integration length. The matching is performed, and then the FFT is executed by calling the cufftExecC2C() function through a pre-configured cuFFT plan, and the result is pre-stored. This prepares for frequency domain correlation.
[0121] Step 8: Intermediate Frequency (IF) Data Preprocessing. Call the CUDA kernel function to process the read-in raw IF data. Transform into a complex form suitable for processing .
[0122] Steps 9 to 15 are the signal processing steps on the GPU device side, covering the entire Doppler search range. Divided into Search unit This Tasks are dynamically assigned to On each CUDA stream, each stream independently and asynchronously processes several search units assigned to it, forming a task-level pipeline. And for a specific Doppler frequency... The CUDA stream calls CUDA kernel functions and the cuFFT library to process the code phase domain. Corresponding to... Figure 1 The S103 part.
[0123] Step 9: Asynchronous downconversion of multiple streams to baseband. The CUDA kernel function is called to asynchronously downconvert the intermediate frequency data to baseband at multiple frequency points, preparing for subsequent baseband processing. In this method, instead of performing calculations each time, a lookup is performed from a pre-sampled mixer lookup table stored in the GPU device memory, maintaining the same frequency step at each frequency point. It is stored in GPU shared memory to improve lookup efficiency.
[0124] Step 10: Baseband FFT. The cufftExecC2C() function is called to perform a forward FFT transformation on the baseband signal according to the forward FFT plan. The time-domain baseband signal is converted into a frequency-domain signal to prepare for frequency domain correlation. Each CUDA stream independently processes the baseband signal at its corresponding frequency point, and the process is executed in parallel across multiple CUDA streams. The transformation result... It is stored in the GPU's global memory.
[0125] Step 11: Frequency Domain Correlation. Call the CUDA kernel function to perform a dot product operation between the frequency domain baseband signal and the pre-stored frequency domain local code. This enables frequency domain correlation.
[0126] Step 12: IFFT. Using the inverse FFT plan, call the `cufftExecC2C()` function to perform an inverse FFT transform on the frequency domain multiplication result. The frequency domain signal is converted back to the time domain signal to obtain the code phase correlation sequence.
[0127] Step 13: Incoherent Accumulation. Call the CUDA kernel function to accumulate the incoherent accumulation time. Incoherent accumulation of the squares of the magnitudes of the code phase correlation sequences within a certain range. This improves signal amplitude, suppresses noise interference, and enhances signal detection capabilities.
[0128] Step 14: First-level reduction to maximum, mean, and index. Call the CUDA kernel function to... The incoherent accumulation results at each Doppler frequency point are reduced to a single level, and the maximum value within each thread block is calculated. mean and corresponding index This yields a local peak value.
[0129] Step 15: Asynchronously return the results of each stream. Call the cudaMemcpyAsync() function to... Local maximum values of the reduction result at each Doppler frequency point mean ,index Asynchronous postback to CPU memory.
[0130] Steps 16 to 18 are host-side post-processing steps, executed by the CPU, which receives the results of the GPU computation and performs final capture processing. (Corresponding to...) Figure 1 The S104 portion.
[0131] Step 16: The CPU searches for the global peak and summarizes the local maxima of the first-order reduction results for each Doppler frequency point. mean ,index Perform a global peak lookup to determine the global peak value. mean Global Index , .
[0132] Step 17: Output Doppler, code phase, and carrier-to-noise ratio. Based on the global index. , Doppler frequency shift results were obtained. Code phase results According to the global peak mean Obtain the carrier-to-noise ratio result .
[0133] Step 18: Peak Decision and Fine Doppler. The obtained carrier-to-noise ratio results... With capture threshold A comparison is made; if the value exceeds the capture threshold, the capture is considered successful, and a global index is used. , The system calculates fine Doppler data for adjacent points and prepares to enter the signal tracking stage. If the acquisition fails, it restarts the acquisition process.
[0134] Therefore, this application provides a solution applicable to multiple constellations and multiple frequencies, suitable for multi-mode and multi-frequency signals such as GPS L1CA / L2CM / L5I, BeiDou B1I / B2I / B3I, Galileo E1C / E1B / E5BI / E5AI, and QZSS L1CA / L2CM / L5I. In the Doppler domain, a multi-CUDA pipeline is formed through concurrent streaming, while in the code phase domain, thread-level parallel calls to CUDA kernel functions and cuFFT library functions are employed. This fully utilizes the characteristics of the CUDA architecture, avoids non-merged access to GPU device memory, and improves acquisition speed.
[0135] This application also provides a multi-satellite signal acquisition device based on a graphics processor, including:
[0136] The acquisition module is used to configure parallel task parameters on the central processing unit and acquire the local code and intermediate frequency data corresponding to the target satellite signal, and asynchronously upload the local code and the intermediate frequency data to the graphics processing unit.
[0137] The processing module is used to preprocess the local code and the intermediate frequency data on the graphics processor side to obtain the local code FFT and the target intermediate frequency data;
[0138] The processing module is further configured to, on the graphics processor side, allocate parallel tasks based on the Doppler dimension and according to the parallel task parameters, determine multiple parallel subtasks based on CUDA streams, and execute each of the parallel subtasks based on CUDA streams in parallel on multiple CUDA streams in the code phase domain according to the CUDA architecture, and asynchronously send the execution results back to the central processing unit.
[0139] The processing module is further configured to, at the central processing unit, summarize the execution results, determine target parameters based on the execution results, and determine the signal capture validity based on the target parameters.
[0140] This implementation unifies parameter configuration and asynchronously uploads data at the central processing unit (CPU). After data preprocessing at the graphics processing unit (GPU), it divides the data into parallel subtasks based on CUDA streams in the Doppler dimension. In the code phase domain, it invokes the CUDA architecture to perform parallel computations across multiple CUDA streams. Finally, it determines signal validity through asynchronous data return and CPU aggregation. This design achieves a deep integration of task-level pipeline and thread-level parallelism. It dynamically allocates Doppler search tasks using multiple CUDA streams and fully leverages GPU computing power through parallel computation in the code phase domain. This effectively hides data transmission latency during multi-satellite signal acquisition, avoids non-merged access to device memory, and significantly improves the concurrent processing efficiency of multi-mode, multi-frequency signals. Furthermore, the centralized decision-making of dispersed results at the CPU ensures acquisition accuracy, thus balancing real-time performance and reliability in complex satellite signal environments.
[0141] As an optional implementation, the parallel task parameters include a parallel CUDA stream and a Fourier transform pre-configuration plan. The parallel CUDA stream is used to perform asynchronous data transmission and parallel computation. The Fourier transform pre-configuration plan includes a Fast Fourier Transform plan or a Fast Fourier Transform plan. The parameters of the Fourier transform pre-configuration plan include transform length and transform type. Each Fourier transform pre-configuration plan corresponds to a parallel CUDA stream used to perform parallel computation.
[0142] This implementation predefines parallel CUDA streams and Fourier transform plans, binding each transform plan to an independent CUDA stream, enabling the reuse of parameters for the Fast Fourier Transform (FFT) and its inverse transform. This design avoids redundant initialization of computational resources, ensuring that transform tasks for different frequencies or satellite signals are executed in parallel across multiple CUDA streams within independent CUDA streams. This reduces idle waiting time for GPU computing units, thereby improving the efficiency of frequency domain correlation operations. Simultaneously, the strict correspondence between pre-configured transform lengths and types and CUDA streams further optimizes memory access patterns, reduces data transmission conflicts, and enhances the overall throughput of multi-frequency signal processing.
[0143] As an optional implementation, the processing module allocates parallel tasks based on the Doppler dimension and the parallel task parameters to determine multiple CUDA-based parallel subtasks. According to the CUDA architecture, it executes each CUDA-based parallel subtask in parallel across multiple CUDA streams in the code phase domain, and asynchronously returns the execution results to the central processing unit. The specific methods include:
[0144] Based on the Doppler dimension, the full Doppler search range is divided into a first number of search units, and parallel subtasks based on CUDA streams corresponding to each search unit are determined. The parallel subtasks based on CUDA streams are then assigned to a second number of parallel CUDA streams.
[0145] On the second number of parallel CUDA streams, for each corresponding search unit, the CUDA kernel function and cuFFT library are called to execute each of the parallel subtasks based on the CUDA streams in parallel on multiple CUDA streams based on the Fourier transform pre-configured plan, obtain the execution results, and asynchronously send the execution results back to the central processing unit.
[0146] This implementation divides the Doppler search range into multiple search units and assigns them to independent CUDA streams. Each CUDA stream calls CUDA kernel functions and the cuFFT library to perform code phase domain computation. This design uses concurrent CUDA streams to form a pipelined scheduling, allowing search tasks at different Doppler frequencies to be executed overlappingly on the GPU, fully utilizing the asynchronous characteristics of the CUDA architecture. Simultaneously, parallel computation in the code phase domain reduces global memory access latency through thread-level optimization, thereby significantly accelerating the overall efficiency of the two-dimensional search process while ensuring dynamic load balancing of the Doppler dimension tasks.
[0147] As an optional implementation, the processing module, on the second number of parallel CUDA streams, for each corresponding search unit, calls the CUDA kernel function and the cuFFT library to execute each of the CUDA stream-based parallel subtasks in parallel on multiple CUDA streams based on the Fourier transform pre-configured plan, obtains the execution results, and asynchronously sends the execution results back to the central processing unit. The specific method for this includes:
[0148] The CUDA kernel function is called to asynchronously downconvert the target intermediate frequency data to a baseband signal based on the frequency points corresponding to each search unit through a pre-stored mixing lookup table.
[0149] Based on the Fourier transform pre-configuration plan, the baseband signal is subjected to fast Fourier transform based on cuFFT, and then the CUDA kernel function is used to perform a dot multiplication operation with the local code FFT to obtain the frequency domain correlation result. The frequency domain correlation result is then subjected to inverse fast Fourier transform to generate a code phase correlation sequence.
[0150] The code phase correlation sequence is subjected to a first-level reduction process to obtain the execution result, and the execution result is asynchronously sent back to the central processing unit.
[0151] This implementation replaces real-time calculation of down-conversion parameters with a pre-stored mixing lookup table, and performs frequency domain dot multiplication and inverse transform in conjunction with a pre-bound Fourier transform plan. Finally, it performs a first-level reduction on the code phase correlation sequence. This design uses the lookup table to accelerate the mixing process, avoids the computational overhead of repeatedly generating local carriers, and improves the efficiency of complex number operations through a pre-configured FFT / IFFT plan for frequency domain correlation operations. The first-level reduction compresses the data size and then asynchronously transmits it back, reducing the data processing load on the central processing unit, thereby significantly reducing the response latency of Doppler frequency point search while ensuring the accuracy of correlation operations.
[0152] As an optional implementation, the processing module is further configured to perform the following before performing first-level reduction processing on the code phase correlation sequence:
[0153] Incoherent accumulation is performed on the code phase correlation sequence within a preset time period, and the squares of the magnitudes of the code phase correlation sequence over multiple consecutive unit processing times are summed to obtain the enhanced signal;
[0154] And, the step of performing a first-level reduction process on the code phase correlation sequence to obtain the execution result and asynchronously transmitting the execution result back to the central processing unit includes:
[0155] The enhanced signal is subjected to a first-level reduction process to determine the local peak information of each search unit;
[0156] The local peak information includes the maximum value, mean value, and index information of the enhanced signal;
[0157] Based on each of the search units, the local peak information is asynchronously transmitted back to the central processing unit.
[0158] This implementation performs incoherent accumulation of the code phase correlation sequence before reduction, enhancing the signal amplitude through modulus square summation, and then extracts local peak information for asynchronous transmission. This design suppresses random noise by accumulating signal energy over multiple time periods, improving the signal-to-noise ratio in weak signal environments and making local peak detection more robust. The first-level reduction retains only key information such as the maximum value, mean, and index, significantly compressing the amount of data to be transmitted. Simultaneously, the asynchronous transmission mechanism avoids blocking GPU computing resources, thereby optimizing data transmission efficiency while ensuring signal detection capabilities and providing highly reliable input for global decision-making at the central processing unit.
[0159] As an optional implementation, the processing module at the central processing unit summarizes the execution results, determines target parameters based on the execution results, and determines a specific method for determining the signal capture effectiveness based on the target parameters, including:
[0160] The execution results are aggregated at the central processing unit to determine the global index, global peak value, and global average value.
[0161] Based on the global index, determine the Doppler frequency shift result and the code phase result;
[0162] The carrier-to-noise ratio is calculated based on the global peak value and the global mean value.
[0163] The carrier-to-noise ratio (CNR) result is compared with a preset acquisition threshold. If the CNR result is greater than the acquisition threshold, the acquisition is considered successful. Based on the neighboring point information of the global index, the fine Doppler is calculated based on the Doppler frequency shift result and the code phase result, and the signal tracking stage begins.
[0164] This implementation aggregates local peak information at the central processing unit, calculates global parameters, and determines the acquisition validity based on the carrier-to-noise ratio (CNR). After successful acquisition, it refines the Doppler estimation using information from neighboring points. This design integrates scattered local results through centralized decision-making, avoiding missed or false detections and improving the accuracy of multi-satellite signal acquisition. The CNR calculation method combining peak and mean values enhances adaptability to noise fluctuations, while fine Doppler interpolation optimization further improves parameter estimation accuracy. This ensures that acquisition results can be directly used in the tracking stage even in complex signal environments, shortening the overall processing chain and improving the real-time response capability of the software receiver.
[0165] It should be noted that the division of the various modules in the above device is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. Furthermore, these modules can be implemented entirely in software via processing element calls; they can be fully implemented in hardware; or some modules can be implemented by processing element calls to software, while others are implemented in hardware. For example, a processing module can be a separate processing element, or it can be integrated into a chip within the device. Alternatively, it can be stored as program code in the device's memory, and its functions can be called and executed by a processing element. The implementation of other modules is similar. Moreover, these modules can be fully or partially integrated together, or they can be implemented independently. The processing element here can be an integrated circuit with signal processing capabilities. During implementation, each step of the above method or each of the above modules can be completed through integrated logic circuits in the hardware of the processor element or through software instructions.
[0166] Indicatively, such as Figure 3 As shown, Figure 3 This is a schematic diagram of the internal structure of a computer device 300 provided in an embodiment of this application. The computer device 300 can be provided as a server. (Refer to...) Figure 3 The computer device 300 includes a processing component 302, which further includes one or more processors, including at least one central processing unit and at least one CUDA-based graphics processor, and memory resources represented by memory 301 for storing instructions, such as application programs, that can be executed by the processing component 302. The application programs stored in memory 301 may include one or more modules, each corresponding to a set of instructions. Furthermore, the processing component 302 is configured to execute instructions to perform the methods of any of the embodiments described above.
[0167] The computer device 300 may also include a power supply component 303 configured to perform power management of the computer device 300, a wired or wireless network interface 304 configured to connect the computer device 300 to a network, and an input / output (I / O) interface 305. The computer device 300 can operate on an operating system, such as a Linux-based system, stored in memory 301.
[0168] Those skilled in the art will understand that Figure 3 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0169] This application provides a storage medium storing computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform the method provided in any embodiment.
[0170] Finally, it should be noted that in this application, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0171] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The various embodiments can be combined as needed, and the same or similar parts can be referred to each other.
[0172] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A multi-satellite signal acquisition method based on a graphics processor, characterized in that, include: Configure parallel task parameters on the central processing unit and obtain the local code and intermediate frequency data corresponding to the target satellite signal. Asynchronously upload the local code and the intermediate frequency data to the graphics processing unit. On the graphics processor, the local code and the intermediate frequency data are preprocessed to obtain local code preprocessed data, local code FFT and target intermediate frequency data; On the graphics processor, based on the Doppler dimension, parallel tasks are allocated according to the parallel task parameters to determine multiple parallel subtasks based on CUDA streams. According to the CUDA architecture, each of the parallel subtasks based on CUDA streams is executed in parallel on multiple CUDA streams in the code phase domain, and the execution results are asynchronously sent back to the central processing unit. At the central processing unit, the execution results are summarized, target parameters are determined based on the execution results, and signal capture validity is determined based on the target parameters.
2. The method according to claim 1, characterized in that, The parallel task parameters include a parallel CUDA stream and a Fourier transform pre-configuration plan. The parallel CUDA stream is used to perform asynchronous data transmission and parallel computation. The Fourier transform pre-configuration plan includes a Fast Fourier Transform plan or a Fast Fourier Transform plan. The parameters of the Fourier transform pre-configuration plan include transform length and transform type. Each Fourier transform pre-configuration plan corresponds to a parallel CUDA stream used to perform parallel computation.
3. The method according to claim 2, characterized in that, The process of allocating parallel tasks based on the Doppler dimension and the parallel task parameters to determine multiple CUDA-based parallel subtasks, and executing each of the CUDA-based parallel subtasks in parallel on multiple CUDA streams in the code phase domain according to the CUDA architecture, and asynchronously transmitting the execution results back to the central processing unit, includes: Based on the Doppler dimension, the full Doppler search range is divided into a first number of search units, and parallel subtasks based on CUDA streams corresponding to each search unit are determined. The parallel subtasks based on CUDA streams are then assigned to a second number of parallel CUDA streams. On the second number of parallel CUDA streams, for each corresponding search unit, the CUDA kernel function and cuFFT library are called to execute each of the parallel subtasks based on the CUDA streams in parallel on multiple CUDA streams based on the Fourier transform pre-configured plan, obtain the execution results, and asynchronously send the execution results back to the central processing unit.
4. The method according to claim 3, characterized in that, On the second number of parallel CUDA streams, for each corresponding search unit, the CUDA kernel function and cuFFT library are invoked to execute each CUDA stream-based parallel subtask in parallel on multiple CUDA streams based on the Fourier transform pre-configured plan, obtain the execution result, and asynchronously send the execution result back to the central processing unit, including: The CUDA kernel function is called to asynchronously downconvert the target intermediate frequency data to a baseband signal based on the frequency points corresponding to each search unit through a pre-stored mixing lookup table. Based on the Fourier transform pre-configuration plan, the baseband signal is subjected to fast Fourier transform based on cuFFT, and then the CUDA kernel function is used to perform a dot multiplication operation with the local code FFT to obtain the frequency domain correlation result. The frequency domain correlation result is then subjected to inverse fast Fourier transform to generate a code phase correlation sequence. The code phase correlation sequence is subjected to a first-level reduction process to obtain the execution result, and the execution result is asynchronously sent back to the central processing unit.
5. The method according to claim 4, characterized in that, Before performing first-level reduction processing on the code phase correlation sequence, the method further includes: Incoherent accumulation is performed on the code phase correlation sequence within a preset time period, and the squares of the magnitudes of the code phase correlation sequence over multiple consecutive unit processing times are summed to obtain the enhanced signal; And, the step of performing a first-level reduction process on the code phase correlation sequence to obtain the execution result and asynchronously transmitting the execution result back to the central processing unit includes: The enhanced signal is subjected to a first-level reduction process to determine the local peak information of each search unit; The local peak information includes the maximum value, mean value, and index information of the enhanced signal; Based on each of the search units, the local peak information is asynchronously transmitted back to the central processing unit.
6. The method according to any one of claims 1-5, characterized in that, The step of summarizing the execution results at the central processing unit, determining target parameters based on the execution results, and determining signal capture validity based on the target parameters includes: The execution results are aggregated at the central processing unit to determine the global index, global peak value, and global average value. Based on the global index, determine the Doppler frequency shift result and the code phase result; The carrier-to-noise ratio is calculated based on the global peak value and the global mean value. The carrier-to-noise ratio (CNR) result is compared with a preset acquisition threshold. If the CNR result is greater than the acquisition threshold, the acquisition is considered successful. Based on the neighboring point information of the global index, the fine Doppler is calculated based on the Doppler frequency shift result and the code phase result, and the signal tracking stage begins.
7. A multi-satellite signal acquisition device based on a graphics processor, characterized in that, include: The acquisition module is used to configure parallel task parameters on the central processing unit and acquire the local code and intermediate frequency data corresponding to the target satellite signal, and asynchronously upload the local code and the intermediate frequency data to the graphics processing unit. The processing module is used to preprocess the local code and the intermediate frequency data on the graphics processor side to obtain the local code FFT and the target intermediate frequency data; The processing module is further configured to, on the graphics processor side, allocate parallel tasks based on the Doppler dimension and according to the parallel task parameters, determine multiple parallel subtasks based on CUDA streams, and execute each of the parallel subtasks based on CUDA streams in parallel on multiple CUDA streams in the code phase domain according to the CUDA architecture, and asynchronously send the execution results back to the central processing unit. The processing module is further configured to, at the central processing unit, summarize the execution results, determine target parameters based on the execution results, and determine the signal capture validity based on the target parameters.
8. The apparatus according to claim 7, characterized in that, The parallel task parameters include a parallel CUDA stream and a Fourier transform pre-configuration plan. The parallel CUDA stream is used to perform asynchronous data transmission and parallel computation. The Fourier transform pre-configuration plan includes a Fast Fourier Transform plan or a Fast Fourier Transform plan. The parameters of the Fourier transform pre-configuration plan include transform length and transform type. Each Fourier transform pre-configuration plan corresponds to a parallel CUDA stream used to perform parallel computation.
9. A computer device, characterized in that, The method includes one or more processors, the processors including at least one central processing unit and at least one CUDA-based graphics processor, and memory storing computer-readable instructions that, when executed by the one or more processors, perform the steps of the method as described in any one of claims 1-6.
10. A storage medium, characterized in that, The storage medium stores computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform the steps of the method as described in any one of claims 1-6.