Ecc enhanced flash memory device, data reading method, and medium

Abstract

The application relates to the technical field of data storage, in particular to an ECC-enhanced Flash storage device, a data reading method and a medium. In the spare byte area of a NAND Flash page, the device adds metadata ECC check information specially used for independently protecting the metadata in addition to storing metadata and data ECC check information for protecting the whole page. The corresponding method comprises the following steps: when a host user data reading request is received, a first reading process is executed, all data is read and data ECC decoding is performed; when a metadata scanning request initiated internally by FTL is received, a second reading process is executed, only the metadata and independent metadata ECC check information thereof are read and decoded. When large-scale metadata scanning is performed by FTL, the application avoids reading and decoding of full-page data, greatly reduces the data transmission and processing load of related operations, and greatly improves the execution speed of FTL management tasks and system reliability.

Description

Technical Field

[0001] This invention relates to the field of data storage technology, and in particular to an ECC-enhanced Flash storage device, a data reading method, and a medium. Background Technology

[0002] As a non-volatile storage device, Flash memory's internal data is not entirely reliable. It heavily relies on the spare bytes provided by each NAND page, which store ECC information for the page's data storage. This ensures data consistency during data retrieval through ECC error correction. As mainstream NAND Flash has evolved from 2D SLC and MLC to 3D TLC, QLC, and even the soon-to-be-mass-produced PLC, the probability of bit flipping in NAND data storage has increased rather than decreased, leading to continuous improvements in its ECC error correction capabilities. Furthermore, to ensure better management and utilization of Flash resources by the Flash storage device's FTL, the spare bytes of a NAND page, in addition to storing ECC parity information, typically also store FTL metadata. This metadata, usually several to a dozen bytes, is used by the FTL as crucial metadata, ensuring the FTL's normal and robust operation and playing a key role in various scenarios such as power-on rebuild data recovery and abnormal FTL tab reconstruction. However, traditional FTL requires reading the entire 4KB+, 2KB+, or 1KB+ code word from Flash and ECC decoding it before obtaining the data when performing Meta Data scanning. This results in a hundredfold increase in the amount of data transferred by Flash I / O during Meta Data scanning, a significant decrease in bandwidth efficiency, and a substantial increase in ECC decoding load. Summary of the Invention

[0003] In view of this, the purpose of this invention is to provide an ECC-enhanced Flash storage device, a data reading method, and a medium to solve the problems of large data volume and high decoding load when reading data in the prior art.

[0004] To achieve the above objectives, the present invention provides an ECC-enhanced Flash storage device, comprising: NAND Flash memory, its Page structure includes a data area and a spare byte area; The spare byte area stores at least the following three types of information: Metadata; ECC verification information used for error correction of the data area and metadata; Metadata ECC verification information used for independent error correction of the metadata; The metadata ECC verification information and the data ECC verification information are generated using the same or different ECC algorithms.

[0005] Preferably, the metadata ECC verification information is implemented using BCH encoding, with each metadata entry containing an additional 8 bytes of verification information.

[0006] Preferably, the device is configured to perform the following two data read operations: Normal data reading operation: read the data area, the metadata and the corresponding data ECC verification information, and perform data ECC decoding on the read data; The metadata scanning operation, in response to the metadata retrieval request, reads only the metadata and the corresponding metadata ECC verification information from the spare byte area, and performs metadata ECC decoding on the read metadata.

[0007] Preferably, in the metadata scanning operation, if the metadata ECC decoding fails, the normal data reading operation is triggered to obtain the metadata.

[0008] The present invention also provides a data reading method for a Flash storage device, comprising the following steps: Metadata, data ECC verification information for protecting data and metadata, and metadata ECC verification information for independently protecting the metadata are stored in the spare byte area of ​​the Page structure of the NAND Flash memory. Receive read request; If the read request is a data read request initiated by the host, then the first read process is executed: read the data area of ​​the page, the metadata and the data ECC verification information, and decode based on the data ECC verification information; If the read request is a metadata scan request initiated by the flash conversion layer, then the second read process is executed: only the metadata and the metadata ECC verification information in the spare byte area are read, and the metadata ECC verification information is decoded.

[0009] Preferably, the method further includes: In the second reading process, if decoding based on the metadata ECC verification information fails, the first reading process is activated to obtain the metadata.

[0010] Preferably, the metadata scanning request is triggered by at least one of the following scenarios: L2P meter recovery during power-on reconstruction; Full block metadata scan during abnormal FTL table reconstruction; Last valid page scan within the block.

[0011] The present invention also provides a storage medium having a computer program stored thereon, which, when executed, implements the above-described method.

[0012] The beneficial effects of this invention are: 1. This invention configures independent ECC verification (metadata ECC) for metadata. When scanning metadata, the FTL does not need to read and process large amounts of user data; it only needs to read a few dozen bytes of metadata and its independent ECC to complete the decoding and verification. This significantly reduces the data transfer volume and decoding computation volume of the metadata scanning operation, greatly improving the performance of related FTL management tasks and significantly enhancing metadata scanning performance. 2. The independent metadata ECC in this invention can employ more efficient or robust algorithms to provide higher error correction bit capability for small data blocks. For example, for 8-byte metadata, using an 8-byte BCH checksum can provide up to 8 bits of error correction capability, significantly improving fault tolerance and greatly enhancing the anti-interference capability and storage reliability of FTL critical metadata, thereby enhancing metadata error correction capability and reliability; 3. In the event of a failure to independently decode metadata using ECC, the system can automatically degrade to a traditional data reading path and recover the metadata through complete data ECC verification. This dual-insurance mechanism ensures that the correct metadata is obtained with the highest probability under any circumstances, further improving the overall robustness of the storage system and the data recovery success rate. 4. This invention significantly reduces the amount of data in unnecessary Flash read operations initiated for internal management purposes, effectively saving storage channel bandwidth, reducing controller power consumption, and improving the overall energy efficiency of the system. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only for this invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of the Flash storage device architecture according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the data reading method according to an embodiment of the present invention. Detailed Implementation

[0015] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments.

[0016] It should be noted that, unless otherwise defined, the technical or scientific terms used in this invention should have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0017] like Figure 1 As shown in the figure, this specification provides an ECC-enhanced Flash storage device, which mainly includes a Flash controller and one or more NAND Flash chips.

[0018] The Flash controller internally contains: Read / Write Management Unit: Responsible for receiving and parsing requests from the host or internal FTL, and converting them into specific operation commands for NAND Flash, such as read, write, and erase.

[0019] ECC Encoding / Decoding Unit: Integrates at least two ECC algorithm engines. One is a data ECC engine, used for joint encoding and decoding of the page's data area and metadata; the other is a metadata ECC engine, dedicated to encoding and decoding independent metadata. The algorithms of the two engines can be the same (e.g., both using BCH codes) or different (e.g., data ECC uses LDPC codes, while metadata ECC uses the more efficient BCH codes).

[0020] The page structure of a NAND Flash chip includes: Data area: Used to store user data.

[0021] The spare byte area contains the following three types of content: Meta data: Stores information required for FTL management, such as logical page address (LPA), block status, timestamps, etc., and its size is fixed (e.g., 8 bytes or 16 bytes).

[0022] Data ECC Parity: Generated by the data ECC engine, it is used to protect the parity of the entire data area and the aforementioned metadata. Its length is determined according to the required error correction capability (e.g., it may be 128 bytes).

[0023] Meta ECC Parity: Generated by the metadata ECC engine, this is a separate parity bit used solely to protect the aforementioned "metadata". For example, for 8 bytes of metadata, BCH(88, 72, 8) encoding is used to generate 8 bytes of parity information, providing up to 8 bits of error correction capability, thereby achieving a fault tolerance capability of <= 8.69% for the original data bit error rate.

[0024] In this architecture, when the FTL management unit needs to perform a large-scale metadata scan (e.g., rebuilding the L2P table after power-on), it issues a metadata scan request. After parsing this request, the read / write management unit controls the NAND Flash to output only the Meta Data and Meta Ecc Parity portions (a total of 16 bytes) from the spare byte area, which are then quickly decoded by the metadata ECC engine. Due to the extremely small data size (only 16 bytes vs. the traditional 4KB+), the decoding speed is extremely fast, with a performance improvement of up to 100 times.

[0025] If metadata ECC decoding fails, the controller can automatically trigger an alternative path: perform a complete normal data read to obtain the Data in the data area, the Meta Data in the spare byte area, and the Data Ecc Parity. It then uses the stronger joint protection capability of data ECC to recover the metadata, ensuring the extreme robustness of the system.

[0026] Example 2: This embodiment provides a method for reading the above-mentioned Flash storage device, such as... Figure 2 As shown, the process includes the following: Step S1: During Flash storage device initialization or data writing, according to the page structure of Example 1, three types of information are written to the spare byte area of ​​the NAND Flash page: metadata, data ECC verification information, and metadata ECC verification information. Among them, the metadata ECC verification information is generated by a dedicated metadata ECC engine that independently encodes the metadata.

[0027] Step S2: Receive and determine the request type. The Flash controller continuously receives read requests. When a request is received, its type is first determined: If the request originates from the host interface and the target of the request is to read user data, it is determined to be a data read request, and the process proceeds to step S3.

[0028] If the request originates from the internal FTL management unit and the target of the request is to quickly obtain management information, such as triggering scenarios like power-on recovery, table reconstruction, or valid page scanning, then it is determined to be a metadata scan request, and proceeds to step S4.

[0029] Step S3: Execute the first reading process, i.e., normal data reading.

[0030] The controller sends a read command to the NAND Flash to read all metadata and ECC verification information from the entire data area and spare byte area of ​​the target page.

[0031] The read data area and metadata, along with the data ECC verification information, are sent to the data ECC engine for decoding and error correction.

[0032] After successful decoding, the correct user data will be returned to the host. Step S4: Execute the second reading process, namely metadata scanning.

[0033] The controller issues specific read commands to the NAND Flash or controls the read operation via address offset to read only the metadata and metadata ECC check information in the spare byte area.

[0034] The read metadata and metadata ECC verification information are sent to the metadata ECC engine for fast decoding and error correction.

[0035] Determine if decoding was successful.

[0036] If successful, the correct metadata is directly submitted to the FTL management unit that initiated the request. Because this process skips reading the data area and large-scale data ECC decoding, its I / O data volume and computational complexity are reduced by about two orders of magnitude compared to the first process, thereby greatly improving the performance of internal FTL operations.

[0037] If the process fails, it indicates that the extent of metadata corruption may exceed the error correction range of an independent ECC. In this case, the system automatically activates its fault tolerance mechanism and proceeds to the first reading step of S3. Using broader-scope data ECC verification information, the complete data block is decoded in an attempt to recover the correct metadata. Under this scheme, even if MetaECC decoding fails during Meta Data scanning, Meta Data can still be read through an alternative path that uses normal data reading, thereby further improving the reliability of FTL metadata and providing dual protection.

[0038] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0039] In the embodiments provided in this application, it should be understood that the disclosed devices / terminal equipment and methods can be implemented in other ways. For example, the device / terminal equipment embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling or direct coupling or communication connection may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0040] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0041] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0042] The implementation of all or part of the processes in the methods of the above embodiments can also be accomplished by a computer program product. When the computer program product is run on a terminal device, the terminal device can implement the steps in the various method embodiments described above.

[0043] The embodiments described above are only used to illustrate the technical solutions of this application, and are not intended to limit it. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. An ECC-enhanced Flash storage device, characterized in that, include: NAND Flash memory, its Page structure includes a data area and a spare byte area; The spare byte area stores at least the following three types of information: Metadata; ECC verification information used for error correction of the data area and metadata; Metadata ECC verification information used for independent error correction of the metadata; The metadata ECC verification information and the data ECC verification information are generated using the same or different ECC algorithms.

2. The ECC-enhanced Flash storage device according to claim 1, characterized in that, The metadata ECC verification information is implemented using BCH encoding, with each metadata entry containing 8 bytes of verification information.

3. The ECC-enhanced Flash storage device according to claim 1, characterized in that, The device is configured to perform the following two data read operations: Normal data reading operation: read the data area, the metadata and the corresponding data ECC verification information, and perform data ECC decoding on the read data; The metadata scanning operation, in response to the metadata retrieval request, reads only the metadata and the corresponding metadata ECC verification information from the spare byte area, and performs metadata ECC decoding on the read metadata.

4. The ECC-enhanced Flash storage device according to claim 3, characterized in that, If the metadata ECC decoding fails during the metadata scanning operation, the normal data reading operation is triggered to obtain the metadata.

5. A data reading method for a Flash storage device, characterized in that, The method includes: Metadata, data ECC verification information for protecting data and metadata, and metadata ECC verification information for independently protecting the metadata are stored in the spare byte area of ​​the Page structure of the NAND Flash memory. Receive read request; If the read request is a data read request initiated by the host, then the first read process is executed: read the data area of ​​the page, the metadata and the data ECC verification information, and decode based on the data ECC verification information; If the read request is a metadata scan request initiated by the flash conversion layer, then the second read process is executed: only the metadata and the metadata ECC verification information in the spare byte area are read, and the metadata ECC verification information is decoded.

6. The data reading method for a Flash storage device according to claim 5, characterized in that, The method further includes: In the second reading process, if decoding based on the metadata ECC verification information fails, the first reading process is activated to obtain the metadata.

7. The data reading method for a Flash storage device according to claim 5 or 6, characterized in that, The metadata scanning request is triggered by at least one of the following scenarios: L2P meter recovery during power-on reconstruction; Full block metadata scan during abnormal FTL table reconstruction; Last valid page scan within the block.

8. A storage medium having a computer program stored thereon, which, when executed, implements the method as described in any one of claims 5-7.

Images