A USB device insertion automatically triggers a locking circuit

Abstract

The application provides a USB device insertion automatic trigger locking circuit, which comprises a USB interface, a voltage reduction circuit, a USB insertion indication circuit, an RC delay circuit, a signal generation circuit, a main control module and a start-up screen locking circuit. The USB interface is connected with the input end of the voltage reduction circuit, the voltage reduction circuit supplies power for each subsequent module, the USB insertion indication circuit sends an insertion indication signal to the main control module, the RC delay circuit generates a preset delay and triggers the signal generation circuit, the signal generation circuit outputs a screen locking signal to the main control module, and the main control module drives the start-up screen locking circuit to perform a screen locking operation. Through the cooperation of each module, the circuit can automatically trigger the screen locking at the moment of USB device insertion, effectively guarantee the data security of the electronic device, has a simple circuit structure, low cost, fast response and reliable work.

Description

Technical Field

[0001] This invention relates to the field of electronic device technology, specifically to a USB insertion-triggered automatic locking circuit and electronic device. Background Technology

[0002] Currently, mobile phones, tablets, and other electronic devices are commonly equipped with USB ports, allowing users to charge and transfer data, greatly enhancing the practicality and convenience of these devices. However, in actual use, if a user leaves the device temporarily without locking it while it is powered on, external personnel may access the internal data by inserting a USB device, leading to security issues such as data leakage, damage, or loss. Existing technology lacks a simple, low-cost, and fast-responding automatic locking mechanism that can instantly activate the screen locking mechanism upon USB device insertion, making it difficult to effectively prevent the aforementioned security risks.

[0003] Based on the above problems, there is an urgent need for a technical solution that can automatically trigger the screen lock of electronic devices when a USB device is inserted, so as to ensure the data security of electronic devices. Summary of the Invention

[0004] The purpose of this invention is to provide a USB device insertion automatic trigger locking circuit, characterized by comprising a USB interface, a step-down circuit, a USB insertion indicator circuit, an RC delay circuit, a signal generation circuit, a main control module, and a power-on lock screen circuit; the USB interface is connected to the input terminal of the step-down circuit, and the output terminal of the step-down circuit is connected to the input terminal of the USB insertion indicator circuit, the input terminal of the RC delay circuit, and the power input terminal of the signal generation circuit respectively; the output terminal of the USB insertion indicator circuit is connected to the signal input terminal of the main control module; the output terminal of the RC delay circuit is connected to the signal input terminal of the signal generation circuit; the output terminal of the signal generation circuit is connected to the trigger input terminal of the main control module; and the main control module is connected to the control terminal of the power-on lock screen circuit.

[0005] Preferably, the step-down circuit includes a power supply chip U1, an input filter capacitor C1, a pull-up resistor R1, voltage divider resistors R2 and R3, an output inductor L1, an output filter capacitor C2, an output filter capacitor C3, and an output filter capacitor C4; the USBVBUS pin of the USB interface is connected to one end of the input filter capacitor C1, and the other end of the input filter capacitor C1 is grounded; the USBVBUS pin is also connected to the 8-pin input terminal of the power supply chip U1, and pin 1 of the power supply chip U1 is connected to the USBVBUS pin through the pull-up resistor R1. Connect the following: pins 2, 3, and 9 of power chip U1 are all grounded; pin 4 of power chip U1 is connected to ground through voltage divider resistor R2, and pin 4 of power chip U1 is also connected to the output pin of power chip U1 through voltage divider resistor R3; the output pin of power chip U1 is connected to one end of output inductor L1, and the other end of output inductor L1 is connected to one end of output filter capacitor C2, output filter capacitor C3, and output filter capacitor C4 respectively, and the other ends of output filter capacitor C2, output filter capacitor C3, and output filter capacitor C4 are all grounded.

[0006] In a further preferred embodiment, the USB insertion indication circuit includes an indication signal output unit, which is connected to the signal receiving end of the main control module. After receiving the power supply voltage output by the step-down circuit, the indication signal output unit sends a high-level indication signal to the main control module.

[0007] A further preferred embodiment of the RC delay circuit includes a resistor R4 and a capacitor C5; one end of the resistor R4 is connected to the output terminal of the step-down circuit, the other end of the resistor R4 is connected to one end of the capacitor C5, and the other end of the capacitor C5 is grounded; the connection point of the resistor R4 and the capacitor C5 serves as the output terminal of the RC delay circuit, which is connected to the signal input terminal of the signal generation circuit.

[0008] Further preferably, the signal generation circuit includes a D-type flip-flop U2, model number 74LVC1G175; pin 3 of the D-type flip-flop U2 is the power input terminal, connected to the output terminal of the buck circuit; pin 1 of the D-type flip-flop U2 is the clock input terminal, connected to the output terminal of the RC delay circuit; pin 2 of the D-type flip-flop U2 is grounded; pin 4 of the D-type flip-flop U2 is the signal output terminal, connected to the trigger input terminal of the main control module; pin 5 of the D-type flip-flop U2 is the power input terminal, connected to the output terminal of the buck circuit; and pin 6 of the D-type flip-flop U2 is the reset signal input terminal, connected to the reset output terminal of the main control module.

[0009] More preferably, the step-down circuit converts the 5V voltage input from the USB interface into a 1.8V or 3.3V DC voltage, which is then filtered by a filtering network consisting of output inductor L1 and output filter capacitors C2, C3, and C4 before being output.

[0010] Further preferably, the D-type flip-flop U2 is a low-power, low-voltage, single-trigger positive edge-triggered type. It is triggered when the clock input receives the low-to-high edge signal output by the RC delay circuit, and transmits the signal from the data input to the output to send a screen lock trigger signal to the main control module.

[0011] In a further preferred embodiment, after receiving the indication signal sent by the USB insertion indication circuit, the main control module starts the BOOT screen lock program preparation work; after receiving the screen lock trigger signal sent by the signal generation circuit, the main control module drives the power-on screen lock circuit to perform the screen lock operation.

[0012] More preferably, the delay time of the RC delay circuit is determined by the resistance value of resistor R4 and the capacitance value of capacitor C5, with a delay time range of 10 milliseconds to 100 milliseconds.

[0013] In a further preferred embodiment, after the USB interface is plugged into an external device, the USBVBUS pin outputs a 5V voltage, the step-down circuit starts working and outputs a stable voltage; the USB insertion indicator circuit sends an indicator signal to the main control module; the RC delay circuit generates a preset delay and then outputs a trigger signal to the signal generation circuit; the signal generation circuit generates a screen lock signal and sends it to the main control module; the main control module drives the power-on screen lock circuit to complete the screen lock operation of the electronic device.

[0014] Compared with the prior art, the present invention has the following advantages:

[0015] The core inventive technology of this invention lies in the collaborative design of a step-down circuit, a USB insertion indicator circuit, an RC delay circuit, and a signal generation circuit to achieve instantaneous linkage between USB device insertion and screen lock triggering. After USB insertion, the step-down circuit quickly completes voltage conversion and stabilizes power supply; the USB insertion indicator circuit immediately sends a status signal to the main control module; the RC delay circuit precisely controls the trigger timing; the signal generation circuit outputs a stable screen lock signal; and the main control module drives the screen lock circuit to respond quickly. This solution solves the data security problem caused by USB insertion when electronic devices are powered on but not locked. The circuit structure is simple, requiring no complex control logic, has low hardware cost, fast response speed, and stable and reliable operation, making it suitable for various electronic devices with USB interfaces. Attached Figure Description

[0016] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely exemplary, and those skilled in the art can derive other embodiments based on the provided drawings without creative effort.

[0017] Figure 1This is a block diagram of the automatic trigger locking circuit for inserting a USB device according to the present invention;

[0018] Figure 2 This is a circuit diagram of the step-down circuit of the present invention;

[0019] Figure 3 This is a circuit diagram of the detection signal generation circuit for this application. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] The concepts involved in this application will first be described with reference to the accompanying drawings. It should be noted that the following descriptions of various concepts are only for the purpose of making the content of this application easier to understand and do not constitute a limitation on the scope of protection of this application; furthermore, the embodiments and features in the embodiments of this application can be combined with each other unless otherwise specified. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0022] Traditional technical solutions have the following technical problems: When an electronic device is powered on and unlocked, the insertion of an external USB device may lead to unauthorized access to internal data, resulting in data leakage, damage or loss. Existing technologies lack a simple, low-cost and fast-responding automatic screen-locking mechanism, and cannot immediately activate screen-locking protection the moment the USB is inserted.

[0023] Based on this, please refer to Figure 1-3 This embodiment provides a USB device insertion automatic trigger locking circuit, characterized by comprising a USB interface, a step-down circuit, a USB insertion indicator circuit, an RC delay circuit, a signal generation circuit, a main control module, and a power-on lock screen circuit; the USB interface is connected to the input terminal of the step-down circuit, and the output terminal of the step-down circuit is connected to the input terminal of the USB insertion indicator circuit, the input terminal of the RC delay circuit, and the power input terminal of the signal generation circuit respectively; the output terminal of the USB insertion indicator circuit is connected to the signal input terminal of the main control module; the output terminal of the RC delay circuit is connected to the signal input terminal of the signal generation circuit; the output terminal of the signal generation circuit is connected to the trigger input terminal of the main control module; and the main control module is connected to the control terminal of the power-on lock screen circuit.

[0024] It's worth noting that this circuit uses the USB interface as the core for trigger signal acquisition and employs a modular collaborative design to achieve automatic screen locking. The USB interface uses a standard USB-A or USB-C interface, with its USBVBUS pin directly serving as the input to the buck converter, detecting the insertion status of the external USB device and providing initial power. The buck converter, acting as the power supply unit for the entire trigger system, receives the 5V input from the USB interface and converts it to a low voltage suitable for subsequent modules, providing a continuous and stable power supply to the USB insertion indicator circuit, RC delay circuit, and signal generation circuit. The USB insertion indicator circuit is directly connected to the output of the buck converter without additional switching components, ensuring immediate power supply and activation upon USB insertion. The RC delay circuit is connected in series between the buck converter and the signal generation circuit to filter instantaneous fluctuations during voltage stabilization, preventing false triggering of the signal generation circuit. The signal generation circuit uses a dedicated trigger chip to convert the analog trigger signal output from the RC delay circuit into a digital screen locking signal recognizable by the main control module. The main control module uses the electronic device's built-in main controller or a dedicated microcontroller. Its signal input terminal receives the status signal from the USB insertion indicator circuit, and its trigger input terminal receives the screen lock signal from the signal generation circuit. The control terminal is directly connected to the power-on screen lock circuit to achieve command transmission. The power-on screen lock circuit integrates the electronic device's screen lock execution unit. After receiving commands from the main control module, it executes actions such as cutting off the USB data transmission channel and locking the device's operating interface. All modules are directly connected via wires, resulting in short signal transmission paths and no intermediate conversion links, ensuring rapid response throughout the triggering chain.

[0025] The technical effects achieved by the above embodiments include: enabling instant linkage between USB device insertion and screen locking operations; simple circuit structure requiring no complex software programming; low hardware cost and rapid response; effectively preventing data security risks in the unlocked state; and applicability to various electronic devices with USB interfaces.

[0026] Traditional technical solutions have the following technical problems: the 5V voltage output by the USB interface cannot directly power modules such as the USB insertion indicator circuit and signal generation circuit that operate at low voltage, and the input voltage may contain high-frequency noise and ripple. Precise voltage conversion is required to ensure that the output voltage is stable and pure, so as to avoid voltage fluctuations affecting the reliability of subsequent modules.

[0027] Based on this, the step-down circuit includes a power supply chip U1, an input filter capacitor C1, a pull-up resistor R1, voltage divider resistors R2 and R3, an output inductor L1, an output filter capacitor C2, an output filter capacitor C3, and an output filter capacitor C4. The USB VBUS pin of the USB interface is connected to one end of the input filter capacitor C1, and the other end of the input filter capacitor C1 is grounded. The USB VBUS pin is also connected to the 8-pin input terminal of the power supply chip U1, and pin 1 of the power supply chip U1 is connected to the USB VBUS pin through the pull-up resistor R1. Connect the following: pins 2, 3, and 9 of power chip U1 are all grounded; pin 4 of power chip U1 is connected to ground through voltage divider resistor R2, and pin 4 of power chip U1 is also connected to the output pin of power chip U1 through voltage divider resistor R3; the output pin of power chip U1 is connected to one end of output inductor L1, and the other end of output inductor L1 is connected to one end of output filter capacitor C2, output filter capacitor C3, and output filter capacitor C4 respectively, and the other ends of output filter capacitor C2, output filter capacitor C3, and output filter capacitor C4 are all grounded.

[0028] It's worth noting that the buck circuit employs a linear regulated power supply architecture, with the core component being the low-dropout regulator chip U1. The 5V voltage output from the USBVBUS pin of the USB interface first passes through the input filter capacitor C1. C1 is a 10μF electrolytic capacitor used to filter out high-frequency noise and interference signals on the power line, ensuring a stable voltage input to U1. Pin 8 of U1 is the power input terminal, directly receiving the 5V voltage filtered by C1. Pin 1 of U1 is the enable pin, connected to the USBVBUS pin via a pull-up resistor R1. R1 is a 10kΩ resistor, ensuring that U1 can quickly start working after USB insertion without any delay. Pins 2, 3, and 9 of U1 are directly grounded, providing a stable reference potential for the chip and preventing ground potential fluctuations from affecting the output voltage accuracy. Voltage divider resistors R2 and R3 form a voltage regulation network. R2 is a 20kΩ adjustable resistor, and R3 is a 10kΩ fixed resistor. Connected in series, one end is connected to the 4-pin feedback pin of U1, and the other end is connected to ground and the output pin of U1. By adjusting the resistance of R2, the feedback voltage can be changed, thereby precisely controlling the output voltage of U1 to meet the 1.8V or 3.3V output requirements. The output pin of U1 is connected to the output inductor L1, a 1μH power inductor, used to suppress the rate of change of output current and reduce voltage ripple. Three output filter capacitors C2, C3, and C4 are connected in parallel after L1. C2 and C3 are 0.1μF ceramic capacitors, and C4 is a 10μF electrolytic capacitor. These three capacitors work together to further filter out residual ripple and high-frequency noise in the output voltage, providing a stable and clean low voltage for reliable power supply to subsequent modules.

[0029] The technical effects achieved by the above embodiments include: achieving accurate conversion from 5V voltage to low voltage, low output voltage ripple and high stability, meeting the working voltage requirements of each module, simple circuit structure and flexible voltage adjustment, and ensuring the reliability of the entire triggering system.

[0030] Traditional technical solutions have the following technical problems: the main control module needs to know the insertion status of the USB interface in real time and accurately in order to start the screen lock program in advance. Existing indication methods often have signal transmission delays or false triggers, which cause the main control module to respond slowly and affect the overall screen lock speed and reliability.

[0031] Based on this, the USB insertion indication circuit includes an indication signal output unit, which is connected to the signal receiving end of the main control module. After receiving the power supply voltage output by the step-down circuit, the indication signal output unit sends a high-level indication signal to the main control module.

[0032] It's worth noting that the core of the USB insertion indicator circuit is the indicator signal output unit. This unit employs a high-level active design, using an NPN transistor or a dedicated voltage comparator as its core component to ensure fast and stable signal output. The power input terminal of the indicator signal output unit is directly connected to the output terminal of the buck circuit via a wire, without any additional switches or delay components. The short power supply path and low impedance ensure that the indicator signal output unit receives sufficient power and starts working immediately after the buck circuit outputs a stable voltage. The output terminal of the indicator signal output unit is directly connected to the general-purpose input pin of the main control module via DuPont wires or PCB wiring. This pin is preset to a pull-down input mode and remains low when there is no signal. When an external USB device is inserted, the buck circuit starts and outputs a stable 1.8V or 3.3V voltage. The indicator signal output unit conducts instantaneously upon power-up, outputting a high-level indicator signal. The amplitude of this signal is consistent with the output voltage of the buck circuit, ensuring accurate identification by the main control module. The main control module's signal receiver has built-in signal detection logic. When a high-level signal is detected, it immediately determines that the USB interface has been inserted and then starts the preparation work of the BOOT lock screen program, including waking up the lock screen program process, allocating processor running resources, initializing lock screen control register parameters, etc., so that the lock screen program is in a ready state and waiting for the subsequent lock screen trigger signal.

[0033] The technical effects achieved by the above embodiments include: realizing real-time detection and signal transmission of USB insertion status, indicating signals without delay or distortion, ensuring that the main control module completes the screen lock program preparation in advance, significantly improving the overall screen lock response speed, and effectively reducing the probability of false triggering.

[0034] Traditional technical solutions have the following technical problems: After the step-down circuit starts, the output voltage needs a certain amount of time to reach a stable state. If the signal generation circuit is triggered immediately, the screen lock signal may be distorted or falsely triggered due to voltage fluctuations, affecting the main control module's recognition of the signal. A precise delay mechanism needs to be set to ensure signal reliability.

[0035] Based on this, the RC delay circuit includes a resistor R4 and a capacitor C5; one end of the resistor R4 is connected to the output terminal of the step-down circuit, and the other end of the resistor R4 is connected to one end of the capacitor C5, and the other end of the capacitor C5 is grounded; the connection point of the resistor R4 and the capacitor C5 serves as the output terminal of the RC delay circuit, which is connected to the signal input terminal of the signal generation circuit.

[0036] It's worth noting that the RC delay circuit employs a classic RC charging delay architecture, achieving the delay function through the capacitor charging process. Resistor R4 is an adjustable resistor from 10kΩ to 100kΩ, and capacitor C5 is an electrolytic capacitor from 1μF to 10μF; both parameters can be adjusted according to actual needs. One end of resistor R4 is connected to the output of the step-down circuit via a wire to receive a stable low-voltage power supply; the other end of resistor R4 is soldered to one end of capacitor C5, and the other end of capacitor C5 is directly grounded, forming a complete charging loop. When the step-down circuit outputs a stable voltage, current slowly flows through resistor R4 to capacitor C5, and capacitor C5 begins to charge. At this time, the voltage at the connection point between resistor R4 and capacitor C5 gradually rises linearly from a low level. This connection point serves as the output of the RC delay circuit, directly connected to the clock input of the signal generation circuit; the change in the output voltage is the delay signal. The delay time is determined by the resistance value of resistor R4 and the capacitance value of capacitor C5, following the RC circuit charging delay formula. ,in For the delay time, The resistance value of R4 is... The capacitance value is C5. For node output voltage, This is the output voltage of the buck converter. When the output voltage rises to the trigger threshold of the signal generation circuit, the delay ends, and the signal generation circuit is activated. Depending on the stabilization time of the buck converter in different electronic devices, the delay time can be adjusted from 10 milliseconds to 100 milliseconds to ensure that the output voltage of the buck converter is completely stable before outputting a valid trigger signal to the signal generation circuit.

[0037] The technical effects achieved by the above embodiments include: achieving precise delay trigger control, effectively filtering instantaneous fluctuations during voltage stabilization, avoiding signal distortion or false triggering, ensuring the stability and reliability of the lock screen signal output by the signal generation circuit, and the delay time can be flexibly adapted to the needs of different devices.

[0038] Traditional technical solutions have the following technical problems: a low-power, low-voltage adapted signal generation device is needed to convert the analog gradient signal output by the RC delay circuit into a standard digital lock screen signal that can be directly recognized by the main control module, while ensuring stable signal transmission without jitter and adapting to the low-power operation requirements of electronic devices.

[0039] Based on this, the signal generation circuit includes a D-type flip-flop U2, model number 74LVC1G175; pin 3 of the D-type flip-flop U2 is the power input terminal, connected to the output terminal of the buck converter circuit; pin 1 of the D-type flip-flop U2 is the clock input terminal, connected to the output terminal of the RC delay circuit; pin 2 of the D-type flip-flop U2 is grounded; pin 4 of the D-type flip-flop U2 is the signal output terminal, connected to the trigger input terminal of the main control module; pin 5 of the D-type flip-flop U2 is the power input terminal, connected to the output terminal of the buck converter circuit; pin 6 of the D-type flip-flop U2 is the reset signal input terminal, connected to the reset output terminal of the main control module.

[0040] It's worth noting that the signal generation circuit uses a 74LVC1G175 single-channel D-type flip-flop. This chip features a low-power, low-voltage design, operating from 1.65V to 5.5V, perfectly matching the 1.8V or 3.3V output voltage of the buck converter circuit. Pins 3 and 5 of U2 are power input terminals, connected in parallel to the output of the buck converter circuit to ensure a stable and sufficient power supply for the chip, preventing abnormal signal output due to insufficient power. Pin 2 of U2 is directly grounded, providing a stable operating reference potential. Pin 1 of U2 is the clock input terminal, connected to the output of the RC delay circuit via a wire, used to receive the gradually increasing voltage signal from the RC delay circuit. This input terminal has Schmitt trigger characteristics, effectively filtering out minor jitter in the signal. Pin 4 of U2 is the signal output terminal, connected to the external interrupt trigger pin of the main control module. This pin is preset to rising edge trigger mode. The 6-pin U2 is an asynchronous reset input, connected to the general-purpose output pin of the main control module. When the electronic device is unlocked, the main control module outputs a low-level reset signal, restoring U2 to its initial state and preparing for the next USB insertion trigger. When the output voltage of the RC delay circuit rises to the clock trigger threshold of U2, U2 is triggered on the rising edge of the clock signal, transmitting the preset high-level signal from the data input terminal (D terminal) to the output terminal (4-pin), outputting a standard high-level digital signal. This signal is the screen lock trigger signal, which is sent directly to the trigger input terminal of the main control module, ensuring that the main control module quickly recognizes and responds.

[0041] The technical effects achieved by the above embodiments include: achieving accurate conversion from analog trigger signals to digital lock screen signals, stable signal output without jitter, low-power trigger design to meet the needs of electronic devices, and reset function to ensure circuit reusability, thereby improving circuit practicality and reliability.

[0042] Traditional technical solutions have the following technical problems: the main control module and peripheral auxiliary circuits of electronic devices of different brands and models may operate at 1.8V or 3.3V. The step-down circuit needs to have the ability to adapt to multiple voltage outputs, and the output voltage must be pure and ripple-free to avoid abnormal module operation due to voltage mismatch or ripple interference.

[0043] Based on this, the step-down circuit converts the 5V voltage input from the USB interface into a 1.8V or 3.3V DC voltage. The voltage is then filtered by a filtering network consisting of output inductor L1 and output filter capacitors C2, C3, and C4 before being output.

[0044] It's worth noting that the power supply chip U1 in the buck circuit uses a linear regulator chip with wide-range voltage regulation. Its output voltage can be flexibly adjusted between 1.8V and 3.3V through a voltage divider network. When the main control module's operating voltage is 1.8V, the resistance ratio of the voltage divider resistors R2 and R3 is adjusted to 1:2. At this time, the voltage detected by the feedback pin of U1 meets the 1.8V output condition, and the chip outputs a stable 1.8V DC voltage. When the main control module's operating voltage is 3.3V, the resistance ratio of R2 and R3 is adjusted to 1:5 to adapt the feedback voltage to the 3.3V output requirement. After conversion, the voltage is output from the output pin of U1 and enters the LC low-pass filter network composed of inductor L1 and capacitors C2, C3, and C4. Inductor L1 is a 1μH wire-wound inductor with low DC resistance and high AC impedance, effectively suppressing low-frequency ripple and current surges in the output voltage. Capacitors C2 and C3 are 0.1μF multilayer ceramic capacitors used to filter high-frequency ripple and parasitic noise, while capacitor C4 is a 10μF tantalum capacitor used to stabilize the output voltage and suppress voltage drops. The three capacitors are connected in parallel, increasing the effective capacitance of the filter and widening the filtering frequency range, ensuring that ripple at different frequencies can be effectively filtered out. After processing by this filter network, the peak-to-peak value of the output voltage ripple is controlled within 50mV, and the voltage stability error does not exceed ±2%, perfectly adapting to electronic equipment modules with different operating voltage requirements and ensuring stable operation of each module.

[0045] The technical effects achieved by the above embodiments include: enabling multi-voltage output adaptation of the step-down circuit to meet the voltage requirements of different electronic devices; effectively filtering out ripple and noise by the LC filter network; ensuring a pure and stable output voltage; and significantly improving the versatility and reliability of the circuit.

[0046] Traditional technical solutions have the following technical problems: the trigger of the signal generation circuit needs to have a specific triggering method to ensure that it is triggered only when the RC delay circuit outputs a valid rising edge signal, so as to avoid false triggering caused by voltage fluctuations and noise interference. At the same time, it needs to be adapted to low-voltage operating environments and meet the low-power design requirements of electronic devices.

[0047] Based on this, the D-type flip-flop U2 is a low-power, low-voltage, single-trigger positive edge-triggered type. It is triggered when the clock input receives the low-to-high edge signal output by the RC delay circuit, and transmits the signal from the data input to the output, sending a screen lock trigger signal to the main control module.

[0048] It's worth noting that the D-type flip-flop U2 uses the 74LVC1G175 model, which belongs to the low-power, low-voltage series. Its static operating current is only a few microamps, meeting the low-power design requirements of electronic devices. Its operating voltage range is 1.65V to 5.5V, and it can stably adapt to the 1.8V or 3.3V output voltage of the buck converter circuit. This flip-flop is a single-trigger positive-edge triggered type. The triggering condition is strictly limited to the clock input receiving a rising edge signal from low to high. Other signal states (such as high-level hold, low-level hold, and falling edge) will not trigger, effectively avoiding false triggering caused by voltage fluctuations or external noise. The clock input (1 PIN) of the flip-flop is connected to the output of the RC delay circuit, receiving the gradually changing voltage signal output by the RC delay circuit. When this signal rises from low to the trigger threshold of the flip-flop (approximately 50% of the operating voltage), a valid rising edge trigger signal is formed. The data input (D terminal) of the flip-flop is preset to a high level and connected to the output of the buck converter circuit to ensure that a high-level screen lock signal is output during triggering. When the rising edge trigger signal arrives, the internal logic circuit of the flip-flop activates, instantly transmitting the high-level signal from the data input terminal to the output terminal (4PIN), outputting a standard high-level digital signal. This signal is sent directly to the trigger input terminal of the main control module through a wire, and the signal amplitude is consistent with the working voltage. The main control module can directly recognize it without additional signal conversion.

[0049] The technical effects achieved by the above embodiments include: precise triggering method, effectively avoiding false triggering; low power consumption and low voltage design to adapt to the overall circuit requirements; timely, stable and jitter-free lock screen signal output, ensuring that the main control module responds quickly to lock screen commands and improving the reliability of lock screen operation.

[0050] Traditional technical solutions have the following technical problems: The main control module needs to clearly distinguish and process the USB insertion indication signal and the screen lock trigger signal in an orderly manner to ensure that the logical order of the screen lock program's startup, preparation and execution is correct, and to avoid the screen lock program failing to start or responding late due to signal processing disorder, which would affect the screen lock effect.

[0051] Based on this, after receiving the indication signal sent by the USB insertion indication circuit, the main control module starts the BOOT screen lock program preparation work; after receiving the screen lock trigger signal sent by the signal generation circuit, the main control module drives the power-on screen lock circuit to perform the screen lock operation.

[0052] It's worth noting that the main control module uses the main processor of the electronic device or a dedicated microcontroller, such as the STM32 series microcontroller, which has clearly pre-defined signal processing logic and screen lock control flow. When the main control module's signal receiving end (general-purpose input pin) detects a high-level indication signal sent by the USB insertion indication circuit, it immediately triggers an interrupt response and starts the preparation work of the BOOT screen lock program. The preparation work includes waking up the BOOT screen lock program image stored in flash memory, loading the program code into memory for execution, allocating processor core resources and peripheral interfaces, and initializing the register parameters related to screen lock control, such as setting the screen lock password verification mechanism and disabling the USB data transmission enable bit, so that the screen lock program is in a fully ready state, waiting for the trigger signal. When the main control module's trigger input end (external interrupt pin) detects a high-level screen lock trigger signal sent by the signal generation circuit, it immediately sends an execution instruction to the ready BOOT screen lock program, and at the same time sends a high-level control signal to the power-on screen lock circuit through the control bus. Upon receiving the control signal, the power-on lock screen circuit immediately executes specific screen-locking actions, including cutting off the data transmission channel of the USB interface, preventing external devices from reading or writing data to the internal storage, locking the electronic device's touchscreen, physical buttons, and other input devices to prevent unauthorized operation, and displaying the lock screen interface on the device's display screen, thus completing the entire screen-locking process. After executing the screen-locking operation, the main control module continuously monitors the working status of the power-on lock screen circuit to ensure that the electronic device is always in a secure locked state.

[0053] The technical effects achieved by the above embodiments include: enabling the main control module to process the two types of signals in an orderly manner, ensuring smooth connection between the screen lock program preparation and trigger execution, avoiding program disorder, ensuring fast and accurate execution of screen lock operations, and significantly improving screen lock reliability and security.

[0054] Traditional technical solutions have the following technical problems: the buck circuit models and parameters of different electronic devices are different, and the time it takes for their output voltage to reach a stable state is different. The delay time of the RC delay circuit needs to be flexible and adjustable to adapt to the working characteristics of different devices and ensure that the delay time is accurately matched with the stabilization time of the buck circuit.

[0055] Based on this, the delay time of the RC delay circuit is determined by the resistance value of resistor R4 and the capacitance value of capacitor C5, with a delay time range of 10 milliseconds to 100 milliseconds.

[0056] It's worth noting that the delay time of the RC delay circuit is jointly determined by the resistance value of resistor R4 and the capacitance value of capacitor C5. Following the charging delay law of RC circuits, the delay time is directly proportional to both the resistance and capacitance values. Resistor R4 can be an adjustable resistor ranging from 10kΩ to 100kΩ, and capacitor C5 can be an electrolytic capacitor ranging from 1μF to 10μF. By adjusting the combination of these parameters, a delay time range of 10 milliseconds to 100 milliseconds can be achieved. For electronic devices with short buck circuit stabilization times, such as smartphones using high-efficiency linear regulator chips, a 10kΩ resistor R4 and a 1μF capacitor C5 can be selected, resulting in a delay of approximately 10 milliseconds, which can quickly trigger subsequent circuit operation. For electronic devices with longer buck circuit stabilization times, such as tablets using ordinary regulator chips, a 100kΩ resistor R4 and a 10μF capacitor C5 can be selected, resulting in a delay of approximately 100 milliseconds, ensuring complete voltage stability. For conventional electronic devices, a 50kΩ resistor R4 and a 5μF capacitor C5 can be selected, resulting in a delay of approximately 50 milliseconds, balancing response speed and stability. In practical applications, the parameters of R4 and C5 can be precisely selected based on the output voltage stabilization time parameters provided in the datasheet of the buck circuit for the electronic device. This ensures that the delay time of the RC delay circuit is 2 to 3 milliseconds longer than the stabilization time of the buck circuit, guaranteeing voltage stability without affecting the screen lock response speed due to excessive delay.

[0057] The technical effects achieved by the above embodiments include: the RC delay circuit has an adjustable delay time, which can accurately adapt to the stability characteristics of the step-down circuit of different electronic devices, avoid signal instability due to too short a delay or affect the screen lock response speed due to too long a delay, and improve the adaptability and reliability of the circuit.

[0058] Traditional technical solutions have the following technical problems: the working timing and signal flow of each module in the circuit need to be clearly defined to ensure that each module works in sequence according to the preset logic after the USB is inserted, so as to avoid the screen locking failure caused by the disorder of the module working order. At the same time, it is necessary to ensure that the whole process responds quickly and the logic is coherent, so as to achieve fast and reliable screen locking operation.

[0059] Based on this, after an external device is inserted into the USB interface, the USBVBUS pin outputs a 5V voltage, the step-down circuit starts working and outputs a stable voltage; the USB insertion indicator circuit sends an indicator signal to the main control module; the RC delay circuit generates a preset delay and then outputs a trigger signal to the signal generation circuit; the signal generation circuit generates a screen lock signal and sends it to the main control module; the main control module drives the power-on screen lock circuit to complete the screen lock operation of the electronic device.

[0060] It is worth mentioning that the circuit's workflow follows a fixed and clear timing logic, ensuring that each module works collaboratively and orderly. When an external USB device is plugged into the USB interface, the USBVBUS pin of the USB interface immediately outputs a 5V DC voltage. This voltage serves as the start signal for the entire trigger system, instantly activating the buck circuit. Upon receiving the 5V voltage, the buck circuit starts and begins voltage conversion within 1 millisecond, converting the 5V voltage to a stable low voltage of 1.8V or 3.3V. Simultaneously, input and output filtering networks remove voltage noise, providing clean power to the USB insertion indicator circuit, RC delay circuit, and signal generation circuit. After receiving power, the USB insertion indicator circuit outputs a high-level indicator signal within 0.5 milliseconds, which is quickly transmitted to the signal receiving end of the main control module via a wire. Upon detecting this signal, the main control module immediately starts the BOOT screen lock program preparation work, with the entire preparation process taking no more than 5 milliseconds. At the same time, the RC delay circuit begins charging after receiving power, delaying according to a preset delay time of 10 to 100 milliseconds. After the output voltage of the buck circuit is completely stable, it outputs a rising edge trigger signal from low to high to the signal generation circuit. After receiving the trigger signal, the signal generation circuit generates a high-level screen lock signal within 0.1 milliseconds and sends it to the trigger input of the main control module. Upon receiving the screen lock trigger signal, the main control module immediately sends an execution command to the ready BOOT screen lock program and simultaneously drives the power-on screen lock circuit. The power-on screen lock circuit performs the screen lock operation within 2 milliseconds, cutting off the USB data transmission channel and locking the device operation interface. The entire process, from USB insertion to screen lock completion, takes no more than 120 milliseconds, achieving a fast screen lock response.

[0061] The technical effects achieved by the above embodiments include: clear circuit operation timing, smooth linkage and rapid response of each module, screen locking operation can be completed in a short time after USB is inserted, reliable process logic, effective protection of electronic device data security, and applicability to various electronic devices with USB interfaces.

[0062] The embodiments and / or implementation methods described above are merely preferred embodiments and / or implementation methods for implementing the technology of the present invention, and are not intended to limit the implementation methods of the technology of the present invention in any way. Any person skilled in the art can make some modifications or alterations to other equivalent embodiments without departing from the scope of the technical means disclosed in the content of the present invention, but they should still be regarded as the technology or embodiments that are substantially the same as the present invention.

[0063] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. The above descriptions are only preferred embodiments of this application. It should be noted that due to the limitations of written expression, while there are objectively infinite specific structures, those skilled in the art can make several improvements, modifications, or changes without departing from the principles of this application, and can also combine the above technical features in an appropriate manner. These improvements, modifications, changes, or combinations, or the direct application of the inventive concept and technical solution to other situations without modification, should all be considered within the scope of protection of this application.

Claims

1. A USB device insertion automatic trigger locking circuit, characterized in that, It includes a USB interface, a step-down circuit, a USB insertion indicator circuit, an RC delay circuit, a signal generation circuit, a main control module, and a power-on and screen-locking circuit; the USB interface is connected to the input terminal of the step-down circuit, and the output terminal of the step-down circuit is connected to the input terminal of the USB insertion indicator circuit, the input terminal of the RC delay circuit, and the power input terminal of the signal generation circuit, respectively; The output of the USB insertion indicator circuit is connected to the signal input of the main control module; the output of the RC delay circuit is connected to the signal input of the signal generation circuit; the output of the signal generation circuit is connected to the trigger input of the main control module; and the main control module is connected to the power-on and screen-locking circuit control terminal.

2. The USB device insertion automatic trigger locking circuit according to claim 1, characterized in that, The step-down circuit includes a power supply chip U1, an input filter capacitor C1, a pull-up resistor R1, voltage divider resistors R2 and R3, an output inductor L1, and output filter capacitors C2, C3, and C4. The USBVBUS pin of the USB interface is connected to one end of the input filter capacitor C1, and the other end of the input filter capacitor C1 is grounded. The USBVBUS pin is also connected to pin 8 of the power supply chip U1. Pin 1 of the power supply chip U1 is connected to the USBVBUS pin through the pull-up resistor R1. Pins 2, 3, and 9 of the power supply chip U1 are all grounded. Pin 4 of the power supply chip U1 is connected to ground through the voltage divider resistor R2. Pin 4 of the power supply chip U1 is also connected to the output pin of the power supply chip U1 through the voltage divider resistor R3. The output pin of the power supply chip U1 is connected to one end of the output inductor L1. The other end of the output inductor L1 is connected to one end of each of the output filter capacitors C2, C3, and C4, and the other ends of each of the output filter capacitors C2, C3, and C4 are grounded.

3. The USB device insertion automatic trigger locking circuit according to claim 1, characterized in that, The USB insertion indication circuit includes an indication signal output unit, which is connected to the signal receiving end of the main control module. After receiving the power supply voltage output by the step-down circuit, the indication signal output unit sends a high-level indication signal to the main control module.

4. The USB device insertion automatic trigger locking circuit according to claim 1, characterized in that, The RC delay circuit includes a resistor R4 and a capacitor C5; one end of the resistor R4 is connected to the output of the step-down circuit, and the other end of the resistor R4 is connected to one end of the capacitor C5, and the other end of the capacitor C5 is grounded; the connection point of the resistor R4 and the capacitor C5 serves as the output of the RC delay circuit, which is connected to the signal input of the signal generation circuit.

5. The USB device insertion automatic trigger locking circuit according to claim 1, characterized in that, The signal generation circuit includes a D-type flip-flop U2, model number 74LVC1G175; pin 3 of the D-type flip-flop U2 is the power input terminal, connected to the output terminal of the buck converter circuit; pin 1 of the D-type flip-flop U2 is the clock input terminal, connected to the output terminal of the RC delay circuit; pin 2 of the D-type flip-flop U2 is grounded; pin 4 of the D-type flip-flop U2 is the signal output terminal, connected to the trigger input terminal of the main control module; pin 5 of the D-type flip-flop U2 is the power input terminal, connected to the output terminal of the buck converter circuit; pin 6 of the D-type flip-flop U2 is the reset signal input terminal, connected to the reset output terminal of the main control module.

6. The USB device insertion automatic trigger locking circuit according to claim 2, characterized in that, The step-down circuit converts the 5V voltage input from the USB interface into a 1.8V or 3.3V DC voltage. The voltage is then filtered by a filtering network consisting of output inductor L1 and output filter capacitors C2, C3, and C4 before being output.

7. The USB device insertion automatic trigger locking circuit according to claim 5, characterized in that, The D-type flip-flop U2 is a low-power, low-voltage, single-trigger positive-edge triggered type. It is triggered when the clock input receives a low-to-high edge signal from the RC delay circuit, transmitting the signal from the data input to the output and sending a screen lock trigger signal to the main control module.

8. The USB device insertion automatic trigger locking circuit according to claim 1, characterized in that, After receiving the indication signal sent by the USB insertion indication circuit, the main control module starts the BOOT screen lock program to prepare for operation; after receiving the screen lock trigger signal sent by the signal generation circuit, the main control module drives the power-on screen lock circuit to perform the screen lock operation.

9. The USB device insertion automatic trigger locking circuit according to claim 4, characterized in that, The delay time of the RC delay circuit is determined by the resistance value of resistor R4 and the capacitance value of capacitor C5, and the delay time ranges from 10 milliseconds to 100 milliseconds.

10. The USB device insertion automatic trigger locking circuit according to claim 1, characterized in that, After an external device is plugged into the USB interface, the USBVBUS pin outputs a 5V voltage, the step-down circuit starts working and outputs a stable voltage; the USB insertion indicator circuit sends an indicator signal to the main control module; the RC delay circuit generates a preset delay and then outputs a trigger signal to the signal generation circuit; the signal generation circuit generates a screen lock signal and sends it to the main control module; the main control module drives the power-on screen lock circuit to complete the screen lock operation of the electronic device.

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