Flexible ultrathin chip peeling optimization method for applying surface protection force

Abstract

The application provides a flexible ultrathin chip peeling optimization method for applying surface protection force, relates to the technical field of flexible electronics, and comprises the following steps: acquiring the length and thickness of a chip and the length of a substrate, determining the relationship between a protection index and a protection force application position, and then determining a target protection force application position; determining a protection force value according to the length of the substrate, the length of the chip and a needle pushing force, and then determining a pushing displacement; and peeling the chip according to the protection force value, the pushing displacement and the needle pushing force. According to the application, the contradictory relationship between the debonding of the adhesive layer interface and the chip itself fragmentation in the chip peeling process can be quantitatively solved, a symmetrical and downward protection force is applied on the upper surface of the chip, the stress distribution in the chip is actively regulated, the chip is effectively protected, the inhibition on the crack expansion of the adhesive layer is as small as possible, and thus the precise control on the chip peeling process and the success rate are improved.

Description

Technical Field

[0001] This invention relates to the field of flexible electronics technology, and more particularly to an optimized method for peeling off flexible ultrathin chips with surface protective forces. Background Technology

[0002] Flexible ultrathin chips are often peeled off using a combination of push pins and vacuum suction. However, traditional methods can easily generate excessive tensile stress on the chip surface during push pin application, leading to chip breakage. Related technologies rely heavily on experience-based adjustments and lack systematic process optimization methods targeting the adhesive layer debonding and chip fracture mechanisms, thus affecting chip integrity and yield.

[0003] The information disclosed in the background section of this application is intended only to enhance the understanding of the general background of this application and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0004] This invention provides an optimized method for peeling off flexible ultrathin chips by applying surface protective force. This method can solve the technical problem that related technologies rely on experience-based debugging and lack systematic process optimization methods for the mechanism of adhesive layer debonding and chip breakage, which affects the integrity and yield of the chip.

[0005] According to a first aspect of the present invention, a method for optimizing the peeling of a flexible ultrathin chip by applying surface protection force is provided, comprising: Obtain the length and thickness of the chip, and obtain the length of the substrate; The relationship between the protection index and the location where the protection force is applied is determined based on the length and thickness of the chip and the length of the substrate. The location where the target protection force is applied is determined based on the relationship between the protection index and the location where the protection force is applied. The protection force value is determined based on the length of the substrate, the length of the chip, and the push force of the ejector pin, wherein the ejector pin is located at the edge of the chip, and the protection force is applied vertically downward at the target protection force application position on the chip. The pusher displacement is determined based on the chip's length and thickness, the pusher force, and the protection force value. The chip is peeled off based on the protection force value, push displacement, and push pin force.

[0006] According to the present invention, determining the relationship between the protection index and the location where the protective force is applied, based on the length and thickness of the chip and the length of the substrate, includes: The crack propagation inhibition effect index and the central stress on the upper surface of the chip are determined based on the crack propagation length of the chip, the location of the protective force application, the length and thickness of the chip, and the length of the substrate. The protection index related to the location where the protective force is applied is determined based on the crack propagation inhibition effect index, the central stress on the upper surface of the chip, the thickness of the chip, and the elastic modulus of the chip.

[0007] According to the present invention, a protection index related to the location where the protective force is applied is determined based on the crack propagation inhibition effect index, the central stress on the upper surface of the chip, the thickness of the chip, and the elastic modulus of the chip, including: According to the formula Determine the protection index related to the location where the protective force is applied. ,in, For the thickness of the chip, The stress at the center of the chip's upper surface. The crack propagation inhibition effect index. The elastic modulus of the chip. hour, =1, hour, It is -1.

[0008] According to the present invention, determining the target protection force application location based on the relationship between the protection index and the protection force application location includes: The location where the protective force is applied corresponding to the maximum value of the protection index is determined as the target protection force application location, where the target protection force application location is the center position of the chip's upper surface.

[0009] According to the present invention, the protection force value is determined based on the length of the substrate, the length of the chip, and the push force of the ejector pin, including: Based on the length ratio between the substrate length and the chip length; The protection force value is determined based on the length ratio and the push force of the ejector pin.

[0010] According to the present invention, determining the protection force value based on the length ratio and the ejector pin thrust includes: According to the formula Determine the protection level ,in, For the thrust of the ejector pin, The length of the base, For the length of the chip, The length ratio is given.

[0011] According to the present invention, determining the pusher displacement based on the chip's length and thickness, the pusher force, and the protection force value includes: According to the formula Determine the push displacement ,in, For the thrust of the ejector pin, The length of the base, For the length of the chip, To protect the strength value, The elastic modulus of the substrate, The moment of inertia of the rectangular cross-section of the base. , The thickness of the substrate. , where a is the crack propagation length.

[0012] According to a second aspect of the present invention, a flexible ultrathin chip peeling optimization system for applying surface protection force is provided, comprising: The acquisition module is used to acquire the length and thickness of the chip, and the length of the substrate; The protection index module is used to determine the relationship between the protection index and the location where the protection force is applied, based on the length and thickness of the chip and the length of the substrate. The application location module is used to determine the application location of the target protection force based on the relationship between the protection index and the application location of the protection force; The protection force value module is used to determine the protection force value based on the length of the substrate, the length of the chip, and the push force of the ejector pin, wherein the ejector pin is set at the edge of the chip, and the protection force is applied vertically downward at the target protection force application position on the chip; The push-top displacement module is used to determine the push-top displacement based on the chip's length and thickness, the push-top force, and the protection force value. The stripping module is used to strip the chip based on the protection force value, push displacement, and push pin force.

[0013] According to a third aspect of the present invention, a flexible ultrathin chip stripping optimization apparatus for applying surface protection force is provided, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to execute the flexible ultrathin chip stripping optimization method for applying surface protection force.

[0014] According to a fourth aspect of the present invention, a computer-readable storage medium is provided having computer program instructions stored thereon, which, when executed by a processor, implement the optimized method for peeling off a flexible ultrathin chip with surface protection applied.

[0015] By adopting the above technical solution, the present invention can achieve the following technical effects: According to this invention, the contradictory relationship between adhesive layer interface debonding and chip breakage during chip peeling can be quantitatively resolved. By applying a symmetrical, downward protective force to the upper surface of the chip, and accurately determining the application location and intensity of the protective force, as well as the pushing displacement under the protective force, the stress distribution in the chip can be actively controlled. This effectively protects the chip while minimizing the inhibition of adhesive layer crack propagation. In other words, while protecting the chip, it minimizes the negative impact on chip-substrate peeling, thereby achieving precise control of the chip peeling process and improving the success rate. When determining the application location of the protective force, it can be based on the dimensional parameters of the chip and substrate, improving the accuracy of the protective force application, enhancing the protective effect of the protective force on the peeling process, and increasing the peeling success rate and yield. When determining the protective intensity value, a quantitative relationship between the two can be obtained through extensive numerical simulations and nonlinear fitting, providing a direct calculation tool for chip peeling of different sizes and structures. When determining the pushing displacement, the coordination relationship between the ejector pin force, protective force, and structural deformation can be considered to design a precise pushing displacement, providing a precise basis for setting the displacement control mode in actual production.

[0016] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Other features and aspects of the invention will become clearer from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort. Figure 1 An exemplary flowchart illustrates a method for optimizing the peeling of flexible ultrathin chips by applying surface protective forces according to an embodiment of the present invention; Figure 2 A schematic diagram of a chip mounting apparatus according to an embodiment of the present invention is shown as an example; Figure 3 and Figure 4 An exemplary schematic diagram illustrates the application of an optimized method for peeling off flexible ultrathin chips by applying surface protective forces according to an embodiment of the present invention; Figure 5 A schematic diagram of a chip warpage boundary is shown exemplarily according to an embodiment of the present invention; Figure 6 A schematic diagram illustrating experimental results according to an embodiment of the present invention is shown as an example; Figure 7A block diagram of a flexible ultrathin chip stripping optimization system for applying surface protective forces according to an embodiment of the present invention is shown as an example. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0020] Figure 1 An exemplary flowchart illustrates a method for optimizing the peeling of flexible ultrathin chips by applying surface protective forces according to an embodiment of the present invention, the method comprising: Step S1: Obtain the length and thickness of the chip, and obtain the length of the substrate; Step S2: Determine the relationship between the protection index and the location where the protection force is applied, based on the length and thickness of the chip and the length of the substrate. Step S3: Determine the target protection force application location based on the relationship between the protection index and the protection force application location; Step S4: Determine the protection force value based on the length of the substrate, the length of the chip, and the push force of the ejector pin, wherein the ejector pin is set at the edge of the chip, and the protection force is applied vertically downward at the target protection force application position on the chip. Step S5: Determine the pusher displacement based on the chip's length and thickness, the pusher force, and the protection force value. Step S6: Based on the protection force value, push displacement, and push pin force, the chip is peeled off.

[0021] The optimized method for peeling flexible ultrathin chips by applying surface protective force according to embodiments of the present invention can quantitatively resolve the contradiction between adhesive layer interface debonding and chip breakage during chip peeling. By applying a symmetrical, downward protective force to the upper surface of the chip and accurately determining the application position and intensity of the protective force, as well as the pushing displacement under the action of the protective force, the stress distribution in the chip is actively controlled. While effectively protecting the chip, it minimizes the inhibition of adhesive layer crack propagation. That is, while protecting the chip, it minimizes the negative impact on chip-substrate peeling, thereby achieving precise control of the chip peeling process and improving the success rate.

[0022] Example 1: Figure 2 A schematic diagram of a chip mounting apparatus according to an embodiment of the present invention is shown as an example.

[0023] According to one embodiment of the present invention, a modified chip mounting device can be used. The device's ejector pin pushing system is a displacement control mode, which can precisely control the rise height of the ejector pins. In this device, a standard vacuum suction head is modified into a composite suction head capable of applying a controllable protective force. Its core structure includes a precision spring and a displacement adjustment mechanism. By adjusting the initial downward displacement of the suction head, the compression of the spring is controlled, thereby precisely controlling the protective force applied to the surface of the chip. The spring constant of the suction head is calibrated to 10 N / m.

[0024] Example 2: According to one embodiment of the present invention, a plane strain mechanics model of a three-layer structure consisting of a chip, an adhesive layer, and a substrate can be constructed. The entire structure is divided into multiple regions based on the ejector pin position and the crack length in the adhesive layer. For each region, the chip and substrate layers are considered as Timoshenko beams, while the adhesive layer, which is much thinner than the chip and substrate, is simplified as a continuously distributed linear spring to simulate its normal and tangential bonding stiffness. Using this model, the stress field, displacement field, energy release rate at the adhesive layer interface, and the stress distribution within the chip can be accurately calculated under arbitrary ejector pin positions and crack lengths.

[0025] Example 3: According to one embodiment of the present invention, in step S1, parameters of the chip and the substrate, such as the length and thickness of the chip and the length of the substrate, can be determined. Then, in step S2, a protection index and its relationship with the location where the protective force is applied are determined. The protection index is used to evaluate the effectiveness of the applied protective force. It considers not only the improvement of the stress state at the center of the chip's upper surface by the protective force (converting tensile stress into compressive stress), but also the potential inhibitory effect of the protective force on the propagation of adhesive layer cracks.

[0026] According to one embodiment of the present invention, determining the relationship between a protection index and the location where a protective force is applied, based on the length and thickness of the chip and the length of the substrate, includes: determining a crack propagation inhibition effect index and a central stress on the upper surface of the chip based on the crack propagation inhibition effect index, the location where the protective force is applied, the length and thickness of the chip, and the length of the substrate; and determining a protection index related to the location where the protective force is applied based on the crack propagation inhibition effect index, the central stress on the upper surface of the chip, the thickness of the chip, and the elastic modulus of the chip.

[0027] According to one embodiment of the present invention, the crack propagation inhibition effect index is numerically equal to the adhesive layer peeling energy release rate, and it can be considered that the crack propagation inhibition effect index is obtained by calculating the reaction force of the stress used to calculate the energy release rate of the adhesive layer glass.

[0028] According to an embodiment of the present invention, the energy release rate of the adhesive glass can be determined by the following formula (1): (1) in, The energy release rate of the adhesive layer peeling. The normal stress at the crack tip. This represents the shear stress at the crack tip. , , For adhesive layer thickness, , , The elastic modulus of the adhesive layer. is the Poisson's ratio of the adhesive layer.

[0029] According to one embodiment of the present invention, the normal stress and shear stress at the crack tip are related to the crack propagation length, the length and thickness of the chip, and the length of the substrate. This relationship can be obtained through numerical simulation in experiments. Therefore, given a chip (i.e., the length and thickness of the chip are known), the normal stress and shear stress at the crack tip can be determined by determining the crack propagation length.

[0030] According to one embodiment of the present invention, the central stress on the upper surface of the chip is related to the crack propagation length, the location of the protective force application, the length and thickness of the chip, and the length of the substrate. This relationship can be obtained through numerical simulation in experiments. Therefore, given a chip (i.e., the length and thickness of the chip are known), the central stress on the upper surface of the chip can be determined by determining the crack propagation length and the location of the protective force application.

[0031] According to one embodiment of the present invention, determining a protection index related to the location where the protective force is applied, based on the crack propagation inhibition effect index, the central stress on the upper surface of the chip, the thickness of the chip, and the elastic modulus of the chip, includes: determining the protection index related to the location where the protective force is applied according to formula (2). , (2) in, For the thickness of the chip, The stress at the center of the chip's upper surface. The crack propagation inhibition effect index. The elastic modulus of the chip. hour, =1, hour, It is -1.

[0032] According to one embodiment of the present invention, the crack propagation inhibition effect index is numerically equal to the energy release rate of the interlayer glass. Therefore, the protection index is related to the location where the protective force is applied and the crack propagation length.

[0033] According to an embodiment of the present invention, in step S3, the target protection force application position is determined according to the relationship between the protection index and the protection force application position, including: determining the protection force application position corresponding to the maximum value of the protection index as the target protection force application position, wherein the target protection force application position is the center position of the upper surface of the chip.

[0034] According to an embodiment of the present invention, based on the above formula (2), a system analysis is performed to determine that when the protective force is applied to the center position of the chip surface, the protection index reaches its maximum value, and the protective effect of the protective force on the entire stripping process is the most significant and stable.

[0035] In this way, the location where the protective force is applied can be determined based on the size parameters of the chip and the substrate, improving the accuracy of the protective force application, enhancing the protective effect of the protective force on the peeling process, and increasing the peeling success rate and yield.

[0036] Example 4: According to one embodiment of the present invention, in step S4, after determining the target protection force application location, the protection force value, that is, the numerical value of the protection force, can also be determined.

[0037] According to one embodiment of the present invention, determining a protection force value based on the length of the substrate, the length of the chip, and the push force of the ejector pin includes: determining the protection force value based on the length ratio between the length of the substrate and the length of the chip; and determining the protection force value based on the length ratio and the push force of the ejector pin.

[0038] According to one embodiment of the present invention, the length ratio between the length of the substrate and the length of the chip can be obtained, and a protection force value can be determined based on the length ratio. Determining the protection force value based on the length ratio and the ejector pin thrust includes: determining the protection force value according to formula (3). , (3) in, For the thrust of the ejector pin, The length of the base, For the length of the chip, The length ratio is given.

[0039] According to one embodiment of the present invention, research has shown that the optimal protective force mainly depends on the length ratio of the substrate to the chip. Through a large number of numerical simulations and nonlinear fitting, a quantitative relationship between the two has been obtained, providing a direct calculation tool for chip stripping of different sizes and structures.

[0040] Through finite element simulation and theoretical model calculation, different substrate-to-chip length ratios were analyzed. For each of the series of operating conditions, calculate the corresponding optimal protection force ratio. Chip thickness was considered in the simulation and calculation. , substrate thickness Material elastic modulus Adhesive layer thickness Parameters such as length ratio were considered, but the final results showed that the optimal protection force ratio was mainly affected by the length ratio.

[0041] The LM (Levenberg-Marquardt) iterative algorithm is used for nonlinear regression, and the fitting function is shown in the following formula (4): (4) in , The parameters obtained from the fitting are: , , The fitted curve matches the original data points well, with a maximum relative error of less than 5%, meeting engineering accuracy requirements. This fitted formula provides a direct and reliable calculation tool for the protective force optimization proposed in this invention, and is applicable to chip stripping processes of different sizes and structures.

[0042] Example 5: According to one embodiment of the present invention, in step S5, the pushing displacement can be determined based on the length and thickness of the chip, the pushing force of the ejector pin, and the protective force value. The ejector pin is located at the edge of the chip, that is, the chip is lifted from all sides, while a protective force can be applied above the chip to prevent damage. Under the combined action of the ejector pin and the protective mechanism, the chip can be peeled off.

[0043] According to one embodiment of the present invention, determining the push displacement based on the chip length and thickness, the push force of the ejector pin, and the protection force value includes: determining the push displacement according to formula (5). , (5) in, For the thrust of the ejector pin, The length of the base, For the length of the chip, To protect the strength value, The elastic modulus of the substrate, The moment of inertia of the rectangular cross-section of the base. , The thickness of the substrate. , where a is the crack propagation length.

[0044] According to one embodiment of the present invention, in order to ensure that the adhesive layer crack can still propagate smoothly under the action of protective force, that is, to separate the substrate from the chip smoothly, the pushing displacement of the ejector pin can be determined by formula (5), that is, the height at which the ejector pin lifts the chip. This calculation method takes into account the coordination relationship between ejector pin force, protective force and structural deformation, and provides a precise setting basis for the displacement control mode in actual production. This displacement is the minimum ejector pin lifting height required to ensure that the adhesive layer crack can still propagate stably and achieve complete chip peeling while applying protective force. This formula provides precise process parameters in the displacement control mode, so that a stable and repeatable peeling process can be achieved by controlling the ejector pin lifting height (rather than just controlling the pushing force) in actual equipment, which is particularly suitable for high-yield, mass production of flexible chips.

[0045] Example 6: According to one embodiment of the present invention, in step S6, after determining the protection force value, push displacement and ejector pin thrust, the chip mounting equipment can be configured to peel off the chip.

[0046] The optimized method for peeling flexible ultrathin chips by applying surface protective force according to embodiments of the present invention can quantitatively resolve the contradictory relationship between adhesive layer interface debonding and chip breakage during chip peeling. By applying a symmetrical, downward protective force to the upper surface of the chip and accurately determining the application location and intensity of the protective force, as well as the pushing displacement under the protective force, the stress distribution within the chip is actively controlled. This effectively protects the chip while minimizing the inhibition of adhesive layer crack propagation; that is, while protecting the chip, it minimizes the negative impact on chip-substrate peeling, thereby achieving precise control of the chip peeling process and improving the success rate. When determining the application location of the protective force, it can be based on the dimensional parameters of the chip and substrate, improving the accuracy of the protective force application, enhancing the protective effect of the protective force on the peeling process, and increasing the peeling success rate and yield. When determining the protective force value, a quantitative relationship between the two can be obtained through extensive numerical simulations and nonlinear fitting, providing a direct calculation tool for chip peeling of different sizes and structures. When determining the pusher displacement, the coordination relationship between the pusher force, the protective force, and the structural deformation can be considered to design a precise pusher displacement, providing a precise basis for setting the displacement control mode in actual production.

[0047] Example 7: Figure 3 and Figure 4 An exemplary schematic diagram illustrates the application of an optimized method for applying surface protective forces to a flexible ultrathin chip according to an embodiment of the present invention.

[0048] According to an embodiment of the present invention, by configuring the chip mounting equipment described above, after the device is in place, a protective force is applied to the center of the chip, and the value of the protective force and the pushing displacement are set according to formulas (3) and (5) to peel off the chip. During the peeling process, the spring inside the composite pick is compressed, and the elastic coefficient of the spring is 10 N / m. When the device is in place, the compression of the spring inside the composite pick is Δx. During the peeling process, while the ejector pin pushes, the pushing displacement of the ejector pin is also considered. In this case, the chip center displacement is The actual compression of the spring is Δx and The sum of these values. In this case, the protective force is exactly equal to the force value calculated by formula (3).

[0049] Example 8: The peeling method of the present invention was experimentally verified, and the experimental samples included: (1) Chip: A single crystal silicon wafer with a thickness of 15μm is cut into a square chip of 8 mm × 8 mm.

[0050] (2) Substrate: The chip is bonded to a flexible polyethylene substrate with a thickness of 80μm by an adhesive layer.

[0051] (3) Adhesive layer: Its critical peel energy release rate was measured to be approximately 3.2 N / m.

[0052] Figure 5 A schematic diagram of a chip warpage boundary is shown as an example according to an embodiment of the present invention.

[0053] Boundary conditions: During the actual peeling process, the surrounding chips may warp and detach due to the push of the ejector pins. Therefore, the fixed boundary is set at the junction of the warped and flat areas of the chip. Measurements show that the equivalent substrate-to-chip length ratio under this condition... It is approximately 1.35.

[0054] According to formula (3), Substituting the value of 1.35, the optimal dimensionless protective force is determined. It is 0.07.

[0055] To systematically study the influence of the magnitude of the protective force, five experimental groups were set up with dimensionless protective forces of 0, 0.03, 0.07, 0.11, and 0.15, respectively. Simultaneously, the pushing force of the ejector pin was also set. The force is 60 N / m. Based on the dimensionless protective force, the absolute value of the protective force is calculated. Combined with the spring constant of the modified nozzle (10 N / m), the target protective force is achieved by precisely controlling the initial downward displacement of the nozzle upon contact with the chip. The push of the ejector pin causes the chip to shift upwards, resulting in additional compression of the spring. As mentioned above, the actual compression of the spring is Δx and... The sum of these parameters was calibrated in the experiment. Based on theory, protective force, ejector pin thrust, and ejector pin displacement were applied to allow the adhesive layer cracks to propagate steadily. Each experimental group underwent 20 repeated chip peeling experiments to statistically analyze the peeling success rate. Success was defined as the chip being completely peeled off without any visible cracks or damage.

[0056] Figure 6 A schematic diagram illustrating experimental results according to an embodiment of the present invention is shown as an example.

[0057] Experimental results show that: 1. The surface protection force application method proposed in this invention can significantly improve the success rate of peeling off flexible ultrathin chips.

[0058] 2. There exists an optimal protective force range (in this experiment, it is...). = 0.07–0.08), which is highly consistent with the theoretical prediction. Insufficient or excessive protective force will lead to a decrease in the success rate.

[0059] 3. The experimental results fully verify the correctness, feasibility and effectiveness of the model, optimization criteria and calculation method proposed in this invention, and provide reliable process guidance for industrial applications.

[0060] Example 9: Figure 7 A block diagram of a flexible ultrathin chip peeling optimization system for applying surface protective forces according to an embodiment of the present invention is shown as an example. The system includes: The acquisition module is used to acquire the length and thickness of the chip, and the length of the substrate; The protection index module is used to determine the relationship between the protection index and the location where the protection force is applied, based on the length and thickness of the chip and the length of the substrate. The application location module is used to determine the application location of the target protection force based on the relationship between the protection index and the application location of the protection force; The protection force value module is used to determine the protection force value based on the length of the substrate, the length of the chip, and the push force of the ejector pin, wherein the ejector pin is set at the edge of the chip, and the protection force is applied vertically downward at the target protection force application position on the chip; The push-top displacement module is used to determine the push-top displacement based on the chip's length and thickness, the push-top force, and the protection force value. The stripping module is used to strip the chip based on the protection force value, push displacement, and push pin force.

[0061] According to one embodiment of the present invention, a flexible ultrathin chip peeling optimization device for applying surface protection force is provided, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to execute the flexible ultrathin chip peeling optimization method for applying surface protection force.

[0062] According to one embodiment of the present invention, a computer-readable storage medium is provided having computer program instructions stored thereon, which, when executed by a processor, implement the optimized method for peeling off flexible ultrathin chips with surface protection force.

[0063] This invention can be a method, apparatus, system, and / or computer program product. The computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for performing various aspects of the invention.

[0064] Those skilled in the art should understand that the embodiments of the present invention described above and shown in the accompanying drawings are merely examples and do not limit the present invention. The objectives of the present invention have been fully and effectively achieved. The functions and structural principles of the present invention have been demonstrated and explained in the embodiments, and any variations or modifications may be made to the implementation of the present invention without departing from the stated principles.

[0065] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An optimized method for peeling off flexible ultrathin chips with surface protective force, characterized in that, include: Obtain the length and thickness of the chip, and obtain the length of the substrate; The relationship between the protection index and the location where the protection force is applied is determined based on the length and thickness of the chip and the length of the substrate. The location where the target protection force is applied is determined based on the relationship between the protection index and the location where the protection force is applied. The protection force value is determined based on the length of the substrate, the length of the chip, and the push force of the ejector pin, wherein the ejector pin is located at the edge of the chip, and the protection force is applied vertically downward at the target protection force application position on the chip. The pusher displacement is determined based on the chip's length and thickness, the pusher force, and the protection force value. The chip is peeled off based on the protection force value, push displacement, and push pin force.

2. The optimized method for peeling off flexible ultrathin chips by applying surface protective force according to claim 1, characterized in that, Based on the length and thickness of the chip, and the length of the substrate, the relationship between the protection index and the location where the protective force is applied is determined, including: The crack propagation inhibition effect index and the central stress on the upper surface of the chip are determined based on the crack propagation length of the chip, the location of the protective force application, the length and thickness of the chip, and the length of the substrate. The protection index related to the location where the protective force is applied is determined based on the crack propagation inhibition effect index, the central stress on the upper surface of the chip, the thickness of the chip, and the elastic modulus of the chip.

3. The optimized method for peeling off flexible ultrathin chips with surface protection force according to claim 2, characterized in that, Based on the crack propagation inhibition effect index, the central stress on the chip surface, the chip thickness, and the chip's elastic modulus, a protection index related to the location where the protective force is applied is determined, including: According to the formula Determine the protection index related to the location where the protective force is applied. ,in, For the thickness of the chip, The stress at the center of the chip's upper surface. The crack propagation inhibition effect index. The elastic modulus of the chip. hour, =1, hour, It is -1.

4. The optimized method for peeling off flexible ultrathin chips by applying surface protective force according to claim 1, characterized in that, Based on the relationship between the protection index and the location where the protection force is applied, the location where the target protection force is applied is determined, including: The location where the protective force is applied corresponding to the maximum value of the protection index is determined as the target protection force application location, where the target protection force application location is the center position of the chip's upper surface.

5. The optimized method for peeling off flexible ultrathin chips with surface protection force according to claim 1, characterized in that, The protection force value is determined based on the substrate length, chip length, and ejector pin thrust, including: Based on the length ratio between the substrate length and the chip length; The protection force value is determined based on the length ratio and the push force of the ejector pin.

6. The optimized method for peeling off flexible ultrathin chips with surface protective force according to claim 5, characterized in that, The protection force value is determined based on the length ratio and the ejector pin thrust, including: According to the formula Determine the protection level ,in, For the thrust of the ejector pin, The length of the base, For the length of the chip, The length ratio is given.

7. The optimized method for peeling off flexible ultrathin chips with surface protective force according to claim 1, characterized in that, The pusher displacement is determined based on the chip's length and thickness, the pusher force, and the protection force value, including: According to the formula Determine the push displacement ,in, For the thrust of the ejector pin, The length of the base, For the length of the chip, To protect the strength value, The elastic modulus of the substrate, The moment of inertia of the rectangular cross-section of the base. , The thickness of the substrate. , where a is the crack propagation length.

8. A flexible ultrathin chip peeling optimization system for applying surface protective forces, used to perform the method as described in any one of claims 1-7, characterized in that, include: The acquisition module is used to acquire the length and thickness of the chip, and the length of the substrate; The protection index module is used to determine the relationship between the protection index and the location where the protection force is applied, based on the length and thickness of the chip and the length of the substrate. The application location module is used to determine the application location of the target protection force based on the relationship between the protection index and the application location of the protection force; The protection force value module is used to determine the protection force value based on the length of the substrate, the length of the chip, and the push force of the ejector pin, wherein the ejector pin is set at the edge of the chip, and the protection force is applied vertically downward at the target protection force application position on the chip; The push-top displacement module is used to determine the push-top displacement based on the chip's length and thickness, the push-top force, and the protection force value. The stripping module is used to strip the chip based on the protection force value, push displacement, and push pin force.

9. A flexible ultrathin chip peeling optimization device for applying surface protective force, characterized in that, include: processor; A memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to perform the method as described in any one of claims 1-7.

10. A computer-readable storage medium having stored thereon computer program instructions that, when executed by a processor, implement the method as described in any one of claims 1-7.

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