Multilayer electronic component

Abstract

A multilayer electronic component is provided. The multilayer electronic component includes a main body including dielectric layers and internal electrodes, at least one of the dielectric layers being alternately disposed with the internal electrodes in a first direction, and an external electrode disposed on the main body and connected to the internal electrodes, wherein the at least one of the dielectric layers includes a perovskite layer including first crystal grains, the first crystal grains not having a core-shell structure and including a perovskite-type compound represented by a general formula ABO3, and an auxiliary layer disposed on two surfaces of the perovskite layer opposite to each other in the first direction and including a first additive element, wherein the first additive element can include one or more of Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0172375, filed on November 27, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to a multilayer electronic component. Background Technology

[0003] Multilayer ceramic capacitors (MLCCs, a type of multilayer electronic component) are chip capacitors mounted on printed circuit boards in various types of electronic products, such as image display devices (including liquid crystal displays (LCDs) and plasma display panels (PDPs)), computers, smartphones, and mobile phones, for charging or discharging from them. Such multilayer ceramic capacitors are used as components in a wide variety of electronic devices due to their small size, guaranteed high capacitance, and ease of installation.

[0004] As the operating environments of multilayer ceramic capacitors become increasingly harsh, research has been conducted to improve their temperature stability and reliability. In particular, a method is being used to improve the reliability of multilayer ceramic capacitors by adding various secondary elements (such as rare earth elements) to a BaTiO3-based perovskite compound used as the main component to form a dielectric layer. In this case, the dielectric grains constituting the dielectric layer form a core-shell structure, and compared to pure BaTiO3-based perovskite compounds, the room-temperature dielectric constant, breakdown voltage characteristics, and lifetime reliability are improved due to the core-shell structure of the dielectric grains.

[0005] However, when a dielectric layer is fabricated using a dielectric composition in which BaTiO3-based main component powder is mixed with secondary component powder to form dielectric grains with a core-shell structure, the core-shell structure may randomly form. In this case, there is a limitation that the size or location of the core that realizes the capacitance may not be controllable, and if the proportion of the core within the entire grain decreases, the capacitance of the multilayer ceramic capacitor may decrease. Therefore, there is a need to investigate a novel dielectric layer that can replace dielectric layers with existing core-shell structured grains. Summary of the Invention

[0006] One aspect of this disclosure is to provide a multilayer electronic component with high capacitance and excellent reliability.

[0007] However, the problems to be solved by this disclosure are not limited to those described above, and will be more readily understood in the process of describing specific embodiments of this disclosure.

[0008] A multilayer electronic component according to embodiments of the present disclosure may include: a body including a dielectric layer and an inner electrode, the inner electrode being alternately disposed with at least one dielectric layer in a first direction; and an outer electrode disposed on the body and connected to the inner electrode, wherein the at least one dielectric layer may include: a perovskite layer including a first grain, the first grain having no core-shell structure and comprising a perovskite-type compound represented by the general formula ABO3; and an auxiliary layer disposed on two opposing surfaces of the perovskite layer in the first direction and comprising a first additive element, wherein the first additive element may include one or more selected from Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si.

[0009] A multilayer electronic component according to another embodiment of the present disclosure may include: a body including a dielectric layer and an inner electrode, the inner electrode being alternately disposed with at least one dielectric layer in a first direction; and an outer electrode disposed on the body and connected to the inner electrode, wherein the at least one dielectric layer may include: a single-crystal perovskite layer comprising a perovskite-type compound represented by the general formula ABO3; and an auxiliary layer disposed on two opposing surfaces of the single-crystal perovskite layer in the first direction and comprising a first additive element. Attached Figure Description

[0010] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 This is a perspective view schematically illustrating a multilayer electronic assembly according to an embodiment of the present disclosure.

[0011] Figure 2 Schematic illustration along Figure 1 The cross-sectional view taken from line I-I'.

[0012] Figure 3 Schematic illustration along Figure 1 The cross-sectional view taken from line II-II'.

[0013] Figure 4 It is a schematic cross-sectional view showing the microstructure of the dielectric layer.

[0014] Figures 5 to 8 This is a schematic cross-sectional view illustrating the microstructure of the dielectric layer of a multilayer electronic component according to another embodiment of the present disclosure.

[0015] Figure 9A and Figure 9B The figures show the capacitance of the comparative example and the capacitance of the example, respectively, measured using the COMSOL analysis program. Detailed Implementation

[0016] In the following description, embodiments of the present disclosure will be illustrated with reference to the accompanying drawings. However, embodiments of the present disclosure may be modified in various other forms, and the scope of the present disclosure is not limited to the embodiments described below. Furthermore, embodiments of the present disclosure are provided to provide a more complete description of the disclosure to those skilled in the art. Therefore, for clarity of description, the shape and size of elements in the drawings may be exaggerated, and elements indicated by the same reference numerals in the drawings may be the same elements.

[0017] In the accompanying drawings, for the purpose of clarifying this disclosure, parts irrelevant to the description will be omitted, and thicknesses may be enlarged to clearly show layers and regions. The same reference numerals will be used to indicate components having the same function within the same conceptual scope. Furthermore, throughout the specification, unless explicitly stated otherwise, when an element is referred to as "comprising" or "including" another element, it means that the element may also include other elements, without excluding others.

[0018] In the accompanying drawings, X may represent the thickness direction or a first direction, Y may represent the length direction or a second direction, and Z may represent the width direction or a third direction.

[0019] Multilayer electronic components Figure 1 This is a perspective view schematically illustrating a multilayer electronic assembly according to an embodiment of the present disclosure.

[0020] Figure 2 Schematic illustration along Figure 1 The cross-sectional view taken from line I-I'.

[0021] Figure 3 Schematic illustration along Figure 1 The cross-sectional view taken from line II-II'.

[0022] Figure 4 It is a schematic cross-sectional view showing the microstructure of the dielectric layer.

[0023] In the following text, reference will be made to Figures 1 to 4 A multilayer electronic assembly 100 according to embodiments of the present disclosure is described in detail. Additionally, a multilayer ceramic capacitor is described as an example of a multilayer electronic assembly, but the present disclosure is not limited thereto, and is applicable to various multilayer electronic assemblies such as inductors, piezoelectric elements, varistors, or thermistors.

[0024] A multilayer electronic component 100 according to an embodiment of the present disclosure may include a body 110 and external electrodes 131 and 132, wherein the body 110 includes a dielectric layer 111 and internal electrodes 121 and 122.

[0025] There are no particular restrictions on the specific shape of the main body 110, but as Figure 1 As shown, the body 110 may have a hexahedral shape or a shape similar to a hexahedron. Due to the shrinkage of the ceramic powder particles included in the body 110 during the sintering process, or due to the polishing process for the corners of the body 110, the body 110 may not have a hexahedral shape with perfectly straight lines, but may have a generally hexahedral shape.

[0026] The main body 110 may have a first surface 1 and a second surface 2 that are opposite to each other in a first direction, a third surface 3 and a fourth surface 4 that are connected to the first surface 1 and the second surface 2 and are opposite to each other in a second direction, and a fifth surface 5 and a sixth surface 6 that are connected to the first surface 1, the second surface 2, the third surface 3 and the fourth surface 4 and are opposite to each other in a third direction.

[0027] Multiple dielectric layers 111 are in a sintered state, which allows adjacent dielectric layers 111 to be integrated with each other, making it difficult to identify the boundaries between them without using a scanning electron microscope (SEM).

[0028] The inner electrodes 121 and 122 may be alternately disposed with the dielectric layer 111 in a first direction. The body 110 may include a capacitor forming portion Ac, which includes a first inner electrode 121 and a second inner electrode 122 disposed opposite to each other, with the dielectric layer 111 disposed between the first inner electrode 121 and the second inner electrode 122. In other words, the edge of the capacitor forming portion Ac may be the edge of the region where the first inner electrode 121 and the second inner electrode 122 overlap each other.

[0029] The first inner electrode 121 is spaced apart from the fourth surface 4 and connected to the first outer electrode 131 disposed on the third surface 3. The second inner electrode 122 is spaced apart from the third surface 3 and connected to the second outer electrode 132 disposed on the fourth surface 4.

[0030] The conductive metal included in the inner electrodes 121 and 122 may be one or more of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti and alloys thereof, but this disclosure is not limited thereto.

[0031] At least one of the plurality of dielectric layers 111 may include a perovskite layer C1 and an auxiliary layer T1 disposed on two opposing surfaces of the perovskite layer C1 in a first direction. For example, the auxiliary layer T1 may be disposed between the perovskite layer C1 and the inner electrodes 121 and 122.

[0032] The perovskite layer C1 may have first grains G1, and the first grains G1 include a perovskite-type compound represented by the general formula ABO3. For example, the perovskite layer C1 may include a perovskite-type compound as a main component, and the first grains G1 included in the perovskite layer C1 may have a perovskite-type crystal structure. For example, the perovskite layer C1 may have a polycrystalline structure of the first grains G1. For example, the perovskite layer C1 may have a thin film structure formed of a perovskite-type compound.

[0033] The perovskite-type compound may include, for example, BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3 (0 < y < 1), CaZrO3, and (Ca 1-x Sr x )(Zr 1-y Ti y )O3 (0 ≤ x ≤ 0.5, 0 ≤ y ≤ 0.5, and x and y are not both 0), or one or more of them.

[0034] The auxiliary layer T1 may include a first additive element. For example, the auxiliary layer T1 may include a first additive element as a main component. The first additive element may include, for example, one or more of rare earth elements, fixed valence acceptor elements, variable valence acceptor elements, and sintering aid elements. That is, in the entire dielectric layer, the first additive element generally refers to a sub-component added to ABO3 as the main component. The first additive element may include one or more of Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si.

[0035] Furthermore, in the present disclosure, "main component" may refer to: a component that accounts for a relatively large weight ratio or atomic number ratio compared to other components, and may refer to: a component with a weight content exceeding 50 wt% based on the total amount of the entire composition or the entire dielectric layer, an atomic content exceeding 50 at% based on the total amount of the entire composition or the entire dielectric layer, or a molar content exceeding 50 mol% based on the total amount of the entire composition or the entire dielectric layer.

[0036] The first grain G1 included in the perovskite layer C1 may not have a core-shell structure. In this disclosure, the actual situation where the grain forming the dielectric layer 111 has a core-shell structure can be interpreted as the grain having a core that does not contain the first additive element or has a relatively low concentration of the first additive element, and a shell with a relatively high concentration of the first additive element.

[0037] In other words, the actual situation that the first grain G1 does not have a core-shell structure can be expressed as follows: the first grain G1 does not have two phases with different concentrations of the first added element, but has a single phase.

[0038] When a dielectric composition in which perovskite-based main component powder and additive powder are mixed is used to form a dielectric layer to form dielectric grains with a core-shell structure, the core-shell structure may be formed randomly.

[0039] Because the size or location of the core that makes up the capacitor cannot be controlled, this can cause problems such as reduced capacitance in multilayer electronic components.

[0040] However, the capacitance of the multilayer electronic component 100 according to embodiments of the present disclosure can be effectively improved by including a perovskite layer C1 (the perovskite layer C1 having a first grain G1 without a core-shell structure).

[0041] For example, the first grain G1 may contain virtually no first added element.

[0042] In this disclosure, the fact that the first grain G1 substantially does not contain the first additive element can be interpreted as follows: the first additive element is intentionally not added to the perovskite layer C1 to improve the capacitance of the multilayer electronic component 100. However, during the manufacturing process of the multilayer electronic component 100, a very small portion of the first additive element may be unintentionally present in the perovskite layer C1. Even in this case, the capacitance of the multilayer electronic component 100 can be improved when the first grain G1 does not have a core-shell structure. That is, the fact that the first grain G1 substantially does not contain the first additive element can be interpreted as follows: based on the total content of elements included in the first grain G1, the content of the first additive element is less than or equal to 0.01 at.

[0043] Furthermore, when the first grain G1 does not have a core-shell structure, there is a concern that the room temperature dielectric constant, breakdown voltage characteristics and lifetime reliability of the multilayer electronic component 100 may deteriorate. However, according to the embodiments of the present disclosure, the dielectric layer 111 of the multilayer electronic component 100 can ensure the reliability of the multilayer electronic component 100 by including an auxiliary layer T1, which has a first additive element.

[0044] Furthermore, the perovskite layer C1 and the auxiliary layer T1 can be formed separately. The auxiliary layer T1 can have a polycrystalline structure of the second grain G2, and because the second grain G2 contains the first additive element as its main component, the second grain G2 may not have a perovskite-type crystal structure. That is, the second grain G2 may have a crystal structure different from that of the first grain G1. The average grain size of the first grain G1 may be larger than the average grain size of the second grain G2, but this disclosure is not limited thereto.

[0045] In addition to the first additive element, the auxiliary layer T1 may also include a second additive element, which includes at least one of Ba, Ti, Ca, and Zr. The auxiliary layer T1 can more effectively improve the reliability of the multilayer electronic assembly 100 by including the second additive element.

[0046] The perovskite layer C1 may include, for example, a plurality of first grains G1 continuously disposed in a direction perpendicular to the first direction. However, not all grains disposed in the perovskite layer C1 must be first grains G1 without a core-shell structure. For example, the perovskite layer C1 may also include a portion of grains with a core-shell structure.

[0047] In this case, to prevent capacitance degradation of the multilayer electronic components, the ratio of the number of first grains G1 to the total number of grains disposed in the perovskite layer C1 can be, for example, greater than or equal to 80%. The ratio of the number of first grains G1 can be obtained by designating a region in an image obtained by analyzing an arbitrary cross-section of the dielectric layer 111 using an analytical apparatus such as a scanning transmission electron microscope (STEM) – energy-dispersive X-ray spectroscopy (EDS), and calculating the ratio based on the total number of grains present in the designated region and the number of first grains G1. The total number of grains extracted from the designated region can be, for example, from 10 to 200, but this disclosure is not limited thereto.

[0048] There are no particular limitations on the thickness of the perovskite layer C1 and the auxiliary layer T1. That is, the thickness of the perovskite layer C1 and the auxiliary layer T1 can be appropriately specified considering the specifications and / or performance of the multilayer electronic component 100. For example, as... Figure 4 As shown, to increase the capacitance of the multilayer electronic component 100, the thickness of the perovskite layer C1 may be greater than the thickness of the auxiliary layer T1. The thicknesses of the perovskite layer C1 and the auxiliary layer T1 can be measured by STEM. Other methods and / or tools understood by those skilled in the art may be used even if not described in this disclosure.

[0049] The main body 110 may include cover portions 112 and 113, which are respectively disposed on two opposing surfaces of the capacitance forming portion Ac in a first direction. The main body 110 may also include edge portions 114 and 115, which are respectively disposed on two opposing surfaces of the capacitance forming portion Ac in a third direction. Cover portions 112 and 113, as well as edge portions 114 and 115, may contain a perovskite-type compound as a main component. Cover portions 112 and 113, as well as edge portions 114 and 115, may have the same structure as the dielectric layer 111, or may have a different structure than the dielectric layer 111.

[0050] External electrodes 131 and 132 may be disposed on the third surface 3 and the fourth surface 4 of the body 110, respectively, and may extend to a portion of the first surface 1, a portion of the second surface 2, a portion of the fifth surface 5 and / or a portion of the sixth surface 6 of the body 110. External electrodes 131 and 132 may include a first external electrode 131 connected to a first internal electrode 121 and a second external electrode 132 connected to a second internal electrode 122.

[0051] The type or shape of the outer electrodes 131 and 132 are not particularly limited, and they may have a multilayer structure. For example, the outer electrodes 131 and 132 may include base electrode layers 131a and 132a that are in contact with the inner electrodes 121 and 122, respectively, and plating layers 131b and 132b respectively disposed on the base electrode layers 131a and 132a.

[0052] The base electrode layers 131a and 132a may be sintered electrode layers comprising metal and glass. The metals included in the base electrode layers 131a and 132a may include, for example, Cu, Ni, Pd, Pt, Au, Ag, Pb and / or alloys thereof. The glass included in the base electrode layers 131a and 132a may include, for example, one or more oxides of Ba, Ca, Zn, Al, B, and Si.

[0053] Furthermore, the base electrode layers 131a and 132a may consist of only sintered electrode layers, but this disclosure is not limited thereto, and the base electrode layers 131a and 132a may include: a sintered electrode layer comprising metal and glass; and a resin electrode layer disposed on the sintered electrode layer and comprising metal particles and resin.

[0054] The metal particles included in the resin electrode layer may be one or more of various shapes (e.g., spherical, flake-shaped, etc.). The metal particles included in the resin electrode layer may include, for example, Cu, Ni, Pd, Pt, Au, Ag, Pb, Sn, and / or alloys thereof. The resin included in the resin electrode layer may include, for example, one or more of epoxy resin, acrylic resin, and ethyl cellulose resin.

[0055] The plating layers 131b and 132b may comprise, for example, Ni, Sn, Pd and / or alloys thereof, and may be formed as multiple layers. The plating layers 131b and 132b may be, for example, Ni plating layers or Sn plating layers, or may have a form in which Ni plating layers and Sn plating layers are formed sequentially. The plating layers 131b and 132b may comprise multiple Ni plating layers and / or multiple Sn plating layers.

[0056] Although the accompanying drawings depict a multilayer electronic assembly 100 having two external electrodes 131 and 132, this disclosure is not limited thereto, and the number or shape of the external electrodes 131 and 132 may be changed depending on the shape of the internal electrodes 121 and 122 or for other purposes.

[0057] There are no particular limitations on the average thickness td of dielectric layer 111, the average thickness te of inner electrodes 121 and 122, the average thickness tc of cover portions 112 and 113, and the average thickness tm of edge portions 114 and 115.

[0058] The average thickness td of dielectric layer 111 can be, for example, 0.01 μm to 10 μm, 0.01 μm to 5 μm, 0.01 μm to 2 μm, or 0.01 μm to 0.4 μm. The average thickness te of inner electrodes 121 and 122 can be, for example, 0.01 μm to 3.0 μm, 0.01 μm to 1.0 μm, or 0.01 μm to 0.4 μm.

[0059] The average thickness tc of the covering portions 112 and 113 may, for example, be less than or equal to 150 μm, less than or equal to 100 μm, less than or equal to 30 μm, or less than or equal to 20 μm. The average thickness tc of the covering portions 112 and 113 may, for example, be greater than or equal to 5 μm, greater than or equal to 10 μm, or greater than or equal to 30 μm. In this case, the average thickness tc of the covering portions 112 and 113 may refer to the average thickness of each of the first covering portion 112 and the second covering portion 113.

[0060] The average thickness tm of edge portions 114 and 115 may, for example, be less than or equal to 100 μm, less than or equal to 20 μm, or less than or equal to 15 μm. The average thickness tm of edge portions 114 and 115 may, for example, be greater than or equal to 5 μm or greater than or equal to 10 μm. In this case, the average thickness tm of edge portions 114 and 115 may refer to the average thickness of each of the first edge portion 114 and the second edge portion 115.

[0061] There are no particular limitations on the size of the multilayer electronic component 100, but the maximum length of the multilayer electronic component 100 in the second direction can be from 0.1 mm to 6.0 mm, the maximum width of the multilayer electronic component 100 in the third direction can be from 0.1 mm to 5.0 mm, and the maximum thickness of the multilayer electronic component 100 in the first direction can be from 0.05 mm to 3.5 mm.

[0062] The average thickness td of dielectric layer 111 and the average thickness te of inner electrodes 121 and 122 can be measured by scanning cross-sections of the multilayer electronic assembly 100 in the first and second directions using a scanning electron microscope (SEM) at 10,000x magnification. More specifically, the average thickness td of dielectric layer 111 can be measured by measuring the thickness of a dielectric layer 111 at multiple points (e.g., five points equidistant from each other in the second direction) and then averaging the results. Similarly, the average thickness te of inner electrodes 121 and 122 can be measured by measuring the thickness of an inner electrode 121 or 122 at multiple points (e.g., five points equidistant from each other in the second direction) and then averaging the results. The five equidistant points can be specified in the capacitor forming section Ac. Furthermore, when thickness measurements are performed on each of the 10 dielectric layers 111 and the 10 inner electrodes 121 and 122 and then the average value is calculated, the average thickness td of the dielectric layer 111 and the average thickness te of the inner electrodes 121 and 122 can be made more general.

[0063] Similarly, the average thickness tc of the covers 112 and 113 can be the average of the thicknesses of the covers 112 and 113 measured at five equidistant points in the second direction in a cross-section of the multilayer electronic assembly 100 in the first and second directions. The average thickness tm of the edges 114 and 115 can be the average of the thicknesses of the edges 114 and 115 in the third direction measured at five equidistant points in the first direction in a cross-section of the multilayer electronic assembly 100 in both the first and third directions.

[0064] In the following text, reference will be made to Figures 5 to 8 A multilayer electronic assembly according to another embodiment of the present disclosure is described. (This is in relation to...) Figures 1 to 4The multilayer electronic assembly 100 described herein has the same / similar construction, uses the same / similar reference numerals, and repeated descriptions will be omitted.

[0065] Figure 5 This is a schematic cross-sectional view illustrating the microstructure of the dielectric layer 211 of a multilayer electronic component according to another embodiment of the present disclosure.

[0066] Reference Figure 5 The thickness of the auxiliary layer T2 can be greater than that of the perovskite layer C2. In this case, the capacitance of the multilayer electronic component may be slightly reduced, but the excellent reliability and temperature stability of the multilayer electronic component can be ensured.

[0067] Figure 6 This is a schematic cross-sectional view illustrating the microstructure of the dielectric layer 311 of a multilayer electronic component according to another embodiment of the present disclosure.

[0068] Reference Figure 6 The perovskite layer C3 may include: a central region R1, in which a plurality of first grains G1 may be continuously disposed in a direction perpendicular to a first direction; and interface regions R2 and R3, having a third grain G3 disposed between the central region R1 and the auxiliary layer T3, and the third grain G3 may have a core-shell structure.

[0069] The third grain G3 may include a core G3c and a shell G3s disposed on at least a portion of the core G3c. The concentration of the first additive element in the shell G3s may be higher than the concentration of the first additive element in the core G3c. The third grain G3 may be formed, for example, by a first additive element diffused from the auxiliary layer T3. That is, the third grain G3 may include the first additive element.

[0070] In this case, to prevent capacitance degradation of the multilayer electronic components, the ratio of the number of first grains G1 to the total number of grains disposed in the perovskite layer C3 can be, for example, greater than or equal to 80%. This ratio of the number of first grains G1 can be obtained by designating a region in an image obtained by analyzing an arbitrary cross-section of the dielectric layer 111 using an analytical apparatus such as STEM-EDS, and calculating the ratio based on the total number of grains present in the designated region and the number of first grains G1. The total number of grains extracted from the designated region can be, for example, from 10 to 200, but this disclosure is not limited thereto.

[0071] Figure 7 This is a schematic cross-sectional view illustrating the microstructure of the dielectric layer 411 of a multilayer electronic component according to another embodiment of the present disclosure.

[0072] Reference Figure 7At least one of the dielectric layers 411 may include: a single-crystal perovskite layer C4, comprising a perovskite-type compound represented by the general formula ABO3; and an auxiliary layer T4 disposed on two surfaces of the perovskite layer C4 opposite to each other in a first direction and comprising a first additive element.

[0073] The perovskite layer C4 may have a single-crystal structure with a first grain G1. For example, the perovskite layer C4 may be formed using at least one of chemical vapor deposition (CVD), atomic layer deposition (ALD), and sputtering via a thin film synthesis process.

[0074] Since the perovskite layer C4 has a single-crystal structure, sintering of the perovskite layer C4 may become unnecessary. Therefore, the conductive metals included in the internal electrodes 121 and 122 can be flexibly selected without considering the sintering temperature.

[0075] The fact that the perovskite layer C4 has a single-crystal structure means that the entire perovskite layer C4 has a single-crystal structure. The perovskite layer C4 may contain defects such as cracks or dislocations, but because the perovskite layer C4 has a single-crystal structure, grain boundaries may not exist.

[0076] However, not all dielectric layers 411 may have a single-crystal perovskite layer C4. For example, some dielectric layers 411 may not have a single-crystal perovskite layer. For instance, among multiple dielectric layers 411, the proportion of dielectric layers 411 with a single-crystal perovskite layer C4 may be greater than or equal to 80%.

[0077] The auxiliary layer T4 may have a polycrystalline structure, for example, a second grain G2. The auxiliary layer T4 may ensure the reliability of the multilayer electronic components by including a first additive element.

[0078] Similar to the perovskite layer C4, the auxiliary layer T4 can be formed using at least one of CVD, ALD, and sputtering thin film synthesis processes. In this case, compositional changes caused by interdiffusion between the perovskite layer C4 and the auxiliary layer T4 can be suppressed.

[0079] From the perspective of improving the reliability of multilayer electronic components, the auxiliary layer T4 preferably includes, for example, two or more types of first additive elements. Preferably, the auxiliary layer T4 may include, for example, two or more types of second additive elements. When the auxiliary layer T4 includes two or more types of first additive elements and / or two or more types of second additive elements, the auxiliary layer T4 may have a polycrystalline structure even if it is formed by methods such as CVD, ALD, and / or sputtering.

[0080] Figure 8 This is a schematic cross-sectional view illustrating the microstructure of the dielectric layer 511 of a multilayer electronic component according to another embodiment of the present disclosure.

[0081] Referring to Figure 8 , at least one of the dielectric layers 511 may include a plurality of perovskite layers C5 spaced apart from each other. That is, at least one of the dielectric layers 511 may have a structure in which a plurality of perovskite layers C5 and a plurality of auxiliary layers T5 are alternately arranged. For example, at least one of the dielectric layers 511 may include a plurality of auxiliary layers T5 spaced apart from each other, and one or more of the plurality of auxiliary layers T5 may be interposed between adjacent perovskite layers C5 of the plurality of perovskite layers C5.

[0082] In the case of automotive electronic components, a dielectric layer 511 having a certain thickness or a greater thickness needs to be formed to ensure reliability. In this case, the dielectric layer 511 may include a plurality of perovskite layers C5. The number of perovskite layers C5 included in one dielectric layer 511 is not particularly limited, but considering the purpose or capacitance of the multilayer electronic component, one dielectric layer 511 may include 2 to 50 perovskite layers C5.

[0083] Hereinafter, an example of a method for manufacturing the multilayer electronic component 100 will be described. An example of a method for forming the main body 110 is described. However, the manufacturing method of the multilayer electronic component 100 is not limited thereto.

[0084] First, a ceramic powder containing a perovskite-type compound is prepared. The ceramic powder may include, for example, BaTiO3, (Ba 1- x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1- y Zr y )O3 (0 < y < 1), CaZrO3, and (Ca 1-x Sr x )(Zr 1-y Ti yOne or more of the following: O3 (0≤x≤0.5, 0≤y≤0.5, and x and y are not both 0). For example, BaTiO3-based ceramic powder can be synthesized by reacting a titanium raw material, such as titanium dioxide, with a barium raw material, such as barium carbonate. Methods for synthesizing the ceramic powder may include, for example, solid-state methods, sol-gel methods, hydrothermal synthesis methods, etc., but this disclosure is not limited thereto. Next, the prepared ceramic powder is dried and ground, and then a slurry for manufacturing the perovskite layer is prepared by mixing an organic solvent (such as ethanol) and a binder (such as polyvinyl butyral).

[0085] Next, a first additive element powder and a second additive element powder are prepared. The first additive element powder may include one or more of, for example, oxides of Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si. The second additive element powder may include one or more of, for example, oxides of Ba, Ti, Ca, and Zr. The first additive element powder, the second additive element powder, an organic solvent, and a binder are mixed to prepare a slurry for preparing the auxiliary layer.

[0086] Next, a slurry for manufacturing the auxiliary layer is coated onto the carrier film and dried to form a pre-sintering auxiliary layer. A slurry for manufacturing the perovskite layer is then coated onto the pre-sintering auxiliary layer and dried to form a pre-sintering perovskite layer. Finally, a slurry for manufacturing the auxiliary layer is coated again onto the pre-sintering perovskite layer and dried to form another pre-sintering auxiliary layer. The sheet-like structure comprising the pre-sintering perovskite layer and two pre-sintering auxiliary layers formed on the two surfaces of the pre-sintering perovskite layer can be defined as a ceramic green sheet.

[0087] Next, a conductive paste (containing metal powder, adhesive, organic solvent, etc.) for the internal electrode is printed on the ceramic green sheet to a predetermined thickness using screen printing or gravure printing, thereby forming the internal electrode pattern.

[0088] A ceramic green sheet with an internal electrode pattern printed on it is peeled off from a carrier film. Then, the ceramic green sheets with the internal electrode pattern are stacked in a predetermined number of layers and pressed to form a ceramic laminate. On the upper and lower parts of the ceramic laminate, ceramic green sheets without internal electrode patterns can be stacked in a predetermined number of layers to form covers 112 and 113 after sintering. Subsequently, the ceramic laminate is cut into blanks of a predetermined size, and the cut blanks are sintered at a temperature, for example, greater than or equal to 1000°C and less than or equal to 1400°C, to form the body 110.

[0089] Next, external electrodes 131 and 132 are formed. For example, when the base electrode layers 131a and 132a include sintered electrode layers, the body 110 can be immersed in a conductive paste (including metal powder, glass frit, binder and organic solvent) for the external electrodes, and then the conductive paste for the external electrodes can be sintered at a temperature of 500°C to 900°C to form sintered electrode layers.

[0090] For example, when the base electrode layers 131a and 132a include resin electrode layers, the body 110 can be impregnated in a conductive resin composition including metal powder, resin, binder and organic solvent, and then subjected to a curing heat treatment at a temperature of 250°C to 550°C to form a resin electrode layer.

[0091] Alternatively, electroplating and / or electroless plating can be performed to form plating layers 131b and 132b on the base electrode layers 131a and 132a.

[0092] In addition, forming Figures 5 to 8 The methods for dielectric layers 211, 311, 411 and 511 shown are not particularly limited.

[0093] For example, dielectric layer 211 can be manufactured by controlling the amount of slurry used to manufacture auxiliary layer T2 and slurry used to manufacture perovskite layer C2, such that the thickness of auxiliary layer T2 becomes greater than the thickness of perovskite layer C2 after sintering.

[0094] For example, dielectric layer 311 can be fabricated by using rare earth elements, which are relatively easy to diffuse into the perovskite layer C3, as the first additive element to form auxiliary layer T3.

[0095] For example, the dielectric layer 411 can be manufactured by forming a perovskite layer C4 using at least one of CVD, ALD and sputtering via a thin film synthesis process, and by forming an auxiliary layer T4 using at least one of CVD, ALD and sputtering via a thin film synthesis process, but this disclosure is not limited thereto.

[0096] For example, dielectric layer 511 can be manufactured by repeatedly performing a process of coating a slurry for manufacturing an auxiliary layer and a process of coating a slurry for manufacturing a perovskite layer.

[0097] Figure 9A and Figure 9B The graphs show the capacitance of the comparison example and the sample, measured using the COMSOL analysis program.

[0098] exist Figure 9B In the example, a dielectric layer with a perovskite layer and an auxiliary layer is presented, and... Figure 9A In the comparative example, a dielectric layer of a grain with a conventional core-shell structure is presented.

[0099] Reference Figure 9A and Figure 9B It can be confirmed that when the dielectric layer thickness is the same, the capacitance of the example increases by about 50% compared to the comparative example. This is because, in the case of the comparative example, it is difficult to sufficiently ensure the area of ​​the core in the core-shell structure, but in the case of the example, the area of ​​the perovskite layer that contributes to the capacitance formation can be sufficiently ensured by forming the perovskite layer and the auxiliary layer separately.

[0100] This disclosure is not limited to the embodiments and drawings described above, and the scope of this disclosure is defined by the appended claims. Therefore, those skilled in the art can make various substitutions, modifications, or alterations without departing from the scope of this disclosure as defined by the appended claims, and such substitutions, modifications, or alterations should be construed as being included within the scope of this disclosure.

[0101] Furthermore, the phrase "example embodiment" does not imply the same embodiment and is provided to emphasize and explain different unique features. However, the embodiments presented above do not preclude implementation in combination with features of another embodiment. For example, although something described in a particular embodiment is not described in another embodiment, it may be understood as a description relating to the other embodiment unless there is a description in another embodiment that contradicts or contradicts it.

[0102] In this disclosure, the term "connection" includes not only direct connections but also indirect connections such as those via adhesive layers. Furthermore, the term "electrical connection" includes both cases where elements are physically connected and cases where elements are not physically connected. The terms "first," "second," etc., are used to distinguish one element from another and do not limit the order and / or importance associated with said elements. In some cases, without departing from the scope of the claims, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0103] As one of the various effects of this disclosure, a multilayer electronic component with excellent reliability can be provided.

[0104] While embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

Claims

1. A multilayer electronic component, comprising: The body includes a dielectric layer and an inner electrode, wherein at least one of the dielectric layers is alternately disposed with the inner electrode in a first direction; as well as An external electrode is disposed on the main body and connected to the internal electrode. Wherein, the at least one dielectric layer in the dielectric layer includes: A perovskite layer, comprising a first grain, the first grain having no core-shell structure and comprising a perovskite-type compound represented by the general formula ABO3; and An auxiliary layer is disposed on two opposing surfaces of the perovskite layer in the first direction and includes a first additive element. The first added element includes at least one selected from Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al and Si.

2. The multilayer electronic component according to claim 1, wherein, The perovskite layer includes a plurality of the first grains, which are arranged continuously in a direction perpendicular to the first direction.

3. The multilayer electronic component according to claim 1, wherein, The first grain does not contain the first added element.

4. The multilayer electronic assembly according to claim 1, wherein, The auxiliary layer further includes a second additive element, which includes at least one selected from Ba, Ti, Ca and Zr.

5. The multilayer electronic component according to claim 1, wherein, The thickness of the perovskite layer is greater than the thickness of the auxiliary layer.

6. The multilayer electronic assembly according to claim 1, wherein, The thickness of the auxiliary layer is greater than the thickness of the perovskite layer.

7. The multilayer electronic component according to claim 2, wherein, The perovskite layer includes: A central region, wherein a plurality of the first grains are continuously disposed in a direction perpendicular to the first direction; and An interface region, disposed between the central region and the auxiliary layer, and having a third grain, The third grain has a core-shell structure.

8. The multilayer electronic component according to claim 1, wherein, The perovskite layer has the single-crystal structure of the first grain.

9. The multilayer electronic component according to claim 8, wherein, The auxiliary layer includes a second grain, and the auxiliary layer has a polycrystalline structure of the second grain.

10. The multilayer electronic assembly according to claim 1, wherein, The at least one dielectric layer in the dielectric layer comprises a plurality of perovskite layers spaced apart from each other.

11. The multilayer electronic assembly according to claim 1, wherein, The perovskite layer is in single-crystal form.

12. The multilayer electronic assembly according to claim 1, wherein, The perovskite layer includes a third grain, and the third grain includes the first added element.

13. The multilayer electronic assembly according to claim 10, wherein, The at least one dielectric layer in the dielectric layer includes a plurality of auxiliary layers spaced apart from each other, and one or more of the plurality of auxiliary layers are located between adjacent perovskite layers in the plurality of perovskite layers.

14. A multilayer electronic component, comprising: The body includes a dielectric layer and an inner electrode, wherein at least one of the dielectric layers is alternately disposed with the inner electrode in a first direction; as well as An external electrode is disposed on the main body and connected to the internal electrode. Wherein, the at least one dielectric layer in the dielectric layer includes: Single-crystal perovskite layers, including perovskite-type compounds represented by the general formula ABO3; and An auxiliary layer is disposed on two opposing surfaces of the single-crystal perovskite layer in the first direction and includes a first additive element.

15. The multilayer electronic assembly according to claim 14, wherein, The first added element includes at least one selected from Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al and Si.

16. The multilayer electronic assembly according to claim 14, wherein, The auxiliary layer has a polycrystalline structure.

17. The multilayer electronic assembly according to claim 14, wherein, The auxiliary layer further includes a second additive element, which includes at least one selected from Ba, Ti, Ca and Zr.

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