Display device

Abstract

The present disclosure provides a display device including a substrate, a reflective electrode disposed on the substrate, a light emitting element disposed on the reflective electrode, a planarization layer disposed to cover the reflective electrode and the light emitting element, and including a trench, and a second connection electrode disposed on the planarization layer and the light emitting element, wherein the second connection electrode is contiguous with the reflective electrode in the trench. Accordingly, the reflective electrode and the second connection electrode can be disposed to completely surround side surfaces and a bottom surface of the light emitting element, thereby reflecting light emitted from the light emitting element in an upward direction of the light emitting element, and improving light extraction efficiency.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0175092, filed with the Korean Intellectual Property Office on November 29, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to display devices, and more particularly to display devices using light-emitting diodes (LEDs). Background Technology

[0004] As display devices used as monitors for computers, televisions, mobile phones, etc., there are organic light-emitting displays (OLEDs) configured to emit their own light and liquid crystal displays (LCDs) that require a separate light source.

[0005] The applications of display devices range from computer and television monitors to personal mobile devices, and research is underway on display devices with wide display areas and reduced size and weight.

[0006] In addition, display devices including light-emitting diodes (LEDs) have recently attracted attention as next-generation display devices. Because LEDs are made of inorganic materials rather than organic materials, they are more reliable and have a longer lifespan than liquid crystal displays or organic light-emitting displays. Furthermore, LEDs can be quickly switched on or off, have excellent luminous efficiency, high shock resistance, and high stability, and can display high-brightness images. Summary of the Invention

[0007] The purpose of this disclosure is to provide a display device that includes an inorganic light-emitting element with improved luminous efficiency, enabling the display device to operate with low power consumption.

[0008] Another objective of this disclosure is to provide a display device with improved light extraction efficiency.

[0009] Another objective of this disclosure is to provide a display device capable of suppressing or reducing light leakage from the light-emitting element to adjacent sub-pixels or the substrate.

[0010] Another objective of this disclosure is to provide a display device in which a reflective structure is formed to surround the portion of a light-emitting element other than the upper part of the light-emitting element, such that light emitted from the light-emitting element can be extracted in an upward direction.

[0011] The purpose of this disclosure is not limited to the purposes mentioned above, and other purposes not mentioned above can be clearly understood by those skilled in the art based on the following description.

[0012] A display device according to one embodiment of the present disclosure includes: a substrate; a reflective electrode disposed on the substrate; a light-emitting element disposed on the reflective electrode; a planarization layer configured to cover the reflective electrode and the light-emitting element, and including trenches; and a second connecting electrode disposed on the planarization layer and the light-emitting element, wherein the second connecting electrode is adjacent to the reflective electrode in the trenches. Therefore, the reflective electrode and the second connecting electrode can be configured to completely surround the side and bottom surfaces of the light-emitting element, thereby reflecting light emitted from the light-emitting element in the upward direction of the light-emitting element and improving light extraction efficiency.

[0013] Further details of the exemplary embodiments are included in the detailed description and accompanying drawings.

[0014] According to this disclosure, the display device includes an inorganic light-emitting element with excellent luminous efficiency, which enables a high-resolution display device capable of displaying images with high efficiency and high brightness while operating with low power consumption.

[0015] According to this disclosure, the reflective structure is formed to surround the light-emitting element except for the upper part, which can improve the light extraction efficiency.

[0016] According to this disclosure, the reflective structure and the second connecting electrode are formed to surround the bottom and side surfaces of the light-emitting element, which can suppress or reduce the leakage of light emitted from the light-emitting element toward adjacent sub-pixels or the substrate.

[0017] The effects of this disclosure are not limited to those exemplified above, and include many other different effects. Attached Figure Description

[0018] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0019] Figure 1 This is a schematic configuration diagram of a display device according to an embodiment of the present disclosure;

[0020] Figure 2 This is an enlarged top view of a display device according to an embodiment of the present disclosure;

[0021] Figure 3 It is along Figure 2 A cross-sectional view of the sub-pixel intercepted by line A-A'; and

[0022] Figure 4 It is along Figure 2 A cross-sectional view of the sub-pixel intercepted by line B-B' in the image. Detailed Implementation

[0023] The advantages and features of this disclosure, as well as methods for achieving these advantages and features, will become clear from the exemplary embodiments described in detail below with reference to the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. The exemplary embodiments are provided by way of example only so that those skilled in the art can fully understand the disclosure and scope of this disclosure.

[0024] The shapes, dimensions, ratios, angles, numbers, etc., shown in the accompanying drawings used to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, similar reference numerals generally denote similar elements. Furthermore, in the following description of this disclosure, detailed descriptions of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” Unless otherwise expressly stated, any reference to the singular may include the plural.

[0025] Even without explicit explanation, components are interpreted as including the normal tolerance range.

[0026] When using terms such as “on,” “above,” “below,” and “next to” to describe the positional relationship between two parts, one or more parts may be positioned between the two parts, unless these terms are used with the terms “immediately” or “directly.”

[0027] When a component or layer is placed "on" another component or layer, the other layer or component can be directly inserted onto the other component or inserted between the component or layer and the other component or layer.

[0028] Although the terms "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, in the technical concept of this disclosure, the first component referred to below can be the second component.

[0029] Throughout the specification, similar reference numerals generally denote similar elements.

[0030] For ease of description, the dimensions and thickness of each component shown in the accompanying drawings are illustrated, and this disclosure is not limited to the dimensions and thickness of the components shown.

[0031] Features of various embodiments of this disclosure may be partially or completely dependent on or combined with each other, and may be interlocked and operated in various technical ways, and these embodiments may be performed independently or in association with each other.

[0032] In the following, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0033] Figure 1 This is a schematic configuration diagram of a display device according to embodiments of the present disclosure. For ease of description, Figure 1 Only the display panel PN, gate driver GD, data driver DD, and timing controller TC among the various components of the display device 100 are shown.

[0034] Reference Figure 1 The display device 100 includes a display panel PN having a plurality of sub-pixels SP, a gate driver GD configured to supply various types of signals to the display panel PN, a timing controller TC configured to control a data driver DD and the gate driver GD, and a data driver DD.

[0035] The gate driver GD supplies multiple scan signals to multiple scan lines SL in response to multiple gate control signals provided by the timing controller TC. Figure 1 The illustration shows a single gate driver (GD) positioned spaced apart from one side of the display panel (PN). However, the number and arrangement of gate drivers (GDs) are not limited to this.

[0036] The data driver DD supplies data voltage to multiple data lines DL in response to multiple data control signals and image data provided by the timing controller TC. The data driver DD can convert image data into data voltage using a reference gamma voltage and supply the converted data voltage to the multiple data lines DL.

[0037] The timing controller TC aligns externally input image data and supplies the image data to the data driver DD. The timing controller TC can generate gate control signals and data control signals using synchronization signals, namely an externally input dot clock signal, a data enable signal, and a horizontal / vertical synchronization signal. Furthermore, the timing controller TC can control the gate driver GD and the data driver DD by supplying the generated gate control signals and data control signals to them.

[0038] The display panel PN is configured to display an image to the user and includes multiple subpixels SP. In the display panel PN, multiple scan lines SL and multiple data lines DL can intersect each other, and multiple subpixels SP can be formed at the intersection points between the scan lines SL and the data lines DL.

[0039] The display area AA and the non-display area NA can be defined on the display panel PN.

[0040] The display area AA is the area in the display device 100 where an image is displayed. Multiple subpixels SP and pixel circuits for operating the multiple subpixels SP can be provided in the display area AA. The multiple subpixels SP can be the smallest unit constituting the display area AA. Each of the multiple subpixels SP can include a light-emitting element 120 and emit light independently. The multiple subpixels SP can include a red subpixel SPR, a green subpixel SPG, a blue subpixel SPB, etc., and can display images with various colors. The type of subpixel SP is illustrative. However, embodiments of this disclosure are not limited thereto.

[0041] Multiple signal lines are provided in the display area AA for transmitting various types of signals to multiple sub-pixels SP. For example, the multiple signal lines may include multiple data lines DL for supplying data voltage to the multiple sub-pixels SP and multiple scan lines SL for supplying scan signals to the multiple sub-pixels SP. The multiple scan lines SL may extend in one direction in the display area AA and connect to the multiple sub-pixels SP. The multiple data lines DL may extend in a direction different from one direction in the display area AA and connect to the multiple sub-pixels SP.

[0042] The non-display area NA can be defined as an area where no image is displayed, i.e., the area extending from the display area AA. The non-display area NA may include link lines and pad electrodes for transmitting signals to the sub-pixels SP in the display area AA. Alternatively, the non-display area NA may include driver ICs, such as gate driver ICs and data driver ICs.

[0043] Meanwhile, the non-display area NA can be located on the rear surface of the display panel PN, i.e., on a surface where no sub-pixels SP exist. Alternatively, the non-display area NA may not be included. However, this disclosure is not limited to the configuration shown in the accompanying drawings.

[0044] In the following text, reference will be made to Figures 2 to 4 More specifically, the sub-pixels SP of the display panel PN of the display device 100 according to an embodiment of the present disclosure are described.

[0045] Figure 2 This is an enlarged top view of a display device according to an embodiment of the present disclosure. Figure 3 It is along Figure 2 A cross-sectional view of the sub-pixel intercepted by line A-A' in the image. Figure 4 It is along Figure 2 The image shows a cross-sectional view of the sub-pixel intercepted by line B-B'. For ease of description, Figure 2Only the light-emitting element 120, the first connecting electrode CE1, the second connecting electrode CE2, and the power line PL are shown. In this case, Figure 2 The area indicated by the thick dashed line in the middle indicates the trench TC surrounding each of the plurality of light-emitting elements 120.

[0046] Reference Figures 2 to 4 Multiple subpixels SP are disposed in the display area AA. Each of the multiple subpixels SP may include a light-emitting element 120 and emit light independently. The multiple subpixels SP may be arranged in multiple rows and multiple columns while defining a matrix shape. However, the embodiments of this disclosure are not limited thereto.

[0047] Multiple subpixels SP may include red subpixels SPR, green subpixels SPG, and blue subpixels SPB. However, the type of subpixels SP is illustrative. However, implementations of this disclosure are not limited thereto.

[0048] Reference Figure 3 The substrate 110 can be a component, that is, an insulating substrate 110 configured to support other constituent elements of the display device 100. For example, the substrate 110 can be made of glass, resin, etc. Alternatively, the substrate 110 can be made of polymer, plastic, etc. In some embodiments, the substrate 110 can be made of a flexible plastic material.

[0049] A light-blocking layer BSM is provided on each of the plurality of sub-pixels SP and disposed on the substrate 110. The light-blocking layer BSM can block light entering the active layer ACT of the driving transistor DT, thereby minimizing leakage current. The light-blocking layer BSM can be made of an opaque conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0050] A buffer layer 111 is disposed on the substrate 110 and the light-blocking layer BSM. The buffer layer 111 may be configured to cover one surface of the substrate 110 and reduce the penetration of moisture or impurities through the substrate 110. For example, the buffer layer 111 may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, this disclosure is not limited thereto.

[0051] A driving transistor DT is disposed on a buffer layer 111 in each of the plurality of sub-pixels SP. The driving transistor DT includes an active layer ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE. Meanwhile, although not shown in the figures, in addition to the driving transistor DT, other constituent elements such as switching transistors, sensing transistors, light-emitting control transistors, and storage capacitors may be additionally disposed in each of the plurality of sub-pixels SP.

[0052] The active layer ACT driving the transistor DT is disposed on the buffer layer 111. The active layer ACT can be made of a semiconductor material such as oxide semiconductor, amorphous silicon, or polycrystalline silicon. However, this disclosure is not limited thereto.

[0053] A gate insulating layer 112 is disposed on the active layer ACT. The gate insulating layer 112 is an insulating layer used to insulate the active layer ACT from the gate electrode GE. For example, the gate insulating layer 112 may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, this disclosure is not limited thereto.

[0054] The gate electrode GE is disposed on the gate insulating layer 112. The gate electrode GE may be made of conductive materials such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0055] A first interlayer insulating layer 113 and a second interlayer insulating layer 114 are disposed on the gate electrode GE. The first interlayer insulating layer 113 and the second interlayer insulating layer 114 are insulating layers for protecting components disposed beneath the first interlayer insulating layer 113 and the second interlayer insulating layer 114. The first interlayer insulating layer 113 and the second interlayer insulating layer 114 may each be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, this disclosure is not limited thereto.

[0056] The source electrode SE and drain electrode DE are disposed on the second interlayer insulating layer 114. The source electrode SE and drain electrode DE can be electrically connected to the active layer ACT through contact holes formed in the first interlayer insulating layer 113, the second interlayer insulating layer 114, and the gate insulating layer 112. The source electrode SE and drain electrode DE can each be made of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0057] A first line CL1 is provided on the gate insulating layer 112. The first line CL1 can apply a constant voltage to the photoblocking layer BSM. For example, the photoblocking layer BSM can be connected to the first line CL1 and can not operate as a floating gate, thereby suppressing or reducing the change in the threshold voltage of the driving transistor DT caused by the floating photoblocking layer BSM.

[0058] A second line CL2 is formed on the first interlayer insulating layer 113, and a third line CL3 electrically connected to the second line CL2 is formed on the second interlayer insulating layer 114. The second line CL2 and the third line CL3 can be configured to overlap with the gate electrode GE of the driving transistor DT, and together with the gate electrode GE of the driving transistor DT, form a capacitor. Therefore, various conductive layers such as the second line CL2 and the third line CL3 are formed on the substrate 110 to form a capacitor.

[0059] A power line PL is disposed on the second interlayer insulating layer 114. The power line PL can be configured to transmit a power supply voltage to the light-emitting element 120 of each of the plurality of sub-pixels SP. Depending on the configuration of the pixel circuit, the power line PL can be configured as either a low-potential power line PL or a high-potential power line PL.

[0060] The first wire CL1, the second wire CL2, the third wire CL3, and the power line PL can each be made of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0061] A passivation layer 115 is disposed on the driving transistor DT, the power line PL, and the second interlayer insulating layer 114. The passivation layer 115 is an insulating layer configured to cover and protect the pixel circuitry including the driving transistor DT. The passivation layer 115 may comprise inorganic insulating materials such as silicon oxide (SiOx) or silicon nitride (SiNx), and organic insulating materials such as benzocyclobutene or acrylic-based organic materials. However, this disclosure is not limited thereto.

[0062] like Figure 3 As shown, the electric field line PL can be disposed below the passivation layer 115. However, this disclosure is not limited thereto. Like the reflective electrode RE described below, the electric field line PL can be disposed on the passivation layer 115 and made of the same material.

[0063] Next, a reflective electrode RE is provided on the passivation layer 115 in each of the plurality of sub-pixels SP. The reflective electrode RE is configured to overlap with the light-emitting element 120. The reflective electrode RE can be configured to extend at least from the light-emitting element 120 to the trench TC. The reflective electrode RE, together with the second connection electrode CE2 described below, can enable light emitted from the light-emitting element 120 to propagate only in the upward direction of the light-emitting element 120. The reflective electrode RE can reflect the light beam propagating in the downward direction of the light beam emitted from the light-emitting element 120.

[0064] The reflective electrode RE includes an opening REO. The opening REO may overlap with a contact hole through which a first connecting electrode CE1 disposed above the reflective electrode RE and a driving transistor DT disposed below the reflective electrode RE are electrically connected. The opening REO of the reflective electrode RE may be configured to overlap with the drain electrode DE of the driving transistor DT and the first connecting electrode CE1. The size of the opening REO of the reflective electrode RE may be smaller than the drain electrode DE. All portions of the opening REO may be configured to overlap with the drain electrode DE. The drain electrode DE may be configured to overlap with the entire opening REO of the reflective electrode RE, which minimizes light leakage towards the substrate 110 through the opening REO of the reflective electrode RE. The reflective electrode RE may be made of an opaque conductive material with high reflectivity, such as silver (Ag).

[0065] A first planarization layer 116 is provided on the reflective electrode RE. The first planarization layer 116 can planarize the upper part of the reflective electrode RE. For example, the first planarization layer 116 can be made of benzocyclobutene or acrylic-based organic materials. However, the present disclosure is not limited thereto.

[0066] A first connection electrode CE1 is disposed on the first planarization layer 116 in each of the plurality of sub-pixels SP. The first connection electrode CE1 is an electrode that electrically connects the light-emitting element 120 and the driving transistor DT. At least a portion of the first connection electrode CE1 may overlap with the opening REO of the reflective electrode RE.

[0067] A bonding layer BL is disposed on the first connecting electrode CE1. The bonding layer BL can be a conductive connector configured to fix the light-emitting element 120 to the first connecting electrode CE1 and electrically connect the light-emitting element 120 and the first connecting electrode CE1. The bonding layer BL can be made of a material that is conductive and has bonding properties. For example, the bonding layer BL can be an organic layer made of a material including conductive particles such as indium or an organic layer including conductive particles such as carbon. However, this disclosure is not limited to this. In this case, the bonding layer BL can be made of a material that can withstand photolithography. The thickness or arrangement area of ​​the bonding layer BL can be easily controlled by photolithography.

[0068] A light-emitting element 120 is disposed on the bonding layer BL in each of the plurality of sub-pixels SP. For example, the light-emitting element 120 may be either a light-emitting diode (LED) or a micro light-emitting diode (microLED). However, embodiments of the present disclosure are not limited thereto. The light-emitting element 120 may include a red light-emitting element 120R for the red sub-pixel SPR, a green light-emitting element 120G for the green sub-pixel SPG, and a blue light-emitting element 120B for the blue sub-pixel SPB. Images with various colors can be displayed by a combination of the red light-emitting element 120R, the green light-emitting element 120G, and the blue light-emitting element 120B.

[0069] The light-emitting element 120 includes a first semiconductor layer 121, a light-emitting layer 122, a second semiconductor layer 123, a first electrode 124, a second electrode 125, and a protective film 126.

[0070] First, a first semiconductor layer 121 is formed on the bonding layer BL, and a second semiconductor layer 123 is formed on the first semiconductor layer 121. The first semiconductor layer 121 and the second semiconductor layer 123 can be semiconductor layers doped with p-type and n-type impurities. For example, the first semiconductor layer 121 and the second semiconductor layer 123 can be layers formed by doping with materials such as gallium nitride (GaN), indium aluminum phosphide (InAlP), or gallium arsenide (GaAs) with p-type and n-type impurities.

[0071] A light-emitting layer 122 is disposed between the first semiconductor layer 121 and the second semiconductor layer 123. The light-emitting layer 122 can emit light based on a driving current supplied to the light-emitting element 120. The light-emitting layer 122 can be configured as a single-layer or multiple quantum well (MQW) structure. For example, the light-emitting layer 122 can be made of indium gallium nitride (InGaN), gallium nitride (GaN), etc. However, this disclosure is not limited thereto.

[0072] A first electrode 124 is disposed below the first semiconductor layer 121. The first electrode 124 may be adjacent to the bottom surface of the first semiconductor layer 121. The first electrode 124 of the light-emitting element 120 may be electrically connected to the driving transistor DT through the bonding layer BL and the first connection electrode CE1.

[0073] A second electrode 125 is disposed on the second semiconductor layer 123. The second electrode 125 may be adjacent to the top surface of the second semiconductor layer 123. The second electrode 125 of the light-emitting element 120 may be electrically connected to the power line PL through the second connecting electrode CE2.

[0074] A protective film 126 is configured to surround at least a portion of the first semiconductor layer 121, at least a portion of the light-emitting layer 122, and at least a portion of the second semiconductor layer 123. The protective film 126 protects the first semiconductor layer 121, the light-emitting layer 122, and the second semiconductor layer 123. A first electrode 124 and a second electrode 125 may be exposed from the protective film 126 and connected to the first connection electrode CE1 and the second connection electrode CE2. For example, the protective film 126 may be made of an insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). However, this disclosure is not limited thereto.

[0075] A second planarization layer 117 is disposed on the light-emitting element 120, and a third planarization layer 118 is disposed on the second planarization layer 117. The second planarization layer 117 and the third planarization layer 118 may each be configured as a single layer or multiple layers, and are made of, for example, benzocyclobutene or acrylic-based organic materials. However, this disclosure is not limited thereto.

[0076] A second connection electrode CE2 is disposed on the third planarization layer 118. The second connection electrode CE2 is an electrode that electrically connects the light-emitting element 120 and the power line PL. Alternatively, the second connection electrode CE2 may be an electrode configured to reflect a beam of light propagating toward the side surface from the light beam emitted from the light-emitting element 120 toward the upper part of the light-emitting element 120. The second connection electrode CE2 may have a multilayer structure including a first conductive layer CE2a and a second conductive layer CE2b.

[0077] A first conductive layer CE2a is formed over the entire area of ​​the second connecting electrode CE2. The first conductive layer CE2a may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Therefore, light emitted from the light-emitting element 120 can pass through the first conductive layer CE2a and propagate toward the upper part of the light-emitting element 120.

[0078] A second conductive layer CE2b is disposed on the first conductive layer CE2a. The second conductive layer CE2b can be made of an opaque conductive material such as silver (Ag), nickel (Ni), gold (Au), platinum (Pt), aluminum (Al), molybdenum (Mo), titanium (Ti), or alloys thereof. Therefore, a portion of the light beam emitted from the light-emitting element 120 that propagates in other directions, rather than the upward direction of the light-emitting element 120, can be reflected by the second conductive layer CE2b. In this case, an opening region CE2bO, serving as an opening, can be formed in the second conductive layer CE2b, allowing light emitted from the light-emitting element 120 to propagate in the upward direction of the light-emitting element 120. Since the first conductive layer CE2a, made only of a transparent conductive material, is disposed in the opening region CE2bO, light emitted from the light-emitting element 120 can propagate towards the outside of the display device 100 through the opening region CE2bO. The opening region CE2bO can be configured to overlap with the light-emitting element 120. The width of the opening region CE2bO can be greater than the width of the light-emitting element 120.

[0079] Trench TCs are formed in the first planarization layer 116, the second planarization layer 117, and the third planarization layer 118. The trench TCs are V-shaped holes formed in the first planarization layer 116, the second planarization layer 117, and the third planarization layer 118. (Refer to...) Figure 2 The trench TC can be configured to surround each of the light-emitting elements 120. For example, the trench TC can be configured between the red sub-pixel SPR and the green sub-pixel SPG, and between the green sub-pixel SPG and the blue sub-pixel SPB. Additionally, the trench TC can be configured in the upper and lower regions of each of the plurality of sub-pixels SP.

[0080] The accompanying drawings also show that the trenches TC of the sub-pixel SP are connected to each other. However, the trenches TC of the sub-pixel SP can be configured to be spaced apart. However, this disclosure is not limited thereto.

[0081] Because the trench TC is formed in the first planarization layer 116, the second planarization layer 117, and the third planarization layer 118, the second connecting electrode CE2 formed on the third planarization layer 118 can also be disposed along the trench TC. The second connecting electrode CE2 can be adjacent to the reflecting electrode RE in the trench TC. The second connecting electrode CE2 and the reflecting electrode RE can be electrically connected to each other through the trench TC. Therefore, as Figure 2As shown, the trench TC can have a shape that surrounds all side surfaces of the light-emitting element 120. Therefore, the second connecting electrode CE2 and the reflective electrode RE can have a shape that completely surrounds the side surfaces and lower part of the light-emitting element 120. In this case, the second conductive layer CE2b of the reflective electrode RE and the second connecting electrode CE2 can reflect and block all light beams emitted from the light-emitting element 120 that propagate toward the substrate 110 or toward adjacent sub-pixels SP. Light can be extracted only in the upward direction of the light-emitting element 120. Therefore, the trench TC is formed to surround the light-emitting element 120, and the second connecting electrode CE2 and the reflective electrode RE are connected in the trench TC, thereby improving the light extraction efficiency of the light-emitting element 120.

[0082] A black dam BM is formed on the third planarization layer 118 and the second connection electrode CE2. The black dam BM may include an opening overlapping the opening region CE2bO of the light-emitting element 120 and the second conductive layer CE2b. The opening of the black dam BM may have a larger size than the opening region CE2bO. However, this disclosure is not limited thereto. The size of the opening of the black dam BM may be equal to the opening region CE2bO. Light emitted from the light-emitting element 120 and light reflected by the second connection electrode CE2 and the reflective electrode RE can propagate toward the outside of the display device 100 through the opening of the black dam BM. In addition, the black dam BM can block light beams emitted from multiple sub-pixels SP, thereby suppressing or reducing color mixing of the light beams. The black dam BM can absorb light entering the display device 100 from the outside, thereby minimizing the degradation of visibility caused by external light being reflected by components in the display device 100. For example, the black dam BM may include black components and may be made of opaque resin including pigments, etc. However, this disclosure is not limited thereto.

[0083] A protective layer 119 is provided on the black embankment BM. The protective layer 119 is a layer used to protect components disposed beneath it. The protective layer 119 can inhibit or reduce the penetration of moisture or oxygen from the outside. For example, the protective layer 119 can be configured as a single layer or multiple layers, and is made, for example, of an epoxy-based polymer or an acrylic-based polymer. However, this disclosure is not limited thereto.

[0084] Therefore, in the display device 100 according to the embodiments of the present disclosure, the trench TC is formed to surround the light-emitting element 120. The trench TC has a shape that surrounds all side surfaces of the light-emitting element 120, and the second connecting electrode CE2 and the reflective electrode RE are connected in the trench TC, so that light can be released to the open region CE2bO, but not to the lower part of the substrate 110 or adjacent sub-pixels SP, thereby improving the light extraction efficiency. The trench TC can be provided in a shape that surrounds the light-emitting element 120, and the opaque second conductive layer CE2b provided in the trench TC can reflect light and suppress or reduce the leakage of light emitted from the light-emitting element 120 to adjacent sub-pixels SP, thereby further improving the light extraction efficiency. In addition, the trench TC is formed to the reflective electrode RE, so that the reflective electrode RE and the second connecting electrode CE2 can be connected to each other, and can block the light emitted from the light-emitting element 120 from being released to the lower part of the substrate 110. Therefore, at least a portion of the light reflected by the second connecting electrode CE2 and the reflecting electrode RE can propagate toward the upper part of the light-emitting element 120, thereby improving the light extraction efficiency and display quality of the display device 100.

[0085] In the display device 100 according to an embodiment of the present disclosure, the second connecting electrode CE2 has a multilayer structure including a transparent first conductive layer CE2a and an opaque second conductive layer CE2b, such that the second connecting electrode CE2 can be used as an electrode configured to electrically connect the light-emitting element 120 and the power line PL, and as a reflector configured to reflect light emitted from the light-emitting element 120. The transparent first conductive layer CE2a can be formed in the entire area of ​​the second connecting electrode CE2 and electrically connects the light-emitting element 120 and the power line PL. In particular, only the first conductive layer CE2a is disposed in the open area CE2bO, so that light emitted from the light-emitting element 120 can easily propagate to the outside of the display device 100. In addition, the opaque second conductive layer CE2b can be disposed in the remaining area excluding the open area CE2bO and serves as a reflector configured to reflect light emitted from the light-emitting element 120. Therefore, the second connecting electrode CE2 can be configured as a multilayer structure, and the second connecting electrode CE2 can be used as a reflector, which can improve the light extraction efficiency of the display device 100.

[0086] Exemplary embodiments of this disclosure can also be described as follows:

[0087] According to one aspect of this disclosure, a display device includes: a substrate; a reflective electrode disposed on the substrate; a light-emitting element disposed on the reflective electrode; a planarization layer configured to cover the reflective electrode and the light-emitting element, and including trenches; and a second connecting electrode disposed on the planarization layer and the light-emitting element, wherein the second connecting electrode is adjacent to the reflective electrode in the trenches.

[0088] The trench can be configured to surround all the side surfaces of the light-emitting element.

[0089] The second connecting electrode may include: a transparent first conductive layer; and an opaque second conductive layer disposed on the first conductive layer.

[0090] The second conductive layer may include an opening region that overlaps with the light-emitting element.

[0091] The first conductive layer may be disposed in the entire region of the second connecting electrode, and the second conductive layer may be disposed in the remaining region of the entire region of the second connecting electrode excluding the opening region.

[0092] The reflective electrode and the second connecting electrode can be configured to surround the side surface and bottom surface of the light-emitting element.

[0093] The display device may further include: a black dam disposed on the second connecting electrode and having an opening that overlaps with the opening region and the light-emitting element, and the opening of the black dam may have a larger or the same size as the opening region.

[0094] The display device may further include: power lines disposed on a substrate; a driving transistor disposed between the substrate and a reflective electrode; and a first connecting electrode disposed between the reflective electrode and a light-emitting element. The driving transistor can be electrically connected to the light-emitting element through the first connecting electrode, and the power lines can be electrically connected to the light-emitting element through a second connecting electrode.

[0095] The reflective electrode may include an opening that overlaps with the first connecting electrode and the driving transistor, and the first connecting electrode and the driving transistor may overlap with the opening through contact holes through which they are electrically connected.

[0096] The size of the opening of the reflective electrode can be smaller than the size of the drain electrode of the driving transistor.

[0097] The drain electrode of the driving transistor can overlap with the entire opening of the reflecting electrode.

[0098] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all respects and do not limit the present disclosure. All technical concepts within the equivalent scope of the present disclosure should be construed as falling within the scope of the present disclosure.

Claims

1. A display device, comprising: substrate; A reflective electrode disposed on the substrate; A light-emitting element disposed on the reflective electrode; A planarization layer, configured to cover the reflective electrode and the light-emitting element, and including trenches; and The second connection electrode is disposed on the planarization layer and the light-emitting element. The second connecting electrode is adjacent to the reflective electrode in the trench.

2. The display device according to claim 1, wherein, The groove is configured to surround all side surfaces of the light-emitting element.

3. The display device according to claim 1, wherein, The second connecting electrode includes: A transparent first conductive layer; and An opaque second conductive layer is disposed on the transparent first conductive layer.

4. The display device according to claim 3, wherein, The opaque second conductive layer includes an opening region that overlaps with the light-emitting element.

5. The display device according to claim 4, wherein, The transparent first conductive layer is disposed throughout the entire area of ​​the second connecting electrode, and the opaque second conductive layer is disposed in the remaining area of ​​the entire area of ​​the second connecting electrode excluding the opening area.

6. The display device according to claim 4, wherein, The width of the opening region is greater than the width of the light-emitting element.

7. The display device according to claim 5, wherein, The reflective electrode and the second connecting electrode are configured to surround the side and bottom surfaces of the light-emitting element.

8. The display device according to claim 4, further comprising: A black dam is disposed on the second connecting electrode and has an opening that overlaps with the opening region and the light-emitting element. The opening of the black embankment has a larger size than or the same size as the opening area.

9. The display device according to claim 1, further comprising: Power lines disposed on the substrate; A driving transistor disposed between the substrate and the reflective electrode; as well as A first connecting electrode is disposed between the reflective electrode and the light-emitting element. The driving transistor is electrically connected to the light-emitting element through the first connection electrode, and The power line is electrically connected to the light-emitting element via the second connecting electrode.

10. The display device according to claim 9, wherein, The reflective electrode includes an opening that overlaps with a contact hole through which the first connecting electrode and the driving transistor are electrically connected.

11. The display device according to claim 10, wherein, The size of the opening of the reflective electrode is smaller than the size of the drain electrode of the driving transistor.

12. The display device according to claim 11, wherein, The drain electrode of the driving transistor overlaps with the entire opening of the reflecting electrode.

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