Non-volatile memory structure and method of forming the same

Abstract

The application provides a nonvolatile memory structure and a forming method thereof, and a resistance change layer of the nonvolatile memory structure comprises a first transition metal oxide layer, a first transition metal oxynitride layer, a transition metal nitride layer, a second transition metal oxynitride layer and a second transition metal oxide layer which are stacked in sequence, and the oxygen atom concentrations of the two transition metal oxide layers are different. The transition metal nitride layer plays a role in inhibiting the aging of oxygen migration between the two transition metal oxide layers, and the resistance of the transition metal nitride layer is small, so that more partial pressure can fall on the transition metal oxide layer, and thus the influence on the low operating voltage is small. In addition, the transition metal nitride layer as a good conductor can combine with the oxygen in the transition metal oxide layer to form a transition metal oxynitride interlayer after thermal annealing. The interlayer has charge trapping and oxygen vacancy formation capabilities, so that the generation and breakage of conductive filaments are more stable, and the device stability is improved.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit manufacturing technology, and in particular to a non-volatile memory structure and its formation method. Background Technology

[0002] Tantalum oxide layers are commonly used resistive alternating current (RAD) layers in non-volatile RAM (RRAM) memory. A common RAD layer configuration is TaOx + TaOy, where the Ta / O concentration ratios of TaOx and TaOy are different. By applying voltage pulses to the electrodes at both ends of the RAD layer, the oxygen in the tantalum oxide is induced to leave its original position and migrate, generating charged oxygen vacancies and forming oxygen vacancy pathways, which in turn form conductive filaments.

[0003] By controlling the distribution of oxygen vacancies and the connection and disconnection of conductive filaments, the resistance of the resistance-changing layer is altered. A set operation lowers the resistance, while a reset operation (opposite to the set voltage) raises it. This resistance variation enables data storage. During the set and reset processes, new conductive filaments may be introduced in addition to those already formed, potentially affecting the stability of the resistance and operating voltage, thus reducing device reliability. Furthermore, the resistance-changing layer ages during repeated set and reset operations; the TaOx and TaOy concentrations gradually converge as the Ta / O ratio becomes equal, resulting in a loss of resistance-changing capability. Summary of the Invention

[0004] The purpose of this invention is to provide a non-volatile memory structure and a method for forming the same, in order to solve one or more problems in the prior art.

[0005] To address the aforementioned technical problems, this invention provides a non-volatile memory structure, comprising:

[0006] Base;

[0007] A first electrode formed on the substrate;

[0008] A resistance variation layer formed on the first electrode; and,

[0009] The second electrode is formed on the resistance variation layer;

[0010] The resistance variation layer comprises a first transition metal oxide layer, a first transition metal nitride layer, a transition metal nitride layer, a second transition metal nitride layer, and a second transition metal oxide layer stacked sequentially from bottom to top. The oxygen atom concentration in the first transition metal oxide layer is different from that in the second transition metal oxide layer.

[0011] Optionally, in the non-volatile storage structure, the first transition metal nitride layer and the second transition metal nitride layer are obtained by thermal annealing the first transition metal oxide layer, the transition metal nitride layer and the second transition metal oxide layer stacked sequentially from bottom to top.

[0012] Optionally, in the non-volatile memory structure, the thickness of the transition metal nitride layer is less than or equal to 5 nm before thermal annealing.

[0013] Optionally, in the non-volatile storage structure, the thickness of the first transition metal oxide layer and the second transition metal oxide layer, which have a higher oxygen atom concentration, is 5 nm to 20 nm, and the thickness of the other is 10 nm to 40 nm.

[0014] Optionally, in the non-volatile storage structure, the atomic concentration ratio of oxygen atoms to transition metal atoms in the first transition metal oxide layer is x, and the atomic concentration ratio of oxygen atoms to transition metal atoms in the second transition metal oxide layer is y, where y < x ≤ 2.5 or x < y ≤ 2.5.

[0015] Optionally, in the non-volatile storage structure, the transition metal used in the first transition metal oxide layer, the first transition metal oxynitride layer, the transition metal nitride layer, the second transition metal oxynitride layer, and the second transition metal oxide layer includes at least one of tantalum, hafnium, and zirconium.

[0016] Optionally, in the non-volatile memory structure, the substrate includes a front wiring layer, a first interlayer dielectric layer deposited on the front wiring layer, and a first conductive plug formed in the first interlayer dielectric layer, wherein the front wiring layer and the first electrode are electrically connected through the first conductive plug.

[0017] Optionally, the non-volatile memory structure further includes: a second interlayer dielectric layer, a second conductive plug formed within the second interlayer dielectric layer, and a back-end wiring layer formed on the interlayer dielectric layer, wherein the second interlayer dielectric layer covers the substrate and extends to an upper surface higher than the upper surface of the second electrode, and the second electrode and the back-end wiring layer are electrically connected through the second conductive plug.

[0018] The present invention also provides a method for forming a non-volatile memory structure, comprising:

[0019] Provide a base;

[0020] A first electrode is formed on the substrate;

[0021] A resistance variation layer is formed on the first electrode; and,

[0022] A second electrode is formed on the resistance-changing layer;

[0023] The method for forming the resistance variation layer includes:

[0024] An initial resistance variation layer is formed, comprising: a first transition metal oxide layer, a transition metal nitride layer, and a second transition metal oxide layer stacked sequentially from bottom to top, wherein the oxygen atom concentration in the first transition metal oxide layer is different from the oxygen atom concentration in the second transition metal oxide layer.

[0025] The initial resistance variation layer is subjected to thermal annealing to form a first transition metal nitride layer at the junction of the first transition metal oxide layer and the transition metal nitride layer, and to form a second transition metal nitride layer at the junction of the second transition metal oxide layer and the transition metal nitride layer.

[0026] Optionally, in the method for forming the non-volatile storage structure, the process conditions for the thermal annealing treatment include: a temperature of 150℃~250℃ and a time of 30s~120s.

[0027] In summary, the non-volatile memory structure and its formation method provided by this invention include a resistance-varying layer comprising, from bottom to top, a first transition metal oxide layer, a first transition metal nitride layer, a transition metal nitride layer, a second transition metal nitride layer, and a second transition metal oxide layer. The oxygen atom concentration in the first transition metal oxide layer differs from that in the second transition metal oxide layer. The transition metal nitride layer suppresses oxygen migration and aging between the first and second transition metal oxide layers. Its low resistance allows more voltage to be distributed across the transition metal oxide layer, thus reducing its impact on low operating voltages. Furthermore, as a good conductor, the transition metal nitride layer, after thermal annealing, can combine with oxygen in the transition metal oxide layer to form a transition metal nitride intercalation layer. This intercalation layer possesses charge trapping and oxygen vacancy formation capabilities, enabling the device to perform storage functions by varying resistance between low and high resistance. This resistance-varying layer makes the generation and breakage of conductive filaments more stable, reducing the randomness of conductive filament generation and improving device stability. Attached Figure Description

[0028] Figures 1-6 The device structure diagrams corresponding to each step of the method for forming a non-volatile memory structure provided in the embodiments of the present invention are shown.

[0029] The labels in the accompanying drawings are explained as follows:

[0030] 10-Base;

[0031] 11-Front wiring layer; 12-First interlayer dielectric layer; 13-First conductive plug;

[0032] 20 - First electrode;

[0033] 30 - Initial resistance variation layer;

[0034] 31-First transition metal oxide layer; 32-Transition metal nitride layer; 33-Second transition metal oxide layer; 34-First transition metal nitride layer; 35-Second transition metal nitride layer;

[0035] 40 - Second electrode;

[0036] 301 - Resistance Variation Layer;

[0037] 50 - Second interlayer dielectric layer;

[0038] 60 - Second conductive plug;

[0039] 70 - Back-end wiring layer. Detailed Implementation

[0040] To make the objectives, advantages, and features of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention. Furthermore, the structures shown in the drawings are often part of the actual structure. In particular, different figures need to show different emphases, and sometimes different proportions are used. It should be understood that relative terms such as "above," "below," "top," "bottom," and "upper" shown in the drawings can be used to describe the relationships between various elements. These relative terms are intended to cover different orientations of elements other than those depicted in the drawings. For example, if the device is inverted relative to the view in the drawings, an element described as "above" another element will now be below that element. It should also be understood that, unless specifically stated or indicated, the terms "first," "second," "third," etc., in the specification are only used to distinguish the various components, elements, steps, etc., in the specification, and are not used to indicate logical or sequential relationships between the various components, elements, steps, etc.

[0041] Please see Figure 6This invention provides a non-volatile memory structure, comprising: a substrate 10; a first electrode 20 formed on the substrate 10; a resistance variation layer 301 formed on the first electrode 20; and a second electrode 40 formed on the resistance variation layer 301; wherein the resistance variation layer 301 comprises a first transition metal oxide layer 31, a first transition metal oxynitride layer 34, a transition metal nitride layer 32, a second transition metal oxynitride layer 35, and a second transition metal oxide layer 33 stacked sequentially from bottom to top, wherein the oxygen atom concentration in the first transition metal oxide layer 31 is different from the oxygen atom concentration in the second transition metal oxide layer 33.

[0042] Preferably, the first transition metal oxynitride layer 34 and the second transition metal oxynitride layer 35 are obtained by thermal annealing. Specifically, after sequentially forming the first transition metal oxide layer 31, the transition metal nitride layer 32, and the second transition metal oxide layer 33, the formed structure is thermally annealed to form the first transition metal oxynitride layer 34 at the junction of the first transition metal oxide layer 31 and the transition metal nitride layer 32, and to form the second transition metal oxynitride layer 35 at the junction of the second transition metal oxide layer 33 and the transition metal nitride layer 32.

[0043] Please combine Figures 1-5 Accordingly, embodiments of the present invention also provide a method for forming a non-volatile memory structure, comprising the following steps:

[0044] S1 provides substrate 10;

[0045] S2, a first electrode 20 is formed on the substrate 10;

[0046] S3, a resistance variation layer 301 is formed on the first electrode 20;

[0047] S4, a second electrode 40 is formed on the resistance variation layer 301;

[0048] In step S3, the method for forming the resistance variation layer 301 includes:

[0049] An initial resistance variation layer 30 is formed, which includes a first transition metal oxide layer 31, a transition metal nitride layer 32 and a second transition metal oxide layer 33 stacked sequentially from bottom to top. The oxygen atom concentration in the first transition metal oxide layer 31 is different from the oxygen atom concentration in the second transition metal oxide layer 33.

[0050] The initial resistance variation layer 30 is subjected to thermal annealing to form a first transition metal oxide layer 34 at the junction of the first transition metal oxide layer 31 and the transition metal nitride layer 32, and to form a second transition metal oxide layer 35 at the junction of the second transition metal oxide layer 33 and the transition metal nitride layer 32.

[0051] As mentioned earlier, in the prior art, the distribution of oxygen atoms is changed by migrating between two transition metal oxide layers with different oxygen atom concentrations, so that the device can switch between low and high resistance with the input of voltage pulses, thereby completing the storage function. However, this scheme has the problem that with repeated operation, the oxygen atom depth of the two transition metal oxide layers gradually converges and loses the resistive switching capability.

[0052] The non-volatile memory structure provided in this embodiment uses a transition metal nitride layer 32 as a separator to suppress oxygen migration between the first transition metal oxide layer 31 and the second transition metal oxide layer 33. This avoids or slows down the gradual convergence of oxygen atom concentrations in the two transition metal oxide layers with repeated operations. Furthermore, by forming a transition metal nitride layer to capture charge and accept oxygen atoms from the transition metal oxide layer, the device can perform its storage function even when resistance varies between low and high. Therefore, the non-volatile memory structure provided in this embodiment makes the generation and breakage of conductive filaments more stable, reduces the randomness of conductive filament generation, and improves device stability.

[0053] Based on the non-volatile memory structure and its formation method provided in this embodiment, the resistance variation layer 301 comprises five layers. The first transition metal nitride layer 34 and the second transition metal nitride layer 35 can be formed directly or through thermal oxidation after the formation of the other three layers. The transition metal nitride layer 32, in addition to inhibiting oxygen migration and aging between the first transition metal oxide layer 31 and the second transition metal oxide layer 33, can also combine with oxygen atoms in the transition metal oxide to form transition metal nitride. In other words, the formation of the transition metal nitride layer 32 not only inhibits aging but also participates in the formation of the transition metal nitride layer, thereby simplifying the fabrication process.

[0054] It should be noted that the preferred embodiment of this invention is to form the first transition metal nitride layer 34 and the second transition metal nitride layer 35 by thermal oxidation after the initial resistance change layer 30 is formed. In other embodiments, the first transition metal nitride layer 32 and the second transition metal nitride layer 35 can also be formed directly, for example, by reactive sputtering with oxygen and nitrogen as reactive gases and transition metal as sputtering target material to form transition metal oxynitride.

[0055] The following provides a more detailed description of the non-volatile memory structure and its formation method provided in this embodiment. In the following description, only the method by which the first transition metal oxynitride layer 34 and the second transition metal oxynitride layer 35 are formed by thermal oxidation after the initial resistance variation layer 30 is formed will be explained.

[0056] First, perform step S1, please refer to [link / reference]. Figure 1 A substrate 10 is provided. Specifically, the substrate 10 may include a front wiring layer 11, a first interlayer dielectric layer 12, and a first conductive plug 13 formed within the first interlayer dielectric layer 12.

[0057] The formation process includes: depositing a dielectric on the front wiring layer 11 to form the first interlayer dielectric layer 12, the material of the first interlayer dielectric layer 12 being, for example, TEOS (ethyl silicate), and then performing photolithography and other steps on the first interlayer dielectric layer 12 to form contact holes, filling the contact holes with conductive materials such as W, Cu, Ni, TaN, etc., and then performing chemical mechanical polishing to remove excess metal and planarize the interface.

[0058] Additionally, the substrate 10 may also include a substrate (not shown), the first interlayer dielectric layer 12 is formed on the substrate, and the front wiring layer 11 is located within and / or on the substrate.

[0059] Next, execute steps S2 to S4 sequentially, please refer to [link / reference]. Figure 2 The first electrode 20, the initial resistance variation layer 30, and the second electrode 40 are sequentially formed on the substrate 10. The front wiring layer 11 and the first electrode 20 are electrically connected through the first conductive plug 13.

[0060] The initial resistance variation layer 30 includes a first transition metal oxide layer 31, a transition metal nitride layer 32, and a second transition metal oxide layer 33 stacked sequentially from bottom to top. The oxygen atom concentration in the first transition metal oxide layer 31 is different from the oxygen atom concentration in the second transition metal oxide layer 33.

[0061] As an example, the transition metal mentioned in this embodiment is tantalum. That is, the transition metal used in the first transition metal oxide layer 31, the transition metal nitride layer 32, and the second transition metal oxide layer 33 is tantalum. In other words, the initial resistance variation layer 30 includes a first tantalum oxide layer, a tantalum nitride layer, and a second tantalum oxide layer stacked sequentially from bottom to top. Correspondingly, the first transition metal nitride layer 34 and the second transition metal oxide layer 33 formed after subsequent thermal annealing are respectively the first tantalum nitride layer and the second tantalum nitride layer. Optionally, the transition metal mentioned in this embodiment may also be hafnium, zirconium, etc.

[0062] The oxygen atom concentrations of the first transition metal oxide layer 31 and the second transition metal oxide layer 33 are different. Assuming the ratio of oxygen atom concentration to transition metal atom concentration in the first transition metal oxide layer 31 is x, and the ratio of oxygen atom concentration to transition metal atom concentration in the second transition metal oxide layer 33 is y, optionally, y < x or x < y, that is, the oxygen atom concentration of the first transition metal oxide layer 31 can be greater than or less than the oxygen atom concentration of the second transition metal oxide layer 33. Furthermore, the values ​​of x and y should both be less than or equal to 2.5, that is, the first transition metal oxide layer 31 and the second transition metal oxide layer 33 are oxygen-deficient oxides of the transition metal, y < x ≤ 2.5 or x < y ≤ 2.5. With this structure, when a voltage is applied to the resistance changing element, oxygen vacancies can migrate directionally between the first transition metal oxide layer 31 and the second transition metal oxide layer 33, thereby achieving a resistance change.

[0063] The materials of the first electrode 20 and the second electrode 40 can be TaN, Pt, Ir, etc. If the materials of the first electrode 20 and the second electrode 40 are TaN metal compounds, they can be formed by reactive sputtering using tantalum metal as the target material and chlorine and nitrogen gas as sputtering gases. If the materials of the first electrode 20 and the second electrode 40 are metals such as Pt and Ir, they can be formed directly by sputtering.

[0064] When the first transition metal oxide layer 31 and the second transition metal oxide layer 33 are tantalum oxide layers, they can be formed by reactive sputtering using tantalum metal as the target and chlorine and oxygen as the sputtering gases. Considering the pressure distribution effect, in this embodiment, optionally, the thickness of the layer with the higher oxygen atom concentration in the first transition metal oxide layer 31 and the second transition metal oxide layer 33 is 5 nm to 20 nm, and the thickness of the other is 10 nm to 40 nm. However, this application is not limited to this; in other embodiments, the first transition metal oxide layer 31 and the transition metal oxide layer 33 can also be designed to have other thicknesses depending on actual needs or the applied voltage pulse.

[0065] When the device is in operation, the applied voltage pulse is distributed to each film layer of the resistance variation layer 301. Since the resistivity of the transition metal nitride, transition metal oxynitride and transition metal oxide increases, the voltage pulse distributed to the first transition metal oxide layer 31 and the second transition metal oxide layer 33 has a relatively large component, thereby enabling the non-volatile memory structure to work at low voltage.

[0066] Preferably, the thickness of the transition metal nitride layer 32 is less than or equal to 5 nm, for example, about 2 nm, so that the transition metal nitride layer 32 meets the low resistance requirement.

[0067] Please see Figure 2 and Figure 3 The initial resistance variation layer 30 can be formed after each film layer is formed in sequence, and then the diameter of the initial resistance variation layer 30 can be made to be the target diameter through photolithography, etching and other steps.

[0068] Then, proceed to step S5, please refer to [link / reference]. Figure 4 A thermal annealing process is performed to form a first transition metal oxide layer 34 at the junction of the first transition metal oxide layer 31 and the transition metal nitride layer 32, and to form a second transition metal oxide layer 35 at the junction of the second transition metal oxide layer 33 and the transition metal nitride layer 32, thereby obtaining the resistance variation layer 301.

[0069] Optionally, the process conditions for the hot annealing process include: a temperature of 150℃~250℃ and a time of 30s~120s.

[0070] In other embodiments, after performing a thermal annealing process on the initial resistance variation layer 30, the diameter of the resistance variation layer 301 can be made to the target diameter through photolithography, etching and other steps.

[0071] In some other embodiments, a thermal annealing process can be performed after the initial resistance variation layer 30 is formed to form the first transition metal oxynitride layer 34 and the second transition metal oxynitride layer 35, and then the second electrode 40 is formed. However, this approach would increase the complexity of the process flow, and will not be described in detail here.

[0072] The transition metal nitride layer compensates for oxygen atom porosity with nitrogen atoms and can also receive oxygen atoms. If only a transition metal nitride layer exists between two transition metal oxide layers, under certain heat conditions, the transition metal nitride layer can suppress the diffusion of oxygen atoms between transition metal oxides with different oxygen atom concentrations. However, when a working voltage is applied, oxygen atoms diffuse through the transition metal nitride layer, causing the resistance change layer 301 to age. For example, under a negative voltage pulse, oxygen atoms from the metal oxide layer with a high oxygen atom concentration will diffuse through the transition metal nitride layer to the metal oxide layer with a low oxygen atom depth. Therefore, although forming a transition metal nitride layer only between two transition metal oxide layers can slow down the aging rate of the resistance change layer 301 within a certain temperature range, it cannot reduce the aging of the device caused by the repeated generation and breakage of conductive filaments.

[0073] In this embodiment, during the repeated generation and breakage of the conductive filament, the diffusion of oxygen atoms between the first transition metal oxide layer 31 and the second transition metal oxide layer 33 is suppressed by the transition metal nitride layer 32, while the oxygen migration of the first transition metal oxide layer 31 and the second transition metal oxide layer 33 is completed by the first transition metal oxide layer 34 and the second transition metal oxide layer 35, respectively. Thus, the structure provided in this embodiment can also perform storage function by varying between low resistance and high resistance.

[0074] Optionally, after performing step S5, the following steps may also be performed: Please refer to Figure 5 A second interlayer dielectric layer 50 is formed, which covers the substrate 10 and extends to the upper surface above the upper surface of the second electrode 40. See also... Figure 6 The second interlayer dielectric layer 50 is etched to form contact holes and filled with conductive materials such as W, Cu, Ni, and TaN to form a second conductive plug 60. A back-end wiring layer 70 is formed on the second interlayer dielectric layer 50. The second electrode 40 and the back-end wiring layer 70 are electrically connected through the second conductive plug 60.

[0075] Therefore, the non-volatile memory structure provided in this embodiment further includes: a second interlayer dielectric layer 50, a second conductive plug 60 formed in the second interlayer dielectric layer 50, and a back-end wiring layer 70 formed on the second interlayer dielectric layer 50. The second interlayer dielectric layer 50 covers the substrate 10 and extends to an upper surface higher than the upper surface of the second electrode 40. The second electrode 40 and the back-end wiring layer 70 are electrically connected through the second conductive plug 60.

[0076] In summary, the non-volatile memory structure and its formation method provided in this embodiment of the invention include a resistance-varying layer comprising, from bottom to top, a first transition metal oxide layer, a first transition metal nitride layer, a transition metal nitride layer, a second transition metal nitride layer, and a second transition metal oxide layer. The oxygen atom concentration in the first transition metal oxide layer differs from that in the second transition metal oxide layer. The transition metal nitride layer suppresses oxygen migration and aging between the first and second transition metal oxide layers. Its low resistance allows more voltage to be distributed across the transition metal oxide layer, thus reducing its impact on low operating voltages. Furthermore, as a good conductor, the transition metal nitride layer, after thermal annealing, can combine with oxygen in the transition metal oxide layer to form a transition metal nitride intercalation layer. This intercalation layer possesses charge trapping and oxygen vacancy formation capabilities, enabling the device to perform storage functions by varying resistance between low and high resistance. This resistance-varying layer makes the generation and breakage of conductive filaments more stable, reducing the randomness of conductive filament generation and improving device stability.

[0077] Furthermore, it should be understood that although the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the present invention. For any person skilled in the art, many possible variations and modifications can be made to the technical solutions of the present invention based on the disclosed technical content, or equivalent embodiments with equivalent changes, without departing from the scope of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the present invention shall still fall within the scope of protection of the present invention.

Claims

1. A non-volatile memory structure, characterized in that, include: Base; A first electrode formed on the substrate; A resistance variation layer formed on the first electrode; as well as, The second electrode is formed on the resistance variation layer; The resistance variation layer comprises a first transition metal oxide layer, a first transition metal nitride layer, a transition metal nitride layer, a second transition metal nitride layer, and a second transition metal oxide layer stacked sequentially from bottom to top. The oxygen atom concentration in the first transition metal oxide layer is different from that in the second transition metal oxide layer.

2. The non-volatile storage structure as described in claim 1, characterized in that, The first transition metal nitride layer and the second transition metal nitride layer are obtained by thermal annealing the first transition metal oxide layer, the transition metal nitride layer and the second transition metal oxide layer stacked from bottom to top.

3. The non-volatile storage structure as described in claim 1, characterized in that, Before thermal annealing, the thickness of the transition metal nitride layer is less than or equal to 5 nm.

4. The non-volatile storage structure as described in claim 1, characterized in that, The thickness of the first transition metal oxide layer and the second transition metal oxide layer, in which the oxygen atom concentration is greater, is 5 nm to 20 nm, and the thickness of the other is 10 nm to 40 nm.

5. The non-volatile storage structure as described in claim 1, characterized in that, The atomic concentration ratio of oxygen atoms to transition metal atoms in the first transition metal oxide layer is x, and the atomic concentration ratio of oxygen atoms to transition metal atoms in the second transition metal oxide layer is y, where y < x ≤ 2.5 or x < y ≤ 2.

5.

6. The non-volatile memory structure as described in claim 1, characterized in that, The transition metals used in the first transition metal oxide layer, the first transition metal nitride layer, the transition metal nitride layer, the second transition metal nitride layer, and the second transition metal oxide layer include at least one of tantalum, hafnium, and zirconium.

7. The non-volatile storage structure as described in claim 1, characterized in that, The substrate includes a front wiring layer, a first interlayer dielectric layer deposited on the front wiring layer, and a first conductive plug formed in the first interlayer dielectric layer. The front wiring layer and the first electrode are electrically connected through the first conductive plug.

8. The non-volatile memory structure as described in claim 1, characterized in that, Also includes: A second interlayer dielectric layer, a second conductive plug formed within the second interlayer dielectric layer, and a back-end wiring layer formed on the interlayer dielectric layer, the second interlayer dielectric layer covering the substrate and extending to an upper surface higher than the upper surface of the second electrode, the second electrode and the back-end wiring layer being electrically connected via the second conductive plug.

9. A method for forming a non-volatile memory structure, characterized in that, include: Provide a base; A first electrode is formed on the substrate; An initial resistance variation layer is formed on the first electrode. The initial resistance variation layer includes: a first transition metal oxide layer, a transition metal nitride layer and a second transition metal oxide layer stacked sequentially from bottom to top. The oxygen atom concentration in the first transition metal oxide layer is different from the oxygen atom concentration in the second transition metal oxide layer. A second electrode is formed on the initial resistance variation layer; A thermal annealing process is performed to form a first transition metal oxide layer at the junction of the first transition metal oxide layer and the transition metal nitride layer, and to form a second transition metal oxide layer at the junction of the second transition metal oxide layer and the transition metal nitride layer.

10. The method for forming a non-volatile memory structure as described in claim 1, characterized in that, The process conditions for the heat annealing treatment include: a temperature of 150℃~250℃ and a time of 30s~120s.

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