A packaging structure and a corresponding method of manufacture

Abstract

The application relates to the technical field of semiconductor packaging, and discloses a packaging structure and a corresponding preparation method, which comprise a lead frame, the lead frame comprising a carrier and first pins protruding from the carrier; a first chip located on the carrier; a second chip located on the upper surface of the first chip; and a first metal sheet, the two ends of the first metal sheet being respectively pasted to the upper surface of the first pin and the upper surface of the second chip through corresponding first conductive adhesive layers, so that the first pin and the second chip are electrically connected through the first metal sheet, and the upper surface of the first metal sheet is exposed outside the packaging shell. The heat inside the stacked chips can be rapidly taken away through the first metal sheet.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and discloses a packaging structure and a corresponding preparation method. Background Technology

[0002] In existing packaging structures, when multiple layers of chips are stacked vertically, the lower layer chip not only generates its own heat but also needs to absorb the heat conducted from the upper layer, forming a heat island effect that leads to severe chip overheating. Summary of the Invention

[0003] The purpose of this invention is to solve the problem of chip overheating caused by vertically stacking multiple layers of chips in existing packaging structures, and to provide a packaging structure and a corresponding fabrication method.

[0004] To achieve the above objectives, the present invention provides a packaging structure, comprising: A lead frame, the lead frame including a carrier and a first pin protruding from the carrier; The first chip is located on the carrier; The second chip is located on the upper surface of the first chip; The first conductive adhesive layer is located on the upper surface of the first pin and the upper surface of the second chip; The first metal sheet has its two ends attached to the upper surface of the first pin and the upper surface of the second chip respectively through the corresponding first conductive adhesive layer, so that the first pin and the second chip are electrically connected through the first metal sheet. A package housing covers the surface of the lead frame and forms a cavity with the lead frame to accommodate the first chip and the second chip. The package housing has a first opening, and the upper surface of the first metal sheet is exposed to the outside of the package housing through the first opening.

[0005] As one possible implementation, the lead frame further includes a baffle wall located on the outer side of the upper surface of the carrier, and the package shell is a cover plate placed on the baffle wall. The cover plate and the lead frame form a cavity for accommodating the first chip and the second chip.

[0006] In one possible implementation, the package housing includes a cover plate and a baffle formed on the lower surface of the cover plate. By attaching the lower surface of the baffle to the upper surface of the lead frame, the cover plate, the baffle, and the lead frame form a cavity for accommodating the first chip and the second chip.

[0007] As one possible implementation, both the retaining wall and the carrier are made of molding compound, and the retaining wall and the carrier are integrally formed.

[0008] In one possible implementation, the cover plate has a first opening at a position corresponding to the first metal sheet, and the first metal sheet is embedded in the first opening.

[0009] As one possible implementation, it also includes: A prism structure is located on the carrier, and the cover plate and the prism structure have a second opening at a corresponding position; the prism structure is located directly below the second opening; A glass sheet, which is embedded in the second opening.

[0010] As one possible implementation, the lead frame further includes a second pin protruding from the carrier.

[0011] In one possible implementation, the upper surface height of the second pin is lower than the upper surface height of the first pin.

[0012] As one possible implementation, it also includes: The second conductive adhesive layer is located on the upper surface of the second pin and in the outer region of the upper surface of the first chip. The second metal sheet has its two ends attached to the upper surface of the second pin and the outer region of the upper surface of the first chip via corresponding second conductive adhesive layers, so that the second pin and the first chip are electrically connected through the second metal sheet.

[0013] In one possible implementation, the upper surface of the second pin is flush with the upper surface of the first chip.

[0014] As one possible implementation, the width of the second metal sheet is smaller than the width of the first metal sheet.

[0015] In one possible implementation, the upper surface of the first pin is flush with the upper surface of the second chip.

[0016] In one possible implementation, the upper surface of the first metal sheet is an exposed surface.

[0017] In one possible implementation, the upper surface of the first metal sheet is covered with an insulating high-temperature resistant film layer, and the upper surface of the metal sheet is indirectly exposed to the outside of the packaging shell through the insulating high-temperature resistant film layer.

[0018] In one possible implementation, the upper surface of the first insulating high-temperature resistant film layer is flush with the upper surface of the encapsulation shell.

[0019] As one possible implementation, it also includes: A heat sink is used to connect the first metal plate.

[0020] Accordingly, the present invention also provides a method for preparing a packaging structure, comprising: A lead frame is provided, the lead frame including a carrier and a first pin protruding from the carrier; The first chip is mounted on the carrier; the second chip is mounted on the upper surface of the first chip; adhesive is applied to the upper surface of the first pin and the upper surface of the second chip to form a first conductive adhesive layer; A package housing is provided, the package housing having a first opening, a first metal sheet being embedded in the first opening, and the upper surface of the first metal sheet being exposed to the outside of the package housing; the package housing is covered on the surface of the lead frame, and the two ends of the first metal sheet are attached to the upper surface of the first pin and the upper surface of the second chip through corresponding first conductive adhesive layers, so that the first pin and the second chip are electrically connected through the first metal sheet.

[0021] As one possible implementation, the lead frame further includes a second pin protruding from the carrier, the upper surface of the second pin being lower than the upper surface of the first pin.

[0022] As one possible implementation, after the step of mounting the second chip onto the upper surface of the first chip, the method further includes: A second conductive adhesive layer is formed by dispensing adhesive onto the upper surface of the second pin and the outer region of the upper surface of the first chip. The two ends of the second metal sheet are attached to the upper surface of the second pin and the outer area of ​​the upper surface of the first chip through the corresponding second conductive adhesive layer, so that the second pin and the first chip are electrically connected through the second metal sheet; The second chip is located in the inner region of the upper surface of the first chip.

[0023] In one possible implementation, the upper surface of the second pin is flush with the upper surface of the first chip.

[0024] As one possible implementation, the width of the second metal sheet is smaller than the width of the first metal sheet.

[0025] In one possible implementation, the package housing includes a cover plate and a baffle formed on the lower surface of the cover plate. The cover plate has a first opening, in which a first metal sheet is embedded. By attaching the lower surface of the baffle to the upper surface of the lead frame, the cover plate, the baffle, and the lead frame form a cavity for accommodating the first chip and the second chip.

[0026] As one possible implementation, the lead frame further includes a baffle wall located on the outer side of the upper surface of the carrier, and the encapsulation shell is a cover plate placed on the baffle wall. The cover plate has a first opening, and a first metal sheet is embedded in the first opening. The cover plate and the lead frame form a cavity for accommodating the first chip and the second chip.

[0027] In one possible implementation, both the retaining wall and the cover plate are made of molding compound, both the retaining wall and the carrier are made of molding compound, and the retaining wall and the carrier are integrally formed.

[0028] In one possible implementation, the cover plate has a second opening in which a glass sheet is embedded.

[0029] As one possible implementation, prior to the step of covering the retaining wall with the cover plate, the following steps are also included: The prism structure is placed on the carrier; and when the cover plate is subsequently placed on the barrier wall, the prism structure is located directly below the second opening.

[0030] In one possible implementation, the upper surface of the first pin is flush with the upper surface of the second chip.

[0031] In one possible implementation, the upper surface of the first metal sheet is an exposed surface.

[0032] In one possible implementation, the upper surface of the metal sheet is covered with an insulating high-temperature resistant film layer, and the upper surface of the metal sheet is indirectly exposed to the outside of the packaging shell through the insulating high-temperature resistant film layer.

[0033] In one possible implementation, the upper surface of the first insulating high-temperature resistant film layer is flush with the upper surface of the encapsulation shell.

[0034] The beneficial effects of this invention are: This invention discloses a packaging structure and a corresponding fabrication method, comprising: a lead frame, the lead frame including a carrier and a first pin protruding from the carrier; a first chip located on the carrier; a second chip located on the upper surface of the first chip; and a first metal sheet, the two ends of which are respectively attached to the upper surface of the first pin and the upper surface of the second chip via corresponding first conductive adhesive layers, such that the first pin and the second chip are electrically connected through the first metal sheet; and the upper surface of the first metal sheet is exposed to the outside of the packaging shell. This allows the first metal sheet to quickly dissipate heat from the stacked chips.

[0035] This invention uses a first metal sheet instead of traditional bonding wires for electrical connection, eliminating the need to consider arc height and reducing package thickness.

[0036] The present invention further improves heat dissipation efficiency by connecting an external heat dissipation device to the first metal sheet.

[0037] This invention simplifies the packaging process and reduces costs by integrating the lead frame and the retaining wall into an integrated structure and encapsulating them in a cavity. Attached Figure Description

[0038] Figure 1 and Figure 2 These are schematic diagrams of packaging structures provided for illustrating technical problems in some embodiments of the present invention; Figures 3-11 This is a schematic diagram illustrating the fabrication process of the packaging structure provided in some embodiments of the present invention; Figure 12 The flowchart illustrates the steps of preparing the packaging structure according to some embodiments of the present invention. Detailed Implementation

[0039] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] It should be understood that terms such as “first” and “second” used herein to describe various elements, components, regions, layers, and / or sections should not be limited by these terms. These terms may be used only to distinguish one element, component, region, layer, or section from another. For example, the use of terms such as “first” and “second” herein does not imply order or sequence unless the context clearly indicates otherwise. For ease of description, spatially relative terms such as “upper,” “upper surface,” “lower,” and “lower surface” may be used herein to describe the relationship of one element or feature to other elements or features as shown in the accompanying drawings. It should be understood that spatially relative terms are intended to include not only the orientations shown in the accompanying drawings but also different orientations of the device in use or operation.

[0041] In this application, unless otherwise expressly specified and limited, the terms "connected" and "connected" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0042] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples. It should be noted that the terms "comprising" and "having," and their variations, used in this application are intended to cover non-exclusive inclusion.

[0043] See Figure 1 This is an exploded view of the packaging structure of a lidar product used in drones. (See attached image) Figure 2 for Figure 1 A side view of a multilayer chip stacked vertically includes a lead frame 10, which has a carrier and pins 11. The carrier has stacked multilayer chips 13 and a prism 14. Chips in the upper layer of the multilayer chips 13 are connected to their corresponding pins 11 via corresponding bonding wires 12. Some chips in the lower layer of the multilayer chips 13 are also connected to their corresponding pins 11 via corresponding bonding wires 12. A baffle 20 and a cover plate 30 are also stacked sequentially on the lead frame 10, forming a cavity structure. Light emitted from the side of the chips 13 is refracted by the prism 14 and then emitted from the side. Figure 1 The arrow shown shoots out. In this structure, when multiple layers of chips 13 are stacked vertically, the chip in the next layer not only generates heat itself, but also needs to absorb the heat conducted by the chip in the previous layer, forming a heat island effect, which leads to severe chip overheating.

[0044] For this reason, see Figure 11Some embodiments of the present invention provide a packaging structure, including: a lead frame 100, the lead frame 100 including a carrier 104 and a first pin 102 protruding from the carrier 104; a first chip 110 located on the carrier 104; a second chip 120 located on the upper surface of the first chip 110; a first conductive adhesive layer 121 located on the upper surface of the first pin 102 and the upper surface of the second chip 120; and a first metal sheet 140, the two ends of the first metal sheet 140 being respectively adhered to the first conductive adhesive layer 121. The upper surface of the first pin 102 and the upper surface of the second chip 120 are connected so that the first pin 102 and the second chip 120 are electrically connected through the first metal plate 140, and heat dissipation is also achieved through the first metal plate 140. The package shell covers the surface of the lead frame 100 and forms a cavity with the lead frame 100 to accommodate the first chip 110 and the second chip 120. The package shell has a first opening, and the upper surface of the first metal plate 140 is exposed to the outside of the package shell through the first opening.

[0045] In some embodiments, the first pin 102 protrudes from the carrier 104, such that the first pin 102 is higher than the carrier 104. In some embodiments, the specific height of the first pin 102 can be set according to the height of the subsequent chip after it is mounted on the carrier 104, such that the upper surface of the first pin 102 is flush with the upper surface of the second chip 120. In some embodiments, the upper surface of the first pin 102 is used for electrical connection with the second chip 120.

[0046] It should be noted that in this embodiment, "flush" means that the surfaces are on the same plane and allow for minor tolerances.

[0047] In some embodiments, the lead frame 100 has a plurality of first pins 102. In some embodiments, the first pins 102 are all made of metal, specifically one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, silver, etc.

[0048] In some embodiments, the carrier 104 may be a non-metallic material such as plastic or ceramic.

[0049] In some embodiments, the first chip 110 and the second chip 120 may include a power chip, a logic chip, a memory chip, or an optoelectronic chip. In some embodiments, the logic chip may include a gate array, a cell substrate array, an embedded array, a structured application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a complex programmable logic device (CPLD), a central processing unit (CPU), a microprocessor unit (MPU), a microcontroller unit (MCU), a logic integrated circuit (IC), an application processor (AP), a display driver IC (DDI), a radio frequency (RF) chip, a power supply chip, or a complementary metal-oxide-semiconductor (CMOS) image sensor. In some embodiments, the memory chip may include volatile memory chips (such as dynamic random access memory (DRAM) or static RAM (SRAM) or non-volatile memory chips (such as flash memory, phase-change RAM (PRAM), magnetoresistive RAM (MRAM), ferroelectric RAM (FeRAM), or resistive RAM (ReRAM)). In a specific embodiment, the memory chip may include high-bandwidth memory (HBM) containing DRAM chips. In some embodiments, the optoelectronic chip may include a light emitting chip, such as an FP chip, a DFB chip, an EML chip, etc., or a light detection chip, such as a PIN detector chip, an APD detector chip, etc.

[0050] In some embodiments, the upper surface of the first pin 102 is flush with the upper surface of the second chip 120. In some embodiments, the upper surface of the first chip 110 is an active surface, and the upper surface of the second chip 120 is an active surface.

[0051] In some embodiments, the first chip 110 is attached to the carrier 104 with a corresponding adhesive layer, and the second chip 120 is attached to the inner region of the upper surface of the first chip 110 with a corresponding adhesive layer.

[0052] In some embodiments, there is at least one second chip 120, each second chip 120 corresponding to a plurality of first pins 102, and the number of first metal plates 140 corresponds to the number of first pins 102. In some embodiments, the number of first chips 110 corresponds to the number of second chips 120.

[0053] In some embodiments, the first metal sheet 140 may be one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, silver, etc.

[0054] In some embodiments, the adhesive material of the first conductive adhesive layer 121 may be silver paste or conductive epoxy resin for electrical connection.

[0055] It should be noted that "exposure" in this embodiment refers to direct or indirect exposure.

[0056] In some embodiments, the upper surface of the first metal sheet 140 is an exposed surface, such that the upper surface of the first metal sheet 140 is directly exposed to the outside of the package housing to facilitate heat dissipation. In other embodiments, the upper surface of the first metal sheet 140 is not covered by the package housing but allows for a functional coating; specifically, the upper surface of the first metal sheet 140 is covered with an insulating high-temperature resistant film layer, and the upper surface of the first metal sheet 140 is indirectly exposed to the outside of the package housing through the insulating high-temperature resistant film layer to prevent short circuits and facilitate heat dissipation.

[0057] In some embodiments, the packaging structure further includes a heat sink for connecting the first metal sheet 140 and further providing heat dissipation for the first metal sheet 140. In some embodiments, the heat sink may be located on the exposed surface of the first metal sheet 140 or on the upper surface of the insulating high-temperature resistant film layer. In some embodiments, when the heat sink is located on the exposed surface of the first metal sheet 140, the heat sink may be an insulating structure to prevent short circuits.

[0058] In some embodiments, the insulating and high-temperature resistant film materials of the insulating and high-temperature resistant film layer cover ceramics (such as aluminum nitride and aluminum oxide), polymers (such as polyimide) and composite materials (such as epoxy resin-based composite materials), and are widely used in electronic packaging, semiconductor equipment, aerospace thermal protection and other scenarios. Appropriate materials need to be selected according to the requirements of thermal conductivity, insulation, temperature resistance and mechanical strength.

[0059] In some embodiments, the lead frame 100 further includes a second pin 103 protruding from the carrier 104. In some embodiments, the lead frame 100 has a plurality of second pins 103. In some embodiments, the second pin 103 is made of metal, specifically one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, silver, etc.

[0060] In some embodiments, the height of the upper surface of the second pin 103 is lower than the height of the upper surface of the first pin 102. In some embodiments, the packaging structure further includes: a second conductive adhesive layer 111, located on the upper surface of the second pin 103 and the outer region of the upper surface of the first chip 110; and a second metal sheet 130, the two ends of which are attached to the upper surface of the second pin 103 and the outer region of the upper surface of the first chip 110 through corresponding second conductive adhesive layers 111, so that the second pin 103 and the first chip 110 are electrically connected through the second metal sheet 130.

[0061] In some embodiments, the material of the second metal sheet 130 may be one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, silver, etc.

[0062] In some embodiments, the upper surface of the second pin 103 is flush with the upper surface of the first chip 110.

[0063] In some embodiments, there are multiple second pins 103, and the number of second metal plates 130 corresponds to the number of first chips 110.

[0064] In some embodiments, the first metal sheet 140 is mainly used for heat dissipation and electrical connection, and the second metal sheet 130 is mainly used for electrical connection. Therefore, the width of the second metal sheet 130 can be smaller than the width of the first metal sheet 140.

[0065] In some embodiments, the adhesive material of the second conductive adhesive layer 111 may be silver paste or conductive epoxy resin for electrical connection.

[0066] In some embodiments, the lead frame 100 further includes a ring of baffles located on the outer side of the upper surface of the carrier 104, and the encapsulation shell is a cover plate 150 covering the baffles 101. The cover plate 150 and the lead frame 100 form a cavity for accommodating the first chip 110 and the second chip 120.

[0067] In some embodiments, the baffle 101 is formed on the lower surface of the cover plate 150. By attaching the lower surface of the baffle 101 to the upper surface of the lead frame 100, the cover plate 150, the baffle 101, and the lead frame 100 form a cavity for accommodating the first chip 110 and the second chip 120.

[0068] In some embodiments, both the barrier 101 and the carrier 104 are made of molding compound, and the barrier 101 and the carrier 104 are integrally formed. In some embodiments, the molding compound can be made of epoxy resin, polyimide resin, benzocyclobutene resin, or polybenzoxazole resin, and the forming process can be injection molding or transfer molding.

[0069] In some embodiments, the cover plate 150 has a first opening 152 at a position corresponding to the first metal sheet 110, and the first metal sheet 110 is embedded in the first opening 152.

[0070] In some embodiments, see Figure 8 The packaging structure also includes a prism structure 14 located on the carrier 104. The chip is a light-emitting chip, and the direction indicated by the arrow in the figure is the light emission direction of the chip. (See also...) Figure 10The cover plate 150 has a second opening 151 at the position corresponding to the prism structure; the prism structure 14 is located directly below the second opening 151; a glass sheet is embedded in the second opening 151.

[0071] Accordingly, see Figure 12 Some embodiments of the present invention also provide a method for preparing a packaging structure, including: Step S100: Provide a lead frame, the lead frame including a carrier and a first pin protruding from the carrier; Step S200: Mount the first chip onto the carrier; mount the second chip onto the upper surface of the first chip; apply adhesive to the upper surface of the first pin and the upper surface of the second chip to form a first conductive adhesive layer; Step S300: Provide a package housing, the package housing having a first opening, a first metal sheet embedded in the first opening, and the upper surface of the first metal sheet exposed outside the package housing; cover the surface of the lead frame with the package housing, and attach the two ends of the first metal sheet to the upper surface of the first pin and the upper surface of the second chip through corresponding first conductive adhesive layers, so that the first pin and the second chip form an electrical connection through the first metal sheet.

[0072] Specifically, in step S100, a lead frame 100 is provided, the lead frame 100 including a carrier 104 and a first pin 102 protruding from the carrier 104.

[0073] In some embodiments, see Figure 3 , Figure 3 (a) in the image is a top view. Figure 3 (b) is a side view of (a), showing the first pin 102 protruding from the carrier 104, such that the first pin 102 is higher than the carrier 104. In some embodiments, the specific height of the first pin 102 can be set according to the height of the subsequent chip after it is mounted on the carrier 104, so that the upper surface of the first pin 102 is flush with the upper surface of the second chip 120. In some embodiments, the upper surface of the first pin 102 is used for electrical connection with the second chip 120.

[0074] It should be noted that in this embodiment, "flush" means that the surfaces are on the same plane and allow for minor tolerances.

[0075] In some embodiments, the lead frame 100 has a plurality of first pins 102. In some embodiments, the first pins 102 are made of metal, specifically one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver. In some embodiments, the carrier 104 can be made of non-metallic materials such as plastic or ceramic. In some embodiments, the specific height of the first pins 102 can be set according to the height of the second chip after it is mounted on the carrier 104, so that the upper surface of the first pins 102 is flush with the upper surface of the second chip 120.

[0076] In some embodiments, the lead frame 100 further includes a second pin 103 protruding from the carrier 104. In some embodiments, the lead frame 100 has a plurality of second pins 103. In some embodiments, the material of the second pins 103 is metal, specifically one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver. In some embodiments, the specific height of the second pins 103 can be set according to the height of the first chip after it is subsequently mounted on the carrier 104, so that the upper surface of the second pins 103 is flush with the upper surface of the first chip.

[0077] In some embodiments, the upper surface height of the second pin 103 is lower than the upper surface height of the first pin 102. In some embodiments, there are multiple second pins 103.

[0078] In some embodiments, the lead frame 100 further includes a ring of baffles located on the outer side of the upper surface of the carrier 104. In some embodiments, both the baffles 101 and the carrier 104 are made of molding compound, and the baffles 101 and the carrier 104 are integrally formed. In some embodiments, the molding compound may be epoxy resin, polyimide resin, benzocyclobutene resin, or polybenzoxazole resin, and the forming process may be injection molding or transfer molding.

[0079] In step S200, the first chip 110 is attached to the carrier 104; and the second chip 120 is attached to the upper surface of the first chip 110.

[0080] In some embodiments, the first chip 110 and the second chip 120 may include a power chip, a logic chip, a memory chip, or an optoelectronic chip. In some embodiments, the logic chip may include a gate array, a cell substrate array, an embedded array, a structured application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a complex programmable logic device (CPLD), a central processing unit (CPU), a microprocessor unit (MPU), a microcontroller unit (MCU), a logic integrated circuit (IC), an application processor (AP), a display driver IC (DDI), a radio frequency (RF) chip, a power supply chip, or a complementary metal-oxide-semiconductor (CMOS) image sensor. In some embodiments, the memory chip may include volatile memory chips (such as dynamic random access memory (DRAM) or static RAM (SRAM) or non-volatile memory chips (such as flash memory, phase-change RAM (PRAM), magnetoresistive RAM (MRAM), ferroelectric RAM (FeRAM), or resistive RAM (ReRAM)). In a specific embodiment, the memory chip may include high-bandwidth memory (HBM) containing DRAM chips. In some embodiments, the optoelectronic chip may include a light emitting chip, such as an FP chip, a DFB chip, an EML chip, etc., or a light detection chip, such as a PIN detector chip, an APD detector chip, etc.

[0081] In some embodiments, see Figure 4 , Figure 4 (a) in the image is a top view. Figure 4 (b) in the figure is a side view of (a), where the upper surface of the first pin 102 is flush with the upper surface of the second chip 120. In some embodiments, the upper surface of the first chip 110 is an active surface, and the upper surface of the second chip 120 is an active surface.

[0082] In some embodiments, the first chip 110 is attached to the carrier 104 with a corresponding adhesive layer, and the second chip 120 is attached to the inner region of the upper surface of the first chip 110 with a corresponding adhesive layer.

[0083] In some embodiments, there is at least one second chip 120, and each second chip 120 corresponds to a plurality of the first pins 102. In some embodiments, the number of the first chips 110 and the number of the second chips 120 correspond to each other.

[0084] In some embodiments, after the step of mounting the second chip 120 onto the upper surface of the first chip 110, the method further includes: See Figure 5 , Figure 5 (a) in the image is a top view. Figure 5(b) is a side view of (a), showing the application of adhesive to the upper surface of the second pin 103 and the outer region of the upper surface of the first chip 110 to form a second conductive adhesive layer 111. In some embodiments, the upper surface of the first chip 110 is an active surface. In some embodiments, the adhesive material of the second conductive adhesive layer 111 can be silver paste or conductive epoxy resin, used for electrical connection.

[0085] See Figure 6 , Figure 6 (a) in the image is a top view. Figure 6 (b) is a side view of (a). The two ends of the second metal sheet 130 are attached to the upper surface of the second pin 103 and the outer region of the upper surface of the first chip 110 through the corresponding second conductive adhesive layer 111, so that the second pin 103 and the first chip 110 are electrically connected through the second metal sheet 130.

[0086] In some embodiments, the upper surface of the second pin 103 is flush with the upper surface of the first chip 110.

[0087] In some embodiments, there are multiple second pins 103, and the number of second metal plates 130 corresponds to the number of first chips 110.

[0088] In some embodiments, the material of the second metal sheet 130 may be one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, silver, etc.

[0089] See Figure 7 , Figure 7 (a) in the image is a top view. Figure 7 (b) is a side view of (a), showing the application of adhesive to the upper surface of the first pin 102 and the upper surface of the second chip 120 to form a first conductive adhesive layer 121. In some embodiments, the upper surface of the second chip 120 is an active surface. In some embodiments, the adhesive material of the first conductive adhesive layer 121 can be silver paste or conductive epoxy resin, used for electrical connection.

[0090] In some embodiments, see Figure 8 The prism structure 14 is placed on the carrier 104, and the direction shown by the arrow in the figure is the light emission direction of the chip.

[0091] Execute step S300, see [link / reference] Figure 9 , Figure 9 (a) in the image is a top view. Figure 9 (b) is a cross-sectional view of position AA in (a), providing an encapsulation housing, the encapsulation housing including a cover plate 150 having a first opening 152, see [reference]. Figure 10 , Figure 10 (a) in the image is a top view. Figure 10 (b) in the diagram is a cross-sectional view of position AA in (a), where the first metal sheet 140 is embedded within the first opening 152. See also... Figure 11 , Figure 11 (a) in the image is a top view. Figure 11 (b) is a side view of (a). The cover plate 150 is placed over the barrier wall 101, and the two ends of the first metal sheet 140 are attached to the upper surface of the first pin 102 and the upper surface of the second chip 120 through the corresponding first conductive adhesive layer 121. This makes the first pin 102 and the second chip 120 electrically connected through the first metal sheet 140, and also exposes the upper surface of the first metal sheet 140 to the outside of the package shell for heat dissipation.

[0092] In some embodiments, the package housing includes a cover plate and a retaining wall formed on the lower surface of the cover plate, the cover plate having a first opening, and the first metal sheet being embedded in the first opening. By attaching the lower surface of the retaining wall to the upper surface of the lead frame, the cover plate, the retaining wall, and the lead frame form a cavity for accommodating the first chip and the second chip.

[0093] In some embodiments, the number of the first metal sheet 140 and the number of the first pins 102 correspond. In some embodiments, the first metal sheet 140 may be one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, silver, etc.

[0094] In some embodiments, the upper surface of the first metal sheet 140 is an exposed surface. In some embodiments, the insulating high-temperature resistant film layer may be pre-formed on the upper surface of the first metal sheet 140 before mounting. In some embodiments, the insulating high-temperature resistant film layer material covers ceramics (such as aluminum nitride, alumina), polymers (such as polyimide), and composite materials (such as epoxy resin-based composite materials), and is widely used in electronic packaging, semiconductor equipment, aerospace thermal protection, and other scenarios. Appropriate materials need to be selected based on requirements such as thermal conductivity, insulation, temperature resistance, and mechanical strength.

[0095] In some embodiments, the first metal sheet 140 is mainly used for heat dissipation and electrical connection, and the second metal sheet 130 is mainly used for electrical connection. Therefore, the width of the second metal sheet 130 can be smaller than the width of the first metal sheet 140.

[0096] It should be noted that "exposure" in this embodiment refers to direct or indirect exposure.

[0097] In some embodiments, the upper surface of the first metal sheet 140 is an exposed surface, directly exposed to the outside of the package housing to facilitate heat dissipation. In other embodiments, the upper surface of the first metal sheet 140 is not covered by the package housing but a functional coating is permitted, specifically, the upper surface of the first metal sheet 140 is covered with the insulating high-temperature resistant film layer. The upper surface of the first metal sheet 140 is indirectly exposed to the outside of the package housing through the insulating high-temperature resistant film layer to prevent short circuits and facilitate heat dissipation.

[0098] In some embodiments, the cover plate 150 has a second opening 151 in which a glass sheet is embedded; and as Figure 8 The prism structure 14 shown is located directly below the second opening 151.

[0099] Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention by utilizing the methods and techniques disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the protection scope of the technical solutions of the present invention.

Claims

1. A packaging structure, characterized in that, include: A lead frame, the lead frame including a carrier and a first pin protruding from the carrier; The first chip is located on the carrier; The second chip is located on the upper surface of the first chip; The first conductive adhesive layer is located on the upper surface of the first pin and the upper surface of the second chip; The first metal sheet has its two ends attached to the upper surface of the first pin and the upper surface of the second chip respectively through the corresponding first conductive adhesive layer, so that the first pin and the second chip are electrically connected through the first metal sheet. A package housing covers the surface of the lead frame and forms a cavity with the lead frame to accommodate the first chip and the second chip. The package housing has a first opening, and the upper surface of the first metal sheet is exposed to the outside of the package housing through the first opening.

2. The packaging structure according to claim 1, characterized in that, The lead frame also includes a baffle wall located on the outer side of the upper surface of the carrier, and the encapsulation shell is a cover plate placed on the baffle wall. The cover plate and the lead frame form a cavity for accommodating the first chip and the second chip.

3. The packaging structure according to claim 2, characterized in that, Both the retaining wall and the carrier are made of molding compound, and the retaining wall and the carrier are integrally formed.

4. The packaging structure according to claim 1, characterized in that, The encapsulation housing includes a cover plate and a baffle formed on the lower surface of the cover plate. By attaching the lower surface of the baffle to the upper surface of the lead frame, the cover plate, the baffle, and the lead frame form a cavity for accommodating the first chip and the second chip.

5. The packaging structure according to claim 2 or 4, characterized in that, Also includes: The cover plate has a first opening at a position corresponding to the first metal sheet, and the first metal sheet is embedded in the first opening.

6. The packaging structure according to claim 5, characterized in that, Also includes: A prism structure is located on the carrier, and the cover plate and the prism structure have a second opening at a corresponding position; the prism structure is located directly below the second opening; A glass sheet, which is embedded in the second opening.

7. The packaging structure according to claim 1, characterized in that, The lead frame also includes a second pin protruding from the carrier.

8. The packaging structure according to claim 7, characterized in that, The height of the upper surface of the second pin is lower than the height of the upper surface of the first pin.

9. The packaging structure according to claim 7, characterized in that, Also includes: The second conductive adhesive layer is located on the upper surface of the second pin and in the outer region of the upper surface of the first chip. The second metal sheet has its two ends attached to the upper surface of the second pin and the outer region of the upper surface of the first chip via corresponding second conductive adhesive layers, so that the second pin and the first chip are electrically connected through the second metal sheet.

10. The packaging structure according to claim 9, characterized in that, The upper surface of the second pin is flush with the upper surface of the first chip.

11. The packaging structure according to claim 9, characterized in that, The width of the second metal sheet is smaller than the width of the first metal sheet.

12. The packaging structure according to claim 1, characterized in that, The upper surface of the first pin is flush with the upper surface of the second chip.

13. The packaging structure according to claim 1, characterized in that, The upper surface of the first metal sheet is an exposed surface.

14. The packaging structure according to claim 1, characterized in that, The upper surface of the first metal sheet is covered with an insulating high-temperature resistant film layer, and the upper surface of the metal sheet is indirectly exposed to the outside of the packaging shell through the insulating high-temperature resistant film layer.

15. The packaging structure according to claim 14, characterized in that, The upper surface of the first insulating high-temperature resistant film layer is flush with the upper surface of the encapsulation shell.

16. The packaging structure according to claim 1, characterized in that, Also includes: A heat sink is used to connect the first metal plate.

17. A method for preparing a packaging structure, characterized in that, include: A lead frame is provided, the lead frame including a carrier and a first pin protruding from the carrier; The first chip is mounted on the carrier; The second chip is attached to the upper surface of the first chip; A first conductive adhesive layer is formed by dispensing adhesive onto the upper surface of the first pin and the upper surface of the second chip. A packaging shell is provided, the packaging shell having a first opening, a first metal sheet being embedded in the first opening, and the upper surface of the first metal sheet being exposed to the outside of the packaging shell; The encapsulation shell is covered on the surface of the lead frame, and the two ends of the first metal sheet are attached to the upper surface of the first pin and the upper surface of the second chip through the corresponding first conductive adhesive layer, so that the first pin and the second chip are electrically connected through the first metal sheet.

18. The method for preparing the packaging structure according to claim 17, characterized in that, The lead frame also includes a second pin protruding from the carrier, the upper surface of the second pin being lower than the upper surface of the first pin.

19. The method for preparing the packaging structure according to claim 18, characterized in that, After the step of mounting the second chip onto the upper surface of the first chip, the method further includes: The second chip is located in the inner region of the upper surface of the first chip, and a second conductive adhesive layer is formed by dispensing adhesive onto the upper surface of the second pin and the outer region of the upper surface of the first chip. The two ends of the second metal sheet are attached to the upper surface of the second pin and the outer region of the upper surface of the first chip through the corresponding second conductive adhesive layer, so that the second pin and the first chip are electrically connected through the second metal sheet.

20. The method for preparing the packaging structure according to claim 19, characterized in that, The upper surface of the second pin is flush with the upper surface of the first chip.

21. The method for preparing the packaging structure according to claim 19, characterized in that, The width of the second metal sheet is smaller than the width of the first metal sheet.

22. The method for preparing the packaging structure according to claim 17, characterized in that, The encapsulation housing includes a cover plate and a baffle formed on the lower surface of the cover plate. The cover plate has a first opening, in which a first metal sheet is embedded. By attaching the lower surface of the baffle to the upper surface of the lead frame, the cover plate, the baffle, and the lead frame form a cavity for accommodating the first chip and the second chip.

23. The method for preparing the packaging structure according to claim 17, characterized in that, The lead frame also includes a baffle wall located on the outer side of the upper surface of the carrier. The encapsulation shell is a cover plate placed on the baffle wall. The cover plate has a first opening, in which a first metal sheet is embedded. The cover plate and the lead frame form a cavity for accommodating the first chip and the second chip.

24. The method for preparing the packaging structure according to claim 23, characterized in that, Both the retaining wall and the carrier are made of molding compound, and the retaining wall and the carrier are integrally formed.

25. The method for preparing the packaging structure according to claim 22 or 23, characterized in that, The cover plate has a second opening, in which a glass sheet is embedded.

26. The method for preparing the packaging structure according to claim 25, characterized in that, Prior to the step of covering the retaining wall with the cover plate, the following are also included: The prism structure is placed on the carrier; and when the cover plate is subsequently placed on the barrier wall, the prism structure is located directly below the second opening.

27. The method for preparing the packaging structure according to claim 18, characterized in that, The upper surface of the first pin is flush with the upper surface of the second chip.

28. The method for preparing the packaging structure according to claim 17, characterized in that, The upper surface of the first metal sheet is an exposed surface.

29. The method for preparing the packaging structure according to claim 17, characterized in that, The upper surface of the metal sheet is covered with an insulating high-temperature resistant film layer, and the upper surface of the metal sheet is indirectly exposed to the outside of the packaging shell through the insulating high-temperature resistant film layer.

30. The method for preparing the packaging structure according to claim 29, characterized in that, The upper surface of the first insulating high-temperature resistant film layer is flush with the upper surface of the encapsulation shell.

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