Power semiconductor device and method for manufacturing a power semiconductor device

By designing an auxiliary loop structure in power semiconductor devices and utilizing shielded portions and grounded auxiliary signal lines, the problems of switching speed and uniformity caused by gate inductance and electromagnetic field coupling at high switching frequencies are solved, achieving higher frequency and more uniform switching.

CN122123199APending Publication Date: 2026-05-29HITACHI ENERGY LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-25
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

At high switching frequencies, gate inductance and electromagnetic field coupling in power semiconductor devices affect switching speed and uniformity, leading to problems such as oscillation and uneven coupling commutation.

Method used

Design an auxiliary loop structure including at least two auxiliary signal lines and a shielding portion. By electrically isolating the auxiliary signal lines from the gate line and arranging them in parallel, the shielding portion is used to reduce the gate inductance, and the auxiliary signal lines are placed at ground potential or other potentials to reduce the influence of electromagnetic fields.

Benefits of technology

It effectively reduces gate inductance, increases switching frequency, achieves more uniform coupling commutation, and promotes efficient operation of power semiconductor devices.

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Abstract

A power semiconductor device (1) is provided, comprising: - a power line (16) electrically connected to a power terminal (17), and - an auxiliary loop structure (2) including: - at least two auxiliary terminals, wherein one of the at least two terminals is a gate terminal; - at least two auxiliary signal lines (3, 4), including a first auxiliary signal line and a second auxiliary signal line, wherein the first auxiliary signal line is electrically connected to the power terminal (17), and the second auxiliary signal line is a gate line (4) electrically connected to the gate terminal, and the at least two auxiliary signal lines (3, 4) are spaced apart from each other and extend at least partially parallel to each other; and - for a screen A first shielding portion (5) is provided to shield one of at least two auxiliary signal lines (3, 4) from the electromagnetic field of the power line (16). This first shielding portion is formed to be conductive, spaced apart from the shielded auxiliary signal line (4), and extends at least partially parallel to the at least two auxiliary signal lines (3, 4). Specifically, the at least two auxiliary signal lines (3, 4) at least partially overlap each other, a first surface of the shielded auxiliary signal line (3, 4) is covered by the other auxiliary signal line (3, 4), and the first shielding portion (5) at least partially overlaps with a second surface of the shielded auxiliary signal line (3, 4). Furthermore, a method for manufacturing a power semiconductor device (1) is provided.
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