Reverse connection prevention low dropout linear regulator circuit, electronic chip and vehicle-mounted system

Abstract

The reverse-connection-protected low-dropout linear regulator circuit, electronic chip, and vehicle system provided in the embodiments of this disclosure include: a first power module, a second power transistor, a reverse-connection protection module, and a drive module. The first terminal of the second power transistor is electrically connected to an input node, and the second terminal of the second power transistor and the first terminal of the first power transistor are electrically connected to a sampling node. The second terminal of the first power transistor is electrically connected to an output node. The sampling voltage of the sampling node is the maximum value between the input voltage of the input node and the output voltage of the output node. When the sampling voltage is greater than the input voltage, the reverse-connection protection module outputs the sampling voltage to the control terminal of the second power transistor, causing the second power transistor to turn off. When the sampling voltage is equal to the input voltage, a target voltage is output to the control terminal of the second power transistor based on the sampling voltage, causing the second power transistor to turn on. The target voltage is less than the sampling voltage. The drive module generates a drive signal to the control terminal of the first power transistor to realize the reverse-connection protection function of the circuit.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology and related technical fields, specifically to a low-dropout linear voltage regulator circuit, electronic chip, and vehicle system that is designed to prevent reverse connection. Background Technology

[0002] LDOs (low dropout regulators) are widely used to power precision components such as ECUs (Engine Control Units), sensors, and ADAS (Advanced Driving Assistance Systems) due to their low noise and small quiescent current. They convert the vehicle's power supply (12V / 24V / 48V) to a stable low voltage (3.3V / 5V / 1.8V, etc.). A traditional LDO consists of an input undervoltage latch and enable module, a bandgap reference module, a comparator module, a driver module, and a first power transistor.

[0003] When the power supply to the low-dropout linear regulator circuit is reversed (e.g., due to incorrect wiring during maintenance or short circuit in the wiring harness), the reverse current flows back through the parasitic diode of the first power transistor, impacting the loop regulation module and reference source of the low-dropout linear regulator circuit. This can cause the output voltage to run out of control or the low-dropout linear regulator circuit to burn out. After the low-dropout linear regulator circuit fails, it may output abnormally high voltage, burning out precision loads such as cameras in the vehicle's ADAS (Advanced Driving Assistance System) and sensors in the BMS (Battery Management System). Alternatively, it may cause the fuse to blow due to a short circuit in the output, resulting in the paralysis of the power supply branch. This can lead to sudden failure during driving and may cause serious accidents.

[0004] Therefore, there is an urgent need for a low-dropout linear voltage regulator circuit that prevents reverse connection. Summary of the Invention

[0005] The embodiments described herein provide a reverse-connection-protected low-dropout linear regulator circuit, electronic chip, and vehicle system. When the power supply to the low-dropout linear regulator circuit is reversed, a second transistor disconnects the first transistor from the input node of the low-dropout linear regulator circuit, thus solving the problems existing in the prior art.

[0006] In a first aspect, according to the present disclosure, a low-dropout linear regulator circuit with reverse connection protection is provided, including a first power module, a second power transistor, a reverse connection protection module, and a drive module. The first terminal of the second power transistor is electrically connected to an input node, the second terminal of the second power transistor and the first terminal of the first power transistor are electrically connected to a sampling node, the second terminal of the first power transistor is electrically connected to an output node, and the sampling voltage of the sampling node is the maximum value between the input voltage of the input node and the output voltage of the output node. The reverse connection protection module is configured such that when the sampled voltage is greater than the input voltage, the reverse connection protection module outputs the sampled voltage to the control terminal of the second power transistor, and the second power transistor is turned off; when the sampled voltage is equal to the input voltage, the module outputs a target voltage to the control terminal of the second power transistor, and the second power transistor is turned on, and the target voltage is less than the sampled voltage. The driving module is configured to generate a driving signal to the control terminal of the first power transistor.

[0007] In some embodiments of this disclosure, the reverse connection protection module includes a control signal generation unit, a first switch unit, and a reverse connection protection signal generation unit; The control signal generation unit is configured to determine a first control signal and output a second control signal to the reverse connection protection signal generation unit based on the input voltage and the sampled voltage when the low-dropout linear regulator circuit is in operation. The first switching unit is configured to be turned on when the first control signal is low and turned off when the first control signal is high. The reverse connection protection signal generation unit is configured to output the sampling voltage of the sampling node to turn off the second power transistor when the first switching unit is turned on, based on the second control signal, and to output a third voltage to turn on the second power transistor when the first switching unit is turned off, based on the sampling voltage of the sampling node.

[0008] In some embodiments of this disclosure, the control signal generation unit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first diode, a second diode, and a third diode. The first terminal of the first transistor is electrically connected to the input node. The second terminal of the first transistor, the first terminal of the sixth resistor, and the first terminals of the first and fourth resistors are respectively electrically connected to the first node. The control terminals of the first transistor, the second transistor, the tenth transistor, and the tenth transistor are respectively electrically connected to the sixth node. The second terminal of the sixth resistor is electrically connected to the first terminal of the first diode. The second terminal of the first diode is electrically connected to the first terminal of the second diode. The second terminal of the second diode is electrically connected to the first terminal of the third diode. The second terminal of the third diode, the second terminal of the seventh resistor, the first terminal of the second resistor, the first terminal of the third resistor, and the second terminal of the eleventh transistor are respectively electrically connected to the second node. The first terminal of the second transistor is electrically connected to the sampling node. The second terminal of the transistor, the first terminal of the seventh resistor, and the first terminal of the eleventh transistor are electrically connected. The second terminal of the third resistor is electrically connected to the first terminal of the fifth transistor. The second terminal of the fifth transistor, the control terminal of the fifth transistor, and the control terminal of the sixth transistor are respectively electrically connected to the third node. The second terminal of the fourth resistor is electrically connected to the first terminal of the sixth transistor. The second terminal of the sixth transistor, the first terminal of the seventh transistor, and the control terminal of the eleventh transistor are respectively electrically connected to the fourth node. The second terminal of the seventh transistor is electrically connected to the first terminal of the fifth resistor. The second terminal of the fifth resistor is electrically connected to the ground node. The control terminal of the seventh transistor and the second terminal of the fourth transistor are respectively electrically connected to the fifth node. The first terminal of the fourth transistor is electrically connected to the second terminal of the second resistor. The control terminal of the fourth transistor, the control terminal of the third transistor, and the second terminal of the third transistor are electrically connected. The first terminal of the third transistor is electrically connected to the second terminal of the first resistor. The first terminal of the eighth transistor is electrically connected to the sampling node. The control terminal of the eighth transistor, the second terminal of the eighth transistor, and the first terminal of the ninth transistor are electrically connected. The control terminal of the ninth transistor, the second terminal of the ninth transistor, and the first terminal of the tenth transistor are electrically connected.

[0009] In some embodiments of this disclosure, the first switching unit includes a twelfth transistor, the control terminal of the twelfth transistor receives a first control signal, the first terminal of the twelfth transistor is electrically connected to a sampling node, and the second terminal of the twelfth transistor is electrically connected to the reverse connection protection signal generation unit.

[0010] In some embodiments of this disclosure, the reverse connection protection signal generation unit includes a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, and an eighth resistor. The first terminal of the thirteenth transistor and the second terminal of the eighth resistor are electrically connected to the second terminal of the twelfth transistor. The first terminal of the eighth resistor is electrically connected to a sampling node. The second terminal of the thirteenth transistor is electrically connected to the first terminal of the fourteenth transistor. The second terminal of the fourteenth transistor is electrically connected to the first terminal of the fifteenth transistor and the control terminal of the fifteenth transistor, respectively. The second terminal of the fifteenth transistor is electrically connected to a ground node. The control terminal of the thirteenth transistor is electrically connected to a sixth node. The control terminal of the fourteenth transistor receives a second control signal.

[0011] In some embodiments of this disclosure, the reverse connection protection module further includes a second switching unit; The control signal generation unit is further configured to generate a third control signal to the second switching unit when the low-dropout linear regulator circuit is in a non-operating state. The second switching unit is configured to turn on when a third control signal is received; The reverse connection protection signal generation unit is configured to output the sampling voltage when the second switching unit is turned on, so as to turn off the second power transistor.

[0012] In some embodiments of this disclosure, the second switching unit includes a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, and a nineteenth transistor. The first terminals of the sixteenth transistor, the seventeenth transistor, the eighteenth transistor, and the nineteenth transistor are electrically connected to a sampling node, respectively. The second terminal of the sixteenth transistor is electrically connected to a fourth node. The second terminal of the seventeenth transistor is electrically connected to the second terminal of the twelfth transistor. The second terminal of the eighteenth transistor is electrically connected to the second terminal of the third transistor. The second terminal of the nineteenth transistor is electrically connected to a third node.

[0013] In some embodiments of this disclosure, the reverse connection protection module further includes a current signal generation unit; The current signal generation unit is configured to generate a first current, a second current, a third current and a fourth current to the control signal generation unit according to the reference current, and to generate a fifth current to the reverse connection protection signal generation unit.

[0014] Secondly, according to the present disclosure, an electronic chip is provided, including the circuit described in any one of the first aspects.

[0015] Thirdly, according to the present disclosure, an in-vehicle system is provided, including the electronic chip described in the second aspect.

[0016] The reverse-connection-protected low-dropout linear regulator circuit, electronic chip, and vehicle system provided in this disclosure, by adding a second power transistor and a reverse-connection protection module to the low-dropout linear regulator circuit, prevents reverse current from flowing back through the parasitic diode of the first power transistor and impacting the loop regulation module of the low-dropout linear regulator circuit when the sampling voltage of the sampling node connected to the first terminal of the first power transistor and the second terminal of the second power transistor is greater than the input voltage of the input node. At this time, the gate-source and source voltages of the second power transistor are the same, and the second power transistor is cut off. This avoids reverse current flowing back through the parasitic diode of the first power transistor when the power supply to the low-dropout linear regulator circuit is reversed, thus preventing the loop regulation module of the low-dropout linear regulator circuit from being impacted. The reference source of the low dropout linear regulator circuit: When the sampling voltage of the sampling node connected to the first terminal of the first power transistor and the second terminal of the second power transistor is less than the input voltage of the input node, the target voltage is generated by the reverse connection protection module. At this time, the source terminal voltage of the second power transistor is the sampling voltage, and the gate terminal voltage of the second power transistor is the target voltage. Since the target voltage is less than the sampling voltage, the second power transistor is turned on, and the source terminal of the first power transistor is electrically connected to the input node through the second power transistor. At this time, the low dropout linear regulator circuit works normally. The drive module generates a drive signal to the gate terminal of the first power transistor. By controlling the first power transistor to turn on, the input voltage is converted into a stable low voltage and output.

[0017] The above description is merely an overview of the technical solutions of the embodiments of this application. In order to better understand the technical means of the embodiments of this application and to implement them in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the embodiments of this application more obvious and understandable, specific implementation methods of this application are described below. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. It should be understood that the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure, wherein: Figure 1 This is a schematic diagram of a low-dropout linear voltage regulator circuit with reverse polarity protection provided in an embodiment of this disclosure; Figure 2 This is a schematic diagram of the structure of an anti-reverse connection module provided in an embodiment of this disclosure.

[0019] In the accompanying diagram, markers with the same last two digits correspond to the same elements. It should be noted that the elements in the diagram are schematic and not drawn to scale. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.

[0021] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the specification and in the relevant art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, the statement of “connecting” or “coupling” two or more parts together shall mean that these parts are directly joined together or joined through one or more intermediate components.

[0022] The term "embodiment" as used herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of the phrase "embodiment" in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0023] In this article, the term "and" simply describes the relationship between related objects, indicating that there can be three relationships. For example, A and B can represent three possibilities: A exists, A and B exist simultaneously, and B exists. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0024] Furthermore, in all embodiments of this disclosure, terms such as “first” and “second” are used only to distinguish one component (or part of a component) from another component (or another part of a component).

[0025] In the description of this application, unless otherwise stated, "multiple" means two or more (including two), and similarly, "multiple groups" means two or more (including two groups).

[0026] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings.

[0027] In view of the problems existing in the prior art, this disclosure provides a low dropout linear voltage regulator circuit that prevents reverse connection. Figure 1 This is a schematic diagram of a low-dropout linear regulated voltage with reverse polarity protection provided in an embodiment of this disclosure, as shown below. Figure 1 As shown, the reverse-connection-protected low-dropout linear regulated voltage includes: a first power module Mp1, a second power transistor Mp2, a reverse-connection protection module 10, and a drive module 20. The first terminal of the second power transistor Mp1 is electrically connected to the input node, the second terminal of the second power transistor Mp2 and the first terminal of the first power transistor Mp1 are electrically connected to the sampling node, and the second terminal of the first power transistor Mp1 is electrically connected to the output node. The sampling voltage of the sampling node is the maximum value between the input voltage of the input node and the output voltage of the output node. The reverse-connection protection module 10 is configured to output the sampling voltage VINT to the control terminal of the second power transistor Mp2 when the sampling voltage VINT is greater than the input voltage VIN, and the second power transistor Mp2 is turned off. When the sampling voltage VINT is equal to the input voltage VIN, the target voltage is output to the control terminal of the second power transistor Mp2 according to the sampling voltage VINT, and the second power transistor Mp2 is turned on, and the target voltage is less than the sampling voltage. The drive module 20 is configured to generate a drive signal to the control terminal of the first power transistor Mp1.

[0028] It should be noted that, Figure 1 In this embodiment, the circuit structures corresponding to the input undervoltage lockout and enable module, the drive module, the comparison module, and the bandgap reference module are existing circuit structures, and this embodiment will not provide specific descriptions of them.

[0029] To address the problems existing in the prior art, this embodiment adds a second power transistor Mp2 and a reverse connection protection module 10 to the low-dropout linear regulator circuit. When the sampling voltage VINT of the sampling node connected to the first terminal of the first power transistor Mp1 and the second terminal of the second power transistor Mp2 is greater than the input voltage VIN of the input node, the reverse connection protection module 10 outputs the sampling voltage VINT of the sampling node to the control terminal of the second power transistor Mp2. At this time, the gate-source and source voltages of the second power transistor Mp2 are the same, the second power transistor Mp2 is turned off, and the gate terminal of the first power transistor Mp1 is disconnected from the input node. This avoids reverse current flowing back through the parasitic diode of the first power transistor Mp1 when the power supply of the low-dropout linear regulator circuit is reversed, thus preventing the loop regulation module of the low-dropout linear regulator circuit from being impacted. The reference source of the low-dropout linear regulator circuit; when the sampling voltage VINT of the sampling node connected to the first terminal of the first power transistor Mp1 and the second terminal of the second power transistor Mp2 is approximately equal to the input voltage VIN of the input node, the target voltage is generated by the reverse connection protection module 10. At this time, the source terminal voltage of the second power transistor Mp2 is the sampling voltage, and the gate terminal voltage of the second power transistor Mp2 is the target voltage. Since the target voltage is less than the sampling voltage, the second power transistor Mp2 is turned on, and the source terminal of the first power transistor Mp1 is electrically connected to the input node through the second power transistor Mp2. At this time, the low-dropout linear regulator circuit works normally, and the drive module 20 generates a drive signal to the control terminal of the first power transistor Mp1, which converts the input voltage of the input node into a stable low voltage and outputs it through the first power transistor Mp1.

[0030] The reverse-connection-protected low-dropout linear regulator circuit provided in this embodiment adds a second power transistor and a reverse-connection protection module to the low-dropout linear regulator circuit. When the sampling voltage of the sampling node connected to the first terminal of the first power transistor and the second terminal of the second power transistor is greater than the input voltage of the input node, the reverse-connection protection module outputs the sampling voltage of the sampling node to the control terminal of the second power transistor. At this time, the gate-source and source-terminal voltages of the second power transistor are the same, the second power transistor is cut off, and the gate terminal of the first power transistor is disconnected from the input node. This avoids reverse current flowing back through the parasitic diode of the first power transistor and impacting the low-dropout linear regulator circuit when the power supply is reversed. The loop regulation module and the reference source of the low dropout linear regulator circuit; when the sampling voltage of the sampling node connected to the first terminal of the first power transistor and the second terminal of the second power transistor is less than the input voltage of the input node, the reverse connection protection module generates a target voltage. At this time, the source terminal voltage of the second power transistor is the sampling voltage, and the gate terminal voltage of the second power transistor is the target voltage. Since the target voltage is less than the sampling voltage, the second power transistor is turned on, and the source terminal of the first power transistor is electrically connected to the input node through the second power transistor. At this time, the low dropout linear regulator circuit works normally, and the drive module generates a drive signal to the gate terminal of the first power transistor, which converts the input voltage into a stable low voltage and outputs it.

[0031] Based on the above embodiments, the reverse connection protection module 10 in the low dropout linear regulator circuit provided in this disclosure includes a control signal generation unit, a first switching unit, and a reverse connection protection signal generation unit. The control signal generation unit is configured to determine a first control signal based on the input voltage and the sampled voltage, and output a second control signal EN_OK1 to the reverse connection protection signal generation unit when the low dropout linear regulator circuit is in operation. The first switching unit is configured to be turned on when the first control signal is low and turned off when the first control signal is high. The reverse connection protection signal generation unit is configured to output the sampled voltage of the sampling node to turn off the second power transistor when the first switching unit is turned on, based on the second control signal, and to output a third voltage to turn on the second power transistor when the first switching unit is turned off.

[0032] Specifically, the control signal generation unit receives the input voltage of the input node and the sampling voltage of the sampling node, and determines the first control signal based on the input voltage of the input node and the sampling voltage of the sampling node.

[0033] As a specific example, since the sampling voltage is the maximum value between the input voltage and the output voltage, when the sampling voltage is greater than the input voltage, it indicates that the output voltage is less than or greater than the input voltage. At this time, there is a situation where the power supply of the low-dropout linear regulator circuit is reversed. Therefore, the first control signal generated by the control signal generation unit is low level. When the sampling voltage is approximately equal to the input voltage, it indicates that the output voltage is less than the input voltage. At this time, the power supply of the low-dropout linear regulator circuit is normally connected. Therefore, the first control signal generated by the control signal generation unit is high level.

[0034] When the first switching unit receives a low level, the first switching unit is turned on; when the first switching unit receives a high level, the first switching unit is turned off.

[0035] When the first switching unit is turned on, the reverse connection protection signal generation unit outputs the sampling voltage of the sampling node to the control terminal of the second power transistor. When the first switching unit is turned off, the reverse connection protection signal generation unit outputs the target voltage (the target voltage is less than the sampling voltage) to the control terminal of the second power transistor. Since the source terminal of the second power transistor is electrically connected to the sampling node, when the reverse connection protection signal generation unit outputs the sampling voltage to the control terminal of the second power transistor, the gate-source voltage of the second power transistor is the same, and the second power transistor is turned off. When the reverse connection protection signal generation unit outputs the target voltage to the control terminal of the second power transistor, the gate-source voltage of the second power transistor is the difference between the sampling voltage and the target voltage, and the second power transistor is turned on.

[0036] When the gate voltage and source voltage of the second power transistor are the same, the second power transistor is turned off. The off state of the second power transistor prevents reverse current from flowing back through the parasitic diode of the first power transistor when the power supply of the low dropout linear regulator circuit is reversed, thus avoiding impact on the loop regulation module and the reference source of the low dropout linear regulator circuit. When the gate voltage of the second power transistor is less than the source voltage, the second power transistor is turned on, and the source terminal of the first power transistor is electrically connected to the input node through the second power transistor. At this time, the low dropout linear regulator circuit works normally, and the drive module generates a drive signal to the control terminal of the first power transistor, which converts the input voltage into a stable low voltage and outputs it.

[0037] Based on the above embodiments, Figure 2 This is a schematic diagram of the circuit structure of a reverse connection protection module provided in an embodiment of this disclosure, as shown below. Figure 2As shown, the control signal generation unit includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a first diode D1, a second diode D2, and a third diode D3. The first terminal of the first transistor M1 is electrically connected to the input node. The second terminal of the first transistor M1, the first terminal of the sixth resistor R6, the first terminal of the first resistor R1, and the fourth resistor R4 are also connected. The first terminal of each transistor is electrically connected to the first node N1. The control terminals of the first transistor M1, the second transistor M2, and the tenth transistor M10, and the second terminal of the tenth transistor M10 are electrically connected to the sixth node N6. The second terminal of the sixth resistor R6 is electrically connected to the first terminal of the first diode D1. The second terminal of the first diode D1 is electrically connected to the first terminal of the second diode D2. The second terminal of the second diode D2 is electrically connected to the first terminal of the third diode D3. The second terminal of the third diode D3, the second terminal of the seventh resistor R7, the first terminal of the second resistor R2, the first terminal of the third resistor R3, and the second terminal of the eleventh transistor M11 are electrically connected to the second node N2. The second transistor M2... The first terminal is electrically connected to the sampling node. The second terminal of the second transistor M2, the first terminal of the seventh resistor R7, and the first terminal of the eleventh transistor M11 are electrically connected. The second terminal of the third resistor R3 is electrically connected to the first terminal of the fifth transistor M5. The second terminal of the fifth transistor M5, the control terminal of the fifth transistor M5, and the control terminal of the sixth transistor M6 are respectively electrically connected to the third node N3. The second terminal of the fourth resistor R4 is electrically connected to the first terminal of the sixth transistor M6. The second terminal of the sixth transistor M6, the first terminal of the seventh transistor M7, and the control terminal of the eleventh transistor M11 are respectively electrically connected to the fourth node N4. The second terminal of the seventh transistor M7 is electrically connected to the first terminal of the fifth resistor R5. The first terminal of the fifth resistor R5 is electrically connected to the sampling node. Two terminals are electrically connected to the ground node. The control terminal of the seventh transistor M7 and the second terminal of the fourth transistor M4 are electrically connected to the fifth node N5 respectively. The first terminal of the fourth transistor M4 is electrically connected to the second terminal of the second resistor R2. The control terminal of the fourth transistor M4, the control terminal of the third transistor M3, and the second terminal of the third transistor M3 are electrically connected. The first terminal of the third transistor M3 is electrically connected to the second terminal of the first resistor R1. The first terminal of the eighth transistor M8 is electrically connected to the sampling node. The control terminal of the eighth transistor M8, the second terminal of the eighth transistor M8, and the first terminal of the ninth transistor M9 are electrically connected. The control terminal of the ninth transistor M9, the second terminal of the ninth transistor M9, and the first terminal of the tenth transistor M10 are electrically connected.

[0038] The first switching unit includes a twelfth transistor M12. The control terminal of the twelfth transistor M12 receives a first control signal. The first terminal of the twelfth transistor M12 is electrically connected to the sampling node, and the second terminal of the twelfth transistor M12 is electrically connected to the reverse connection protection signal generation unit.

[0039] The reverse connection protection signal generation unit includes a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, and an eighth resistor R8. The first terminal of the thirteenth transistor M13 and the second terminal of the eighth resistor R8 are electrically connected to the second terminal of the twelfth transistor M12. The first terminal of the eighth resistor R8 is electrically connected to the sampling node. The second terminal of the thirteenth transistor M13 is electrically connected to the first terminal of the fourteenth transistor M14. The second terminal of the fourteenth transistor M14 is electrically connected to the first terminal of the fifteenth transistor M15 and the control terminal of the fifteenth transistor M15, respectively. The second terminal of the fifteenth transistor M15 is electrically connected to the ground node. The control terminal of the thirteenth transistor M13 is electrically connected to the sixth node N6. The control terminal of the fourteenth transistor M14 receives the second control signal.

[0040] Specifically, in combination Figure 2 The voltage at the sixth node N6 satisfies: VF=VINT-(Vgs,M8+Vgs,M9+Vgs,M10) The gate-source voltage of the second transistor satisfies: Vgs,M2=VINT–VF=Vgs,M8+Vgs,M9+Vgs,M10 The gate-source voltage of the first transistor satisfies: Vgs,M1=VIN–VF=VIN-VINT+Vgs,M8+Vgs,M9+Vgs,M10 In the above formula, VIN is the input voltage of the input node, VINT is the sampling voltage of the sampling node, Vgs,M8 is the gate-source voltage of the eighth transistor, Vgs,M9 is the gate-source voltage of the ninth transistor, and Vgs,M10 is the gate-source voltage of the tenth transistor.

[0041] Given the fourth current, the gate-source voltages of the eighth, ninth, and tenth transistors can be obtained based on the relationship between the transistor's gate-source voltage and current. Specifically, the relationship between the transistor's gate-source voltage and current satisfies:

[0042] in, The aspect ratio of the transistor. This is the threshold voltage of the transistor. The current flowing through the transistor, It is a constant.

[0043] In one case, the gate-source voltage of the first transistor is less than the threshold voltage, that is, VIN-VINT+Vgs,M8+Vgs,M9+Vgs,M10<Vth,M1, the first transistor M1 is turned off, and at this time, the voltage VA of the first node is ≈0.

[0044] The voltage at the second node satisfies: VB = VINT - Vds, M2 Among them, the resistance of the seventh resistor is relatively small, and the on-state voltage drop of the seventh resistor can be ignored.

[0045] The voltage at the third node satisfies: VC=VB-I3 R3-Vgs,M5 The gate-source voltage Vgs,M6 of the sixth transistor is equal to VA - I3. Since the voltage VA≈0 at the first node, the sixth transistor M6 must be cut off at this time.

[0046] With the first transistor M1 and the sixth transistor M6 turned off, the voltage at the fifth node satisfies: VE=VB-I2 R2-Vds,M4=VINT-I2 R2-Vds, M2-Vds, M4 Since the voltage of the first node is 0, the third transistor M3 is turned off. Given the second current I2, the current flowing through the fourth transistor M4 and the second transistor M2 is the second current I2. Based on the relationship between the gate-source voltage and the current of the transistors, the gate-source voltages of the second transistor M2 and the fourth transistor M4 can be calculated. Similarly, based on the relationship between the drain-source voltage and the gate-source voltage and the current of the transistors, the drain-source voltages of the second transistor M2 and the fourth transistor M4 can be calculated. After calculating the gate-source voltages of the second transistor M2 and the fourth transistor M4, the voltage of the fifth node N5 can be determined. Since the voltage of the fifth node N5 is greater than the threshold voltage of the seventh transistor, the seventh transistor M7 is turned on.

[0047] The relationship between the drain-source voltage and the gate-source voltage and current of the transistor satisfies:

[0048] in, This is the drain-source voltage of the transistor. This is the gate-source voltage of the transistor. The aspect ratio of the transistor. This is the threshold voltage of the transistor. The current flowing through the transistor, It is a constant.

[0049] By combining the relationship between the gate-source voltage and current of the transistors and the fourth current, the gate-source voltages of the second transistor M2 and the fourth transistor M4 can be determined. Furthermore, based on the relationship between the drain-source voltage and the gate-source voltage and current of the transistors, as well as the gate-source voltages of the second transistor M2 and the fourth transistor M4 and the fourth current I2, the drain-source voltages of the second transistor M2 and the fourth transistor M4 can be obtained.

[0050] When the seventh transistor M7 is turned on, the voltage VD≈0 at the fourth node N4, and the twelfth transistor M12 is turned on. The voltage output from the reverse connection protection module to the control terminal of the second power transistor Mp2 is the sampling voltage, that is, VO=VINT. At this time, the second power transistor Mp2 is turned off, and the reverse current of the first power transistor Mp1 is 0, thus achieving reverse connection protection.

[0051] In another scenario, the gate-source voltage of the first transistor is greater than or equal to the threshold voltage, i.e., VIN - VINT + Vgs, M8 + Vgs, M9 + Vgs, M10 > Vth, M1. The first transistor M1 is turned on. At this point, it is necessary to compare the magnitudes of the sixth current I6 and the seventh current I7 associated with the fourth node N4 to determine the voltage signal at the fourth node N4. When the sixth current I6 is greater than the seventh current I7, the fourth node N4 is at a high level, the twelfth transistor M12 is turned off, and the voltage output from the reverse connection protection module to the control terminal of the second power transistor Mp2 is the target voltage, i.e., VO = VINT - I5. When the sixth current I6 is less than the seventh current I7, the fourth node N4 is at a low level, the twelfth transistor M12 is turned on, and the voltage output from the reverse connection protection module to the control terminal of the second power transistor Mp2 is the sampling voltage, that is, VO=VINT.

[0052] Specifically, in combination Figure 2 The voltage at the first node satisfies: VA = VIN - Vds,M1; the voltage at the second node satisfies: VB = Vint - Vds,M2; and the voltage at the third node satisfies: VC = VB - I3. R3-Vgs,M5=VINT-Vds,M2-I3 R3-Vgs,M5, the gate-source voltage of the sixth transistor satisfies: Vgs,M6=VA-I6 R4-VC=VIN-Vds,M1-I6 R4-VINT+Vds,M2+ I3 R3+Vgs,M5≈VIN-Vds,M1-VINT+Vds,M2+Vgs,M5 (the on-state voltage drop of the third and sixth resistors is negligible). When the width-to-length ratio W / L of the first transistor M1 and the second transistor M2 is the same, and the first current I1 in the branch where the first transistor is located and the second current I2 in the branch where the second transistor is located are the same, the drain-source voltage of the first transistor and the drain-source voltage of the second transistor are the same, Vds,M1=Vds,M2. At this time, the gate-source voltage of the sixth transistor satisfies: Vgs,M6≈VIN-VINT+Vgs,M5.

[0053] The voltage at the fifth node is the same as the drain voltage of the fourth transistor, and the gate voltage of the fourth transistor satisfies the same condition as the gate voltage of the third transistor: Vg,M4=Vg,M3=VIN-Vds,M1-I1 Based on the gate voltage and gate-source voltage of the fourth transistor, the source voltage of the fourth transistor can be determined as: Vs,M4 = Vgs,M4 - Vg,M2 = ​​Vgs,M4 - VIN + Vds,M1 + I1 R1+Vgs,M2≈Vgs,M4-VIN+I1 R1+Vgs,M2, In addition, the source voltage of the fourth transistor also satisfies: Vs,M4=VINT-I R2, using the above formula, can be used to calculate the gate-source voltage of the fourth transistor and the current I flowing through the fourth transistor. Then, based on the gate-source voltage of the fourth transistor, the drain-source voltage of the fourth transistor can be determined. Furthermore, based on the drain-source voltage and the source voltage of the fourth transistor, the drain voltage of the fourth transistor can be determined.

[0054] It should be noted that in the above embodiments, the drain-source voltage of the first transistor can be ignored when the first transistor is in the on state.

[0055] After determining the current flowing through the fourth transistor, when the current flowing through the fourth transistor is less than the second current, since the first current is the same as the second current, it can be determined that the input voltage of the input node is greater than the sampling voltage of the sampling node. At this time, the gate terminal of the seventh transistor is electrically connected to the ground node, the seventh transistor is turned off, and the control terminal of the twelfth transistor receives a high level, the twelfth transistor is turned off. When the current flowing through the fourth transistor is greater than the second current, the gate-source voltage of the seventh transistor is determined based on the drain voltage of the fourth transistor, which is also the voltage of the fifth node. Based on the gate-source voltage of the seventh transistor, the seventh current flowing through the seventh transistor is determined. Based on the gate-source voltage of the sixth transistor, the sixth current flowing through the sixth transistor is determined. Then, by comparing the magnitudes of the sixth current and the seventh current, the on / off state of the twelfth transistor is determined.

[0056] When the sixth current is less than the seventh current, the control terminal of the twelfth transistor receives a low level, and the twelfth transistor is turned on. The voltage output from the reverse connection protection module to the control terminal of the second power transistor is the sampling voltage, that is, VO=VINT. At this time, the second power transistor is turned off. The turn-off state of the second power transistor prevents the reverse current from flowing back through the parasitic diode of the first power transistor when the power supply of the low dropout linear regulator circuit is reversed, thus avoiding impacting the loop regulation module of the low dropout linear regulator circuit and the reference source of the low dropout linear regulator circuit.

[0057] When the sixth current is greater than the seventh current, the control terminal of the twelfth transistor receives a high level, the twelfth transistor is turned off, and the voltage output from the reverse connection protection module to the control terminal of the second power transistor satisfies: VO = VINT - I5 With R8, the gate-source voltage of the second power transistor is less than the source voltage, so the second power transistor is turned on. The gate terminal of the first power transistor is electrically connected to the input node through the second power transistor. At this time, the low dropout linear regulator circuit works normally. The drive module generates a drive signal to the control terminal of the first power transistor, and the first power transistor converts the input voltage into a stable low voltage and outputs it.

[0058] It should be noted that in the above embodiment, the gate-source voltage of the fifth transistor can be obtained when the third current is known. After obtaining the gate-source voltage of the fifth transistor, the gate-source voltage of the sixth transistor can be determined, and then the sixth current flowing through the sixth transistor can be determined based on the gate-source voltage of the sixth transistor.

[0059] Given the first current, the gate-source voltage of the third transistor can be determined, and then the gate voltages of the third and fourth transistors can be determined. The source voltage of the fourth transistor is determined based on the sampling node, the current flowing through the fourth transistor, and the second resistor. Given the second resistor, the current flowing through the fourth transistor can be calculated. Given the second current, the relationship between the current flowing through the fourth transistor and the second current can be determined, and then the voltage of the fifth node can be determined.

[0060] Furthermore, it should be further explained that in the above embodiment, the functions of the sixth resistor R6, the first diode D1, the second diode D2, and the third diode D3 are, on the one hand, to ensure that the voltage difference between the first node N1 and the second node N2 does not exceed the forward voltage drop of the three diodes, and on the other hand, to avoid reverse current between the first node N1 and the second node N2.

[0061] The function of the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 is to ensure that the voltage of the sixth node N6 is low enough.

[0062] Based on the above embodiments, continue to combine Figure 2The reverse connection protection module also includes a second switching unit; a control signal generation unit, further configured to generate a third control signal to the second switching unit when the low-dropout linear regulator circuit is in a non-operating state; the second switching unit, configured to turn on upon receiving the third control signal; and a reverse connection protection signal generation unit, configured to output a sampling voltage when the second switching unit is on, so as to turn off the second power transistor. The second switching unit includes a sixteenth transistor M16, a seventeenth transistor M17, an eighteenth transistor M18, and a nineteenth transistor M19. The first terminals of the sixteenth transistor M16, the seventeenth transistor M17, the eighteenth transistor M18, and the nineteenth transistor M19 are electrically connected to the sampling node, respectively. The second terminal of the sixteenth transistor M16 is electrically connected to the fourth node N4, the second terminal of the seventeenth transistor M17 is electrically connected to the second terminal of the twelfth transistor M12, the second terminal of the eighteenth transistor M18 is electrically connected to the second terminal of the third transistor M3, and the second terminal of the nineteenth transistor M19 is electrically connected to the third node.

[0063] After the control signal generation unit determines the first control signal acting on the first switching unit, the first switching unit controls the twelfth transistor M12 to turn on or off according to the first control signal generated by the control signal generation unit. When the twelfth transistor M12 is on, the second control signal generated by the control signal generation unit controls the fourteenth transistor M14 of the reverse connection protection signal generation unit to turn off, reducing circuit power consumption. When the twelfth transistor M12 is off, the second control signal generated by the control signal generation unit controls the fourteenth transistor M14 of the reverse connection protection signal generation unit to turn on, clamping the voltage of the sixth node N6 through the fifteenth transistor M15.

[0064] Specifically, in combination Figure 2 The reverse connection protection module also includes a second switching unit. When the low-dropout linear regulator circuit is not in operation, a third control signal EN_OK2 is generated to the second switching unit. Under the action of the third control signal, the seventeenth transistor M17 is turned on. At this time, the voltage output by the reverse connection protection module to the control terminal of the second power transistor is the sampling voltage, that is, VO=VINT. At this time, the second power transistor Mp2 is turned off, and the reverse current of the first power transistor Mp1 is 0, thus realizing reverse connection protection.

[0065] In addition, the second switching unit also includes the sixteenth transistor M16, the eighteenth transistor M18, and the nineteenth transistor M19. The function of the sixteenth transistor M16, the eighteenth transistor M18, and the nineteenth transistor M19 is to set the initial state, that is, to ensure that the drain voltage of the fourth node N4, the third node N3, and the third transistor M3 is the sampling voltage of the sampling node.

[0066] Furthermore, based on the above embodiments, the following combinations are further developed. Figure 2 The reverse connection protection module also includes a current signal generation unit; the current signal generation unit is configured to generate a first current, a second current, a third current and a fourth current to the control signal generation unit according to the reference current, and to generate a fifth current to the reverse connection protection signal generation unit.

[0067] By setting up a current signal generation unit, the current signal generation unit provides current signals for different branches.

[0068] It should be noted that, Figure 2 An exemplary current signal generation unit includes a twentieth transistor M20, a twenty-first transistor M21, a twenty-second transistor M22, a twenty-third transistor M23, a twenty-fourth transistor M24, a twenty-fifth transistor M25, a twenty-sixth transistor M26, a twenty-seventh transistor M27, a twenty-eighth transistor M28, and a twenty-ninth transistor M29. A first current I1 is generated based on the twentieth transistor M20 and the twenty-first transistor M21; a second current I2 is generated based on the twenty-second transistor M22 and the twenty-third transistor M23; a third current I3 is generated based on the twenty-fourth transistor M24 and the twenty-fifth transistor M25; a fourth current I4 is generated based on the twenty-sixth transistor M26 and the twenty-seventh transistor M27; and a fifth current I5 is generated based on the twenty-eighth transistor M28 and the twenty-ninth transistor M29. The current signal generation unit can also be other circuit structures, but this functional embodiment does not specifically limit or describe them.

[0069] This application also provides an electronic chip, including the circuit described in any of the above embodiments, which has the beneficial effects described in any of the above embodiments. This disclosure does not provide specific details on this aspect.

[0070] This application also provides an in-vehicle system, including the electronic chip described in any of the above embodiments, which has the beneficial effects described in any of the above embodiments. This disclosure does not provide specific details on this aspect.

[0071] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” shall be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” shall be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, particularly when it follows a set of terms, the “example” is merely exemplary and illustrative and should not be considered exclusive or extensive.

[0072] Further aspects and scope of adaptation become apparent from the description provided herein. It should be understood that various aspects of this application may be implemented individually or in combination with one or more other aspects. It should also be understood that the descriptions and specific embodiments herein are for illustrative purposes only and are not intended to limit the scope of this application.

[0073] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.

Claims

1. A low-dropout linear voltage regulator circuit with reverse polarity protection, characterized in that, It includes a first power module, a second power transistor, a reverse connection protection module, and a drive module. The first end of the second power transistor is electrically connected to the input node, the second end of the second power transistor and the first end of the first power transistor are electrically connected to the sampling node, and the second end of the first power transistor is electrically connected to the output node. The sampling voltage of the sampling node is the maximum value between the input voltage of the input node and the output voltage of the output node. The reverse connection protection module is configured such that when the sampled voltage is greater than the input voltage, the reverse connection protection module outputs the sampled voltage to the control terminal of the second power transistor, and the second power transistor is turned off; when the sampled voltage is equal to the input voltage, the module outputs a target voltage to the control terminal of the second power transistor, and the second power transistor is turned on, and the target voltage is less than the sampled voltage. The driving module is configured to generate a driving signal to the control terminal of the first power transistor.

2. The circuit according to claim 1, characterized in that, The reverse connection protection module includes a control signal generation unit, a first switch unit, and a reverse connection protection signal generation unit. The control signal generation unit is configured to determine a first control signal and output a second control signal to the reverse connection protection signal generation unit based on the input voltage and the sampled voltage when the low-dropout linear regulator circuit is in operation. The first switching unit is configured to be turned on when the first control signal is low and turned off when the first control signal is high. The reverse connection protection signal generation unit is configured to output the sampling voltage of the sampling node to turn off the second power transistor when the first switching unit is turned on, based on the second control signal, and to output a third voltage to turn on the second power transistor when the first switching unit is turned off, based on the sampling voltage of the sampling node.

3. The circuit according to claim 2, characterized in that, The control signal generation unit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first diode, a second diode, and a third diode. The first terminal of the first transistor is electrically connected to the input node. The second terminal of the first transistor, the first terminal of the sixth resistor, and the first terminals of the first and fourth resistors are respectively electrically connected to the first node. The control terminals of the first transistor, the second transistor, the tenth transistor, and the tenth transistor are respectively electrically connected to the sixth node. The second terminal of the sixth resistor is electrically connected to the first terminal of the first diode. The second terminal of the first diode is electrically connected to the first terminal of the second diode. The second terminal of the second diode is electrically connected to the first terminal of the third diode. The second terminal of the third diode, the second terminal of the seventh resistor, the first terminal of the second resistor, the first terminal of the third resistor, and the second terminal of the eleventh transistor are respectively electrically connected to the second node. The first terminal of the second transistor is electrically connected to the sampling node. The first terminal of the seventh resistor and the first terminal of the eleventh transistor are electrically connected. The second terminal of the third resistor is electrically connected to the first terminal of the fifth transistor. The second terminal of the fifth transistor, the control terminal of the fifth transistor, and the control terminal of the sixth transistor are respectively electrically connected to the third node. The second terminal of the fourth resistor is electrically connected to the first terminal of the sixth transistor. The second terminal of the sixth transistor, the first terminal of the seventh transistor, and the control terminal of the eleventh transistor are respectively electrically connected to the fourth node. The second terminal of the seventh transistor is electrically connected to the first terminal of the fifth resistor. The second terminal of the fifth resistor is electrically connected to the ground node. The control terminal of the seventh transistor and the second terminal of the fourth transistor are respectively electrically connected to the fifth node. The first terminal of the fourth transistor is electrically connected to the second terminal of the second resistor. The control terminal of the fourth transistor, the control terminal of the third transistor, and the second terminal of the third transistor are electrically connected. The first terminal of the third transistor is electrically connected to the second terminal of the first resistor. The first terminal of the eighth transistor is electrically connected to the sampling node. The control terminal of the eighth transistor, the second terminal of the eighth transistor, and the first terminal of the ninth transistor are electrically connected. The control terminal of the ninth transistor, the second terminal of the ninth transistor, and the first terminal of the tenth transistor are electrically connected.

4. The circuit according to claim 3, characterized in that, The first switching unit includes a twelfth transistor. The control terminal of the twelfth transistor receives a first control signal. The first terminal of the twelfth transistor is electrically connected to the sampling node, and the second terminal of the twelfth transistor is electrically connected to the reverse connection protection signal generation unit.

5. The circuit according to claim 4, characterized in that, The reverse connection protection signal generation unit includes a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, and an eighth resistor. The first terminal of the thirteenth transistor and the second terminal of the eighth resistor are electrically connected to the second terminal of the twelfth transistor. The first terminal of the eighth resistor is electrically connected to the sampling node. The second terminal of the thirteenth transistor is electrically connected to the first terminal of the fourteenth transistor. The second terminal of the fourteenth transistor is electrically connected to the first terminal of the fifteenth transistor and the control terminal of the fifteenth transistor, respectively. The second terminal of the fifteenth transistor is electrically connected to the ground node. The control terminal of the thirteenth transistor is electrically connected to the sixth node. The control terminal of the fourteenth transistor receives a second control signal.

6. The circuit according to claim 5, characterized in that, The reverse connection protection module also includes a second switch unit; The control signal generation unit is further configured to generate a third control signal to the second switching unit when the low-dropout linear regulator circuit is in a non-operating state. The second switching unit is configured to turn on when a third control signal is received; The reverse connection protection signal generation unit is configured to output the sampling voltage when the second switching unit is turned on, so as to turn off the second power transistor.

7. The circuit according to claim 6, characterized in that, The second switching unit includes a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, and a nineteenth transistor. The first terminals of the sixteenth transistor, the seventeenth transistor, the eighteenth transistor, and the nineteenth transistor are electrically connected to the sampling node, respectively. The second terminal of the sixteenth transistor is electrically connected to the fourth node. The second terminal of the seventeenth transistor is electrically connected to the second terminal of the twelfth transistor. The second terminal of the eighteenth transistor is electrically connected to the second terminal of the third transistor. The second terminal of the nineteenth transistor is electrically connected to the third node.

8. The circuit according to claim 2, characterized in that, The reverse connection protection module also includes a current signal generation unit; The current signal generation unit is configured to generate a first current, a second current, a third current and a fourth current to the control signal generation unit according to the reference current, and to generate a fifth current to the reverse connection protection signal generation unit.

9. An electronic chip, characterized in that, Includes the circuit described in any one of claims 1-8.

10. A vehicle-mounted system, characterized in that, Includes the electronic chip as described in claim 9.

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