A cache unit and a data accessing method thereof, and a computer system

Abstract

This invention discloses a caching unit, its data access method, and a computer system. The caching unit includes a data queue for storing data entries. Upon receiving data, this embodiment searches for free entries in a predetermined order, starting from the tail pointer of the data queue. In response to a found free entry surpassing the target head pointer, the data to be stored is stored in the found free entry, the target entry is retrieved, the tail pointer is set to the target entry, and a new head pointer is generated pointing to the target entry. Thus, this embodiment maintains first-in-first-out (FIFO) to a certain extent, ensuring the sequential return of required data and enabling timely release of data dependencies. Furthermore, by setting up multiple FIFO rounds, this embodiment alleviates the problem of gaps in the caching unit, improves the storage space utilization of the caching unit, and thereby guarantees data throughput.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and more specifically, to a cache unit and its data access method, and a computer system. Background Technology

[0002] For computing engines with multiple processing cores, memory access latency fluctuates relatively greatly. For the corresponding execution units, returning the required data sequentially is necessary to release data dependencies in a timely manner. The traditional chain structure of data request processing is difficult to meet these requirements. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a cache unit and its data access method and computer system, which maintain first-in-first-out (FIFO) to a certain extent, ensure the sequential return of required data, and enable timely release of data dependencies. At the same time, this embodiment alleviates the problem of cache unit gaps by setting up multiple rounds of FIFO groups, improves the storage space utilization of the cache unit, and thus ensures data throughput.

[0004] In a first aspect, embodiments of the present invention provide a data access method applied to a cache unit, the method comprising: Starting from the tail pointer of the data queue, free entries are searched in a predetermined order, and the current round number corresponding to the tail pointer is the first round number; In response to the searched free entry passing the target head pointer, the data to be stored is stored in the searched free entry, and the target entry is obtained, wherein the round number corresponding to the target head pointer is the first round number; Set the tail pointer to the target entry; A new head pointer is generated pointing to the target entry, and the number of rounds corresponding to the new head pointer and the tail pointer is the second round number.

[0005] Furthermore, the method also includes: In response to the searched free entry passing the target head pointer and the number of rounds in the data queue reaching a predetermined threshold, it is determined that the data queue is full.

[0006] Furthermore, the method also includes: In response to the fact that the searched free entry does not cross the target header pointer, the data to be stored is stored in the searched free entry, and the target entry is obtained; Set the tail pointer to the target entry; The number of rounds for the target entry is determined as the first round number.

[0007] Furthermore, the target entry includes a valid bit, a status bit, a storage information bit, and a round number bit.

[0008] Furthermore, the method also includes: Starting from the head pointer corresponding to each round, search for items in each round that are in a pop-up state; The pop-up entries for the current period are determined based on a predetermined arbitration method; Release the pop-up entry; In response to the pop-up entry being the entry pointed to by the head pointer of the current wheel, the head pointer of the wheel containing the pop-up entry is moved to the next valid entry in the wheel number of the pop-up entry.

[0009] Furthermore, the determination of the pop-up entry for the current period based on a predetermined arbitration method includes: The entry in the oldest searched wheel that can be popped up is identified as the pop-up entry.

[0010] Furthermore, the method also includes: In response to the release of all valid entries in the current oldest wheel, the value of the oldest wheel in the predefined register is updated.

[0011] Secondly, embodiments of the present invention provide a cache unit, the cache unit comprising: A data queue is used to store data entries; The controller is used to execute the methods described above.

[0012] Furthermore, the cache unit also includes: A register is used to store the oldest round value in the data queue.

[0013] Furthermore, the data queue includes at least one round of data entry groups, the number of which is less than or equal to a predetermined threshold, and each round has a corresponding head pointer.

[0014] Thirdly, embodiments of the present invention provide a computer system, the computer system comprising: The cache unit as described above; The computing engine is used to generate data information and send the data information to the cache unit.

[0015] In this embodiment of the invention, the cache unit includes a data queue for storing data entries. Upon receiving data information, this embodiment searches for free entries in a predetermined order, starting from the tail pointer of the data queue. In response to a found free entry surpassing the target head pointer, the data to be stored is stored in the found free entry, the target entry is obtained, the tail pointer is set to the target entry, and a new head pointer is generated pointing to the target entry. Thus, this embodiment maintains first-in-first-out (FIFO) to a certain extent, ensuring the sequential return of required data and enabling timely release of data dependencies. Furthermore, by setting up multiple FIFO rounds, this embodiment alleviates the problem of gaps in the cache unit, improves the storage space utilization of the cache unit, and thereby ensures data throughput. Attached Figure Description

[0016] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which: Figure 1 This is a schematic diagram of a proportional data queue; Figure 2 This is a flowchart of a data access method according to an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the updating of a data queue according to an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of the target item in an embodiment of the present invention; Figure 5 This is a flowchart of another data access method according to an embodiment of the present invention; Figure 6 This is a schematic diagram of another data queue update in an embodiment of the present invention; Figure 7 This is a schematic diagram illustrating the process of determining pop-up items according to an embodiment of the present invention; Figure 8 This is a schematic diagram of a data access device according to an embodiment of the present invention; Figure 9 This is a schematic diagram of a cache unit according to an embodiment of the present invention; Figure 10 This is a schematic diagram of a computer system according to an embodiment of the present invention. Detailed Implementation

[0017] The present application is described below based on embodiments, but it is not limited to these embodiments. In the detailed description of the present application below, certain specific details are described in detail. Those skilled in the art can fully understand the present application without these details. To avoid obscuring the substance of the present application, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0018] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0019] Unless the context explicitly requires it, words such as "including" or "contains" throughout the application should be interpreted as including rather than exclusive or exhaustive; that is, meaning "including but not limited to".

[0020] In the description of this application, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0021] The solutions described in this specification and embodiments, if involving the processing of personal information, will be processed only on the premise of having a legal basis (such as obtaining the consent of the personal information subject, or being necessary for the performance of a contract), and will only be processed within the scope stipulated or agreed upon. A user's refusal to process personal information beyond what is necessary for basic functions will not affect the user's use of basic functions.

[0022] Cache: A cache is a high-speed on-chip memory used to temporarily store frequently accessed data or instructions, in order to reduce the latency of accessing main memory or peripherals, thereby improving the overall system performance.

[0023] MSHR (Miss Status Holding Register): is a hardware structure used to record and manage the status of cache miss requests, supporting concurrent miss handling and data backfill coordination in non-blocking caches.

[0024] LLC: last-level cache.

[0025] FIFO (first-in-first-out) is a data structure that prioritizes data from the first element out of the page.

[0026] semififo: A FIFO-like structure in which data is pushed in order and popped out in the same order, but the corresponding entries must be allowed to be popped out.

[0027] Head: The head pointer of the semififo, representing the oldest data in the semififo.

[0028] Tail: The tail pointer of the semififo, representing the latest data in the semififo.

[0029] RR (round robin): A scheduling method that cycles sequentially.

[0030] A cache is a very fast but small storage device located between the processor and memory, which can significantly reduce the time that processes need to repeatedly read from memory. To enable the cache to process subsequent requests while waiting for data from previously requested requests to return from memory, the cache design includes an MSHR (Message, Cache, and Request Information) to store information associated with the request (such as the corresponding cache line address, hit test results, and request type) and to execute subsequent processes when the corresponding data is returned.

[0031] Based on the above explanation of the nouns and terms used in the embodiments of this application, the cache structure, corresponding data access method, computer system, etc., provided in the embodiments of this application are described below. In this embodiment, the data access process of the semififo structure in the MSHR of the last-level cache is described in detail as an example. It should be understood that the solution of this embodiment can be applied to any cache unit that needs to maintain first-in-first-out, and will not be described in detail here.

[0032] Figure 1 This is a schematic diagram of a comparative data queue. The comparative example illustrates the data access process of a single-round, FIFO (First-In, First-Out) data queue. Popping (pushing) follows FIFO logic, meaning that allowed pops are made according to the first-in, first-out principle. However, due to multi-core processors, memory access latency fluctuates significantly. This can lead to older requests not being guaranteed priority for popping, resulting in both the oldest and newest requests remaining in the FIFO queue. Meanwhile, a large number of entries in the queue have already been released. Subsequent requests can only be stored in the free entries between the tail and head pointers. When the tail pointer equals the head pointer, even with a large number of free entries, subsequent requests cannot be received until the entry pointed to by the head pointer is released. Figure 1 As shown, the arrow points to the direction of movement of the tail pointer Tail (that is, the direction in which newly entered data is pushed in). The oldest entry pointed to by the head pointer Head has not yet been allowed to be popped, but there are no free entries between the tail pointer Tail and the head pointer Head. This makes it impossible to continue receiving subsequent requests. Meanwhile, a large amount of data has been released in the middle of the data queue, with a large number of free entries. This creates a gap phenomenon, that is, the data queue cache cannot be effectively utilized, and it back-pushes subsequent data requests, resulting in a situation where data throughput cannot be effectively guaranteed.

[0033] Based on this, this embodiment provides a cache unit and its data access method and computer system, which maintains first-in-first-out (FIFO) to a certain extent, ensures the sequential return of required data, and enables timely release of data dependencies. At the same time, this embodiment alleviates the problem of cache unit gaps by setting up multiple rounds of FIFO groups, improves the storage space utilization of the cache unit, and thus ensures data throughput.

[0034] Figure 2 This is a flowchart of a data access method according to an embodiment of the present invention. In this embodiment, the data queue adopts a multi-round first-in-first-out queue architecture, such as... Figure 2 As shown, the data access method of this embodiment includes the following steps: Step S110: Starting from the tail pointer of the data queue, search for free entries in a predetermined order. The current round number corresponding to the tail pointer is the first round number. For example... Figure 3 As shown, starting from the tail pointer Tail0 of the data queue, search upwards ( Figure 2 (The arrow in the image indicates the direction of the free entries.) The current round number (i.e., the first round number) corresponding to the tail pointer is 0.

[0035] Step S120: In response to the searched free entry passing the target header pointer, the data to be stored is stored in the searched free entry, and the target entry is obtained. The round number corresponding to the target header pointer is the first round number.

[0036] Step S130: Set the tail pointer to the target entry.

[0037] Step S140: Generate a new head pointer pointing to the target entry. The number of rounds corresponding to the new head pointer and tail pointer is the second round number. Optionally, the updates to the new head pointer and tail pointer can be incremented by natural numbers. That is, if the number of rounds across the target head pointer is 0, then the number of rounds after updating the new head pointer and tail pointer is 1, until a predetermined round threshold is reached.

[0038] Figure 3 This is a schematic diagram illustrating the updating of a data queue according to an embodiment of the present invention. Figure 3 As shown, the current round number (i.e., the first round number) corresponding to the tail pointer is 0, and the corresponding target head pointer is the head pointer Head0 (i.e., the head pointer corresponding to the 0th round).

[0039] When a new request is received, the search proceeds upwards from the tail pointer Tail0 of the data queue. Figure 2(The arrow in the image indicates the direction of the free entry.) The first free entry found is entry1. When the found free entry1 crosses the target header pointer Head0, the new request is pushed into the free entry1, the entry content is updated, and the target entry1' corresponding to the new request is obtained.

[0040] Furthermore, in this embodiment, the tail pointer is set to the target entry 'entry1', and the round number of the tail pointer is updated to 1, that is... Figure 1 The tail pointer Tail1 is generated. Simultaneously, this embodiment generates a new head pointer pointing to the target entry 'entry1', which is the newly added head pointer Head1 for the first round. The round number of the target entry 'entry1' is also 1.

[0041] Furthermore, in this embodiment, the target entry includes a valid bit, a status bit, a storage information bit, and a round number bit.

[0042] Figure 4 This is a schematic diagram of the structure of the target item in an embodiment of the present invention. For example... Figure 4 As shown, a target entry includes a valid bit, a ready bit, a payload bit (storage information), and a round bit. The valid bit indicates whether the current entry is valid, i.e., whether valid data is stored. The ready bit indicates whether the corresponding request data is ready; when the ready status bit indicates that the target entry is allowed to be popped, the payload bit can contain cached data or request-related information (such as address information, request type, etc.). The round bit indicates the current data push round number for the target entry. A new round of data pushing begins each time the latest head pointer is crossed during the search for free entries.

[0043] Furthermore, in this embodiment, in response to the searched free entry not exceeding the target head pointer, the data to be stored is stored in the searched free entry, the target entry is obtained, the tail pointer is pointed to the target entry, and the round number of the target entry is determined as the first round number.

[0044] like Figure 3 As shown, the current round number (i.e., the first round number) corresponding to the tail pointer is 1, and the corresponding target head pointer is the head pointer Head1 (i.e., the head pointer corresponding to the first round). When a new request is received, the search starts from the tail pointer Tail1 of the data queue and proceeds upwards. Figure 2(The arrow in the image indicates the direction of the free entry.) The first free entry found is entry2. If the found free entry2 does not cross the target header pointer Head1, the new request is pushed into the free entry2, the entry content is updated, and the target entry corresponding to the new request is obtained.

[0045] Furthermore, in this embodiment, the tail pointer Tail1 is set to point to the target entry 'entry2'. Since the tail pointer Tail1 has not crossed the corresponding target head pointer Head1, the number of rounds of the updated tail pointer Tail1 is still 1, and the number of rounds of the target entry is also 1.

[0046] Furthermore, in this embodiment, the data queue is determined to be full when a found free entry crosses the target head pointer and the number of rounds in the data queue reaches a predetermined threshold. That is, this embodiment sets a maximum number of data push rounds; when the current data queue reaches this maximum number of data push rounds, the data queue is determined to be full. Since more data rounds result in fewer cache gaps, but after setting the maximum number of data push rounds to a certain value, cache gaps are largely resolved. Increasing this number further may affect overall data processing efficiency. Therefore, this embodiment can set the aforementioned predetermined threshold based on actual application conditions to optimize system performance.

[0047] Figure 5 This is a flowchart of another data access method according to an embodiment of the present invention. Figure 6 This is a schematic diagram illustrating another data queue update in an embodiment of the present invention. The data access method in this embodiment describes the process of popping allowed entries. For example... Figure 5 As shown, the data access method in this embodiment includes the following steps: Step S210: Starting from the head pointer corresponding to each wheel, search for entries in each wheel that are in the pop-up state.

[0048] like Figure 6As shown, this embodiment takes a predetermined threshold of 4 (e.g., round values ​​0-3) as an example. Within the current entry release cycle, starting from the head pointer Head_round0_ptr corresponding to round 0, the first entry in round 0 that is in a pop-up state (i.e., valid=1, ready=1, and round=0) is searched upwards to obtain entry4. Starting from the head pointer Head_round1_ptr corresponding to round 1, the first entry in round 1 that is in a pop-up state (i.e., valid=1, ready=1, and round=1) is searched upwards to obtain entry7. Starting from the head pointer Head_round2_ptr corresponding to round 2, the first entry in round 2 that is in a pop-up state (i.e., valid=1, ready=1, and round=2) is searched upwards to obtain entry6. Starting from the head pointer Head_round3_ptr corresponding to round 3, the first entry in round 3 that is in a pop-up state (i.e., valid=1, ready=1, and round=3) is searched upwards to obtain entry1.

[0049] In one optional implementation, this embodiment uses a sequential RR (Recursive Round Robin) search to find the first poppable state entry in each round. Furthermore, this embodiment initiates multiple RR sequential round searches in parallel to search for the first poppable state entry in each round. It should be understood that this embodiment does not limit the search method; it can also use a sequential search method or other methods, which will not be elaborated upon here.

[0050] Step S220: Determine the pop-up entry for the current period based on a predetermined arbitration method.

[0051] Furthermore, since in practical applications it is necessary to maintain a first-in-first-out scheduling method among the allowed pop-out entries, this embodiment determines the pop-out entry in the oldest searched round as the pop-out entry, that is, the oldest entry among the searched entries in the pop-out state is determined as the pop-out entry of the current cycle.

[0052] like Figure 6 As shown, taking the oldest round number as round 0 as an example, this embodiment determines entry4 as the pop-up entry of the current cycle.

[0053] Figure 7 This is a schematic diagram illustrating the process of determining pop-up items according to an embodiment of the present invention. Figure 7As shown, in this embodiment, n (n>1) RR threads are started in parallel to search the n data push rounds. The search results of the RR threads corresponding to rounds 0 to (n-1) are sent to the arbitration unit or selection unit 71 to select the corresponding pop-up item. For example, the arbitration unit or selection unit 71 filters out the pop-up item in the oldest round as the pop-up item for the current cycle.

[0054] Step S230: Release the pop-up entry. That is, release the information in the pop-up entry and update it to an empty entry.

[0055] In step S240, in response to the pop-up entry being the entry pointed to by the head pointer of the current wheel, the head pointer of the wheel containing the pop-up entry is moved to the next valid entry in the wheel number containing the pop-up entry.

[0056] like Figure 6 As shown, the popped entry 4 is the entry pointed to by the head pointer Head_round0_ptr of round 0. After releasing the popped entry 4, the information in the popped entry 4 is released, and it is updated to a free entry, that is, its valid bit value is updated to 0. Then, the head pointer Head_round0_ptr of round 0 is set to point to the next valid entry 5 in round 0. It should be understood that if the popped entry is not the entry pointed to by the head pointer of its round, the information in the popped entry can be released directly.

[0057] In one optional implementation, this embodiment can search for the first poppable entry in each round in parallel, or it can search for the first poppable entry in each round sequentially from the oldest round. Furthermore, when using the method of sequentially searching for the first poppable entry in each round from the oldest round, this embodiment can directly determine the first poppable entry that meets the search criteria as the poppable entry for the current period. It should be understood that this embodiment does not limit the entry search method or arbitration method; it only needs to meet the actual requirements. For example, when only maintaining the first-in-first-out within the same round is required, a polling method can be used to release the entries in the poppable state of each round, or other methods can be used to release the entries. These will not be elaborated further here.

[0058] Furthermore, this embodiment also updates the value of the oldest wheel in the predetermined register in response to the release of all valid entries in the current oldest wheel. In this embodiment, since the tail pointer always points to newly pushed data, the wheel number corresponding to the tail pointer is the latest wheel number, so there is no need to record the wheel number of the tail pointer separately. For the head pointer, since each wheel has a corresponding head pointer, and based on the first-in-first-out principle, it is necessary to determine the oldest wheel number among the current wheel numbers contained in the data queue. Therefore, this embodiment stores the value of the current oldest wheel and updates the value of the oldest wheel after all valid entries in the current oldest wheel have been released. For example, the initial value of the oldest wheel in the register is 0, and after all entries in wheel 0 have been released, the value of the oldest wheel in the register is updated to 1. This embodiment uses the use of a register to store the value of the oldest wheel as an example, but it should be understood that any accessible storage method can be used in actual applications, and will not be described in detail here.

[0059] Furthermore, in this embodiment, the maximum number of rounds simultaneously contained in the data queue is limited to a predetermined threshold. The number of rounds can be incremented or cyclical. Assume the maximum number of rounds simultaneously contained in the data queue is N (N > 1), and the order of rounds from oldest to newest is 0—1—2—,—N-1. Taking the cyclical approach as an example, assuming that in cycle T0, the entries in the oldest round 0 are released, and the oldest round value in the register is updated to 1, during subsequent data push processes, the searched free entries cross the target head pointer of round N-1. Since the current number of rounds in the data queue is N-1, a new round can be created, and its round value can be reconfigured to 0. At this time, the order of rounds from oldest to newest is 1—2—,—N-1—0. Taking an incremental numerical approach as an example, assuming that in cycle T0, all entries in the oldest round (round 0) are released, and the oldest round value in the register is updated to 1, during subsequent data pushes, if a free entry is found that crosses the target head pointer of round N-1, since the current data queue contains N-1 rounds, a new round can be created, and its round value can be reconfigured to N. At this point, the order of rounds from oldest to newest is 1—2—,—N-1—N. This embodiment only limits the maximum number of rounds that the data queue can contain simultaneously. The configuration method of the round values ​​corresponding to each round can be set according to actual needs, and this embodiment does not impose any restrictions on this.

[0060] In this embodiment of the invention, the cache unit includes a data queue for storing data entries. Upon receiving data information, this embodiment searches for free entries in a predetermined order, starting from the tail pointer of the data queue. In response to a found free entry surpassing the target head pointer, the data to be stored is stored in the found free entry, the target entry is obtained, the tail pointer is set to the target entry, and a new head pointer is generated pointing to the target entry. Thus, this embodiment maintains first-in-first-out (FIFO) to a certain extent, ensuring the sequential return of required data and enabling timely release of data dependencies. Furthermore, by setting up multiple FIFO rounds, this embodiment alleviates the problem of gaps in the cache unit, improves the storage space utilization of the cache unit, and thereby ensures data throughput.

[0061] Figure 8 This is a schematic diagram of a data access device according to an embodiment of the present invention. Figure 8 As shown, the data access device in this embodiment includes a search unit 81, a storage unit 82, a first pointer update unit 83, and a second pointer update unit 84.

[0062] Search unit 81 is used to search for free entries in a predetermined order, starting from the tail pointer of the data queue, where the current round number corresponding to the tail pointer is the first round number. Storage unit 82 is used to store the data to be stored into the searched free entry in response to the searched free entry passing the target head pointer, and to obtain the target entry, where the round number corresponding to the target head pointer is the first round number. First pointer update unit 83 is used to set the tail pointer to the target entry. Second pointer update unit 84 is used to generate a new head pointer pointing to the target entry, where the round numbers corresponding to the new head pointer and the tail pointer are the second round number.

[0063] Furthermore, the data access device also includes a queue state determination unit, which performs the following: in response to the searched free entry passing the target head pointer and the number of rounds in the data queue reaching a predetermined threshold, determines that the data queue is full.

[0064] Furthermore, the data access device also includes an entry update unit, configured to perform: in response to the searched free entry not exceeding the target head pointer, storing the data to be stored in the searched free entry, obtaining the target entry, pointing the tail pointer to the target entry, and determining the round number of the target entry as the first round number.

[0065] Furthermore, the target entry includes a valid bit, a status bit, a storage information bit, and a round number bit.

[0066] Furthermore, the data access device also includes an entry release unit, used to perform: starting from the head pointer corresponding to each round, searching for entries in the pop-up state in each round; determining the pop-up entry for the current period based on a predetermined arbitration method; releasing the pop-up entry; and in response to the pop-up entry being the entry pointed to by the head pointer of the round in which the pop-up entry is located, pointing the head pointer of the round in which the pop-up entry is located to the next valid entry of the round number in which the pop-up entry is located.

[0067] The entry release unit is also used to perform the following: determine the entry in the oldest searched wheel that is in a pop-up state as the pop-up entry.

[0068] Furthermore, the data access device also includes a round number update unit, which performs the following: in response to the release of all valid entries in the current oldest round, updates the value of the oldest round in the predetermined register.

[0069] In this embodiment of the invention, the cache unit includes a data queue for storing data entries. Upon receiving data information, this embodiment searches for free entries in a predetermined order, starting from the tail pointer of the data queue. In response to a found free entry surpassing the target head pointer, the data to be stored is stored in the found free entry, the target entry is obtained, the tail pointer is set to the target entry, and a new head pointer is generated pointing to the target entry. Thus, this embodiment maintains first-in-first-out (FIFO) to a certain extent, ensuring the sequential return of required data and enabling timely release of data dependencies. Furthermore, by setting up multiple FIFO rounds, this embodiment alleviates the problem of gaps in the cache unit, improves the storage space utilization of the cache unit, and thereby ensures data throughput.

[0070] Figure 9 This is a schematic diagram of a cache unit according to an embodiment of the present invention. Figure 9 As shown, the cache unit in this embodiment includes a data queue 91 and a controller 92. The data queue 91 is used to store data entries. Further, the data queue includes at least one round of data entry groups, the number of data entry groups being less than or equal to a predetermined threshold, and each round having a corresponding head pointer.

[0071] When the controller 92 receives new data to be pushed in, it searches for free entries in a predetermined order, starting from the tail pointer of the data queue. In response to a found free entry passing the target head pointer, it stores the data to be stored in the found free entry, obtains the target entry, points the tail pointer to the target entry, and generates a new head pointer pointing to the target entry. Before the update, both the tail pointer and the target head pointer are in the first round; after the update, both are in the second round. Further, in this embodiment, the round number can be updated using an incremental or cyclical method. For details, please refer to the above embodiment, which will not be described in detail here. The target entry includes a valid bit, a status bit, a storage information bit, and a round number bit.

[0072] Furthermore, in response to the fact that the searched free entry has not crossed the target head pointer, the controller 92 stores the data to be stored in the searched free entry, obtains the target entry, points the tail pointer to the target entry, and determines the round number of the target entry as the first round number.

[0073] Furthermore, the controller 92 determines that the data queue is full in response to the searched free entry passing the target head pointer and the number of rounds in the data queue reaching a predetermined threshold.

[0074] Furthermore, the controller 92 is also used to control the entry release process. Specifically, starting from the head pointer corresponding to each wheel, the controller 92 searches for entries in the pop-out state in each wheel, determines the pop-out entry for the current cycle based on a predetermined arbitration method, releases the pop-out entry, and, in response to the pop-out entry being the entry pointed to by the head pointer of its respective wheel, sets the head pointer of the wheel containing the pop-out entry to the next valid entry in the wheel number of the pop-out entry. Optionally, the controller 92 determines the pop-out entry as the oldest searched entry in the oldest wheel that is in the pop-out state.

[0075] Furthermore, the cache unit also includes register 93, which stores the value of the oldest wheel in the data queue. In response to the release of all valid entries in the current oldest wheel, controller 92 updates the value of the oldest wheel in the predetermined register to facilitate confirmation of the popped entry.

[0076] In this embodiment of the invention, the caching unit includes a data queue for storing data entries and a controller. When the controller receives data information, it searches for free entries in a predetermined order, starting from the tail pointer of the data queue. In response to a found free entry surpassing the target head pointer, the controller stores the data to be stored in the found free entry, retrieves the target entry, sets the tail pointer to the target entry, and generates a new head pointer pointing to the target entry. Thus, this embodiment maintains first-in-first-out (FIFO) to a certain extent, ensuring the sequential return of required data and enabling timely release of data dependencies. Furthermore, by setting up multiple FIFO rounds, this embodiment alleviates the problem of gaps in the caching unit, improves the storage space utilization of the caching unit, and thereby guarantees data throughput.

[0077] Figure 10 This is a schematic diagram of a computer system according to an embodiment of the present invention. Figure 10 As shown, the computer system of this embodiment includes a cache unit 101 and a computing engine 102. The structure and operation of the cache unit 101 can be found in [reference needed]. Figure 9 The description of the above embodiments will not be repeated here. The computing engine 102 is used to generate data information and send the data information to the cache unit. Optionally, the data information can be request information or other information. Thus, this embodiment configures a multi-round first-in-first-out (FIFO) data queue. When new data information is received, it searches for free entries in a predetermined order, starting from the tail pointer of the data queue. In response to the searched free entry passing the target head pointer, the data to be stored is stored in the searched free entry, the target entry is obtained, the tail pointer is set to the target entry, and a new head pointer pointing to the target entry is generated. Thus, this embodiment maintains FIFO to a certain extent, ensuring the sequential return of required data, enabling timely release of data dependencies. At the same time, this embodiment alleviates the problem of cache unit gaps by setting up multi-round FIFO groups, improves the storage space utilization of the cache unit, and thus ensures data throughput.

[0078] Another embodiment of the present invention relates to a non-volatile storage medium for storing a computer-readable program for use by a computer to execute some or all of the above-described method embodiments.

[0079] That is, those skilled in the art will understand that all or part of the steps in the methods of the above embodiments can be implemented by a program instructing related hardware. This program is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0080] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A data access method applied to a cache unit, characterized in that, The method includes: Starting from the tail pointer of the data queue, free entries are searched in a predetermined order, and the current round number corresponding to the tail pointer is the first round number; In response to the searched free entry passing the target head pointer, the data to be stored is stored in the searched free entry, and the target entry is obtained, wherein the round number corresponding to the target head pointer is the first round number; Set the tail pointer to the target entry; A new head pointer is generated pointing to the target entry, and the number of rounds corresponding to the new head pointer and the tail pointer is the second round number.

2. The method according to claim 1, characterized in that, The method further includes: In response to the searched free entry passing the target head pointer and the number of rounds in the data queue reaching a predetermined threshold, it is determined that the data queue is full.

3. The method according to claim 1, characterized in that, The method further includes: In response to the fact that the searched free entry does not cross the target header pointer, the data to be stored is stored in the searched free entry, and the target entry is obtained; Set the tail pointer to the target entry; The number of rounds for the target entry is determined as the first round number.

4. The method according to claim 1, characterized in that, The target entry includes a valid bit, a status bit, a storage information bit, and a round number bit.

5. The method according to claim 1, characterized in that, The method further includes: Starting from the head pointer corresponding to each round, search for items in each round that are in a pop-up state; The pop-up entries for the current period are determined based on a predetermined arbitration method; Release the pop-up entry; In response to the pop-up entry being the entry pointed to by the head pointer of the current wheel, the head pointer of the wheel containing the pop-up entry is moved to the next valid entry in the wheel number of the pop-up entry.

6. The method according to claim 5, characterized in that, The pop-up entries for the current period, determined based on a predetermined arbitration method, include: The entry in the oldest searched wheel that can be popped up is identified as the pop-up entry.

7. The method according to claim 5, characterized in that, The method further includes: In response to the release of all valid entries in the current oldest wheel, the value of the oldest wheel in the predefined register is updated.

8. A cache unit, characterized in that, The cache unit includes: A data queue is used to store data entries; A controller for performing the method as described in any one of claims 1-7.

9. The cache unit according to claim 8, characterized in that, The cache unit also includes: A register is used to store the oldest round value in the data queue.

10. The cache unit according to claim 8, characterized in that, The data queue includes at least one round of data entry groups, the number of which is less than or equal to a predetermined threshold, and each round has a corresponding head pointer.

11. A computer system, characterized in that, The computer system includes: The cache unit as described in any one of claims 8-10; The computing engine is used to generate data information and send the data information to the cache unit.

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