Level shifter automatic layout method, device, storage medium and program product

Abstract

This invention discloses an automatic placement method, device, storage medium, and program product for level converters. The method includes: determining multiple placement locations based on the positional relationship between the power port of the level converter and the power network of the physical module where the level converter is located; then performing shielding detection on the multiple placement locations to determine multiple available locations; subsequently, optimizing the allocation of the multiple available locations based on the signal port types of the physical modules connected to the level converter within the target area corresponding to the multiple available locations, determining a location allocation strategy, and executing the level converter placement according to the location allocation strategy. This invention combines the positional relationship between the power port of the level converter and the power network of the physical module where the level converter is located, as well as the signal port types of the physical modules connected to the level converter, to jointly decide the placement of level converters between chips / modules, which can effectively improve the placement efficiency and placement effect of level converters.

Description

Technical Field

[0001] This invention relates to the field of artificial intelligence chip technology, and in particular to an automatic placement method, device, storage medium, and program product for level converters. Background Technology

[0002] Level shifters are commonly used circuit units in low-power designs. Their core function is to convert the signal levels between two adjacent voltage domains, resolving voltage incompatibility issues between different chips or modules. Level shifters use dual-rail power supplies and have strict requirements for placement. For example, the distance between the level shifter and the signal port should be as short as possible, and the resistance from the chip power supply to the level shifter should be as low as possible to ensure power integrity. Furthermore, the local density should not be too high.

[0003] Currently, level transducer placement is mainly achieved in two ways: one is by using placement commands provided by Electronic Design Automation (EDA) tools, and the other is by manually placing the level transducers. Both existing placement methods suffer from low efficiency and unsatisfactory results. For example, placement using EDA tools is time-consuming, the placement may not be optimal, and the resulting messy and irregular layout is detrimental to later physical implementation. Manual placement of level transducers is extremely labor-intensive and time-consuming when there are many level transducers, and requires repetitive work when the overall floorplan changes. Summary of the Invention

[0004] To address the problems existing in the prior art, embodiments of the present invention provide an automatic layout method, device, storage medium, and program product for level converters, which can effectively improve the layout efficiency and layout effect of level converters.

[0005] In a first aspect, embodiments of the present invention provide an automatic placement method for level converters, comprising: Based on the positional relationship between the power port of the level converter and the power network of the physical module where the level converter is located, multiple placement locations are determined; Shielding detection is performed on multiple placement locations to determine multiple usable locations; Based on the signal port type of the physical modules connected to the level converter within the target area corresponding to the multiple available locations, the multiple available locations are allocated and optimized to determine the location allocation strategy, and the level converter layout is executed according to the location allocation strategy.

[0006] As an improvement to the above solution, based on the positional relationship between the power port of the level converter and the power network of the physical module where the level converter is located, multiple placement locations are determined, including: Using the zero point of the power network as the origin, a position search is performed along a preset direction with a preset movement step size to obtain multiple candidate positions; Calculate the relative distance between the power port of the level converter and the power network at each of the candidate positions, and select the candidate position with the smallest relative distance as the first placement position; The remaining placement positions are determined based on the relative offset between the first placement position and the origin.

[0007] As an improvement to the above scheme, calculating the relative distance between the power port of the level converter and the power network at each of the candidate locations includes: For each of the candidate locations, evaluate the first distance from the first power port of the level shifter placed at the candidate location to the first voltage domain of the power network, the second distance from the first power port to the second voltage domain of the power network, the third distance from the second power port to the first voltage domain of the power network, and the fourth distance from the second power port to the second voltage domain of the power network. The average of the first distance, the second distance, the third distance, and the fourth distance is calculated as the relative distance between the power port of the level converter and the power network at the candidate location.

[0008] As an improvement to the above solution, shielding detection is performed on multiple placement locations to determine multiple usable locations, including: The first position array formed by the multiple placement positions is shielded according to a preset row interval; The placement positions in the first position array that conflict with existing macrocells are masked. The unmasked placement positions in the position array are taken as available positions.

[0009] As an improvement to the above scheme, based on the signal port types of the physical modules connected to the level converters within the target areas corresponding to the multiple available locations, the allocation of the multiple available locations is optimized to determine a location allocation strategy, including: Based on the priority order of the signal port types of the physical modules connected to the level converters within the target area, the available positions of the level converters corresponding to each signal port type are allocated to generate the position allocation strategy. The signal port types include clock ports, output ports, and input ports; the clock port has a higher priority than the output port, and the output port has a higher priority than the input port; the sub-position allocation strategy is used to indicate the available positions allocated to level shifters corresponding to various signal port types.

[0010] As an improvement to the above scheme, based on the priority order of the signal port types of the physical modules connected to the level converters within the target area, the available positions of the level converters corresponding to various signal port types are allocated, and the position allocation strategy is generated, including: A second location array is generated based on the multiple available locations; For multiple physical modules corresponding to the highest priority signal port type, position allocation is performed based on the second position array to obtain the target candidate allocation strategy corresponding to the highest priority signal port type; The second position array is masked according to the available positions indicated by the target candidate allocation strategy corresponding to the highest priority signal port type, and a third position array is generated. Based on the third location array, the location of multiple physical modules corresponding to the next priority signal port type is allocated to obtain the target candidate allocation strategy corresponding to the next priority signal port type. The location allocation strategy is generated based on the target candidate allocation strategy corresponding to each priority signal port type.

[0011] As an improvement to the above scheme, for multiple physical modules corresponding to the highest priority signal port type, position allocation is performed based on the second position array to obtain the target candidate allocation strategy corresponding to the highest priority signal port type, including: Based on the location of each physical module, the second location array is filtered to generate a local location array for each physical module; For each physical module, traverse the available locations in the corresponding local location array and calculate the physical distance between each available location in the local location array and the signal port of the physical module; The available location with the smallest physical distance is selected as the candidate allocation location of the physical module, and the candidate allocation strategy corresponding to the second location array is obtained based on the candidate allocation locations of multiple physical modules. The second position array is subjected to sequence randomization to obtain the updated second position array; The positions are reassigned based on the updated second position array until the candidate allocation strategy corresponding to the updated second position array meets the preset loop iteration termination condition, and the target candidate allocation strategy corresponding to the highest priority signal port type is obtained.

[0012] In a second aspect, embodiments of the present invention provide an automatic level converter placement device, comprising: a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor executes the computer program to implement the automatic level converter placement method as described in any one of the first aspects.

[0013] Thirdly, embodiments of the present invention provide a computer-readable storage medium storing a computer program, wherein, when the computer program is executed, it controls the device where the computer-readable storage medium is located to perform the automatic placement method of the level converter as described in any one of the first aspects.

[0014] Fourthly, embodiments of the present invention provide a computer program product, including a computer program or instructions that, when executed by a processor, implement the automatic placement method for level converters as described in any one of the first aspects.

[0015] Compared to existing technologies, the present invention provides an automatic placement method, device, storage medium, and program product for level converters. Based on the positional relationship between the power port of the level converter and the power network of the physical module where the level converter resides, multiple placement positions are determined. Then, shielding detection is performed on these multiple placement positions to determine multiple available positions. Subsequently, based on the signal port types of the physical modules connected to the level converter within the target areas corresponding to the multiple available positions, the multiple available positions are allocated and optimized to determine a position allocation strategy, and the level converter placement is executed according to the position allocation strategy. The present invention combines the positional relationship between the power port of the level converter and the power network of the physical module where the level converter resides, as well as the signal port types of the physical modules connected to the level converter, to jointly decide on the placement of level converters between chips / modules, effectively improving the placement efficiency and effect of level converters. Attached Figure Description

[0016] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1This is a flowchart of an automatic layout method for level converters provided in an embodiment of the present invention; Figure 2 This is a schematic diagram illustrating the calculation of the placement position of the level converter provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the position array provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the position shielding provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of position sequence generation and randomization provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the location allocation optimization process provided in an embodiment of the present invention; Figure 7 This is a structural block diagram of an automatic layout device for a level converter provided in an embodiment of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] It is understood that the various numerical designations used in the embodiments of this invention are merely for descriptive convenience and are not intended to limit the scope of this application. The order of the process numbers does not imply the order of execution; the execution order of each process should be determined by its function and internal logic.

[0020] In embodiments of the invention, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. The terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising" does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element. The term "a plurality or several" refers to two or more.

[0021] This invention is applicable to integrated circuits such as artificial intelligence chips and high-computing-power chips. The artificial intelligence chip can be a GPU (Graphics Processing Unit), a TPU (Tensor Processing Unit), an NPU (Neural Network Processing Unit), a DPU (Deep Learning Processing Unit), an APU (Accelerated Processing Unit), or a GPGPU (General-Purpose Graphics Processing Unit), etc., and this invention does not impose specific limitations.

[0022] Please see Figure 1 , Figure 1 This is a flowchart of an automatic placement method for level converters provided in an embodiment of the present invention. The automatic placement method for level converters specifically includes: S11: Determine multiple placement locations based on the positional relationship between the power port of the level converter and the power network of the physical module where the level converter is located; Understandably, physical modules refer to physical units with clearly defined physical boundaries and functions in basic circuits / artificial intelligence chips, such as standard cells, tensor processing units (TPUs), and vector processing units (VPUs).

[0023] The power network of a physical module typically has two voltage domains (e.g., a first voltage domain and a second voltage domain). Level shifters have two power ports, one for each voltage domain, to enable signal level adaptation across voltage domains between different physical modules. The power network is a distributed network of metal lines built inside the chip to deliver current to the individual transistors.

[0024] S12: Perform shielding detection on multiple placement locations to determine multiple available locations; S13: Based on the signal port type of the physical module connected to the level converter within the target area corresponding to the multiple available locations, optimize the allocation of the multiple available locations, determine the location allocation strategy, and execute the level converter layout according to the location allocation strategy.

[0025] This invention considers the relative positional relationship between the two power ports of the level converter and the two voltage domains of the power network to identify multiple suitable placement locations for the level converter. Then, considering placement density and positional conflicts of hard macrocells, the identified placement locations are shielded to further identify multiple usable locations. Finally, considering the signal port types of the physical modules connected to the level converter within the target area (e.g., the smallest circumscribed rectangle surrounding all usable locations), the available locations for the level converters corresponding to different port types are optimized and allocated to find the optimal placement location. This determines the final location allocation strategy, ensuring optimal resistance. The level converter is then automatically laid out according to this strategy, resulting in a consistent overall layout that is friendly to subsequent physical implementation. This addresses the pain points of long placement times and heavy workloads in existing level converter layout methods, effectively improving layout efficiency and effect. Furthermore, through automatic location allocation optimization, it is compatible with dynamic adjustments in floorplan, exhibiting strong adaptability.

[0026] In one optional embodiment, multiple placement locations are determined based on the positional relationship between the power port of the level converter and the power network of the physical module where the level converter is located, including: Using the zero point of the power network as the origin, a position search is performed along a preset direction with a preset movement step size to obtain multiple candidate positions; Calculate the relative distance between the power port of the level converter and the power network at each of the candidate positions, and select the candidate position with the smallest relative distance as the first placement position; The remaining placement positions are determined based on the relative offset between the first placement position and the origin.

[0027] Specifically, calculating the relative distance between the power port of the level converter and the power network at each of the candidate locations includes: For each of the candidate locations, evaluate the first distance from the first power port of the level shifter placed at the candidate location to the first voltage domain of the power network, the second distance from the first power port to the second voltage domain of the power network, the third distance from the second power port to the first voltage domain of the power network, and the fourth distance from the second power port to the second voltage domain of the power network. The average of the first distance, the second distance, the third distance, and the fourth distance is calculated as the relative distance between the power port of the level converter and the power network at the candidate location.

[0028] In this embodiment of the invention, the optimal placement location of the level converter is first determined based on the power network planning and the physical wiring diagram of the level converter. Specifically, the placement location with the minimum connection resistance is found by studying the relationship between the two power ports of the level converter and the power network (two voltage domains) of the physical module. The coordinate pattern of the lower left corner of the placement location (e.g., the horizontal and vertical relative offset of the lower left corner of the placement location relative to the zero point of the power network of the physical module) and the length and width values ​​are obtained. In a specified area, a large number of usable blank seats are generated according to the coordinate pattern of the lower left corner of the optimal location and the length and width values, which are used as placement locations. For example, multiple placement locations are generated by horizontal and vertical translation.

[0029] For example, a power network includes a first voltage domain GA (e.g., 0.75V) and a second voltage domain GB (e.g., 0.85V), such as... Figure 2 As shown, the gray area represents the level converter, and the dashed box area represents the placement location. Based on the positions of the two power ports of the level converter and the relative positions of the physical module in the power grid, assuming that the first power port of the level converter is PA and the second power port is PB, the search for the first placement location begins with the zero point of the power network as the origin.

[0030] It is understandable that the zero point of the power network is the reference point of the power network in the layout coordinate system. It generally corresponds to the main power input port position of the power network (or the core node of the network) and is a reference reference for measuring the distance between the power port of the level converter and the power network. In other embodiments, the zero point position of the physical module (that is, the reference origin of the physical module in the layout coordinate system, usually the upper left corner vertex of the physical module is taken as the origin for position search) can also be considered.

[0031] For example, given a relative horizontal offset xoffset, let the shortest distance from PA to GA be PaGa (the first distance mentioned above), the shortest distance from PB to GA be PbGa (the third distance mentioned above), the shortest distance from PA to GB be PaGb (the second distance mentioned above), and the shortest distance from PB to GB be PbGb (the fourth distance mentioned above). Then, calculate the average of PaGa, PbGa, PaGb, and PbGb as Pab (the relative distance mentioned above). Then, adjust xoffset, for example, by gradually increasing xoffset according to a preset movement step size, repeat the above calculation, and find the xoffset corresponding to the minimum Pab, which is taken as the optimal xoffset.

[0032] Similarly, given a relative vertical offset yoffset, for example, if the initial value of yoffset is the height of the first available circuit row, record PaGa, PbGa, PaGb, and PbGb, and calculate their average value Pab. Then adjust yoffset, for example, by gradually increasing yoffset according to a preset movement step size, and repeat the above calculation to find the yoffset corresponding to the minimum Pab, which is taken as the optimal yoffset.

[0033] The above process can be used to find the optimal xoffset and yoffset for the first placement position.

[0034] Next, adjust the length (xstep) and width (ystep) values ​​of the first placement position. Assuming the bottom left corner of the level converter is aligned with the bottom left corner of the placement position (e.g., level converter A is placed at the placement position), by adjusting the length (xstep) and width (ystep) values ​​of the first placement position, ensure that the relative positions of adjacent level converters B and C (e.g., level converter B is placed outside the first placement position and aligned with its top left corner, and level converter C is placed outside the first placement position and aligned with its bottom right corner) to the power network are completely consistent with the relative position of level converter A to the power network. Then, take the minimum values ​​of xstep and ystep as the optimal xstep and ystep. At this point, based on the determined optimal xoffset, yoffset, xstep, and ystep, the first usable placement position can be determined. Subsequent translations based on the optimal xoffset, yoffset, xstep, and ystep can generate multiple placement positions for a specific area, forming a first position array, such as... Figure 3 As shown.

[0035] Through the above location search process, multiple optimal placement locations can be found, minimizing the resistance between the level converter and the power network. This reduces power voltage drop, lowers noise, ensures power integrity, and the regular layout of the placement locations results in fewer wire loops and less interference during subsequent wiring, making it more favorable for the physical implementation of the level converter layout.

[0036] In one optional embodiment, shielding detection is performed on multiple placement locations to determine multiple available locations, including: The first position array formed by the multiple placement positions is shielded according to a preset row interval; The placement positions in the first position array that conflict with existing macrocells are masked. The unmasked placement positions in the position array are taken as available positions.

[0037] For the first position array generated above, shielding can be performed based on the physical positional conflicts of each placement position. Additionally, regular shielding can be used to control the overall placement density of the level converters, reducing voltage drop (IR) related risks; such as... Figure 4 As shown, masking operations can be performed according to preset row intervals, such as masking one row every 10 rows. At the same time, it can detect whether there is a positional conflict with existing macrocells (such as hardmacro, a circuit module whose functions have been pre-designed and whose physical layout has been completely fixed). Placement positions with positional conflicts are masked. For example, in the first position array generated from the above-selected placement positions, the coordinate index of each placement position is represented by row number R and column number C. For example, (R10, C15) represents the placement position in the 10th row and 15th column of the first position array. Then, it is determined whether each placement position conflicts with the physical position of the macrocell. If there is a conflict, it is masked. At the same time, multiple rows of placement positions are masked according to a fixed row number rule (i.e., row interval) to reduce the placement density of level converters, thereby obtaining the final usable positions, ensuring the feasibility of level converter placement, and avoiding excessive concentration of level converters in local areas, thus reducing IR risk.

[0038] Furthermore, each placement position can be marked with an identifier to indicate whether it is shielded; for example, 0 indicates unshielded and 1 indicates shielded. The placement position marked with 0 is then used as a subsequent available position in the level converter allocation.

[0039] In one optional embodiment, the allocation of the multiple available locations is optimized based on the signal port types of the physical modules connected to the level converters within the target areas corresponding to the multiple available locations, to determine a location allocation strategy, including: Based on the priority order of the signal port types of the physical modules connected to the level converters within the target area, the available positions of the level converters corresponding to each signal port type are allocated to generate the position allocation strategy. The signal port types include clock ports, output ports, and input ports; the clock port has a higher priority than the output port, and the output port has a higher priority than the input port; the sub-position allocation strategy is used to indicate the available positions allocated to level shifters corresponding to various signal port types.

[0040] Specifically, based on the priority order of the signal port types of the physical modules connected to the level converters within the target area, the available positions of the level converters corresponding to various signal port types are allocated, and the position allocation strategy is generated, including: A second location array is generated based on the multiple available locations; For multiple physical modules corresponding to the highest priority signal port type, position allocation is performed based on the second position array to obtain the target candidate allocation strategy corresponding to the highest priority signal port type; The second position array is masked according to the available positions indicated by the target candidate allocation strategy corresponding to the highest priority signal port type, and a third position array is generated. Based on the third location array, the location of multiple physical modules corresponding to the next priority signal port type is allocated to obtain the target candidate allocation strategy corresponding to the next priority signal port type. The location allocation strategy is generated based on the target candidate allocation strategy corresponding to each priority signal port type.

[0041] Specifically, for multiple physical modules corresponding to the highest priority signal port type, position allocation is performed based on the second position array to obtain the target candidate allocation strategy corresponding to the highest priority signal port type, including: Based on the location of each physical module, the second location array is filtered to generate a local location array for each physical module; For each physical module, traverse the available locations in the corresponding local location array and calculate the physical distance between each available location in the local location array and the signal port of the physical module; The available location with the smallest physical distance is selected as the candidate allocation location of the physical module, and the candidate allocation strategy corresponding to the second location array is obtained based on the candidate allocation locations of multiple physical modules. The second position array is subjected to sequence randomization to obtain the updated second position array; The positions are reassigned based on the updated second position array until the candidate allocation strategy corresponding to the updated second position array meets the preset loop iteration termination condition, and the target candidate allocation strategy corresponding to the highest priority signal port type is obtained.

[0042] The termination condition for loop iteration includes reaching a preset loop iteration threshold.

[0043] For the available positions selected above, this embodiment of the invention combines sequence randomization (such as the Fish-Yates algorithm) and a greedy algorithm to iteratively optimize the allocation of available positions. The specific allocation process is as follows: A second location array is generated for the selected available locations. The coordinate index of each available location is represented by the row number and column number. For example, 10-15 represents the available location in the 10th row and 15th column of the second location array.

[0044] Use EDA tool commands to obtain the signal port types of physical modules connected to level converters within the target area corresponding to the available location, and classify them according to attributes into clock ports, output ports, and input ports.

[0045] Following the priority order of clock port > output port > input port, the available positions of level shifters corresponding to each priority signal port type are allocated sequentially. For example, positions are first allocated to level shifters connected to the highest priority clock port, then to level shifters connected to the next priority output port, and finally to level shifters connected to the lowest priority input port. Figure 5 and Figure 6 The specific allocation process is as follows: For the clock port, initialize the optimal physical distance optDis and the loop count threshold iterNum. For example, initialize the optimal physical distance optDis to infinity and the loop count threshold iterNum to 5. At the same time, initialize the current optimal location allocation strategy optP to null.

[0046] A second location array E is generated based on the available locations obtained above; it is understood that... Figure 6 The array generation in the position allocation optimization process shown can be called. Figure 5 The array generation and randomization process is shown in the diagram.

[0047] The system iterates through each clock port sequentially. Based on the current position of clock port p, it retrieves a local position array Sa from the second position array E according to a preset principle (such as proximity). For example, it retrieves available positions in several rows adjacent to the position of clock port p. Specifically, the available positions in this local position array are determined by the row number R + column number C. For example, if the clock port is in the south or north, the local position array Sa from column C-20 to column C+20 is selected; if the clock port is in the east or west, the local position array Sa from row R-20 to column R+20 is selected.

[0048] Traverse the local position array Sa, determine the currently available position s and its identifier t. If t indicates that the available position s is blocked, skip this available position s and determine the next available position s+1 and its identifier t. If t indicates that the available position s is not blocked, calculate the physical distance between the current clock port and the current available position s. After traversing all available positions in the local position array Sa, select the available position with the smallest physical distance and record it as P.s As the current placement location of the clock port, the available location P is shielded. s And update the available location P s The identifier is used to record the minimum physical distance to the distance sequence DIS; the above process is repeated to search for the minimum physical distance between the next clock port and the available location, and the available location with the minimum physical distance is recorded as P. s+1 Shield available location P s+1 And update the available location P s+1 The minimum physical distance is recorded in the distance sequence DIS. Based on the above process, the available locations with the minimum physical distance for all clock ports can be obtained.

[0049] By merging the available locations with the minimum physical distance corresponding to all clock ports, a candidate allocation strategy P is obtained.

[0050] Select the maximum value among the minimum physical distances of the distance sequence DIS corresponding to the current returned candidate allocation strategy P. If the maximum value is less than optDis, update optDis to the current maximum value, update optDis to P, and enter the next loop. If the maximum value is greater than optDis, directly enter the next loop. In the next iteration, the second position array E is sequentially randomized (e.g., using the Fish-Yates algorithm) to generate a new second position array E'. The above process is repeated to re-obtain the available positions with the minimum physical distance corresponding to all clock ports, which are then used as new candidate allocation strategies P'.

[0051] Similarly, select the maximum value among the minimum physical distances of the distance sequence DIS' corresponding to the current returned candidate allocation strategy P'. If the maximum value is less than optDis, update optDis to the current maximum value, update optDis to P, and enter the next loop. If the maximum value is greater than optDis, directly enter the next loop. Check if the current loop iteration count is greater than iterNum (e.g., 5). If so, end the loop and output the latest position allocation strategy optP; otherwise, proceed to the next loop. This allows us to obtain the optimal location allocation strategy optP for the clock port, and subsequently place the level converter connected to the corresponding clock port according to the location allocation strategy optP.

[0052] Similarly, for the output port, after excluding the available positions blocked by the aforementioned clock port, a third position array F is generated based on the remaining available positions. The optimal physical distance optDis, the loop count threshold iterNum, and the position allocation strategy optP are initialized. Position allocation is then performed based on the third position array F to obtain the optimal position allocation strategy optP corresponding to the output port. For the input port, after excluding the available positions blocked by the aforementioned clock port and output disconnect, a fourth position array H is generated based on the remaining available positions. The optimal physical distance optDis, the loop count threshold iterNum, and the position allocation strategy optP are initialized. Position allocation is then performed based on the fourth position array H to obtain the optimal position allocation strategy optP corresponding to the input port. The position allocation process for the output and input ports is the same as that for the clock port and will not be repeated here.

[0053] The optimal location allocation strategy optP corresponding to the clock port, output port, and input port is combined to obtain the final location allocation strategy. The level converters for various port connections can then be placed according to the final location allocation strategy.

[0054] Compared with the prior art, the beneficial effects of the embodiments of the present invention are as follows: Considering the relative positions of the power ports and power networks of the level converters, finding the position with the minimum relative distance between the power ports and the power networks ensures that each level converter is placed where the resistance is minimum, and the placement pattern facilitates subsequent physical implementation.

[0055] The entire level converter's location allocation and layout are highly automated, requiring no manual work from the user, resulting in high operating efficiency and improved efficiency in level converter layout.

[0056] By using multiple rounds of random sequence iterative search, the distance between the farthest port and the level converter is optimized to the maximum extent without affecting timing convergence. In practical applications, the layout of a module with 23k level converters can be completed within 1 minute, and the distance between the farthest port and the level converter is guaranteed to be no more than 20um, which greatly improves the effect of level converter layout.

[0057] See Figure 7 , Figure 7 This is a structural block diagram of an automatic level converter placement device provided in an embodiment of the present invention. The automatic level converter placement device includes a processor 21, a memory 22, and a computer program stored in the memory 22 and executable on the processor 21. When the processor 21 executes the computer program, it implements the steps in the above-described embodiments of the automatic level converter placement method, such as steps S11 to S13.

[0058] For example, the computer program may be divided into one or more modules or units, which are stored in the memory 22 and executed by the processor 21 to complete the present invention. The one or more modules or units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in the level converter automatic placement device.

[0059] The automatic placement device for level converters may include, but is not limited to, a processor 21 and a memory 22. Those skilled in the art will understand that the schematic diagram is merely an example of an automatic placement device for level converters and does not constitute a limitation on the device. It may include more or fewer components than illustrated, or combine certain components, or use different components. For example, the automatic placement device for level converters may also include input / output devices, network access devices, buses, etc.

[0060] The processor 21 can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor. The processor 21 is the control center of the automatic level converter placement device, connecting all parts of the automatic level converter placement device via various interfaces and lines.

[0061] The memory 22 can be used to store the computer program and / or modules. The processor 21 executes the automatic layout method of the level converter by running or executing the computer program and / or modules stored in the memory 22 and calling the data stored in the memory 22. The memory 22 may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of the mobile phone (such as audio data, phonebook, etc.). In addition, the memory 22 may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0062] If the modules or units integrated into the level converter automatic placement device are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by the processor 21, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc.

[0063] It should be noted that the device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Furthermore, in the accompanying drawings of the device embodiments provided by this invention, the connection relationships between modules indicate that they have communication connections, which can be specifically implemented as one or more communication buses or signal lines. Those skilled in the art can understand and implement this without any creative effort.

[0064] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. An automatic placement method for level converters, characterized in that, include: Based on the positional relationship between the power port of the level converter and the power network of the physical module where the level converter is located, multiple placement locations are determined; Shielding detection is performed on multiple placement locations to determine multiple usable locations; Based on the signal port type of the physical modules connected to the level converter within the target area corresponding to the multiple available locations, the multiple available locations are allocated and optimized to determine the location allocation strategy, and the level converter layout is executed according to the location allocation strategy.

2. The automatic placement method for level converters as described in claim 1, characterized in that, Based on the positional relationship between the power port of the level converter and the power network of the physical module where the level converter is located, multiple placement locations are determined, including: Using the zero point of the power network as the origin, a position search is performed along a preset direction with a preset movement step size to obtain multiple candidate positions; Calculate the relative distance between the power port of the level converter and the power network at each of the candidate positions, and select the candidate position with the smallest relative distance as the first placement position; The remaining placement positions are determined based on the relative offset between the first placement position and the origin.

3. The automatic placement method for level converters as described in claim 2, characterized in that, Calculating the relative distance between the power port of the level converter and the power network at each of the candidate locations includes: For each of the candidate locations, evaluate the first distance from the first power port of the level shifter placed at the candidate location to the first voltage domain of the power network, the second distance from the first power port to the second voltage domain of the power network, the third distance from the second power port to the first voltage domain of the power network, and the fourth distance from the second power port to the second voltage domain of the power network. The average of the first distance, the second distance, the third distance, and the fourth distance is calculated as the relative distance between the power port of the level converter and the power network at the candidate location.

4. The automatic placement method for level converters as described in claim 1, characterized in that, Shielding detection is performed on multiple placement locations to determine multiple usable locations, including: The first position array formed by the multiple placement positions is shielded according to a preset row interval; The placement positions in the first position array that conflict with existing macrocells are masked. The unmasked placement positions in the position array are taken as available positions.

5. The automatic placement method for level converters as described in claim 1, characterized in that, Based on the signal port types of the physical modules connected to level converters within the target areas corresponding to the multiple available locations, the allocation of the multiple available locations is optimized to determine a location allocation strategy, including: Based on the priority order of the signal port types of the physical modules connected to the level converters within the target area, the available positions of the level converters corresponding to each signal port type are allocated to generate the position allocation strategy. The signal port types include clock ports, output ports, and input ports; the clock port has a higher priority than the output port, and the output port has a higher priority than the input port; the sub-position allocation strategy is used to indicate the available positions allocated to level shifters corresponding to various signal port types.

6. The automatic placement method for level converters as described in claim 5, characterized in that, Based on the priority order of the signal port types of the physical modules connected to level converters within the target area, the available positions of level converters corresponding to various signal port types are allocated, and the position allocation strategy is generated, including: A second location array is generated based on the multiple available locations; For multiple physical modules corresponding to the highest priority signal port type, position allocation is performed based on the second position array to obtain the target candidate allocation strategy corresponding to the highest priority signal port type; The second position array is masked according to the available positions indicated by the target candidate allocation strategy corresponding to the highest priority signal port type, and a third position array is generated. Based on the third location array, the location of multiple physical modules corresponding to the next priority signal port type is allocated to obtain the target candidate allocation strategy corresponding to the next priority signal port type. The location allocation strategy is generated based on the target candidate allocation strategy corresponding to each priority signal port type.

7. The automatic placement method for level converters as described in claim 6, characterized in that, For multiple physical modules corresponding to the highest priority signal port type, position allocation is performed based on the second location array to obtain the target candidate allocation strategy corresponding to the highest priority signal port type, including: Based on the location of each physical module, the second location array is filtered to generate a local location array for each physical module; For each physical module, traverse the available locations in the corresponding local location array and calculate the physical distance between each available location in the local location array and the signal port of the physical module; The available location with the smallest physical distance is selected as the candidate allocation location of the physical module, and the candidate allocation strategy corresponding to the second location array is obtained based on the candidate allocation locations of multiple physical modules. The second position array is subjected to sequence randomization to obtain the updated second position array; The positions are reassigned based on the updated second position array until the candidate allocation strategy corresponding to the updated second position array meets the preset loop iteration termination condition, and the target candidate allocation strategy corresponding to the highest priority signal port type is obtained.

8. An automatic layout device for level converters, characterized in that, include: A processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor, when executing the computer program, implements the automatic placement method for level shifters as described in any one of 1 to 7.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein, when the computer program is executed, it controls the device on which the computer-readable storage medium is located to perform the automatic level shifter placement method as described in any one of claims 1 to 7.

10. A computer program product, comprising a computer program or instructions, characterized in that, When the computer program or instructions are executed by the processor, they implement the automatic placement method for level converters as described in any one of claims 1 to 7.

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