Dual-path power management method, circuit and power management system

Abstract

This invention discloses a dual-path power management method, circuit, and power management system. The method includes: acquiring the output signal of an error amplifier, which generates an output signal based on the difference between the feedback voltage and a reference voltage of the system power supply node to control the conduction degree of a linear regulating transistor in the external power path; comparing the output signal with a first threshold and a second threshold; determining the load capacity state of the external power supply based on the comparison result, and controlling the enabling of a comparator and the switching on / off of the battery path switch based on this state. This invention effectively avoids frequent switching of the battery path switch due to load fluctuations or noise by predicting the load capacity of the external power supply and constructing a buffer zone between thresholds, reducing voltage jitter at the system power supply node, improving power supply stability, and shutting down the comparator when the external power supply load capacity is sufficient to reduce static power consumption.

Description

Technical Field

[0001] This application relates to the field of power management, and more particularly to a dual-path power management method, circuit, and power management system. Background Technology

[0002] Dual-path power management systems are widely used in applications such as portable electronic devices and automotive electronic systems that require simultaneous power supply from both external power sources and batteries. This system provides power to downstream loads through system power supply nodes, whose energy can come from either external power sources or batteries.

[0003] In existing dual-path power management systems, a comparator is typically used to directly compare the system power supply node voltage with the battery voltage to determine the on / off state of the battery path. Specifically, when the system power supply node voltage is lower than the battery voltage, the battery path switch is activated to supplement power from the battery; when the system power supply node voltage is not lower than the battery voltage, the battery path switch is deactivated.

[0004] However, because the comparator is always operational and monitors the voltage relationship in real time, even minor load fluctuations or transient spikes at the system power supply node can easily trigger frequent switching of the battery path switch when the system power supply node voltage is close to the battery voltage. This high-frequency switching action causes continuous voltage jitter at the system power supply node, thus affecting the operational stability of high-precision modules in the system. Furthermore, the continuous operation of the comparator also increases the system's static power consumption. Summary of the Invention

[0005] This application aims to solve the problem of voltage fluctuation at system power supply nodes caused by frequent switching of battery path switches in existing dual-path power management systems.

[0006] In a first aspect, this application provides a dual-path power management method applied to a power management system including an external power path and a battery path, wherein the power management system supplies power to a load through a system power supply node, comprising: acquiring the output signal of an error amplifier; the error amplifier generating the output signal based on the difference between the feedback voltage of the system power supply node and a preset reference voltage to control the conduction degree of a linear regulating transistor in the external power path; comparing the output signal with a preset first threshold and a second threshold; the second threshold being greater than the first threshold; determining the load capacity state of the external power supply based on the comparison result, and controlling the enabling of a comparator and the switching on / off of a battery path switch based on the load capacity state; wherein, when the output signal is between the first threshold and the second threshold, the comparator is turned off and the battery path switch is turned off, and the external power supply provides power alone; when the output signal is greater than the second threshold, the comparator is turned on, and the switching on / off of the battery path switch is controlled based on the comparison result of the comparator between the system power supply node voltage and the battery voltage.

[0007] Secondly, this application also provides a dual-path power management circuit, comprising: an external power path, including a linear regulator and a reverse-current protection switch connected between the external power supply terminal and the system power supply node; a battery path, including a battery path switch connected between the battery terminal and the system power supply node; an error amplifier configured to generate an output signal based on the difference between the feedback voltage and a reference voltage of the system power supply node, thereby controlling the conduction degree of the linear regulator; a load capacity prediction module configured to compare the output signal with a first threshold and a second threshold, and output a status signal characterizing the load capacity state of the external power supply, wherein the second threshold is greater than the first threshold; a comparator configured to compare the voltage of the system power supply node with the battery voltage; and a logic control module configured to control the enable state of the comparator and the on / off state of the battery path switch and the reverse-current protection switch based on the status signal; wherein, when the output signal is between the first threshold and the second threshold, the logic control module turns off the comparator and turns off the battery path switch; when the output signal is greater than the second threshold, the logic control module turns on the comparator and controls the battery path switch based on the output of the comparator.

[0008] Thirdly, this application also provides a power management system, including: a dual-path power management circuit as described in the second aspect; an external power interface for connecting to an external power source; a battery connected to the battery terminal of the dual-path power management circuit; and a load connected to the system power supply node of the dual-path power management circuit.

[0009] At least one advantage of the dual-path power management method provided in this application is that by predicting the external power load capacity, a buffer zone is built between thresholds, which effectively avoids frequent switching of the battery path switch due to load fluctuations or noise, reduces voltage jitter at the system power supply node, improves power supply stability, and shuts down the comparator when the external power load capacity is sufficient to reduce static power consumption. Attached Figure Description

[0010] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0011] Figure 1 A flowchart illustrating a dual-path power management method provided for an embodiment of the present invention; Figure 2 This is a schematic diagram of the state transition of a power management system based on the dual-path power management method provided in the embodiments of the present invention; Figure 3 A schematic diagram of a dual-path power management circuit provided for an embodiment of the present invention; Figure 4 A circuit diagram of a load capacity prediction module provided for an embodiment of the present invention; Figure 5 The present invention provides a signal waveform diagram of a dual-path power management circuit when switching between being powered by an external power source and being supplemented by VBAT power supply, for embodiments of the present invention. Detailed Implementation

[0012] To facilitate understanding of this application, a more detailed description is provided below with reference to the accompanying drawings and specific embodiments. It should be noted that when an element is described as being "fixed to" another element, it can be directly on the other element, or one or more intermediate elements may exist between them. When an element is described as being "connected" to another element, it can be directly connected to the other element, or one or more intermediate elements may exist between them. The terms "upper," "lower," "inner," "outer," "bottom," etc., used in this specification indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0013] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items.

[0014] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0015] To address the shortcomings of existing technologies as described in the background, this application provides a dual-path power management method suitable for systems and devices requiring simultaneous power from an external power source and a battery, such as portable electronic devices and automotive electronic systems. In such systems, the following power nodes typically exist: External power supply (VBUS): refers to the input power from an external source, such as power supplied via a USB interface or power adapter.

[0016] Battery side (VBAT): refers to the power provided by the system's built-in battery.

[0017] System power supply node (VSYS): This refers to the system's common power supply node, responsible for providing power to downstream loads. The power supply node can be powered by an external power source, a battery, or both.

[0018] In this application, the external power path refers to the power supply path from the external power source to the system power supply node, and the battery path refers to the power supply path from the battery to the system power supply node. The core task of the power management system is to rationally control the on / off state of the two power supply paths based on the status of the external power source and the battery, ensuring that the system power supply node receives a stable and reliable power supply.

[0019] The dual-path power management method provided in this application predicts the load capacity of the external power supply by monitoring the output signal of the error amplifier, and dynamically controls the enable state of the comparator and the on / off state of the battery path switch based on the prediction result.

[0020] The output signal of an error amplifier refers to the control signal generated by the error amplifier based on the difference between the feedback voltage of the system power supply node and the preset reference voltage. This output signal is used to control the conduction level of the linear regulating transistor in the external power supply path, thereby regulating the current flowing from the external power supply to the system power supply node. When the external power supply has sufficient load capacity, the linear regulating transistor is in a shallow conduction state, and the output signal of the error amplifier is low; when the external power supply's load capacity approaches saturation, the linear regulating transistor needs to conduct more deeply to maintain voltage stability at the system power supply node, and the output signal of the error amplifier increases accordingly. Therefore, the output signal of the error amplifier can indirectly reflect the current load capacity status of the external power supply.

[0021] The term "load capacity status" refers to the ability of an external power supply to independently maintain the voltage stability of the system's power supply nodes under current operating conditions. This application divides the load capacity of the external power supply into different state ranges by setting a first threshold and a second threshold, and adopts different control strategies for different state ranges.

[0022] Please see Figure 1 The dual-path power management method provided in this embodiment includes the following steps: Step S100: Obtain the output signal of the error amplifier.

[0023] In this step, the power management system acquires the output signal of the error amplifier. As mentioned earlier, the error amplifier generates this output signal based on the difference between the feedback voltage of the system power supply node and the preset reference voltage, in order to control the conduction level of the linear regulating transistor in the external power supply path.

[0024] Specifically, the power management system includes an error amplifier. The non-inverting input of this error amplifier is connected to a preset reference voltage, and the inverting input is connected to the feedback voltage of the system's power supply node. This feedback voltage is typically obtained by dividing the system's power supply node voltage using a voltage divider network. The error amplifier compares the feedback voltage with the reference voltage and outputs a corresponding control signal.

[0025] When the system power supply node voltage is lower than the target voltage, the output signal of the error amplifier increases, increasing the conduction level of the linear regulator transistor and thus increasing the current flowing from the external power supply to the system power supply node. When the system power supply node voltage is higher than the target voltage, the output signal of the error amplifier decreases, decreasing the conduction level of the linear regulator transistor and thus reducing the current flowing to the system power supply node. Through this negative feedback regulation mechanism, the voltage of the system power supply node is stabilized near the target voltage.

[0026] Illustrated by a specific example: Assume that the target voltage set value of the system power supply node is 4.2V, and the operating voltage range of the system power supply node is from 2.8V to 4.5V. When the external power supply is normally connected and the load is light, the linear adjustment transistor only needs to conduct slightly to maintain the voltage of the system power supply node at 4.2V. At this time, the output signal of the error amplifier is at a relatively low level; when the load gradually increases, the linear adjustment transistor needs to conduct deeper to maintain the output voltage of 4.2V. At this time, the output signal of the error amplifier increases accordingly.

[0027] Step S200: Compare the output signal with a preset first threshold and second threshold.

[0028] In this step, the power management system compares the output signal of the error amplifier obtained in step S100 with a preset first threshold and second threshold, where the second threshold is greater than the first threshold.

[0029] The so-called first threshold refers to the threshold used to characterize the lower limit of the load capacity of the external power supply. When the output signal of the error amplifier is lower than the first threshold, it indicates that the linear adjustment transistor in the external power supply path tends to be in a cut-off state, and the external power supply may not be connected or is in a state where it cannot supply power normally.

[0030] The so-called second threshold refers to the threshold used to characterize the upper limit of the load capacity of the external power supply. When the output signal of the error amplifier exceeds the second threshold, it indicates that the linear adjustment transistor in the external power supply path has approached the saturation state, and the load capacity of the external power supply has reached the upper limit and may not be able to independently support the voltage stability of the system power supply node.

[0031] Continue to use the aforementioned example: Assume that the first threshold is VTH1, the second threshold is VTH2, and VTH1 < VTH2. The power management system compares the output signal of the error amplifier with VTH1 and VTH2 through the load capacity pre-judgment circuit to obtain the comparison result.

[0032] Step S300: Determine the load capacity state of the external power supply according to the comparison result, and control the enabling of the comparator and the on / off of the battery path switch based on the load capacity state.

[0033] In this step, the power management system determines the current load capacity state of the external power supply according to the comparison result in step S200, and controls the enabling state of the comparator and the on / off of the battery path switch accordingly.

[0034] Specifically, this step includes the following control logics: Case 1: When the output signal is between the first threshold and the second threshold, i.e., VTH1 < EAOUT < VTH2, where EAOUT represents the output signal of the error amplifier. At this time, the linear regulator in the external power supply path is in the linear amplification region and there is still sufficient margin from the saturation state, indicating that the external power supply has sufficient load capacity to independently support the voltage stability of the system power supply node.

[0035] In this case, the power management system performs the following control actions: turn off the comparator and turn off the battery path switch, and supply power solely by the external power supply. Since the external power supply has sufficient load capacity, there is no need to compare the instantaneous voltage difference between the system power supply node voltage and the battery voltage in real time, thus shielding the false triggering caused by load fluctuations or noise. This fundamentally eliminates the voltage jitter of the system power supply node caused by the frequent flipping of the battery path switch at the critical point and ensures the smoothness of the power rail. At the same time, turning off the comparator can also reduce the static power consumption of the system.

[0036] Case 2: When the output signal is greater than the second threshold, i.e., EAOUT > VTH2. At this time, the linear regulator in the external power supply path is close to the saturation state, indicating that the load capacity of the external power supply has reached the preset upper limit. If the system load further increases, the external power supply alone will not be able to maintain the voltage stability of the system power supply node.

[0037] In this case, the power management system performs the following control actions: turn on the comparator and control the on / off of the battery path switch according to the comparison result of the comparator for the system power supply node voltage and the battery voltage. When the load capacity of the external power supply tends to be saturated, it is necessary to monitor the relationship between the system power supply node voltage and the battery voltage in real time so as to turn on the battery path in time for supplementary power supply when the external power supply is insufficient.

[0038] The working principle of the comparator is as follows: The two input terminals of the comparator are respectively connected to the system power supply node and the battery terminal to compare the voltage magnitudes of the two in real time. When the system power supply node voltage is lower than the battery voltage, the comparator outputs an indication signal to trigger the opening of the battery path switch, and the battery supplies supplementary current to the load; when the system power supply node voltage is not lower than the battery voltage, the comparator outputs another indication signal to trigger the closing of the battery path switch to save battery power and prevent current backflow.

[0039] Through the dual-path power management method provided in this embodiment, a load capacity prediction mechanism based on the output signal of the error amplifier is introduced on the basis of the traditional control logic. By constructing a buffer interval between the first threshold and the second threshold, this mechanism effectively avoids the frequent switching of the battery path switch near a single threshold due to ripples, significantly reduces the switching noise on the system power supply node, and improves the smoothness of the system power supply. In addition, when the system is in a state where the load capacity of the external power supply is sufficient, the comparator is turned off, further reducing the static power consumption of the system and achieving better power consumption performance while ensuring the power quality.

[0040] As mentioned above, when the output signal of the error amplifier is greater than the second threshold, it indicates that the linear regulator in the external power supply path is close to the saturation state, and the load capacity of the external power supply has reached the preset upper limit. At this time, the power management system turns on the comparator, and the comparator monitors the relationship between the system power supply node voltage and the battery voltage in real time, and dynamically controls the battery path switch according to the comparison result.

[0041] It should be noted that the two input terminals of the comparator are respectively connected to the system power supply node and the battery terminal. The comparator compares the system power supply node voltage with the battery voltage in real time and outputs a comparison result signal.

[0042] The so-called comparison result refers to the logical signal output by the comparator according to the magnitude relationship between the system power supply node voltage and the battery voltage. In this embodiment, the comparison result includes two cases: Case 1: The comparison result indicates that the system power supply node voltage is lower than the battery voltage, that is, VSYS < VBAT, where VSYS represents the system power supply node voltage and VBAT represents the battery voltage.

[0043] Case 2: The comparison result indicates that the system power supply node voltage is not lower than the battery voltage, that is, VSYS ≥ VBAT.

[0044] According to the comparison result output by the comparator, the power management system executes the following control strategy on the battery path switch: Strategy 1: When the comparison result indicates that the system power supply node voltage is lower than the battery voltage, turn on the battery path switch, and the battery supplies supplementary power to the load.

[0045] The technical significance of this strategy is that when the system power supply node voltage is lower than the battery voltage, it indicates that the power supply capacity of the external power supply cannot meet the current load demand, and the system power supply node voltage drops. At this time, turning on the battery path switch, the higher potential at the battery terminal will drive the current to flow from the battery terminal to the system power supply node to supply supplementary power to the load, thereby raising the system power supply node voltage.

[0046] Strategy 2: When the comparison result indicates that the system power supply node voltage is not lower than the battery voltage, turn off the battery path switch.

[0047] The technical significance of this strategy lies in the fact that when the voltage of the system power supply node is not lower than the battery voltage, it indicates that the current power supply is sufficient and there is no need for the battery to participate in power supply. At this time, turning off the battery path switch can save battery power and extend battery life on the one hand, and prevent current from flowing back from the system power supply node to the battery on the other hand.

[0048] Continuing with the example described above, let's illustrate how the dynamic replenishment mechanism works: Assume the external power supply voltage is 5V, the battery voltage is 3.7V, and the target voltage of the system power supply node is 4.2V. Initially, the load is at a medium level, the output signal of the error amplifier is between the first threshold VTH1 and the second threshold VTH2, the system is in a state of being powered solely by the external power supply, the comparator is off, and the battery path switch is off.

[0049] When the load suddenly increases, the linear regulator needs to conduct deeper to maintain the system power supply node voltage at 4.2V, causing the output signal of the error amplifier to rise. When the output signal exceeds the second threshold VTH2, the system determines that the external power supply load capacity may be insufficient and activates the comparator to enter real-time monitoring mode.

[0050] After the comparator is turned on, if the load continues to increase, the external power supply cannot maintain an output voltage of 4.2V even with the linear regulator fully turned on, and the system power supply node voltage begins to drop. When the system power supply node voltage drops below 3.7V (below the battery voltage), the comparator output indicates that the system power supply node voltage is lower than the battery voltage, and the power management system accordingly activates the battery path switch. After the battery path switch is activated, the battery begins to supplement power to the load, and the system power supply node voltage gradually recovers under the combined action of the external power supply and the battery.

[0051] When the system power supply node voltage rises to 3.7V or higher (not lower than the battery voltage), the comparator output indicates that the system power supply node voltage is not lower than the battery voltage, and the power management system accordingly shuts off the battery path switch. Subsequently, if the load remains high, the system power supply node voltage may drop below the battery voltage again, and the battery path switch will be turned on again. Through this dynamic replenishment mechanism, the system power supply node voltage is maintained near the battery voltage under load fluctuations.

[0052] It should be noted that when the output signal exceeds the second threshold, the battery path switch may frequently switch based on the comparison result because the comparator is in the ON state, resulting in some ripple at the system power supply node. However, this state typically only occurs when the load is large and the external power supply capacity is nearing saturation. In practical applications, as long as the external power supply is normally connected and the load is within the normal range, the system remains stable most of the time with the output signal between the first and second thresholds (i.e., external power supply alone). The embodiment of this application significantly reduces the switching frequency of the battery path switch through a predictive mechanism, ensuring the long-term smoothness and stability of the system power supply node.

[0053] As mentioned earlier, the first threshold is used to characterize the lower limit of the external power supply's load capacity. When the output signal of the error amplifier is less than the first threshold, it indicates that the linear regulator in the external power supply path tends to be cut off. There are two possible reasons for this: one is that the external power supply is not connected or has been disconnected; the other is that the external power supply is connected, but due to specific control requirements (such as high-reliability power supply mode or battery overvoltage state), the expected voltage VSET is set lower than the system common node voltage VSYS (i.e., the VBAT voltage, because the system is forced to be powered solely by VBAT at this time), and EAOUT will continuously decrease, causing the linear regulator to enter the cutoff state.

[0054] Therefore, the power management system needs to determine the corresponding power supply mode based on the external power supply connection status, and detect the external power supply connection status by detecting the difference between VBUS and VBAT.

[0055] If it is determined that no external power supply is connected, the power management system first controls the comparator to shut down to reduce the system's static power consumption. At this time, since no external power supply is connected, the system is fully powered by the battery, and there is no need to monitor the relationship between the system power supply node voltage and the battery voltage through the comparator.

[0056] Secondly, the power management system also controls the backflow prevention switch in the external power path to be turned off, thus blocking the backflow path. The backflow prevention switch is a switching device installed in the external power path to prevent current from flowing back from the system power supply node or battery terminal to the external power supply terminal. When the external power supply is not connected, if the backflow prevention switch is not turned off, current from the battery terminal may flow back to the external power supply terminal through the external power path, resulting in wasted power.

[0057] Finally, the power management system controls the battery path switch to turn on, allowing the battery to provide power independently. At this point, with no external power source connected, the system relies entirely on the battery for power; therefore, it is necessary to turn on the battery path switch to connect the battery to the system's power supply node.

[0058] If it is determined that an external power source has been connected, but the output signal is still below the first threshold, this usually occurs in the following scenario: the system was originally powered solely by a battery, the external power source has just been connected, the error amplifier has started working but its output signal has not yet risen above the first threshold. This is a transitional phase from battery power to external power supply.

[0059] During this phase, the power management system first activates the battery path switch and the anti-reverse current switch, enabling simultaneous power supply from both the external power source and the battery. In the transition phase, to ensure uninterrupted system power supply, both the battery path and the external power path must be activated simultaneously, with both supplying power to the system's power nodes, achieving a seamless "on-then-off" transition.

[0060] Secondly, after the output signal stabilizes, the system transitions to the corresponding state based on the output signal's value range. After external power is connected, the error amplifier begins operation, and its output signal gradually increases. Before the output signal stabilizes, transient disturbances or rapid fluctuations may occur. To avoid frequent state transitions caused by such transient fluctuations, the system can be configured with a delay-based debouncing mechanism. Once the output signal reaches a steady state, the subsequent power supply state is determined based on its value range.

[0061] Specifically: if the output signal after steady state is between the first threshold and the second threshold, it will switch to the external power supply-only state and turn off the comparator and the battery path switch; if the output signal after steady state is greater than the second threshold, it will switch to the dual-path collaborative power supply state, turn on the comparator and control the battery path switch according to the comparison result.

[0062] As mentioned earlier, when the output signal is less than the first threshold, the power management system needs to determine the power supply mode based on the external power supply connection status. This embodiment provides a method for determining the external power supply connection status by monitoring the difference between the external power supply voltage and the battery voltage.

[0063] The principle behind this determination is as follows: In a battery-powered system, when no external power source is connected, the voltage at the external power source terminal is typically lower than the battery voltage. When an external power source is connected, the voltage at the external power source terminal is supplied by the external power source and is typically higher than the battery voltage. Therefore, the difference between the external power source voltage and the battery voltage can be used to determine whether an external power source is connected.

[0064] Specifically, the power management system continuously monitors the external power supply voltage and the battery voltage, and calculates the difference between the two. The preset access threshold, denoted as V0, refers to the voltage difference threshold used to determine whether an external power supply has been connected.

[0065] The judgment rules are as follows: Rule 1: When the difference between the external power supply voltage and the battery voltage is greater than or equal to the preset access threshold, it is determined that the external power supply has been accessed. That is, when VBUS - VBAT ≥ V0, it is determined that the external power supply has been accessed, where VBUS represents the external power supply voltage and VBAT represents the battery voltage.

[0066] Rule 2: When the difference between the external power supply voltage and the battery voltage is less than the preset access threshold, it is determined that the external power supply has not been accessed. That is, when VBUS - VBAT < V0, it is determined that the external power supply has not been accessed.

[0067] The selection of the preset access threshold V0 needs to comprehensively consider the following factors: V0 should be small enough to be quickly detected when the external power supply is just accessed; V0 should be large enough to avoid misjudgment caused by measurement noise or voltage fluctuations.

[0068] In a specific embodiment, the value range of the preset access threshold V0 is 30mV to 100mV. In a preferred embodiment, the preset access threshold V0 is set to 50mV.

[0069] Continuing with the foregoing example, assume that the preset access threshold V0 = 50mV.

[0070] Scenario 1: The external power supply is normally accessed. The external power supply voltage VBUS = 5V, and the battery voltage VBAT = 3.7V. The difference = VBUS - VBAT = 5V - 3.7V = 1.3V > 50mV, satisfying Rule 1, and the system determines that the external power supply has been accessed.

[0071] Scenario 2: The external power supply is unplugged. After the external power supply is unplugged, the voltage at the external power supply terminal gradually drops until it reaches 0V. Assume it drops to VBUS = 3.72V and the battery voltage VBAT = 3.7V. The difference = VBUS - VBAT = 3.72V - 3.7V = 20mV < 50mV, satisfying Rule 2, and the system determines that the external power supply has not been accessed.

[0072] Scenario 3: A low-voltage external power supply is accessed. The external power supply voltage VBUS = 3.8V, and the battery voltage VBAT = 3.6V. The difference = VBUS - VBAT = 3.8V - 3.6V = 200mV > 50mV, satisfying Rule 1, and the system determines that the external power supply has been accessed.

[0073] Scenario 4: Battery voltage is higher than external power supply voltage. External power supply voltage VBUS = 3.8V, battery voltage VBAT = 3.85V. The difference = VBUS - VBAT = 3.8V - 3.85V = -50mV < 50mV, satisfying judgment rule two, the system determines that the external power supply is not connected. In this scenario, although the external power supply is physically connected, its voltage is lower than the battery voltage, so it cannot effectively supply power to the system. Therefore, judging it as "not connected" is reasonable.

[0074] When the output signal is less than the first threshold, the system first determines the connection status of the external power supply according to the method of this embodiment. If the determination result is that the external power supply is not connected, the corresponding control action is executed according to the aforementioned "control strategy when the external power supply is not connected"; if the determination result is that the external power supply is connected, the corresponding control action is executed according to the aforementioned "control strategy when the external power supply is connected".

[0075] In certain specific application scenarios, the system has extremely high requirements for power quality. For example, during the execution of tasks such as functional safety self-testing, high-precision communication, and critical data transmission, the system needs to obtain a clean and stable DC power supply to ensure the reliable completion of the task.

[0076] However, power from external sources (such as power supplied via USB or a power adapter) typically introduces some power frequency interference or switching noise. While this interference may have little impact in normal applications, it can lead to communication errors, data loss, or self-test failures in scenarios with high reliability requirements. In contrast, batteries, as DC power sources, offer clean output without power frequency interference. Therefore, prioritizing battery power in high-reliability scenarios can effectively improve system reliability.

[0077] Based on the above considerations, this application provides a highly reliable power supply mode in which the system is primarily powered by the battery, with an external power source serving as a backup. When the battery is depleted, the system automatically switches to the external power source to ensure that the system does not lose power.

[0078] The high-reliability power supply mode is initiated by the system itself. Specifically, when the system needs to perform critical tasks such as functional safety self-testing or high-precision communication, the system controller sends a reliable power supply command to the power management system. In response to this command, the power management system enters the high-reliability power supply mode.

[0079] A reliable power supply command is a control signal sent by the system controller to the power management system to trigger a high-reliability power supply mode. This command can be transmitted to the power management system via register configuration, GPIO signals, or communication buses.

[0080] Upon entering high-reliability power supply mode in response to a reliable power supply command, the power management system performs the following control actions: First, the target voltage setting of the system power supply node is lowered to a standby voltage value lower than the battery voltage. The target voltage setting refers to the target value that the power management system expects the system power supply node voltage to be stabilized at, such as the target output voltage corresponding to the reference voltage described in the previous embodiment.

[0081] The standby voltage value, denoted as VBK, refers to the target voltage of the system power supply node in high-reliability power supply mode. The selection of the standby voltage value must meet the following conditions: firstly, the standby voltage value should be higher than the minimum operating voltage of the system power supply node to ensure the system can operate normally; secondly, the standby voltage value should be lower than the typical operating voltage of the battery to ensure that the battery can independently support the voltage stability of the system power supply node in high-reliability power supply mode.

[0082] The technical significance of lowering the target voltage setting to the backup voltage value is that when the target voltage setting is lower than the battery voltage, the output signal of the error amplifier will decrease, causing the linear regulating transistor in the external power supply path to tend to be cut off. Thus, even if an external power supply is connected, its current cannot flow into the system power supply node, thereby achieving isolation from the external power supply.

[0083] Secondly, force the battery path switch to be turned on, allowing the battery to supply power independently, and turn off the anti-reverse flow switch.

[0084] In high-reliability power supply mode, the power management system forcibly activates the battery path switch, connecting the battery to the system power supply node, allowing the battery to provide power to the system power supply node. Simultaneously, the anti-backflow switch in the external power path is deactivated, completely cutting off the external power path and preventing battery current from flowing back to the external power source, thus avoiding power waste.

[0085] It should be noted that in the high-reliability power supply mode, the activation of the battery path switch is mandatory and is unaffected by the comparator output. This differs from the strategy described in the previous implementation that dynamically controls the battery path switch based on the comparison result.

[0086] Furthermore, in high-reliability power supply mode, the comparator is in the off state to reduce system power consumption. Since the battery path switch is forced on, there is no need to monitor the relationship between the system power supply node voltage and the battery voltage through the comparator.

[0087] Finally, when the battery power is depleted, causing the battery voltage to drop to near the backup voltage value, and the output signal to rise above the first threshold, the external power path is reactivated to participate in power supply.

[0088] In high-reliability power supply mode, as the system continues to operate, the battery power is constantly consumed, and the battery voltage gradually decreases. When the battery voltage drops to near the backup voltage value, the battery can no longer independently support the system power supply node to maintain the backup voltage value. At this time, the error amplifier detects that the feedback voltage of the system power supply node is lower than the reference voltage and begins to increase its output signal in an attempt to increase the conduction degree of the linear regulator to supplement the current.

[0089] When the output signal of the error amplifier rises and exceeds the first threshold, the power management system determines that the battery can no longer independently support the system power supply node to maintain the preset voltage, and then reactivates the external power path to participate in power supply. Specifically, the power management system activates the anti-reverse current switch, enabling the external power path to conduct, and the external power supply begins to supplement current to the system power supply node, working together with the battery to supply power to the system.

[0090] Continuing with the previous example, assume the default target voltage setting of the system power supply node is V1 = 4.2V, the operating voltage range of the system power supply node is 2.8V to 4.5V, the standby voltage is VBK = 3.3V, and the first threshold is VTH1. The external power supply voltage is VBUS = 5V, and the initial battery voltage is VBAT = 3.5V.

[0091] Phase 1: Entering high-reliability power supply mode.

[0092] The system controller sends a reliable power supply command to the power management system, which responds by entering a high-reliability power supply mode. The power management system lowers the target voltage setpoint from 4.2V to 3.3V, forcibly activates the battery path switch, and deactivates the reverse current protection switch.

[0093] Because the target voltage setting (3.3V) is lower than the battery voltage (3.5V), the system power supply node voltage is pulled up to 3.5V by the battery, which is higher than the target voltage setting of 3.3V. The error amplifier detects that the feedback voltage is higher than the reference voltage, and the output signal decreases, causing the linear adjustment transistor to tend to turn off. At this time, the output signal of the error amplifier is lower than the first threshold VTH1.

[0094] The system enters a stable, highly reliable power supply state, with the system power supply node voltage at 3.5V (equal to the battery voltage), and is fully powered by the battery, with external power sources isolated.

[0095] Phase Two: Battery Power Consumption.

[0096] As the system continues to operate, the battery power is gradually consumed, and the battery voltage gradually decreases from 3.5V. While the battery voltage is above 3.3V, the battery can still independently support the system power supply nodes to maintain a level higher than the target voltage setting value, and the output signal of the error amplifier remains below the first threshold, so the system continues to be in a highly reliable power supply state.

[0097] Phase 3: Automatically switch to external power supply.

[0098] When the battery voltage drops to around 3.3V, the battery can no longer independently maintain the system power supply node at 3.3V. The error amplifier detects that the feedback voltage is approaching the reference voltage and begins to increase the output signal. When the battery voltage drops further, and the output signal of the error amplifier rises and exceeds the first threshold VTH1, the power management system determines that an external power supply is required.

[0099] At this point, the power management system activates the anti-backflow switch, and the external power path is connected. Since the external power supply voltage (5V) is higher than the system power supply node voltage, the external power supply begins to supplement current to the system power supply node. The error amplifier adjusts the conduction level of the linear regulating transistor based on the difference between the feedback voltage and the reference voltage, stabilizing the system power supply node voltage near the target voltage setting value.

[0100] Depending on the stable value of the error amplifier output signal, the system may switch to a state where it is powered solely by an external power supply (if the output signal is stable between the first and second thresholds) or a state where it is powered by two power supplies in tandem (if the output signal is stable above the second threshold).

[0101] The exit from high-reliability power supply mode includes two scenarios: Scenario 1: When the battery is depleted and the output signal of the error amplifier rises above the first threshold, the system is forced to exit the high-reliability power supply mode and reactivate the external power supply path to participate in power supply.

[0102] Scenario 2: After the critical task is completed, the system controller can send a command to the power management system to exit the high-reliability power supply mode. The power management system responds to this command, restoring the target voltage setpoint to its default value and determining the subsequent power supply mode based on the current external power supply and battery status.

[0103] In the case of active exit, since the target voltage setpoint is restored from the backup voltage value to the default value, the output signal of the error amplifier will rise. The system will undergo a transition process similar to the "control strategy when the external power supply is connected" in the aforementioned implementation, and finally jump to the corresponding power supply state according to the stable value of the output signal.

[0104] In practical applications, the voltage of the external power supply is not always at a high level. For example, when the system is connected to a low-powered power bank via a USB interface, the external power supply voltage may only be around 3.8V, lower than the default target voltage of the system's power supply node. In this situation, if the system still attempts to stabilize the voltage of the system's power supply node at the default target voltage, the following problems will occur: Because the external power supply voltage is lower than the default target voltage, the linear regulator needs to be fully turned on to increase the system power supply node voltage as much as possible, but it still cannot reach the default target voltage. At this time, the output signal of the error amplifier will remain at a high level, and the system will be in a state of insufficient external power supply load capacity for a long time. When the system power supply node voltage is close to the battery voltage, the battery path switch may switch frequently, causing the system power supply node voltage to fluctuate. When switching between external power supply and battery power supply, due to the large difference between the target voltage and the actual achievable voltage, voltage surges or impacts may occur, affecting system stability.

[0105] To address the aforementioned issues, this application provides a dynamic following mode. In this mode, when the external power supply voltage is low, the system automatically updates the target voltage to be equal to the battery voltage, ensuring a smooth transition during power switching and avoiding surges or impacts caused by large voltage differences.

[0106] The dynamic follow mode is automatically determined by the power management system based on the current power status, without requiring external commands. Specifically, the power management system continuously monitors the external power supply voltage and battery voltage, and automatically enters dynamic follow mode when the following conditions are met: Condition 1: Both the external power supply voltage and the battery voltage are lower than the default target voltage.

[0107] The default target voltage refers to the target voltage setting value of the system power supply node under normal operating conditions, denoted as V1. This value is usually preset according to system requirements, for example, 4.2V.

[0108] This condition ensures that dynamic follow mode is triggered only when the external power supply voltage is low. When the external power supply voltage is higher than the default target voltage, the external power supply has sufficient capability to stabilize the system power supply node voltage at the default target voltage, without needing to enter dynamic follow mode.

[0109] Condition 2: The difference between the external power supply voltage and the battery voltage is greater than or equal to the preset access threshold.

[0110] As mentioned earlier, the preset access threshold is used to determine whether an external power source is connected. When the difference between the external power source voltage and the battery voltage is greater than or equal to the preset access threshold, it is determined that the external power source is connected.

[0111] This condition ensures that Dynamic Follow Mode is triggered only when an external power source is effectively connected. If no external power source is connected, the system should be powered solely by the battery and does not need to enter Dynamic Follow Mode.

[0112] Based on the above two conditions, the entry conditions for dynamic follow mode can be described as follows: when the external power supply voltage is detected to be lower than the default target voltage, the battery voltage is lower than the default target voltage, and the difference between the external power supply voltage and the battery voltage is greater than or equal to the preset access threshold, dynamic follow mode is entered.

[0113] When the entry conditions for dynamic follow mode are met, the power management system performs the following control actions: Update the target voltage of the system power supply node to be equal to the battery voltage.

[0114] Specifically, the power management system updates the target output voltage corresponding to the reference voltage from the default target voltage V1 to the current battery voltage VBAT. After the update, the error amplifier adjusts the conduction level of the linear regulator transistor according to the new target voltage to stabilize the system power supply node voltage near the battery voltage.

[0115] In dynamic follow mode, the target voltage of the system power supply node updates dynamically in accordance with the battery voltage. As the battery power is consumed, the battery voltage gradually decreases, and the target voltage decreases accordingly.

[0116] Specifically, the power management system can achieve voltage tracking in the following ways: the power management system continuously monitors the battery voltage and updates the target voltage to the current battery voltage in real time; the power management system samples the battery voltage at a fixed period (e.g., once per second) and updates the target voltage to the sampled value; the power management system monitors the change in battery voltage and only updates the target voltage when the change in battery voltage exceeds a preset threshold (e.g., 50mV).

[0117] In a preferred embodiment, the power management system employs a combination of periodic updates and threshold triggering, which ensures the target voltage's ability to track changes in battery voltage while avoiding unnecessary frequent updates.

[0118] Continuing with the previous example, assume the default target voltage V1 = 4.2V, the preset access threshold V0 = 50mV, the first threshold is VTH1, and the second threshold is VTH2.

[0119] Scenario 1: Low-voltage external power supply is connected, and dynamic follow mode is entered.

[0120] Assume the external power supply voltage VBUS = 3.8V and the battery voltage VBAT = 3.6V.

[0121] First, test condition one: external power supply voltage (3.8V) < default target voltage (4.2V), battery voltage (3.6V) < default target voltage (4.2V), condition one is met.

[0122] Secondly, the second detection condition is: the difference between the external power supply voltage and the battery voltage = 3.8V - 3.6V = 200mV ≥ the preset access threshold (50mV). Condition two is met.

[0123] If both conditions are met, the power management system enters dynamic follow mode and updates the target voltage from 4.2V to 3.6V (equal to the battery voltage).

[0124] After the update, the error amplifier adjusts the conduction level of the linear regulator transistor according to the new target voltage (3.6V). Since the external power supply voltage (3.8V) is higher than the target voltage (3.6V), the linear regulator transistor operates within its normal linear regulation range, and the output signal of the error amplifier remains at a moderate level. The system power supply node voltage is stabilized around 3.6V.

[0125] Scenario 2: Load change response in dynamic follow mode.

[0126] Continuing with the scenario one setup, the system is in dynamic follow mode, the target voltage is 3.6V, and the system power supply node voltage is stable at 3.6V.

[0127] When the load increases, the linear regulator needs to conduct deeper to maintain the system power supply node voltage. The output signal of the error amplifier rises accordingly. If the output signal exceeds the second threshold VTH2, the system enters a dual-path cooperative power supply state, and the comparator is activated to monitor the relationship between the system power supply node voltage and the battery voltage.

[0128] Because the target voltage is equal to the battery voltage in dynamic follow mode, the system power supply node voltage is very close to the battery voltage. When load fluctuations cause the system power supply node voltage to be slightly lower than the battery voltage, the comparator triggers the battery path switch to open, and the battery supplements power to the load; when the system power supply node voltage rises back to the battery voltage, the comparator triggers the battery path switch to close.

[0129] It should be noted that in dynamic follow mode, because the target voltage is close to the battery voltage, the system may frequently switch between external power supply alone and dual-source power supply when the load is large. This is similar to the normal operating condition described in the previous implementation, but because the voltage difference is small, the voltage fluctuation amplitude during switching is also correspondingly smaller.

[0130] Scenario 3: Battery voltage drops in dynamic follow mode.

[0131] Continuing with the scenario one, as the system operates, the battery power gradually decreases, and the battery voltage drops from 3.6V to 3.4V.

[0132] The power management system detects a change in battery voltage and updates the target voltage from 3.6V to 3.4V. The error amplifier adjusts the conduction level of the linear regulator transistor according to the new target voltage to stabilize the system power supply node voltage around 3.4V.

[0133] During this process, the voltage at the system power supply node decreases smoothly as the battery voltage decreases, avoiding sudden changes or jumps.

[0134] Scenario 4: Exit dynamic follow mode.

[0135] Continuing with the scenario one, suppose the user replaces the external power supply with a higher voltage power adapter, changing the external power supply voltage from 3.8V to 5V.

[0136] The power management system detected that the external power supply voltage (5V) is greater than the default target voltage (4.2V). Condition 1 is no longer met, and the system exits the dynamic follow mode.

[0137] After exiting dynamic follow mode, the power management system restores the target voltage from the current value (assumed to be 3.4V) to the default target voltage (4.2V). The error amplifier adjusts the conduction level of the linear regulator transistor according to the new target voltage, and the system power supply node voltage gradually increases from 3.4V to 4.2V.

[0138] The dynamic follow mode shares some similarities with the high-reliability power supply mode described in the preceding embodiments, both involving adjustment of the target voltage. However, their triggering conditions and application scenarios differ: The high-reliability power supply mode is actively triggered by the system to isolate interference from external power sources and ensure the reliable execution of critical tasks. In this mode, the target voltage is set to a backup voltage value lower than the battery voltage, and the system is powered solely by the battery. The dynamic follow mode is automatically triggered by the power management system based on the power status, aiming to achieve smooth power switching when the external power supply voltage is low. In this mode, the target voltage is set to be equal to the battery voltage, and the system may be powered solely by an external power source or by a combination of external power and battery power.

[0139] When the triggering conditions for both modes are met simultaneously, the high-reliability power supply mode takes precedence over the dynamic follow mode. That is, if the system is already in high-reliability power supply mode, it will not switch to dynamic follow mode simply because the conditions for dynamic follow mode are met.

[0140] In practical applications, battery voltage is not constant but varies with the charge and discharge state. For lithium batteries, the voltage range is typically 3.0V to 4.5V, and the voltage at full charge can reach 4.2V to 4.5V.

[0141] Under certain operating conditions, the battery voltage may be higher than the target voltage setting of the system power supply node. For example, when the battery has just finished charging, its voltage is at a high level, which may be higher than the default target voltage of the system power supply node; as mentioned earlier, in high-reliability power supply mode or dynamic follow mode, the target voltage of the system power supply node may be lowered to a level below the battery voltage; different types or batches of batteries may have different full-charge voltages. The full-charge voltage of some batteries may be higher than the system's preset target voltage.

[0142] When the battery voltage is higher than the target voltage setting, if no special measures are taken, problems such as abnormal operation of the external power path and risk of current backflow may occur. In order to address the above problems, this application provides a detection and handling mechanism for battery overvoltage state to ensure that the system can work safely and stably when the battery voltage is higher than the target voltage.

[0143] The determination of battery overvoltage status is automatically completed by the power management system. Specifically, the power management system continuously monitors the battery voltage and the target voltage setting value of the system power supply node. When the battery voltage is detected to be higher than the target voltage setting value, it is determined to be a battery overvoltage status.

[0144] Mathematically, this is expressed as follows: when VBAT > VSET, the battery is considered to be in an overvoltage state, where VBAT represents the battery voltage and VSET represents the target voltage setting value of the system power supply node.

[0145] It should be noted that the target voltage setting here refers to the currently effective target voltage, which may be the default target voltage V1, the backup voltage value VBK in high reliability power supply mode, or the follow voltage value equal to the battery voltage in dynamic follow mode.

[0146] When the battery is determined to be in an overvoltage state, the power management system performs the following control actions: Force the battery path switch to turn on, and power is supplied by the battery.

[0147] When the battery is under overvoltage conditions, its voltage exceeds the target voltage setting, and the battery has sufficient capacity to independently supply power to the system's power supply nodes. Therefore, the power management system forcibly activates the battery path switch, connecting the battery to the system's power supply nodes, allowing the battery to provide power to the system.

[0148] The technical significance of forcibly activating the battery path switch is that it uses the high potential of the battery to power the system, while simultaneously consuming the battery power, causing the battery voltage to gradually drop below the target voltage setting value, thereby enabling the system to return to normal power supply mode.

[0149] It should be noted that the opening of the battery path switch is mandatory under battery overvoltage conditions and is unaffected by the comparator output. This differs from the strategy of dynamically controlling the battery path switch based on the comparison result described in the previous embodiments.

[0150] Turn off the anti-backflow switch to prevent the battery from flowing back into the external power source.

[0151] When the battery is under overvoltage conditions, because the battery voltage is higher than the target voltage setting, the output signal of the error amplifier is at a lower level, and the linear regulator tends to be cut off. However, the cutoff of the linear regulator does not completely block the reverse current path, and a small leakage current may still exist.

[0152] To completely prevent battery current from flowing back to the external power source through the external power path, the power management system disables the anti-backflow switch, physically cutting off the external power path. Thus, even if a potential difference exists, current cannot flow from the system power supply node to the external power source.

[0153] The technical significance of turning off the anti-reverse current switch is as follows: to prevent battery power waste. If the battery current flows back to the external power source, the battery power will be wasted unnecessarily, shortening the battery life; to protect the external power source and charging circuit, as some external power sources or charging circuits may not be able to withstand reverse current, and current backflow may damage the devices; and to avoid abnormal operating conditions. Current backflow may cause the voltage at the external power source to rise abnormally, affecting the system's determination of the external power source connection status and causing chaos in subsequent control logic.

[0154] Under battery overvoltage conditions, the error amplifier remains operational, continuously monitoring the relationship between the feedback voltage and the reference voltage at the system power supply node.

[0155] Because the battery voltage is higher than the target voltage setting, the system power supply node voltage is pulled up by the battery to the battery voltage level, which is higher than the target voltage. The error amplifier detects that the feedback voltage is higher than the reference voltage, and the output signal decreases. When the output signal decreases below the first threshold, the power management system's status register is updated to the corresponding status value.

[0156] The technical significance of keeping the error amplifier in operation is that it continuously monitors the relationship between the system power supply node voltage and the target voltage, so that it can detect the battery voltage drop to near the target voltage in a timely manner and trigger the switching of the power supply mode.

[0157] The comparator is off when the battery is under overvoltage.

[0158] This is because: under overvoltage conditions, the battery path switch is forcibly opened, eliminating the need for a comparator to determine its on / off state. Disabling the comparator reduces the system's static power consumption.

[0159] Continuing with the previous example, assume the default target voltage V1 = 4.2V, the first threshold is VTH1, and the preset access threshold V0 = 50mV. The external power supply voltage VBUS = 5V.

[0160] Scenario 1: The battery has just been fully charged and has entered an overvoltage state.

[0161] Assuming the battery has just finished charging, the battery voltage VBAT = 4.5V, which is higher than the target voltage setting (4.2V).

[0162] The power management system detected that VBAT (4.5V) > VSET (4.2V), determining it to be a battery overvoltage state. Subsequently, the power management system forcibly activated the battery path switch and deactivated the anti-reverse current switch.

[0163] After the system enters the battery overvoltage state, the voltage at the system power supply node is pulled up to 4.5V by the battery. The error amplifier detects that the feedback voltage is higher than the reference voltage, and the output signal drops below the first threshold VTH1. At this time, the system is powered solely by the battery, and the external power supply path is isolated.

[0164] Scenario 2: Power consumption under battery overvoltage conditions.

[0165] Continuing with the scenario one, the system is in a battery overvoltage state and is powered solely by the battery.

[0166] As the system continues to operate, the battery power is gradually depleted, and the battery voltage gradually decreases from 4.5V. The voltage at the system power supply node also decreases accordingly (because it is directly powered by the battery).

[0167] When the battery voltage is higher than the target voltage setting (4.2V), the system remains in a battery overvoltage state and is powered solely by the battery.

[0168] Scenario 3: Exiting the battery overvoltage state.

[0169] Continuing with the scenario two, when the battery voltage drops to around 4.2V, the battery can no longer maintain the system power supply node voltage at a level higher than the target voltage.

[0170] The error amplifier detects that the feedback voltage is approaching the reference voltage and begins to increase the output signal to increase the conduction level of the linear regulator. When the output signal of the error amplifier rises and exceeds the first threshold VTH1, the power management system determines that an external power supply is required.

[0171] At this point, the power management system activates the anti-reverse current switch, and the external power path is connected. The system enters a transition state, with both the external power supply and the battery simultaneously powering the system's power nodes. After the output signal of the error amplifier stabilizes, the subsequent power supply state is determined based on its numerical range. If the output signal stabilizes between the first threshold VTH1 and the second threshold VTH2, the system switches to external power supply-only mode, shuts down the comparator and battery path switch, and turns on the anti-reverse current switch. Afterward, the system is powered solely by the external power supply, and the system power supply node voltage stabilizes at the target voltage of 4.2V.

[0172] If the output signal stabilizes above the second threshold VTH2, the system switches to dual-path collaborative power supply mode, turns on the comparator, and controls the battery path switch according to the comparison result.

[0173] Scenario 4: A complete example of the battery overvoltage state.

[0174] To more clearly demonstrate the complete working process under battery overvoltage conditions, the following timing example is provided:

[0175] As shown in the table above, during the period from T0 to T2, the battery voltage is higher than the target voltage, the system is in a battery overvoltage state, and is powered solely by the battery. The anti-backflow switch is closed to prevent current backflow. At time T3, the battery voltage drops to near the target voltage, and the system enters a transition state. At time T4, the system stabilizes under external power supply, and the system power supply node voltage is stabilized at the target voltage of 4.2V.

[0176] The battery overvoltage state shares some similarities with the high-reliability power supply mode described in the previously mentioned embodiments, both involving independent battery power supply and the shutdown of the anti-backflow switch. However, they differ significantly in triggering conditions, target voltage settings, and application purposes. The battery overvoltage state is a passively triggered protective state designed to handle abnormally high battery voltages; while the high-reliability power supply mode is an actively triggered functional state designed to provide a clean power supply environment for critical tasks.

[0177] Please see Figure 2 The power management system of this application uses a state machine model to manage and switch power supply modes. Before describing the state machine model, the state registers and their values ​​will be explained first.

[0178] A so-called status register refers to a register in the power management system used to store the result of predicting the current load capacity, denoted as REG[2:1]. This register contains two bits: the first bit REG[1] and the second bit REG[2]. As described in the previous embodiment, the power management system predicts the load capacity of the external power supply by comparing the output signal EAOUT of the error amplifier with the first threshold VTH1 and the second threshold VTH2, and the value of the status register reflects this comparison result.

[0179] Specifically, REG[1] is determined by the comparison result of the error amplifier output signal and the first threshold: when EAOUT is greater than VTH1, REG[1] = 1; when EAOUT is less than or equal to VTH1, REG[1] = 0. REG[2] is determined by the comparison result of the error amplifier output signal and the second threshold: when EAOUT is greater than VTH2, REG[2] = 1; when EAOUT is less than or equal to VTH2, REG[2] = 0.

[0180] Based on the above definitions, the correspondence between the status register REG[2:1] and the error amplifier output signal EAOUT is as follows: when EAOUT < VTH1, REG[2:1] = 00; when VTH1 < EAOUT < VTH2, REG[2:1] = 01; when EAOUT > VTH2, REG[2:1] = 11. The value of the status register directly determines the working state and control strategy of the power management system.

[0181] The state machine model of this application includes five states: S0 state, S1 state, S2 state, S3 state, and SS state. The characteristics of each state and the jump relationship between them will be described below.

[0182] The S0 state corresponds to the battery independent power supply mode when the external power supply is not connected. In this state, the value of the status register REG[2:1] = 00, and the corresponding output signal range is EAOUT < VTH1. The reason for entering the S0 state is that the external power supply is disconnected, causing the error amplifier to be disabled and its output signal to drop below the first threshold. In the S0 state, the power management system turns off the comparator to reduce power consumption, turns off the anti-backflow switch to prevent battery current from flowing back to the external power supply terminal, turns on the battery path switch to supply power to the system power supply node by the battery, and at the same time turns off the error amplifier.

[0183] The S1 state corresponds to the external power supply independent power supply mode when the external power supply load capacity is sufficient. In this state, the state register value REG[2:1] = 01, and the corresponding output signal range is VTH1 < EAOUT < VTH2. REG[2:1] = 01 indicates that the output signal of the error amplifier has exceeded the first threshold but not exceeded the second threshold, that is, the linear regulator in the external power supply path is in the linear amplification region and there is still sufficient margin from the saturation state. In the S1 state, the power management system turns off the comparator to shield false triggers caused by load fluctuations or noise, turns on the anti-backflow switch to conduct the external power supply path, turns off the battery path switch to prevent the battery from participating in power supply, and turns on the error amplifier for voltage stabilization control. The S1 state is the main operating state of the system when the external power supply is normally connected and the load is within the normal range.

[0184] The S2 state corresponds to the dual-path collaborative power supply mode when the external power supply load capacity tends to be saturated. In this state, the state register value REG[2:1] = 11, and the corresponding output signal range is EAOUT > VTH2. REG[2:1] = 11 indicates that the output signal of the error amplifier has exceeded the second threshold, that is, the linear regulator in the external power supply path has approached the saturation state, and the external power supply may not be able to independently support the voltage stability of the system power supply node. In the S2 state, the power management system turns on the comparator to monitor the relationship between the system power supply node voltage and the battery voltage in real time, and dynamically controls the battery path switch according to the comparison result: when the comparison result indicates that the system power supply node voltage is lower than the battery voltage, the battery path switch is turned on for supplementary power supply; when the comparison result indicates that the system power supply node voltage is not lower than the battery voltage, the battery path switch is turned off.

[0185] The S3 state corresponds to the intermediate transition state from battery power supply to external power supply. In this state, the state register value REG[2:1] = x1, where x indicates that REG[2] can be any value, that is, REG[1] = 1 and REG[2] is not limited, and the corresponding output signal range is EAOUT > VTH1. The main function of the S3 state is to achieve a seamless transition of "connect first and then disconnect": when the system detects the recovery of the external power supply from the S0 state or the SS state, it first enters the S3 state, making both the external power supply path and the battery path conduct, ensuring that the system power supply is not interrupted during the switching transient process. In the S3 state, the power management system turns off the comparator, turns on the anti-backflow switch and the battery path switch, and turns on the error amplifier. The system sets a delay debounce mechanism in the S3 state. After the output signal of the error amplifier tends to be stable, it jumps to the S1 state or the S2 state according to its numerical range.

[0186] The SS state corresponds to the high-reliability power supply mode or the battery-priority power supply mode under the battery overvoltage state. In this state, the state register value REG[2:1] = 00, and the corresponding output signal range is EAOUT < VTH1. The power supply mode is battery-only power supply with the external power supply as a backup. The state register values of the SS state and the S0 state are the same, but there are essential differences between them: The S0 state is a passive entry into the battery power supply mode due to the absence of the external power supply, and the error amplifier is in the off state; The SS state is an active selection of the battery power supply mode due to specific requirements when the external power supply is already connected, and the error amplifier remains on to continuously monitor the relationship between the system power supply node voltage and the target voltage.

[0187] The condition for jumping from the S0 state to the S3 state is: The external power supply is detected to be connected in the S0 state. As mentioned before, when the difference between the external power supply voltage and the battery voltage is greater than or equal to the preset connection threshold, it is determined that the external power supply is connected. After detecting that the external power supply is connected, the system turns on the error amplifier and the anti-backflow switch, and at the same time keeps the battery path switch on. Since the system power supply node voltage is lower than the target voltage, the output signal of the error amplifier gradually increases. When the output signal exceeds the first threshold VTH1, the state register is updated to REG[2:1] = x1, and the system enters the S3 state.

[0188] The conditions for jumping from the S3 state to the S1 state or the S2 state are: The output signal of the error amplifier in the S3 state tends to be stable. After the debounce period ends, if the steady-state output signal is between VTH1 and VTH2, the state register is updated to REG[2:1] = 01, and the system jumps to the S1 state, turning off the comparator and the battery path switch; If the steady-state output signal is greater than VTH2, the state register is updated to REG[2:1] = 11, and the system jumps to the S2 state, turning on the comparator and controlling the battery path switch according to the comparison result.

[0189] The condition for jumping from the S1 state to the S2 state is: The output signal of the error amplifier in the S1 state exceeds the second threshold VTH2. This jump is usually triggered by an increase in the load, resulting in the linear regulator needing to conduct deeper to maintain the system power supply node voltage, and the output signal of the error amplifier increases accordingly. When the output signal exceeds VTH2, the state register is updated from REG[2:1] = 01 to REG[2:1] = 11, and the system jumps to the S2 state and turns on the comparator.

[0190] The condition for transitioning from state S2 to state S1 is that the output signal of the error amplifier in state S2 decreases to between VTH1 and VTH2. This transition is usually triggered by a decrease in load, when the load capacity of the external power supply is restored to sufficient levels, the conduction of the linear regulator decreases, and the output signal of the error amplifier decreases accordingly. When the output signal decreases to between VTH1 and VTH2, the status register is updated from REG[2:1] = 11 to REG[2:1] = 01, the system transitions to state S1, and the comparator and battery path switch are turned off.

[0191] The condition for transitioning from state S1 or S2 to state S0 is: the external power supply is detected to be disconnected. The external power supply is determined to be disconnected when the difference between the external power supply voltage and the battery voltage is less than a preset access threshold. After detecting the external power supply disconnection, the system shuts down the error amplifier and the anti-reverse current switch, and turns on the battery path switch to switch to battery-only power supply. Because the error amplifier is off, its output signal drops below the first threshold VTH1, the status register is updated to REG[2:1] = 00, and the system enters state S0.

[0192] The conditions for transitioning from S1 or S2 to SS are: entering high-reliability power supply mode in response to a reliable power supply command, or detecting a battery overvoltage state due to the battery voltage being higher than the target voltage setting. In high-reliability power supply mode, the system lowers the target voltage setting to a backup voltage value lower than the battery voltage, the system power supply node voltage is pulled up by the battery to a level higher than the target voltage, and the output signal of the error amplifier drops below the first threshold VTH1. In the battery overvoltage state, since the battery voltage itself is higher than the target voltage setting, the system power supply node voltage is also pulled up by the battery, and the output signal of the error amplifier drops below the first threshold VTH1. In both cases, the status register is updated to REG[2:1] = 00, the system forcibly turns on the battery path switch and turns off the anti-reverse current switch, entering SS state.

[0193] The conditions for transitioning from SS state to S3 state are: battery power consumption causing the output signal of the error amplifier to rise above the first threshold VTH1, or the system actively exiting the high-reliability power supply mode. As the battery power is consumed, the battery voltage gradually decreases. When the battery can no longer independently support the system power supply node to maintain the target voltage, the error amplifier begins to raise the output signal. When the output signal exceeds the first threshold VTH1, the status register is updated from REG[2:1] = 00 to REG[2:1] = x1, the system activates the anti-backflow switch to reactivate the external power path, and enters S3 state.

[0194] Continuing with the previous example, let's illustrate the complete operation of the state machine. Assume the default target voltage V1 = 4.2V, the backup voltage VBK = 3.3V, and the preset access threshold V0 = 50mV. Initially, no external power is connected, the battery voltage VBAT = 3.7V, and the system is in state S0, powered solely by the battery, with the system power supply node voltage at 3.7V.

[0195] When the user plugs in an external power source (5V), the system detects a voltage difference of 1.3V between the external power source and the battery voltage, which is greater than the preset access threshold of 50mV, thus determining that the external power source is connected. The system activates the error amplifier and the anti-reverse current switch, and the output signal of the error amplifier gradually increases. When the output signal exceeds the first threshold VTH1, the system enters state S3, where the external power source and the battery supply power simultaneously. After the output signal stabilizes between VTH1 and VTH2, the status register is updated to REG[2:1]=01, and the system jumps to state S1, disabling the comparator and the battery path switch, and the system is powered solely by the external power source, with the system power supply node voltage stabilizing at 4.2V.

[0196] If the load suddenly increases, the output signal of the error amplifier rises and exceeds the second threshold VTH2, the status register is updated to REG[2:1] = 11, the system jumps to state S2 and the comparator is turned on. When the system power supply node voltage drops below 3.7V due to insufficient power supply, the comparator output indicates that the system power supply node voltage is lower than the battery voltage, and the battery path switch is turned on to provide supplementary power. Subsequently, the load decreases, the output signal of the error amplifier drops to between VTH1 and VTH2, the status register is updated to REG[2:1] = 01, and the system jumps back to state S1.

[0197] If the system subsequently enters a high-reliability power supply mode, the target voltage setting is lowered from 4.2V to 3.3V. Since the battery voltage (3.5V) is higher than the target voltage (3.3V), the system power supply node voltage is pulled up to 3.5V by the battery. The output signal of the error amplifier drops below the first threshold VTH1, the status register is updated to REG[2:1] = 00, the system jumps to the SS state, forcibly opens the battery path switch and closes the anti-reverse current switch, and is powered solely by the battery. As the battery power is consumed, when the battery voltage drops to around 3.3V, the output signal of the error amplifier rises above the first threshold VTH1, the system jumps to the S3 state to reactivate the external power path, and then jumps to the S1 or S2 state based on the stable value of the output signal.

[0198] This embodiment provides a dual-path power management circuit for implementing the dual-path power management method described above. Please refer to... Figure 3The circuit includes an external power supply path 110, a battery path 120, a load capacity prediction module 130, a logic control module 140, a mirror transistor M7, an auxiliary drive transistor M8, an error amplifier, and a comparator.

[0199] Specifically, the external power path 110 is connected between the external power supply terminal VBUS and the system power supply node VSYS, and is used to transfer electrical energy from the external power supply to the system power supply node. The external power path 110 includes a linear regulator M3 and a backflow prevention switch M4. The first end of the linear regulator M3 is connected to the external power supply terminal VBUS, the second end of the linear regulator M3 is connected to the system power supply node VSYS through the backflow prevention switch M4, and the control terminal of the linear regulator M3 is connected to the output terminal of the error amplifier to receive the output signal EAOUT.

[0200] The linear regulator M3, acting as the adjustment element for the external power supply path, has its conduction level linearly controlled by the output signal EAOUT. By adjusting its equivalent resistance, the current flowing from the external power supply terminal to the system power supply node is regulated, thereby achieving a regulated output voltage at the system power supply node. In one specific implementation, the linear regulator M3 is implemented using a PMOS transistor. Its source is connected to the external power supply terminal VBUS, its drain is connected to the system power supply node VSYS via the anti-reverse current switch M4, and its gate is connected to the output terminal of the error amplifier.

[0201] The anti-backflow switch M4 is used to prevent current from flowing back from the system power supply node or battery terminal to the external power supply terminal. The control terminal of the anti-backflow switch M4 is connected to the logic control module 140 through the level conversion driver LS2, and the logic control module 140 controls its on / off state according to the first bit REG[1] of the status register.

[0202] Specifically, when REG[1] = 1, the level shifter LS2 outputs a corresponding drive signal to turn on the anti-backflow switch M4; when REG[1] = 0, the level shifter LS2 outputs a corresponding drive signal to turn off the anti-backflow switch M4. As described in the previous embodiment, when the external power supply is not connected, in high-reliability power supply mode, or in battery overvoltage state, the anti-backflow switch M4 is turned off to prevent current backflow.

[0203] The control terminals of transistor M7 and linear regulator M3 are both connected to the output terminal of error amplifier U1 to receive the output signal EAOUT. The first terminal of transistor M7 is connected to the external power supply terminal VBUS, and the second terminal is connected to an internal circuit node. Since the control terminals of transistor M7 and linear regulator M3 receive the same control signal and their first terminals are both connected to the external power supply terminal VBUS, they form a current mirror structure, ensuring that the current of transistor M7 is in a fixed ratio to the current of linear regulator M3. In one specific embodiment, both transistor M7 and linear regulator M3 are implemented using PMOS transistors, and the ratio of their drain currents is determined by their width-to-length ratio.

[0204] The auxiliary driver transistor M8 is used in conjunction with the mirror transistor M7 to adjust the mirror current, thereby assisting in driving the linear adjustment transistor M3. The control terminal of the auxiliary driver transistor M8 is connected to the output terminal of the error amplifier U1 to receive the output signal EAOUT. The auxiliary driver transistor M8 works in conjunction with the mirror transistor M7 to adjust the direction and magnitude of the mirror current according to the change of the output signal EAOUT, thus providing an auxiliary enhancement effect on driving the linear adjustment transistor M3.

[0205] Battery path 120 connects the battery terminal VBAT and the system power supply node VSYS, and is used to transfer the battery's electrical energy to the system power supply node. Battery path 120 includes battery path switch M5, fault protection switch M6, and protection module 150. The first terminal of battery path switch M5 is connected to the battery terminal VBAT, the second terminal of battery path switch M5 is connected to the system power supply node VSYS, and the control terminal of battery path switch M5 is connected to logic control module 140 through level shifting driver LS1.

[0206] The battery path switch M5 serves as the on / off control element for the battery power supply path, and its on / off state is controlled by the logic control module 140 based on the current operating state and the comparator output. As described in the previous embodiment, the battery path switch M5 is closed when the external power supply load capacity is sufficient, and the battery path switch M5 is opened when the external power supply load capacity is insufficient or when battery power is required.

[0207] An abnormal protection switch M6 and a battery path switch M5 are connected in series between the battery terminal VBAT and the system power supply node VSYS. The first terminal of battery path switch M5 is connected to the battery terminal VBAT, and the second terminal of battery path switch M5 is connected to the first terminal of abnormal protection switch M6. The second terminal of abnormal protection switch M6 is connected to the system power supply node VSYS. The control terminal of battery path switch M5 is connected to logic control module 140 via level shifting driver LS1, and the control terminal of abnormal protection switch M6 is connected to the output terminal of protection module 150.

[0208] The protection module 150 is used to detect abnormal conditions in the battery path, including but not limited to overcurrent and overvoltage. The input of the protection module 150 is connected to the current detection node and voltage detection node in the battery path to monitor the current and voltage status of the battery path in real time.

[0209] Under normal operating conditions, the protection module 150 does not detect any abnormalities, and the abnormal protection switch M6 and the battery path switch M5 operate synchronously. That is, when the logic control module 140 controls the battery path switch M5 to open, the abnormal protection switch M6 is also in the open state, and the battery path is connected; when the logic control module 140 controls the battery path switch M5 to close, the state of the abnormal protection switch M6 does not affect the connection or disconnection of the battery path, because M5 has already disconnected the path.

[0210] When the protection module 150 detects abnormal conditions such as overcurrent or overvoltage, regardless of the control state of the battery path switch M5 by the logic control module 140, the protection module 150 outputs a forced shutdown signal, forcibly shutting down the abnormal protection switch M6. Since the abnormal protection switch M6 is connected in series with the battery path switch M5, the forced shutdown of M6 will cut off the entire battery path, thereby protecting the battery and system from damage caused by abnormal current or voltage.

[0211] The error amplifier generates an output signal EAOUT based on the difference between the feedback voltage of the system power supply node and the reference voltage, thereby controlling the conduction level of the linear regulating transistor M3. Figure 3 In the diagram, the error amplifier is labeled U1. The inverting input of error amplifier U1 is connected to the feedback voltage FB, the non-inverting input is connected to the reference voltage VREF, and the output of error amplifier U1 is the signal EAOUT. The feedback voltage FB is obtained by dividing the system power supply node voltage using a voltage divider resistor network.

[0212] Specifically, the voltage divider resistor network includes a first voltage divider resistor R1 and a second voltage divider resistor R2 connected in series. One end of the first voltage divider resistor R1 is connected to the system power supply node VSYS, and the other end of the first voltage divider resistor R1 is connected to one end of the second voltage divider resistor R2. The other end of the second voltage divider resistor R2 is grounded, and the connection node of the first voltage divider resistor R1 and the second voltage divider resistor R2 outputs a feedback voltage FB.

[0213] The error amplifier U1 operates as follows: When the system power supply node voltage is lower than the target voltage, the feedback voltage FB is lower than the reference voltage VREF. The output signal EAOUT of the error amplifier U1 increases, increasing the conduction degree of the linear regulating transistor M3, thereby increasing the current flowing from the external power supply to the system power supply node and causing its voltage to rise. When the system power supply node voltage is higher than the target voltage, the feedback voltage FB is higher than the reference voltage VREF. The output signal EAOUT of the error amplifier U1 decreases, decreasing the conduction degree of the linear regulating transistor M3, thereby reducing the current flowing to the system power supply node and causing its voltage to drop. Through this negative feedback regulation mechanism, the system power supply node voltage is stabilized near the target voltage.

[0214] Error amplifier U1 also has an enable terminal connected to the enable signal ENOP. The enable signal ENOP is generated by the logic control module 140 based on the external power supply connection status. When an external power supply is detected, the enable signal ENOP is active, and error amplifier U1 is in the working state; when an external power supply is detected not being connected, the enable signal ENOP is inactive, and error amplifier U1 is disabled to reduce power consumption. Figure 3 As shown, the enable signal ENOP is associated with the "!VBUS unplugged" signal, that is, the error amplifier U1 is enabled when VBUS is not unplugged, and the error amplifier U1 is disabled when VBUS is unplugged.

[0215] The load capacity prediction module 130 is used to compare the output signal EAOUT of the error amplifier with the first threshold VTH1 and the second threshold VTH2, and output a status signal characterizing the load capacity status of the external power supply. The input terminal of the load capacity prediction module 130 is connected to the output terminal of the error amplifier U1 to receive the output signal EAOUT, and the output terminal of the load capacity prediction module 130 outputs the first REG[1] and the second REG[2] of the status register.

[0216] As described in the previous implementation, REG[1] is determined by comparing the output signal EAOUT with the first threshold VTH1, and REG[2] is determined by comparing the output signal EAOUT with the second threshold VTH2. The values ​​of the status register REG[2:1] reflect the load capacity status of the external power supply: REG[2:1] = 00 indicates that the output signal is lower than the first threshold, REG[2:1] = 01 indicates that the output signal is between the first threshold and the second threshold, and REG[2:1] = 11 indicates that the output signal is higher than the second threshold.

[0217] The comparator is used to compare the system power supply node voltage with the battery voltage and output the comparison result. Figure 3In this diagram, the comparator is labeled CMP. One input of comparator CMP is connected to the system power supply node VSYS, and the other input is connected to the battery terminal VBAT. The output of comparator CMP is the comparison result signal Result. When the system power supply node voltage is lower than the battery voltage, the comparison result signal Result = 1; when the system power supply node voltage is not lower than the battery voltage, the comparison result signal Result = 0.

[0218] The comparator CMP also has an enable terminal connected to the enable signal EN. The enable signal EN is generated by the logic control module 140 based on the values ​​of the status register REG[2:1]. As described in the previous embodiment, the comparator CMP is in the working state only when REG[2:1] = 11 and the enable signal EN = 1; in other states, the enable signal EN = 0 and the comparator CMP is in the disabled state to reduce power consumption.

[0219] The logic control module 140 is used to control the enable state of the comparator CMP and the on / off state of the battery path switch M5 and the anti-reverse flow switch M4 based on the status signal output by the load capacity prediction module 130. The input terminals of the logic control module 140 are connected to the status register REG[2:1] and the comparison result signal Result, and the output terminals of the logic control module 140 are connected to the enable signal EN, the level shift driver LS1, and the level shift driver LS2.

[0220] The logic control module 140 executes the following control logic: when the status register REG[2:1] = 01, that is, when the output signal is between the first threshold and the second threshold, the logic control module 140 outputs the enable signal EN = 0 to turn off the comparator CMP, and turns off the battery path switch M5 through the level conversion driver LS1, and turns on the anti-reverse power supply switch M4 through the level conversion driver LS2, so that the system is powered by an external power supply alone.

[0221] When the status register REG[2:1] = 11, that is, when the output signal is greater than the second threshold, the logic control module 140 outputs the enable signal EN = 1 to turn on the comparator CMP, and controls the battery path switch M5 according to the comparison result signal Result: when Result = 1, the battery path switch M5 is turned on through the level conversion driver LS1, and when Result = 0, the battery path switch M5 is turned off through the level conversion driver LS1.

[0222] The logic control module 140 also receives other control signals, including VBUS disconnection signals, battery overvoltage signals, and high-reliability status signals. As described in the previous embodiment, the logic control module 140 executes corresponding forced control actions under specific operating conditions: when VBUS disconnection is detected, the error amplifier U1 and the anti-backflow switch M4 are turned off, and the battery path switch M5 is turned on; when entering the high-reliability power supply mode or when battery overvoltage is detected, the battery path switch M5 is forcibly turned on and the anti-backflow switch M4 is turned off.

[0223] Level shift drivers LS1 and LS2 are used to convert the control signals output by the logic control module 140 into levels suitable for driving the switching devices. Since the battery path switch M5 and the reverse current protection switch M4 may operate in a higher voltage range, while the logic control module 140 typically operates in a lower voltage range, level shift drivers are needed to perform level conversion and enhance driving capability.

[0224] The following combination Figure 3 The signal flow of the circuit is explained as follows: The voltage of the external power supply terminal VBUS is transmitted to the system power supply node VSYS through the external power supply path 110, which consists of the linear regulating transistor M3 and the anti-reverse current switch M4. The voltage of the system power supply node VSYS is divided by the voltage divider resistors R1 and R2 to obtain the feedback voltage FB, which is then input to the inverting input terminal of the error amplifier U1.

[0225] Subsequently, the error amplifier U1 compares the feedback voltage FB with the reference voltage VREF and outputs a control signal EAOUT. The control signal EAOUT is connected to the control terminal of the linear regulating transistor M3 to adjust its conduction level, and is also input to the load capacity prediction module 130 for threshold comparison. The load capacity prediction module 130 outputs the status register REG[2:1] to the logic control module 140. The logic control module 140 outputs an enable signal EN to the comparator CMP according to the value of REG[2:1], and controls the on / off state of the battery path switch M5 and the anti-reverse flow switch M4 through level conversion drivers LS1 and LS2 according to REG[2:1] and the comparison result signal Result.

[0226] Please see Figure 4 The load capacity prediction module 130 includes a first detection branch 131 and a second detection branch 132. The first detection branch 131 is used to detect whether the output signal EAOUT of the error amplifier exceeds the first threshold VTH1, and outputs the first bit REG of the status register [1]. The second detection branch 132 is used to detect whether the output signal EAOUT of the error amplifier exceeds the second threshold VTH2, and outputs the second bit REG of the status register [2]. The circuit structure and working principle of the two detection branches are described below.

[0227] The first detection branch 131 includes a first transistor M1, a first constant current source CS1, and a first inverter. The control terminal of the first transistor M1 is connected to the output terminal of the error amplifier to receive the output signal EAOUT. The first terminal of the first transistor M1 is grounded. The second terminal of the first transistor M1 is connected to one end of the first constant current source CS1, and the other end of the first constant current source CS1 is connected to the internal power supply VCC. The second terminal of the first transistor M1 is also connected to the input terminal of the first inverter, and the output terminal of the first inverter outputs the first bit REG[1] of the status register. In a specific embodiment, the first transistor M1 is implemented by an N-type transistor, such as an NMOS transistor. At this time, the control terminal of the first transistor M1 is the gate, the first terminal is the source and is grounded, and the second terminal is the drain and is connected to the first constant current source CS1.

[0228] The working principle of the first detection branch 131 is as follows. The first constant current source CS1 provides a constant bias current, and this current flows from the internal power supply VCC to the second terminal (drain) of the first transistor M1. When the output signal EAOUT of the error amplifier is lower than the threshold voltage of the first transistor M1, the first transistor M1 is in the cut-off state and cannot conduct the current provided by the first constant current source CS1. Since the current has nowhere to flow, the voltage of the second terminal (drain) of the first transistor M1 is pulled up by the first constant current source CS1 to a level close to the internal power supply VCC. This high-level signal is inverted by the first inverter and outputs a low level, that is, REG[1] = 0. When the output signal EAOUT of the error amplifier is higher than the threshold voltage of the first transistor M1, the first transistor M1 conducts, and the current provided by the first constant current source CS1 flows through the first transistor M1 to the ground terminal. At this time, the voltage of the second terminal (drain) of the first transistor M1 is pulled down to a level close to the ground level. This low-level signal is inverted by the first inverter and outputs a high level, that is, REG[1] = 1.

[0229] From the above working principle, it can be seen that the detection threshold of the first detection branch 131 is the threshold voltage of the first transistor M1. In other words, the first threshold VTH1 is determined by the threshold voltage of the first transistor M1. When EAOUT < VTH1, REG[1] = 0; when EAOUT > VTH1, REG[1] = 1. By selecting the first transistor M1 with a specific threshold voltage, the required first threshold VTH1 can be set.

[0230] The second detection branch 132 includes a second transistor M2, a second constant current source CS2, and a second inverter. The control terminal of the second transistor M2 is connected to the output terminal of the error amplifier to receive the output signal EAOUT. The first terminal of the second transistor M2 is connected to the internal power supply VCC. The second terminal of the second transistor M2 is connected to one terminal of the second constant current source CS2, and the other terminal of the second constant current source CS2 is grounded. The second terminal of the second transistor M2 is also connected to the input terminal of the second inverter. The output terminal of the second inverter outputs the second bit REG of the status register [2]. In a specific embodiment, the second transistor M2 is implemented using a P-type transistor, such as a PMOS transistor. In this case, the control terminal of the second transistor M2 is the gate, the first terminal is the source and is connected to the internal power supply VCC, and the second terminal is the drain and is connected to the second constant current source CS2.

[0231] The working principle of the second detection branch 132 is as follows. The second constant current source CS2 provides a constant bias current, which flows from the second terminal (drain) of the second transistor M2 to the ground terminal. For a PMOS transistor, the PMOS transistor turns on when the difference between the gate voltage and the source voltage is less than the absolute value of its threshold voltage (i.e., when the gate voltage is sufficiently lower than the source voltage). Since the source of the second transistor M2 is connected to the internal power supply VCC, the second transistor M2 turns on when the output signal EAOUT of the error amplifier is lower than the difference between VCC and the absolute value of the threshold voltage of the second transistor M2. Let the absolute value of the threshold voltage of the second transistor M2 be VTHP, then the conduction condition of the second transistor M2 is EAOUT. <VCC - VTHP。

[0232] When the output signal EAOUT of the error amplifier is low, EAOUT is satisfied. <vcc - vthp时，第二晶体管m2导通，内部电源vcc通过第二晶体管m2向第二恒流源cs2提供电流。此时第二晶体管m2的第二端（漏极）电压被拉高至接近内部电源vcc的电平，该高电平信号经第二反相器反相后输出低电平，即reg[2]="0。当误差放大器的输出信号EAOUT升高至EAOUT">When VCC - VTHP, the gate-source voltage difference of the second transistor M2 is not sufficient to turn it on, and the second transistor M2 is turned off. Since the second constant current source CS2 continuously draws current while the second transistor M2 cannot provide current, the voltage at the second terminal (drain) of the second transistor M2 is pulled down to near the ground level by the second constant current source CS2. This low-level signal is inverted by the second inverter and a high-level signal is output, that is, REG[2] = 1.

[0233] From the above working principle, it can be seen that the detection threshold of the second detection branch 132 is the difference between the internal power supply voltage VCC and the absolute value of the threshold voltage VTHP of the second transistor M2. In other words, the second threshold VTH2 is determined by the difference between the internal power supply voltage VCC and the threshold voltage of the second transistor M2, that is, VTH2 = VCC - VTHP. When EAOUT < VTH2, REG[2] = 0; when EAOUT > VTH2, REG[2] = 1. By selecting the second transistor M2 with a specific threshold voltage and setting an appropriate internal power supply voltage VCC, the required second threshold VTH2 can be set.

[0234] Combining the outputs of the first detection branch 131 and the second detection branch 132, the correspondence between the status register REG[2:1] and the error amplifier output signal EAOUT is as follows: when EAOUT < VTH1, the first transistor M1 is turned off and the second transistor M2 is turned on, REG[1] = 0 and REG[2] = 0, that is, REG[2:1] = 00; when VTH1 < EAOUT < VTH2, the first transistor M1 is turned on and the second transistor M2 is turned on, REG[1] = 1 and REG[2] = 0, that is, REG[2:1] = 01; when EAOUT > VTH2, the first transistor M1 is turned on and the second transistor M2 is turned off, REG[1] = 1 and REG[2] = 1, that is, REG[2:1] = 11. This correspondence is consistent with the status register value-taking rule described above.

[0235] Please refer to Figure 5 , which shows the waveforms of each key signal during the load change process of the system when the external power supply is normally connected, the battery voltage VBAT = 3.7V, and the target voltage VSET of the system power supply node = 4.2V. From top to bottom in the figure are: battery voltage VBAT, system power supply node voltage VSYS, comparison result signal Result, state of the battery path switch M5, system load VSYS LOAD, error amplifier output signal EAOUT, status register REG, and comparator enable signal EN(CMP). The working process of the system will be analyzed below in combination with this waveform diagram.

[0236] In the initial stage, the system load is at a low level, the output signal EAOUT of the error amplifier is between the first threshold VTH1 and the second threshold VTH2, the status register REG[2:1] = 01, and the system is in state S1. Figure 5 As shown, in state S1, the comparator enable signal EN = 0, the comparator CMP is in the off state, the battery path switch M5 remains closed, and the system is powered solely by an external power source. At this time, the system power supply node voltage VSYS is stable at the target voltage of 4.2V, with a smooth waveform and no jitter.

[0237] When the system load begins to increase, the linear regulator M3 needs to be turned on more deeply to maintain the system power supply node voltage, and the output signal EAOUT of the error amplifier increases accordingly. For example... Figure 5 As shown, the EAOUT signal gradually increases with the increase of load. During the stage when EAOUT rises but has not yet exceeded the second threshold VTH2, the status register REG[2:1] remains at 01, the system continues to be in state S1, the comparator remains off, and the battery path switch M5 remains off. At this time, even if the voltage of the system power supply node drops slightly due to transient load fluctuations, the battery path switch M5 will not be triggered because the comparator is off, and the voltage of the system power supply node remains stable.

[0238] When the load increases further, causing the output signal EAOUT of the error amplifier to rise and exceed the second threshold VTH2, the status register REG[2:1] is updated from 01 to 11, and the system transitions from state S1 to state S2. Figure 5 As shown, when EAOUT crosses the VTH threshold line, the REG signal changes, the comparator enable signal EN changes from 0 to 1, and the comparator CMP is turned on.

[0239] After entering state S2, the comparator CMP begins real-time monitoring of the relationship between the system power supply node voltage VSYS and the battery voltage VBAT. For example... Figure 5 As shown, during state S2, due to the large load, the external power supply capacity is approaching saturation, and the system power supply node voltage VSYS may drop. When VSYS drops below the battery voltage VBAT (3.7V), the comparison result signal Result changes from 0 to 1, triggering the battery path switch M5 to open. After M5 opens, the battery begins to replenish current to the system power supply node, and the VSYS voltage recovers. When VSYS recovers to VBAT (3.7V) or above, the comparison result signal Result changes from 1 to 0, triggering the battery path switch M5 to close.

[0240] like Figure 5 As shown, during state S2, the system power supply node voltage VSYS varies between the target voltage of 4.2V and the battery voltage of 3.7V as the load continues to fluctuate. Whenever VSYS drops below 3.7V, the Result signal is set to 1, and M5 is activated to provide supplemental power; whenever VSYS rises back to 3.7V or above, the Result signal is set to 0, and M5 is deactivated. This dynamic replenishment mechanism ensures that the system power supply node remains near the battery voltage even under heavy loads, preventing it from dropping below the system's minimum operating voltage.

[0241] When the load decreases, the conduction level of the linear regulating transistor M3 decreases, and the output signal EAOUT of the error amplifier decreases accordingly. For example... Figure 5 As shown, when EAOUT decreases to between the first threshold VTH1 and the second threshold VTH2, the status register REG[2:1] is updated from 11 to 01, and the system transitions from state S2 back to state S1. In state S1, the comparator enable signal EN returns to 0, the comparator CMP is turned off, the battery path switch M5 is turned off, and the system returns to the external power supply mode. Afterward, the system power supply node voltage VSYS stabilizes again at the target voltage of 4.2V.

[0242] In this application, the comparator's enable state is controlled by a state machine: the comparator is only activated after the system transitions from state S1 to state S2 (i.e., the output signal EAOUT of the error amplifier rises between the first and second thresholds and exceeds the second threshold VTH2). This state transition process is limited by the response bandwidth of the error amplifier, with a minimum response time on the order of tens of microseconds. This means that when an external power supply is used alone, if the voltage at the system power supply node drops below the battery voltage for less than tens of microseconds due to transient interference, the state machine will not transition to state S2 because the output signal of the error amplifier has not yet had time to rise above the second threshold. The comparator remains off, and the battery path switch M5 remains locked. Through this mechanism, the system effectively filters out false triggering caused by high-frequency noise and significantly reduces the switching frequency of the battery path switch.

[0243] like Figure 5 As shown, during state S1, even if the system load fluctuates, as long as the output signal EAOUT of the error amplifier remains between VTH1 and VTH2, the comparator remains off, the battery path switch M5 remains off, and the voltage at the system power supply node remains smooth and stable. Only when the load increases to the point that the external power supply capacity is indeed approaching saturation (EAOUT > VTH2) will the system switch to state S2 and turn on the comparator, allowing the battery to provide supplemental power as needed.

[0244] from Figure 5 The causal relationship between the state transition timing and various control signals can also be observed. First, load changes cause a change in the error amplifier output signal EAOUT; second, the comparison result between EAOUT and the threshold causes the state register REG to update; third, the update of REG causes a change in the comparator enable signal EN; finally, with the comparator enabled, the comparison result Result controls the action of the battery path switch M5. This hierarchical control structure means that the action of the battery path switch M5 is no longer directly controlled by the instantaneous voltage difference between the system power supply node voltage and the battery voltage, but rather by the dual filtering of the error amplifier response bandwidth and the state machine transition logic, thereby achieving effective suppression of high-frequency interference.

[0245] This application also provides a power management system, which includes a dual-path power management circuit, an external power interface, a battery, and a load.

[0246] The dual-path power management circuit adopts the circuit structure described in the previous embodiment to manage the power supply process from external power source and battery to load.

[0247] The external power interface is used to connect to an external power source and transfer electrical energy from the external power source to the external power supply terminal VBUS of the dual-path power management circuit. In one specific embodiment, the external power interface is a USB interface for connecting a USB power adapter or a power bank. In another specific embodiment, the external power interface is a power adapter interface for connecting an AC-to-DC power adapter.

[0248] The battery is connected to the battery terminal VBAT of the dual-path power management circuit to provide power to the system when an external power source is not connected or insufficient. The battery can be a lithium-ion battery, a lithium polymer battery, or other rechargeable batteries.

[0249] The load is connected to the system power node VSYS of the dual-path power management circuit, obtaining the power required for operation from the system power node. The load can be a functional unit such as a processor, display module, or communication module in a portable electronic device.

[0250] The power management system provided in this embodiment is suitable for applications such as portable electronic devices and vehicle electronic systems that require power from both external power sources and batteries.

[0251] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them; under the concept of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of this application as described above, which are not provided in detail for the sake of brevity; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.< / vcc>

Claims

1. A dual-path power management method, applied to a power management system including an external power path and a battery path, wherein the power management system supplies power to the load through a system power supply node, characterized in that, include: Obtain the output signal of the error amplifier; The error amplifier generates the output signal based on the difference between the feedback voltage of the system power supply node and the preset reference voltage, so as to control the conduction degree of the linear adjustment tube in the external power supply path. The output signal is compared with a preset first threshold and a second threshold; the second threshold is greater than the first threshold. The load capacity status of the external power supply is determined based on the comparison results, and the comparator is enabled and the battery path switch is turned on or off based on the load capacity status. Specifically, when the output signal is between the first threshold and the second threshold, the comparator is turned off and the battery path switch is turned off, and the external power supply provides power independently; when the output signal is greater than the second threshold, the comparator is turned on, and the battery path switch is controlled to open or close based on the comparison result between the system power supply node voltage and the battery voltage by the comparator.

2. The method according to claim 1, characterized in that, When the output signal is greater than the second threshold and the comparison result of the comparator indicates that the voltage of the system power supply node is lower than the battery voltage, the battery path switch is turned on to supplement the power supply to the load from the battery. When the comparison result indicates that the voltage of the system power supply node is not lower than the battery voltage, the battery path switch is turned off.

3. The method according to claim 1, characterized in that, When the output signal is less than the first threshold, the power supply mode is determined according to the external power supply connection status: If it is determined that the external power supply is not connected, the comparator is turned off, the anti-reverse current switch in the external power supply path is turned off, and the battery path switch is turned on, so that the battery supplies power alone. If it is determined that an external power source has been connected, the battery path switch and the anti-reverse current switch are turned on, so that the external power source and the battery supply power simultaneously. After the output signal stabilizes, the system jumps to the corresponding state according to the value range of the output signal.

4. The method according to claim 3, characterized in that, The connection status of the external power source is determined by monitoring the difference between the external power supply voltage and the battery voltage. When the difference is greater than or equal to the preset access threshold, it is determined that the external power supply has been connected; When the difference is less than the preset access threshold, it is determined that the external power supply is not connected.

5. The method according to claim 1, characterized in that, Also includes: In response to a reliable power supply command, it enters a high-reliability power supply mode; The target voltage setting of the system power supply node is lowered to a standby voltage value lower than the battery voltage; The battery path switch is forcibly turned on, allowing the battery to supply power independently, and the anti-reverse current switch is turned off; When the battery power is depleted, causing the battery voltage to drop to near the backup voltage value, and the output signal to rise above the first threshold, the external power path is reactivated to participate in power supply.

6. The method according to claim 1, characterized in that, Also includes: Check if both the external power supply voltage and the battery voltage are lower than the default target voltage; If so, and the difference between the external power supply voltage and the battery voltage is greater than or equal to the preset access threshold, then the target voltage of the system power supply node is updated to be equal to the battery voltage.

7. The method according to claim 1, characterized in that, When the battery voltage is detected to be higher than the target voltage setting value of the system power supply node, it is determined to be a battery overvoltage state. The battery path switch is forcibly turned on to supply power from the battery, and the anti-backflow switch is turned off to prevent the battery from flowing back to the external power supply.

8. A dual-path power management circuit, characterized in that, include: The external power path includes a linear regulating tube and a backflow prevention switch connected between the external power supply terminal and the system power supply node; The battery path includes a battery path switch connecting the battery terminal and the system power supply node; An error amplifier is configured to generate an output signal based on the difference between the feedback voltage and the reference voltage of the system power supply node, so as to control the conduction degree of the linear adjustment transistor. The load capacity prediction module is configured to compare the output signal with a first threshold and a second threshold, and output a status signal characterizing the load capacity status of the external power supply, wherein the second threshold is greater than the first threshold. A comparator configured to compare the voltage of the system power supply node with the battery voltage; The logic control module is configured to control the enable state of the comparator and the on / off state of the battery path switch and the anti-reverse flow switch according to the status signal; Specifically, when the output signal is between the first threshold and the second threshold, the logic control module turns off the comparator and the battery path switch; when the output signal is greater than the second threshold, the logic control module turns on the comparator and controls the battery path switch according to the output of the comparator.

9. The circuit according to claim 8, characterized in that, The load capacity prediction module includes: The first detection branch includes a first transistor, a first constant current source, and a first inverter. The control terminal of the first transistor is connected to the output terminal of the error amplifier to receive the output signal. The first terminal of the first transistor is grounded. The second terminal of the first transistor is connected to one end of the first constant current source. The other end of the first constant current source is connected to an internal power supply. The second terminal of the first transistor is connected to the input terminal of the first inverter. The output terminal of the first inverter outputs the first bit of the status register. The second detection branch includes a second transistor, a second constant current source, and a second inverter. The control terminal of the second transistor is connected to the output terminal of the error amplifier to receive the output signal. The first terminal of the second transistor is connected to the internal power supply. The second terminal of the second transistor is connected to one terminal of the second constant current source. The other terminal of the second constant current source is grounded. The second terminal of the second transistor is connected to the input terminal of the second inverter. The output terminal of the second inverter outputs the second bit of the status register. The first threshold is determined by the threshold voltage of the first transistor, and the second threshold is determined by the difference between the internal power supply voltage and the threshold voltage of the second transistor.

10. A power management system, characterized in that, include: The dual-path power management circuit as described in claim 8 or 9; External power interface, used to connect to an external power source; The battery is connected to the battery terminal of the dual-path power management circuit. The load is connected to the system power supply node of the dual-path power management circuit.

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