Core board structure and its formation method, electronic equipment

Abstract

A core board and its forming method, and an electronic device thereof, are disclosed. In the core board forming method, a conductive via is formed through the core board region of a substrate, and in a direction perpendicular to the substrate surface, the width of the middle section of the conductive via is smaller than the width of its two ends. Then, a conductive structure is formed in the conductive via. Finally, the substrate is cut to form multiple core boards. This disclosure, by first forming a conductive via with a narrow middle section and wide ends, ensures that the conductive structure formed in the conductive via also has a narrow middle section, thus anchoring the conductive structure to the conductive via of the substrate. The conductive structure has a strong bonding force with the substrate, effectively resisting the stress generated during the cutting process when forming multiple core boards. The conductive structure is not easily pulled out of the substrate and can stably exist in the substrate, which is beneficial for improving the yield and reliability of the core board structure.

Description

Technical Field

[0001] The invention relates to the semiconductor field, and more particularly to a core board structure and its formation method, and electronic devices. Background Technology

[0002] In the field of semiconductor packaging technology, with the ever-increasing demands for data processing speed and interconnect density in high-performance computing, flip-chip ball grid array (FCBGA) packaging is undergoing iterative upgrades in substrate materials. Glass substrates, with their superior thermal stability, higher mechanical strength, and flatness compared to traditional organic resin substrates, can effectively support the rapid transmission of high-frequency signals and significantly reduce signal loss, and are gradually becoming the mainstream carrier for next-generation high-performance FCBGA packaging. This shift in substrate form aims to solve the warpage problem that easily occurs in large-size resin substrates and meet the stringent dimensional stability requirements of fine circuit design.

[0003] In the manufacturing process of glass substrates, dividing large-size panels into individual units is a key step in the post-packaging stage. Currently, the industry mainly uses two cutting paths. The first path uses purely mechanical cutting, that is, using metal blades and resin blades to cut the substrate step by step to achieve physical separation. The second path introduces laser technology. First, the laser is used to ablate and remove the laminated insulating film (ABF) on the cutting path, usually forming a stepped structure. Then, a resin blade is used to cut the exposed glass underneath. After cutting, adhesive is applied to the exposed glass area for edge protection, in order to maintain the structural integrity while physically separating the components.

[0004] However, the existing glass substrate cutting process still has shortcomings that urgently need to be improved when it is actually applied to packaging products with high layer count and high integration. Summary of the Invention

[0005] The problem addressed by the embodiments of this disclosure is to provide a core board structure and its forming method, as well as an electronic device, so that a conductive structure can be stably formed in the core board, thereby improving the yield and reliability of the core board structure.

[0006] The present invention provides a method for forming a core board structure, comprising: providing a substrate, the substrate including a plurality of core board regions; forming conductive vias penetrating the substrate in the core board regions of the substrate, wherein the width of the middle section of the conductive via is smaller than the width of the two ends of the conductive via in a direction perpendicular to the surface of the substrate; forming a conductive structure in the conductive via; and after forming the conductive structure, cutting the substrate along the edge of the core board regions to form a plurality of core boards.

[0007] Optionally, the step of forming a conductive via through the substrate in the core area of ​​the substrate includes: processing the substrate to form a modified region through the substrate, wherein the width of the middle section of the modified region is smaller than the width of the two ends of the modified region in a direction perpendicular to the surface of the substrate; removing the substrate material of the modified region in the substrate to form the conductive via.

[0008] Optionally, the step of processing the substrate to form the modified region includes irradiating the substrate with a femtosecond laser or a picosecond laser.

[0009] Optionally, in the step of providing a substrate, the substrate includes a first surface and a second surface opposite to each other; the step of processing the substrate to form a modified region includes: performing a first modification treatment on the substrate to form a first modified region; after forming the first modified region, performing a second modification treatment on the substrate to form a second modified region, wherein the ends of the first modified region and the ends of the second modified region are connected on the first surface, and the ends of the first modified region and the ends of the second modified region are connected on the second surface.

[0010] Optionally, in the step of providing a substrate, the substrate includes opposing first and second surfaces; in the step of forming the conductive structure in the conductive via, the conductive structure further includes a first interconnect layer formed on at least the first or second surface.

[0011] Optionally, in the step of providing the substrate, the material of the substrate includes glass.

[0012] Optionally, the method for forming the core board structure further includes: after providing the substrate, before forming the conductive structure in the conductive via, forming a structural reinforcement hole penetrating the substrate; in the step of forming the conductive structure in the conductive via, a reinforcement structure is also formed in the structural reinforcement hole, and the reinforcement structure is isolated from the conductive structure.

[0013] Optionally, in the step of providing the substrate, the core board region includes a central region and an edge region located around the central region; in the step of forming a conductive via through the substrate, the conductive via is located in the central region of the core board region; in the step of forming a structural reinforcement hole through the substrate, the structural reinforcement hole is formed in the edge region and / or the central region of the core board region.

[0014] Optionally, in the step of forming a structural reinforcement hole through the substrate, the structural reinforcement hole includes a first groove extending in a first direction and a second groove extending in a second direction on a cross section perpendicular to the surface of the substrate, and the first groove and the second groove intersect.

[0015] Optionally, in the step of forming a structural reinforcement hole through the substrate, the first hole and the second hole intersect at the thickness center of the substrate in a direction perpendicular to the surface of the substrate.

[0016] Optionally, in the step of providing a substrate, the substrate includes opposing first and second surfaces; in the step of forming a structural reinforcement hole through the substrate, the ends of the first hole groove and the ends of the second hole groove are spaced apart on the first surface, and the ends of the first hole groove and the ends of the second hole groove are spaced apart on the second surface.

[0017] Optionally, in the step of forming a conductive via through the substrate in the core region of the substrate, a structural reinforcement hole through the substrate is formed in the substrate.

[0018] Optionally, the steps of forming the conductive structure and the reinforcing structure include: forming a seed layer on the surface of the substrate, the wall of the conductive via, and the wall of the structural reinforcing hole; after forming the seed layer, forming a conductive material in the conductive via and the structural reinforcing hole; patterning the conductive material on the surface of the substrate, forming the conductive structure in the conductive via, and forming the reinforcing structure in the structural reinforcing hole.

[0019] Optionally, in the step of patterning the conductive material on the substrate surface, the conductive material on the substrate surface corresponding to the reinforcing structure is removed.

[0020] Optionally, the method for forming the core board structure further includes: forming a dielectric layer exposing the conductive structure on the substrate and the conductive structure; forming an interconnect structure on the conductive structure exposed by the dielectric layer; forming a second interconnect layer on the interconnect structure and a portion of the dielectric layer on the side of the interconnect structure; forming a solder resist layer on the dielectric layer on the side of the second interconnect layer, wherein the solder resist layer is spaced apart from the second interconnect layer; and forming a solder layer on the surface of the second interconnect layer.

[0021] Optionally, the step of forming a dielectric layer exposing the conductive structure on the substrate and the conductive structure includes: laminating a dielectric material layer on the substrate and the conductive structure; and patterning the dielectric material layer to form a dielectric layer exposing the conductive structure.

[0022] The present invention also provides a core board structure, comprising: a core board; a conductive structure located in the core board and extending through the core board, wherein the width of the middle section of the conductive structure is smaller than the width of the two ends of the conductive structure in a direction perpendicular to the surface of the core board.

[0023] Optionally, the core board includes opposing first and second surfaces, and the conductive structure further includes at least a first interconnect layer formed on the first or second surface.

[0024] Optionally, the core board may be made of glass.

[0025] Optionally, the core board structure further includes a reinforcing structure extending through the core board, and the reinforcing structure is isolated from the conductive structure.

[0026] Optionally, the core board includes a central region and an edge region located around the central region; the conductive structure is located in the central region, and the reinforcing structure is located in the edge region and / or the central region II.

[0027] Optionally, the reinforcing structure includes a first structure extending in a first direction and a second structure extending in a second direction in a cross section perpendicular to the surface of the core board, and the first structure and the second structure intersect.

[0028] Optionally, in a direction perpendicular to the surface of the core board, the first structure and the second structure intersect at the thickness center of the core board.

[0029] Optionally, the core board includes a first surface and a second surface opposite to each other; on the first surface, the ends of the first structure and the ends of the second structure are spaced apart, and on the second surface, the ends of the first structure and the ends of the second structure are spaced apart.

[0030] Optionally, the core board structure further includes: an interconnect structure located on the conductive structure; a dielectric layer located on the core board and the conductive structure at the side of the interconnect structure; a second interconnect layer located on the interconnect structure and a portion of the dielectric layer at the side of the interconnect structure; a solder resist layer located on the dielectric layer at the side of the second interconnect layer, and the solder resist layer being spaced apart from the second interconnect layer; and a solder layer located on the second interconnect layer.

[0031] The present invention provides an electronic device, including: the aforementioned core board structure.

[0032] Compared with the prior art, the technical solution of the invention has the following advantages: In the core board structure formation method provided in this disclosure, a conductive via is formed through the core board area of ​​the substrate, and the width of the middle section of the conductive via is smaller than the width of its two ends in the direction perpendicular to the substrate surface; then a conductive structure is formed in the conductive via; finally, the substrate is cut to form multiple core boards. This disclosure, by first forming a conductive via with a narrow middle section and wide ends, ensures that the conductive structure formed in the conductive via also has a narrow middle section, thus anchoring the conductive structure in the conductive via of the substrate. The conductive structure has a strong bonding force with the substrate, thus resisting the stress generated during the cutting process in the step of cutting the substrate to form multiple core boards. The conductive structure is not easily pulled out of the substrate, and can stably exist in the substrate, which is beneficial to improving the yield and reliability of the core board structure.

[0033] In the core board structure provided in this embodiment, the core board structure includes a conductive structure located within and penetrating the core board. In a direction perpendicular to the core board surface, the width of the middle section of the conductive structure is smaller than the width of its two ends. Because the width of the middle section of the conductive structure is smaller than the width of its two ends, the conductive structure is anchored within the core board, and there is a strong bonding force between the conductive structure and the core board. Therefore, when the core board is subjected to thermal stress or mechanical impact, the conductive structure can remain firmly within the core board, thereby improving the reliability of the core board structure. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0035] Figures 1 to 11 This is a schematic diagram of the steps in the method for forming the core board structure according to an embodiment of the present invention. Detailed Implementation

[0036] As the background technology indicates, existing processes face three main technical bottlenecks when handling complex stacked structures. First, purely mechanical cutting methods are unsuitable for FCBGA substrates with high layer counts (e.g., 20 layers or more). Due to the mismatch in the coefficient of thermal expansion (CTE) between the ABF layer and the glass substrate, significant stress accumulates within the multilayer stacked structure. During mechanical cutting, this stress in the ABF layer is released instantaneously, leading to severe delamination at the cutting interface. Second, the laser ablation combined with adhesive protection process carries the risk of material modulus mismatch. The adhesive used to protect the exposed glass edges has a significantly different Young's modulus from that of the glass itself. Under high-temperature conditions, this modulus mismatch can cause stress concentration, leading to glass edge breakage. Third, the interfacial bonding strength of through-glass via (TGV) structures is insufficient. When the substrate explodes or breaks due to stress, the insufficient bonding strength between the copper filler within the via and the glass via wall often causes the copper pillars to be pulled out of the via, resulting in circuit interconnect failure and severely impacting the reliability of the packaged product.

[0037] To address the aforementioned technical problem, the core board structure forming method provided in this disclosure involves forming a conductive via through the core board region of the substrate, wherein the width of the middle section of the conductive via is smaller than the width of its two ends in the direction perpendicular to the substrate surface; then, a conductive structure is formed in the conductive via; and finally, the substrate is cut to form multiple core boards. This disclosure, by first forming a conductive via with a narrow middle section and wide ends, ensures that the conductive structure formed within the conductive via also has a narrow middle section, thus anchoring the conductive structure to the conductive via of the substrate. This results in a strong bond between the conductive structure and the substrate, enabling resistance to stress generated during the cutting process when forming multiple core boards. The conductive structure is less likely to be pulled out of the substrate, and it can stably exist within the substrate, thereby improving the yield and reliability of the core board.

[0038] The technical solutions in the disclosed embodiments will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the invention, and not all embodiments. Based on the embodiments of the invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the invention.

[0039] This invention provides a method for forming a core board structure. Figures 1 to 11 This is a schematic diagram of the steps in the method for forming the core board structure according to an embodiment of the present invention.

[0040] refer to Figure 1 A substrate 100 is provided, the substrate 100 including a plurality of core plate regions I.

[0041] The substrate 100 serves as a carrier platform. In subsequent processes, conductive structures are formed in the substrate 100, and the substrate 100 is cut to form multiple core boards.

[0042] In some embodiments, in the step of providing substrate 100, the material of substrate 100 includes glass.

[0043] The glass is characterized by high flatness and high Young's modulus. Furthermore, in subsequent processes, the substrate 100 will be cut into multiple core boards, which are used for chip mounting. The glass has a low coefficient of thermal expansion, which improves the matching of the thermal expansion coefficients between the core board and the chip material, thereby reducing internal stress caused by thermal mismatch, making the core board less prone to warping, and improving the stability and reliability of the core board structure.

[0044] Specifically, in the step of providing the substrate 100, the substrate 100 includes a first surface 100a and a second surface 100b opposite to each other. In subsequent processes, wiring processes are performed on the first surface 100a and the second surface 100b of the substrate 100.

[0045] As an example, in subsequent processes, the first surface 100a is used to form a pad array for connection to the chip, while the second surface 100b is used to form a ball grid array (BGA) for connection to an external circuit board. Conductive structures throughout the substrate 100 are used in subsequent processes to transmit signals and power from the chip to the external circuit board.

[0046] It should be noted that in the step of providing the substrate 100, the core board region I includes a central region II and an edge region III located around the central region II.

[0047] The core board area I is divided into a central area II and an edge area III. In subsequent processes, a conductive structure is formed in the functionally dense central area II for electrical connection, and a reinforcing structure is formed in the stress-concentrated edge area III to alleviate stress concentration. Thus, when the substrate 100 is subsequently cut at the edge, the edge area III can resist stress or external mechanical impact. Consequently, the edge area III is less likely to break or delaminate during the cutting process, thereby protecting the central area II inside the edge area III from damage and preventing cracks from spreading from the edge to the central area II, which has core functions.

[0048] As an example, in subsequent processes, the chip is covered in central region II, and conductive vias are arranged densely or regularly in central region II according to the distribution of chip pins to realize electrical signal transmission between the chip and the core board.

[0049] As an example, in subsequent processes, multiple structural reinforcement holes are formed in edge region III, and the substrate 100 is cut along the outer side of edge region III during cutting to form multiple core boards.

[0050] refer to Figures 2 to 4 , Figure 2 It is a cross-sectional view perpendicular to the surface of the substrate. Figure 3 yes Figure 2 Enlarged view of a portion of the diagram. Figure 4 Only one core plate region I of the substrate is shown. A conductive via 101 is formed in the core plate region I of the substrate 100, penetrating the substrate 100. In the direction perpendicular to the surface of the substrate 100, the width of the middle section of the conductive via 101 is smaller than the width of the two ends of the conductive via 101.

[0051] In the direction perpendicular to the surface of the substrate 100, the width of the middle section of the conductive via 101 is smaller than the width of both ends of the conductive via 101. That is, the conductive via 101 has a profile that is narrow in the middle and wide at both ends. After the conductive via 101 is filled with conductive material, the final conductive structure 102 can be anchored in the conductive via 101 of the substrate 100, and the conductive structure 102 has a strong bonding force with the substrate 100.

[0052] As an example, in a cross-sectional view perpendicular to the surface of the substrate 100, the conductive via 101 is hourglass-shaped or biconical.

[0053] In some embodiments, the step of processing the substrate 100 to form the modified region 104 includes irradiating the substrate 100 with a femtosecond laser or a picosecond laser.

[0054] By utilizing the ultrashort pulse characteristics of femtosecond or picosecond lasers, high energy can be injected into the substrate 100 in a very short time. The high-energy-density laser interacts with the glass in a unique nonlinear manner. After the substrate material absorbs the laser, its properties change, causing local structural changes inside or on the surface of the substrate 100. Moreover, the laser irradiation area is small, making it difficult to modify the substrate material in undesirable areas. After removing the modified area 104, it is beneficial to improve the surface quality of the conductive via 101.

[0055] As an example, the laser used is an ultrafast laser with a pulse width in the picosecond range (10^6 Hz). - ¹² seconds) or femtoseconds (10⁻¹² seconds) - ¹ 5 The pulse duration is on the order of seconds. Because the laser pulse is short and the energy interacts with the substrate material before the heat diffuses, it modifies the substrate material in the irradiated area, enabling modification of the substrate material without significantly heating the surrounding substrate material.

[0056] Specifically, the step of forming a conductive via 101 penetrating the substrate 100 in the core area I of the substrate 100 includes: processing the substrate 100 to form a modified region 104 penetrating the substrate 100, wherein the width of the middle section of the modified region 104 is smaller than the width of both ends of the modified region 104 in a direction perpendicular to the surface of the substrate 100; and removing the substrate material of the modified region 104 in the substrate 100 to form the conductive via 101.

[0057] By processing the substrate 100, the width of the middle section of the modified region 104 is made smaller than the width of both ends of the modified region 104, which defines the outline shape of the conductive via 101, and the modified region 104, which is narrow in the middle and wide at both ends, is transformed into a solid conductive via 101.

[0058] In some embodiments, the step of processing the substrate 100 to form the modified region 104 includes: performing a first modification treatment on the substrate 100 to form a first modified region 1041; after forming the first modified region 1041, performing a second modification treatment on the substrate 100 to form a second modified region 1042, wherein the end of the first modified region 1041 and the end of the second modified region 1042 are connected on the first surface 100a, and the end of the first modified region 1041 and the end of the second modified region 1042 are connected on the second surface 100b.

[0059] Because the ends of the first modified region 1041 and the second modified region 1042 on the first surface 100a are connected, and the ends of the first modified region 1041 and the second modified region 1042 on the second surface 100b are connected, the first modified region 1041 and the second modified region 1042 are connected inside the substrate 100, together forming a modified region 104 that penetrates the substrate 100, ensuring that the combined region formed by the first modified region 1041 and the second modified region 1042 can penetrate the substrate 100, so that after the first modified region 1041 and the second modified region 1042 are removed, the formed conductive via 101 can penetrate the substrate 100.

[0060] As an example, the first modification process involves irradiating the substrate 100 with a laser beam at a first preset angle on one side of the first surface 100a, and the second modification process involves irradiating the substrate 100 with a laser beam at a second preset angle on one side of the first surface 100a or the second surface 100b. The angle between the laser irradiation direction and the normal of the first surface 100a during the first modification process is the same as or similar to the angle between the laser irradiation direction and the normal of the first surface 100a during the second modification process. This is beneficial for forming a cone-shaped or cone-like first modification region 1041 with an opening facing the first surface 100a and a tip pointing into the interior of the substrate 100 at the top of the substrate 100, and also beneficial for forming a cone-shaped or cone-like second modification region 1042 with an opening facing the second surface 100b and a tip pointing into the interior of the substrate 100 at the bottom of the substrate 100.

[0061] As an example, the first preset angle and the second preset angle are equal.

[0062] In some embodiments, the laser irradiation direction during the first modification process intersects with the laser irradiation direction during the second modification process within the substrate 100. The intersection of the laser in the first modification process and the laser in the second modification process is located at the tips of two cones or quasi-conical shapes.

[0063] The method for forming the core board structure further includes: after providing the substrate 100, before forming the conductive structure 102 in the conductive through hole 101, forming a structural reinforcement hole 105 penetrating the substrate 100.

[0064] A structural reinforcement hole 105 is formed in the substrate 100 to provide space for the subsequent formation of the reinforcement structure 106.

[0065] In some embodiments, in the step of forming a structural reinforcement hole 105 through the substrate 100, the structural reinforcement hole 105 includes a first groove 1051 extending in a first direction and a second groove 1052 extending in a second direction in a cross section perpendicular to the surface of the substrate 100, and the first groove 1051 and the second groove 1052 intersect each other.

[0066] In other words, the first groove 1051 and the second groove 1052 form an intersecting spatial structure within the substrate 100. Compared to non-intersecting spatial structures, the structural reinforcement hole 105 in this embodiment has a larger hole wall area. After filling the structural reinforcement hole 105 with material, the reinforcement structure 106 provides multi-directional support, thereby dispersing and bearing the external stress on the substrate 100 from multiple different directions, improving the substrate 100's resistance to shear and tensile forces, and preventing the substrate 100 from cracking. Furthermore, since the first groove 1051 and the second groove 1052 intersect within the substrate 100, the central portion of the reinforcement structure 106 subsequently formed in the structural reinforcement hole 105 is locked by the substrate material. During the subsequent cutting of the substrate 100, the reinforcement structure 106 can provide anchoring force in multiple directions, preventing the reinforcement structure 106 from being pulled out of the substrate 100 along a direction perpendicular to the surface of the substrate 100.

[0067] In some embodiments, the extending directions of the first slot 1051 and the second slot 1052 are inclined to the surface of the substrate 100. For example... Figure 4 As shown, in a cross-sectional view perpendicular to the substrate 100, the first slot 1051 extends obliquely from one corner of the substrate 100 toward the center, while the second slot 1052 extends obliquely from the other corner toward the center.

[0068] As an example, the paths of the first slot 1051 and the second slot 1052 are "X" shaped. Correspondingly, after the reinforcing hole 105 is filled with metal, the reinforcing structure 106 also has an "X" shaped cross section.

[0069] In some embodiments, in the step of forming a structural reinforcement hole 105 through the substrate 100, the first hole 1051 and the second hole 1052 intersect at the thickness center of the substrate 100 in a direction perpendicular to the surface of the substrate 100.

[0070] The first hole 1051 and the second hole 1052 intersect at the thickness center of the substrate 100, so that the structure of the reinforcing hole 105 is symmetrical in the vertical direction. The stress distribution of the subsequently formed reinforcing structure 106 in the thickness direction of the substrate 100 tends to be balanced, which can avoid stress concentration or warping deformation caused by the asymmetry of the reinforcing structure 106, and is beneficial to improving the flatness of the substrate 100.

[0071] In the step of forming the structural reinforcement hole 105 through the substrate 100, the ends of the first hole groove 1051 and the second hole groove 1052 on the first surface 100a are spaced apart, and the ends of the first hole groove 1051 and the second hole groove 1052 on the second surface 100b are spaced apart.

[0072] Thus, the opening of the structural reinforcement hole 105 is composed of two spaced holes on both the first surface 100a and the second surface 100b, but they intersect inside the substrate 100. As a result, the reinforcement structure 106 subsequently formed in the structural reinforcement hole 105 can be locked in the substrate 100. The reinforcement structure 106 will not rotate or shift in the substrate 100, making it difficult for the reinforcement structure 106 to be pulled out or fall off the substrate 100.

[0073] It should be noted that, on a cross section perpendicular to the substrate 100, the area between the end of the first hole 1051 and the end of the second hole 1052 on the first surface 100a of the substrate 100 is filled with substrate material; and the distance between the end of the first hole 1051 and the end of the second hole 1052 on the second surface 100b of the substrate 100 is filled with substrate material.

[0074] It should also be noted that, in the step of forming a conductive via 101 penetrating the substrate 100 in the core plate region I of the substrate 100, a structural reinforcement hole 105 penetrating the substrate 100 is formed in the substrate 100.

[0075] In a single process step, conductive vias 101 and structural reinforcement vias 105 are formed simultaneously. This simplifies the process flow and avoids overlay errors between conductive vias 101 and structural reinforcement vias 105 caused by step-by-step formation. As an example, a multi-beam laser system can be used, where some beams are used to form the first modified region 1041 and the second modified region 1042 corresponding to the conductive vias, while other beams are simultaneously used to form the third modified region 1043 corresponding to the structural reinforcement vias (e.g., ...). Figure 3 (As shown). Alternatively, a programmable high-speed galvanometer scanning system can be used to control a single laser beam to rapidly switch positions and angles, completing the formation of modified regions with two different hole structures in the same scanning process.

[0076] As an example, a laser modification system is used to simultaneously form conductive vias 101 and structural reinforcement holes 105. The laser modification system is able to irradiate all locations on the substrate 100 where conductive vias 101 and structural reinforcement holes 105 need to be formed in a single irradiation.

[0077] In some embodiments, in the step of forming a conductive via 101 penetrating the substrate 100, the conductive via 101 is located in the central region II of the core plate region I; in the step of forming a structural reinforcement hole 105 penetrating the substrate 100, the structural reinforcement hole 105 is formed in the edge region III of the core plate region I and / or the central region II of the core plate region I. In other words, the structural reinforcement hole 105 may be formed only in the central region II, or only in the edge region III, or simultaneously in both the central region II and the edge region III.

[0078] When the structural reinforcement hole 105 is formed in the edge region III of the core board region I, that is, a physical barrier is formed around the central region II; because during the cutting of the substrate 100, or during the thermal expansion of the substrate 100, delamination and cracks usually begin at the edge of the core board region I, in the subsequent cutting of the substrate 100, the reinforcement structure 106 in the edge region III can absorb and block the stress from the edge, making the conductive structure 102 in the central region II less susceptible to stress damage, which is beneficial to improving the formation quality and reliability of the core board.

[0079] When the structural reinforcement hole 105 is formed in the central region II of the core board region I, in the subsequent process, a small number of reinforcement structures 106 are formed in the central region II, so that the central region II simultaneously has reinforcement structure 106 and conductive through hole 102, taking into account both conductivity and structural strength.

[0080] refer to Figures 5 to 7 , Figures 5 to 7 It is a cross-sectional view perpendicular to the surface of the substrate, and Figures 5 to 7 Only one core plate region I of the substrate is shown, in which a conductive structure 102 is formed in the conductive via 101.

[0081] In the core board structure formation method provided in this embodiment, a conductive via 101 penetrating the substrate 100 is formed in the core board region I of the substrate 100, and in the direction perpendicular to the surface of the substrate 100, the width of the middle section of the conductive via 101 is smaller than the width of its two ends; then, a conductive structure 102 is formed in the conductive via 101; finally, the substrate 100 is cut to form multiple core boards. This embodiment first forms a conductive via 101 with a narrow middle section and wide ends, so that the conductive structure 102 formed in the conductive via 101 also has a middle section width smaller than its two ends. Therefore, the conductive structure 102 is anchored in the conductive via 101 of the substrate 100, and there is a strong bonding force between the conductive structure 102 and the substrate 100. Thus, in the step of cutting the substrate 100 to form multiple core boards, it can effectively resist the stress generated during the cutting process, and the conductive structure 102 is not easily pulled out of the substrate 100. The conductive structure 102 can be stably present in the substrate 100, which is beneficial to improving the yield and reliability of the chip.

[0082] In some embodiments, the conductive structure 102 is used to realize the electrical interconnection between the first surface 100a and the second surface 100b of the substrate 100, and the conductive structure 102 has good conductivity. As an example, the material of the conductive structure 102 includes copper.

[0083] In some embodiments, the substrate 100 includes opposing first surfaces 100a and second surfaces 100b; in the step of forming the conductive structure 102 in the conductive via 101, the conductive structure 102 further includes a first interconnect layer 1021 formed on at least the first surface 100a or the second surface 100b.

[0084] The first interconnect layer 1021 serves as an extension of the conductive structure 102 on the surface of the substrate 100, enabling electrical communication between the metal filler inside the conductive via 101 and the circuitry on the surface of the substrate 100, thereby forming a conductive network between the interior and surface of the substrate 100. Furthermore, the first interconnect layer 1021 also serves as an electrical contact endpoint for transmitting electrical signals.

[0085] As an example, the first interconnect layer 1021 is formed on both the first surface 100a and the second surface 100b of the substrate 100. In other embodiments, the first interconnect layer 1021 may also be formed on either the first surface 100a or the second surface 100b of the substrate 100.

[0086] In some embodiments, the first interconnect layer 1021 has good electrical conductivity, and the first interconnect layer 1021 and the conductive via 101 are filled with the same material. As an example, the material of the first interconnect layer 1021 includes copper.

[0087] It should be noted that the first interconnect layer 1021 is a patterned metal layer attached to the first surface 100a or the second surface 100b of the substrate 100.

[0088] In some embodiments, during the step of forming a conductive structure 102 in the conductive via 101, a reinforcing structure 106 is also formed in the structural reinforcement via 105, and the reinforcing structure 106 is isolated from the conductive structure 102.

[0089] The conductive structure 102 and the reinforcing structure 106 are formed in the same step, which simplifies the core board structure formation method. The reinforcing structure 106 is isolated from the conductive structure 102, allowing it to function as a purely structural component without electrical functions. This improves the rigidity and thermal conductivity of the substrate 100, adjusts the equivalent thermal expansion coefficient of the substrate 100, and reduces the thermal mismatch stress between the subsequently formed core board and the chip. Furthermore, the reinforcing structure 106 is mechanically anchored to the substrate 100, reducing the probability of delamination or board breakage during subsequent substrate 100 cutting.

[0090] Specifically, the steps of forming the conductive structure 102 and the reinforcing structure 106 include: forming a seed layer 112 (e.g., on the surface of the substrate 100, the wall of the conductive via 101, and the wall of the structural reinforcing hole 105) on the surface of the substrate 100, the wall of the conductive via 101, and the wall of the structural reinforcing hole 105. Figure 5 (As shown); after forming the seed layer 112, conductive material 113 (such as...) is formed in the conductive through-hole 101 and the structural reinforcement hole 105. Figure 6 (as shown); the conductive material 113 on the surface of the substrate 100 is patterned, the conductive structure 102 is formed in the conductive via 101, and the reinforcing structure 106 is formed in the structural reinforcement via 105.

[0091] The seed layer 112 provides a good growth interface for the formation of conductive material 113 in the conductive via 101 and the structural reinforcement via 105, so that the conductive material 113 can be uniformly and densely filled in the conductive via 101 and the structural reinforcement via 105; the conductive material 113 is formed in the conductive via 101 and the structural reinforcement via 105; the conductive material 113 on the surface of the substrate 100 is patterned, and the conductive structure 102 is formed in the conductive via 101 and the reinforcement structure 106 is formed in the structural reinforcement via 105 in a patterning process, which helps to simplify the process flow.

[0092] In some embodiments, a seed layer 112 is formed on the first surface 100a and the second surface 100b of the substrate 100, as well as in the conductive via 101 and the structural reinforcement via 105, using processes such as physical vapor deposition (PVD), chemical vapor deposition (CVD), or electroless plating.

[0093] As an example, the seed layer 112 may be made of a stack of titanium and copper layers, or a stack of chromium and copper layers.

[0094] In some embodiments, the conductive material 113 includes copper. Copper has excellent conductivity, which can meet the requirements of high-frequency and high-speed signal transmission; at the same time, copper has good filling ability in electroplating processes, which can fill high aspect ratio through holes without voids; in addition, copper has relatively low cost, which is conducive to controlling the overall manufacturing cost.

[0095] As an example, the step of forming conductive material 113 in the conductive via 101 and structural reinforcement via 105 includes: placing a substrate 100 with a seed layer 112 in an electroplating solution, and performing electroplating with the first surface 100a, the second surface 100b of the substrate 100, and the seed layer 112 on the surfaces of the conductive via 101 and the structural reinforcement via 105 as cathodes. Specifically, under the action of the electroplating current, the conductive material 113 grows from the conductive via 101 and the structural reinforcement via 105 and gradually fills the conductive via 101 and the structural reinforcement via 105. The conductive material 113 also grows based on the seed layer 112 on the first surface 100a and the second surface 100b, forming a copper layer of a certain thickness on the first surface 100a and the second surface 100b.

[0096] As an example, the step of patterning the conductive material 113 on the surface of the substrate 100 includes: coating a first photoresist layer on a first surface 100a of the substrate 100; then exposing and developing the first photoresist layer to expose the area where the conductive material 113 needs to be removed; and using the first photoresist layer as a mask, removing the exposed conductive material 113 using a dry etching process. Similarly, the step of patterning the conductive material 113 on the surface of the substrate 100 further includes: coating a second photoresist layer on a second surface 100b of the substrate 100; then exposing and developing the second photoresist layer to expose the area where the conductive material 113 needs to be removed; and using the second photoresist layer as a mask, removing the exposed conductive material 113 using a dry etching process to form the conductive structure 102 and the reinforcement structure 106.

[0097] The method for forming the core board structure further includes: after forming the conductive structure 102 and the reinforcing structure 106, removing the photoresist used as a mask.

[0098] It should be noted that in the step of patterning the conductive material 113 on the surface of the substrate 100, the conductive material 113 on the surface of the substrate 100 corresponding to the reinforcing structure 106 is removed.

[0099] Removing the conductive material 113 from the surface of the substrate 100 corresponding to the reinforcing structure 106 cuts off the electrical connection between the reinforcing structure 106 and the conductive structure 102. This facilitates the distribution of a small number of reinforcing structures 106 in the central region II, allowing the central region II to simultaneously form both reinforcing structures 106 and conductive vias 102, thus balancing conductivity and structural strength. A high density of reinforcing structures 106 is formed in the edge region III of the substrate 100 to improve crack resistance. It should also be noted that because the material of the reinforcing structure 106 includes metal, the proportion of copper can be increased, which can improve the heat dissipation of the substrate 100, reduce the CTE of the whole board, and improve the rigidity of the glass substrate 100.

[0100] Since the reinforcement structure 106 is filled with a highly conductive metal (such as copper) and densely distributed in the edge region III of the core board region I, this increases the proportion of metal in the edge region III. The high thermal conductivity of the metal helps improve the heat dissipation capacity of the substrate; furthermore, the coefficient of thermal expansion (CTE) of the metal is higher than that of glass, and the reinforcement structure can adjust the coefficient of thermal expansion of the edge region III in the substrate to better match the coefficient of thermal expansion of the chip; in addition, the high Young's modulus of the metal can also improve the overall rigidity of the glass substrate.

[0101] As an example, the top of the reinforcing structure 106 is flush with the surface of the substrate 100, or the top of the reinforcing structure 106 is slightly lower than the surface of the substrate 100.

[0102] refer to Figures 8 to 10 The method for forming the core board structure further includes: forming a dielectric layer 107 (e.g., on the substrate 100 and the conductive structure 102, exposing the conductive structure 102) on the substrate 100 and the conductive structure 102. Figure 8 As shown); an interconnect structure 108 is formed on the conductive structure 102 exposed on the dielectric layer 107 (as shown). Figure 9 (As shown); a second interconnect layer 109 is formed on the interconnect structure 108 and a portion of the dielectric layer 107 on the side of the interconnect structure 108 (as shown). Figure 9 As shown); a solder resist layer 110 is formed on the dielectric layer 107 on the side of the second interconnect layer 109 (as shown). Figure 10 As shown), and the solder mask layer 110 is spaced apart from the second interconnect layer 109; a solder layer 103 is formed on the surface of the second interconnect layer 109 (as shown). Figure 10 (As shown).

[0103] The dielectric layer 107 is formed on the substrate 100 and exposes the conductive structure 102, preparing for the formation of the interconnect structure 108 on the conductive structure 102. The dielectric layer 107 restricts the formation space of the interconnect structure 108. The interconnect structure 108 is used to connect with the conductive structure 102. A second interconnect layer 109 is formed on the interconnect structure 108. The interconnect structure 108 and the second interconnect layer 109 together fan outwards the tiny nodes of the conductive structure 102, realizing the redistribution of signal paths. The solder mask layer 110 covers the non-soldering area and serves to insulate and protect the solder layer 103. The solder mask layer 110 is spaced apart from the second interconnect layer 109, defining the range of the soldering area. The solder layer 103 is used to provide the connection interface for subsequent chip mounting.

[0104] The step of forming a dielectric layer 107 exposing the conductive structure 102 on the substrate 100 and the conductive structure 102 includes: laminating a dielectric material layer on the substrate 100 and the conductive structure 102; and performing patterning processing on the dielectric material layer to form a dielectric layer 107 exposing the conductive structure 102.

[0105] As an example, the steps of patterning the dielectric material layer include using a laser drilling process.

[0106] As an example, the material of the dielectric layer 107 includes build-up dielectric films such as Ajinomoto Build-up Film (ABF).

[0107] In some embodiments, interconnect structures 108 are formed in the vias of the dielectric layer 107 by chemical copper plating and electroplating processes.

[0108] In some embodiments, after the interconnect structure 108 is formed, a second interconnect layer 109 is fabricated using a semi-additive process (m-SAP) or a similar process.

[0109] In some embodiments, the step of forming a solder resist layer 110 on the dielectric layer 107 on the side of the second interconnect layer 109 includes: after forming the second interconnect layer 109, coating a photosensitive solder resist material layer on the surface of the substrate 100; exposing and developing the photosensitive solder resist material layer to form a solder resist layer 110 in the non-soldering area, thereby exposing the solder resist layer 110 of the second interconnect layer 109.

[0110] As an example, the photosensitive solder resist material includes green oil.

[0111] In some embodiments, the exposed second interconnect layer 109 of the solder mask layer 110 is surface treated to form a solder layer 103, which prepares for subsequent ball bonding or chip soldering. Specifically, the surface treatment includes: chemical nickel immersion gold (ENIG), chemical nickel palladium immersion gold (ENEPIG), or coating with an organic solderability protectant (OSP).

[0112] refer to Figure 11 After the conductive structure 102 is formed, the substrate 100 is cut along the edge of the core plate region I to form a plurality of core plates.

[0113] This embodiment first forms a conductive via 101 with a narrow middle section and wide ends, so that the conductive structure 102 formed in the conductive via 101 also has a middle section width smaller than its two ends. Thus, the conductive structure 102 is anchored in the conductive via 101 of the substrate 100, and the conductive structure 102 has a strong bonding force with the substrate 100. Therefore, in the step of cutting the substrate 100 to form multiple core boards, it can resist the stress generated by the cutting process, and the conductive structure 102 is not easy to be pulled out of the substrate 100. The conductive structure 102 can exist stably in the substrate 100, which is beneficial to improving the yield and reliability of the core board.

[0114] In some embodiments, the step of cutting the substrate 100 along the edge of the core board region I to form a plurality of core boards includes: using a laser to ablate the add-on medium (such as ABF), metal lines and solder mask 110 on the surface of the substrate 100 along the edge of the core board region I to form a groove exposing the substrate 100; and then using a resin knife to cut the glass substrate 100 along the groove ablated by the laser to form a plurality of separate core boards.

[0115] It should be noted that, since the edge of the core board area I has a pre-formed reinforcing structure 106, the reinforcing structure 106 can resist and absorb cutting stress near the cutting path, reducing the probability of the substrate 100 cracking or delaminating during the cutting process.

[0116] Accordingly, refer to Figure 11 This invention provides a core board structure including: a core board; a conductive structure 102 located in the core board and penetrating the core board, wherein the width of the middle section of the conductive structure 102 is smaller than the width of the two ends of the conductive structure 102 in a direction perpendicular to the surface of the core board.

[0117] In the core board structure provided in this embodiment, the core board structure includes a conductive structure 102 located in and penetrating the core board. In a direction perpendicular to the surface of the core board, the width of the middle section of the conductive structure 102 is smaller than the width of its two ends. Because the width of the middle section of the conductive structure 102 is smaller than the width of its two ends, the conductive structure 102 is anchored in the core board, and there is a strong bonding force between the conductive structure 102 and the core board. Therefore, when the core board is subjected to thermal stress or mechanical impact, the conductive structure 102 can remain firmly within the core board, thereby improving the reliability of the core board structure.

[0118] In some embodiments, the core board is made of glass.

[0119] The glass features high flatness and a high Young's modulus. Furthermore, its low coefficient of thermal expansion allows for a high degree of matching between the core board and the chip during subsequent chip mounting. This reduces internal stress caused by thermal mismatch, making the core board less prone to warping and improving the stability and reliability of the core board structure.

[0120] Specifically, the core plate includes opposing first surface 100a and second surface 100b.

[0121] It should be noted that the core board includes a central region II and an edge region III located around the central region II.

[0122] The core board is divided into a central region II and an edge region III. The central region II has a conductive structure 102 that connects the first surface 100a and the second surface 100b. The edge region III has a reinforcing structure 106 that alleviates stress concentration. In the step of cutting the substrate 100 into multiple core boards, the edge region III can resist stress or external mechanical impact. As a result, the edge region III is less likely to break or delaminate during the cutting process, thereby protecting the central region II inside the edge region III from damage and preventing cracks from spreading from the edge to the central region II, which has core functions.

[0123] As an example, the central area II is used to mount chips. According to the distribution of chip pins, conductive vias 101 are arranged densely or regularly in the central area II to realize the transmission of electrical signals between the chip and the core board.

[0124] As an example, in a cross-sectional view perpendicular to the surface of the core board, the conductive structure 102 is hourglass-shaped or biconical.

[0125] The core board structure further includes a reinforcing structure 106 that penetrates the core board and is isolated from the conductive structure 102.

[0126] The reinforcement structure 106 is isolated from the conductive structure 102, so that the reinforcement structure 106 can be used as a pure structural component without electrical function. This is beneficial to improve the rigidity and thermal conductivity of the core board, adjust the equivalent thermal expansion coefficient of the core board, reduce the thermal mismatch stress between the core board and the chip formed in the subsequent process, and reduce the probability of delamination or bursting of the core board during the process of cutting the substrate 100 to form the core board.

[0127] In some embodiments, the conductive structure 102 is located in the central region II of the core plate, and the reinforcing structure 106 is located in the edge region III of the core plate and / or the central region II. In other words, the structural reinforcement hole 105 may be formed only in the central region II, or only in the edge region III, or simultaneously in both the central region II and the edge region III.

[0128] When the reinforcing structure 106 is formed in the edge region III of the core board, that is, a physical barrier is formed around the central region II; because during the process of cutting the substrate 100 to form the core board, or during the delamination and cracking caused by the thermal expansion of the core board, the reinforcing structure 106 in the edge region III can absorb and block the stress from the edge region III, making the conductive structure 102 in the central region II less susceptible to stress damage, which is beneficial to improving the quality and reliability of the core board.

[0129] When the structural reinforcement hole 105 is formed in the central region II of the core board region I, in the subsequent process, a small number of reinforcement structures 106 are formed in the central region II, so that the central region II simultaneously has reinforcement structure 106 and conductive through hole 102, taking into account both conductivity and structural strength.

[0130] In some embodiments, the reinforcing structure 106 includes a first structure 1061 extending in a first direction and a second structure 1062 extending in a second direction in a cross section perpendicular to the surface of the core board, and the first structure 1061 and the second structure 1062 intersect.

[0131] In other words, the first structure 1061 and the second structure 1062 intersect within the core board, resulting in a larger contact area between the reinforcing structure 106 and the core board. This allows the reinforcing structure 106 to provide support to the core board in multiple directions, dispersing and bearing external stresses on the core board from various angles, improving its resistance to shear and tensile forces, and preventing cracking. Furthermore, the intersection of the first structure 1061 and the second structure 1062 within the core board locks the central portion of the reinforcing structure 106 in place with the core board material. The core board provides anchoring force to the reinforcing structure 106, making it difficult for the reinforcing structure 106 to be pulled out of the core board along a direction perpendicular to the core board surface.

[0132] In some embodiments, the extending directions of the first structure 1061 and the second structure 1062 are inclined to the surface of the core board. For example... Figure 7 As shown, in a cross-sectional view perpendicular to the core plate, the first structure 1061 can extend obliquely from one corner of the core plate into the core plate, while the second structure 1062 extends obliquely from the other corner into the core plate.

[0133] As an example, in a cross section perpendicular to the surface of the core plate, the first structure 1061 and the second structure 1062 have an "X" shaped cross section.

[0134] In some embodiments, the first structure 1061 and the second structure 1062 intersect at the thickness center of the core plate in a direction perpendicular to the surface of the core plate.

[0135] The first structure 1061 and the second structure 1062 intersect at the center of the thickness of the core board, thereby enhancing the structural symmetry of the reinforcing structure 106 in the vertical direction. The reinforcing structure 106 can balance the stress distribution in the thickness direction of the core board, avoiding stress concentration or warping deformation caused by the asymmetry of the reinforcing structure 106, which is beneficial to improving the flatness of the core board.

[0136] On the first surface 100a, the ends of the first structure 1061 and the ends of the second structure 1062 are spaced apart, and on the second surface 100b, the ends of the first structure 1061 and the ends of the second structure 1062 are spaced apart.

[0137] Thus, the ends of the first structure 1061 and the second structure 1062 are spaced apart on the first surface 100a and the second surface 100b, but the first structure 1061 and the second structure 1062 have an intersection point inside the core plate, so that the reinforcing structure 106 can be locked in the core plate and the reinforcing structure 106 is not easy to be pulled out or fall off from the core plate.

[0138] It should be noted that, on the cross section perpendicular to the core board, the space between the end of the first structure 1061 and the end of the second structure 1062 on the first surface 100a of the core board is filled with core board material; the space between the end of the first structure 1061 and the end of the second structure 1062 on the second surface 100b of the core board is also filled with core board material.

[0139] The conductive structure 102 is used to achieve electrical interconnection between the first surface 100a and the second surface 100b of the core board, and the conductive structure 102 has good conductivity. As an example, the material of the conductive structure 102 includes copper.

[0140] In some embodiments, the conductive structure 102 further includes a first interconnect layer 1021 located at least on the first surface 100a or the second surface 100b.

[0141] The first interconnect layer 1021 serves as an extension of the conductive structure 102 on the surface of the core board, enabling electrical connection between the conductive structure 102 and the circuitry on the surface of the core board, thereby forming a conductive network between the interior and surface of the core board. In addition, the first interconnect layer 1021 can also serve as an electrical contact endpoint for transmitting electrical signals.

[0142] As an example, the first interconnect layer 1021 is located on the first surface 100a and the second surface 100b of the core board. In other embodiments, the first interconnect layer 1021 may also be located on either the first surface 100a or the second surface 100b of the core board.

[0143] In some embodiments, the first interconnect layer 1021 has good electrical conductivity. As an example, the material of the first interconnect layer 1021 includes copper.

[0144] It should be noted that the first interconnect layer 1021 is a patterned metal layer attached to the first surface 100a or the second surface 100b of the core board.

[0145] The core board structure further includes a seed layer 112, located between the conductive structure 102 and the core board.

[0146] As an example, the seed layer 112 may be made of a stack of titanium and copper layers, or a stack of chromium and copper layers.

[0147] The method for forming the core board structure further includes: after forming the conductive structure 102 and the reinforcing structure 106, removing the photoresist used as a mask.

[0148] It should be noted that the conductive material of the reinforcing structure 106 is not covered on the first surface 100a and the second surface 100b of the core board. This ensures that there are no electrical connection bridges between the reinforcing structure 106 and the conductive structure 102, which is beneficial for forming a structure in the edge region III of the core board that is solely used to improve the crack resistance of the core board without changing the original circuit layout of the central region II.

[0149] It should also be noted that since the reinforcement structure 106 is filled with a thermally conductive metal (such as copper) and densely distributed in the edge region III of the core board, this increases the metal content in this area. This not only helps to improve the overall rigidity of the core board, but also improves its heat dissipation performance. Furthermore, by adjusting the metal content, its overall equivalent coefficient of thermal expansion can be optimized to better match the coefficient of thermal expansion of the mounted chips.

[0150] As an example, the top of the reinforcing structure 106 is flush with the surface of the core board, or the top of the reinforcing structure 106 is slightly lower than the surface of the core board.

[0151] The core board structure further includes: an interconnect structure 108 located on the conductive structure 102; a dielectric layer 107 located on the core board and the conductive structure 102 on the side of the interconnect structure 108; a second interconnect layer 109 located on the interconnect structure 108 and a portion of the dielectric layer 107 on the side of the interconnect structure 108; a solder resist layer 110 located on the dielectric layer 107 on the side of the second interconnect layer 109, and the solder resist layer 110 is spaced apart from the second interconnect layer 109; and a solder layer 103 located on the second interconnect layer 109.

[0152] The dielectric layer 107 is located on the core board and exposes the conductive structure 102. The interconnect structure 108 is connected to the conductive structure 102. The second interconnect layer 109 is formed on the interconnect structure 108. The interconnect structure 108 and the second interconnect layer 109 together fan out the tiny nodes of the conductive structure 102 to achieve signal path redistribution. The solder mask layer 110 covers the non-soldering area and serves to insulate and protect the solder layer 103. The solder mask layer 110 is spaced apart from the second interconnect layer 109 to define the range of the soldering area. The solder layer 103 is used to provide the connection interface for subsequent chip mounting.

[0153] As an example, the material of the dielectric layer 107 includes build-up dielectric films such as Ajinomoto Build-up Film (ABF).

[0154] As an example, the solder mask 110 includes green solder mask.

[0155] Accordingly, the present invention also provides an electronic device. The electronic device includes the core board structure described in any embodiment.

[0156] The core board structure is a component of electronic devices. As can be seen from the foregoing analysis, the core board structure provided by the embodiments of the present invention can reduce the risk of component microcracks or connection damage caused by internal shrinkage stress, improve the stability and reliability of the core board structure, thereby increasing the yield and correspondingly improving the quality of electronic devices.

[0157] Among them, electronic devices can be smartphones, wearable devices, video game devices, etc.

[0158] The core board structure of the present invention can be formed using the forming method described in the foregoing embodiments, or it can be formed using other forming methods. For a detailed description of the core board structure described in this embodiment, please refer to the corresponding descriptions in the foregoing embodiments; these descriptions will not be repeated here.

[0159] While the embodiments of the present invention have been disclosed above, the invention is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a core board structure, characterized in that, include: A substrate is provided, the substrate comprising a plurality of core plate regions; A conductive via is formed in the core area of ​​the substrate, penetrating the substrate. In a direction perpendicular to the surface of the substrate, the width of the middle section of the conductive via is smaller than the width of both ends of the conductive via. A conductive structure is formed in the conductive via; After the conductive structure is formed, the substrate is cut along the edge of the core board area to form multiple core boards.

2. The method for forming the core board structure as described in claim 1, characterized in that, The step of forming a through-hole in the core region of the substrate includes: The substrate is processed to form a modified region that penetrates the substrate. In a direction perpendicular to the surface of the substrate, the width of the middle section of the modified region is smaller than the width of the two ends of the modified region. The substrate material in the modified region of the substrate is removed to form the conductive via.

3. The method for forming the core board structure as described in claim 2, characterized in that, The step of processing the substrate to form the modified region includes irradiating the substrate with a femtosecond laser or a picosecond laser.

4. The method for forming the core board structure as described in claim 2, characterized in that, In the step of providing a substrate, the substrate includes opposing first and second surfaces; The step of processing the substrate to form the modified region includes: The substrate is subjected to a first modification treatment to form a first modified region; After the first modified region is formed, the substrate is subjected to a second modification process to form a second modified region. The ends of the first modified region and the second modified region are connected on the first surface, and the ends of the first modified region and the second modified region are connected on the second surface.

5. The method for forming the core board structure as described in claim 1, characterized in that, In the step of providing a substrate, the substrate includes opposing first and second surfaces; In the step of forming the conductive structure in the conductive via, the conductive structure further includes a first interconnect layer formed on at least the first surface or the second surface.

6. The method for forming the core board structure as described in claim 1, characterized in that, In the step of providing a substrate, the material of the substrate includes glass.

7. The method for forming the core board structure as described in claim 1, characterized in that, The method for forming the core board structure further includes: after providing the substrate, before forming a conductive structure in the conductive through-hole, forming a structural reinforcement hole that penetrates the substrate; In the step of forming a conductive structure in the conductive via, a reinforcing structure is also formed in the structural reinforcement hole, and the reinforcing structure is isolated from the conductive structure.

8. The method for forming the core board structure as described in claim 7, characterized in that, In the step of providing the substrate, the core board region includes a central region and an edge region located around the central region; In the step of forming a conductive via through the substrate in the substrate, the conductive via is located in the central region of the core plate region; In the step of forming a structural reinforcement hole through the substrate, the structural reinforcement hole is formed in the edge region and / or the central region of the core board region.

9. The method for forming the core board structure as described in claim 7, characterized in that, In the step of forming a structural reinforcement hole through the substrate, the structural reinforcement hole includes a first groove extending in a first direction and a second groove extending in a second direction on a cross section perpendicular to the surface of the substrate, and the first groove and the second groove intersect.

10. The method for forming the core board structure as described in claim 9, characterized in that, In the step of forming a structural reinforcement hole through the substrate, the first hole and the second hole intersect at the thickness center of the substrate in a direction perpendicular to the surface of the substrate.

11. The method for forming the core board structure as described in claim 9, characterized in that, In the step of providing a substrate, the substrate includes opposing first and second surfaces; In the step of forming a structural reinforcement hole through the substrate, the ends of the first hole groove and the second hole groove are spaced apart on the first surface, and the ends of the first hole groove and the second hole groove are spaced apart on the second surface.

12. The method for forming the core board structure as described in claim 7, characterized in that, In the step of forming a conductive via through the substrate in the core region of the substrate, a structural reinforcement hole through the substrate is formed in the substrate.

13. The method for forming the core board structure as described in claim 7, characterized in that, The steps for forming the conductive structure and the reinforcing structure include: A seed layer is formed on the surface of the substrate, the wall of the conductive via, and the wall of the structural reinforcement hole; After the seed layer is formed, conductive material is formed in the conductive vias and structural reinforcement holes; The conductive material on the surface of the substrate is patterned, the conductive structure is formed in the conductive via, and the reinforcing structure is formed in the structural reinforcement via.

14. The method for forming the core board structure as described in claim 13, characterized in that, In the step of patterning the conductive material on the substrate surface, the conductive material on the substrate surface corresponding to the reinforcement structure is removed.

15. The method for forming the core board structure as described in claim 13, characterized in that, The method for forming the core board structure further includes: A dielectric layer exposing the conductive structure is formed on the substrate and the conductive structure; An interconnect structure is formed on the conductive structure exposed in the dielectric layer; A second interconnect layer is formed on the interconnect structure and a portion of the dielectric layer on the side of the interconnect structure; A solder resist layer is formed on the dielectric layer on the side of the second interconnect layer, and the solder resist layer is spaced apart from the second interconnect layer; A solder layer is formed on the surface of the second interconnect layer.

16. The method for forming the core board structure as described in claim 15, characterized in that, The step of forming a dielectric layer exposing the conductive structure on the substrate and the conductive structure includes: A dielectric material layer is laminated onto the substrate and the conductive structure; The dielectric material layer is patterned to form a dielectric layer that exposes the conductive structure.

17. A core board structure, characterized in that, include: Core board; A conductive structure is located in the core plate and penetrates the core plate. In a direction perpendicular to the surface of the core plate, the width of the middle section of the conductive structure is smaller than the width of the two ends of the conductive structure.

18. The core board structure as described in claim 17, characterized in that, The core board includes a first surface and a second surface opposite to each other, and the conductive structure further includes a first interconnect layer located on at least the first surface or the second surface.

19. The core board structure as described in claim 17, characterized in that, The core board is made of glass.

20. The core board structure as described in claim 17, characterized in that, The core board structure also includes: A reinforcing structure extends through the core plate and is isolated from the conductive structure.

21. The core board structure as described in claim 20, characterized in that, The core board includes a central area and an edge area located around the central area; The conductive structure is located in the central region, and the reinforcing structure is located in the edge region and / or the central region.

22. The core board structure as described in claim 20, characterized in that, The reinforcing structure includes a first structure extending in a first direction and a second structure extending in a second direction in a cross section perpendicular to the surface of the core board, and the first structure and the second structure intersect.

23. The core board structure as described in claim 22, characterized in that, In a direction perpendicular to the surface of the core board, the first structure and the second structure intersect at the center of the thickness of the core board.

24. The core board structure as described in claim 22, characterized in that, The core board includes opposing first and second surfaces; On the first surface, the ends of the first structure and the ends of the second structure are spaced apart, and on the second surface, the ends of the first structure and the ends of the second structure are spaced apart.

25. The core board structure as described in claim 17, characterized in that, The core board structure also includes: Interconnection structures are located on conductive structures; A dielectric layer is located on the core plate and conductive structure on the side of the interconnect structure; A second interconnect layer is located on the interconnect structure and a portion of the dielectric layer on the side of the interconnect structure; A solder resist layer is located on the dielectric layer on the side of the second interconnect layer, and the solder resist layer is spaced apart from the second interconnect layer; The solder layer is located on the second interconnect layer.

26. An electronic device, characterized in that, Includes the core board structure as described in any one of claims 17 to 25.

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