Electronic device and method for fast fourier transform

Abstract

According to an embodiment, an electronic device may include: a memory; and at least one processing circuit for Orthogonal Frequency Division Multiplexing (OFDM) demodulation, for changing the domain of a symbol sequence from a first domain to a second domain. The at least one processing circuit may be configured to acquire a first symbol sequence of the first domain based on a received signal acquired from an external electronic device. The at least one processing circuit may be configured to acquire a second symbol sequence of the second domain by performing a Fast Fourier Transform (FFT) operation using cyclic shift operations on the first symbol sequence. The FFT operation using cyclic shift operations may include changing the value of the most significant bit (MSB) of the bit sequence of each FFT index in the FFT index of the second domain from 0 to 1 or from 1 to 0, depending on the FFT size.

Description

Technical Field

[0001] This disclosure relates to an electronic device and method for Fast Fourier Transform. Background Technology

[0002] In wireless communication systems, when receiving signals, the Fast Fourier Transform (FFT) operation is used to transform a time-domain-dependent sequence into a frequency-domain-dependent sequence. When transmitting signals, the cyclic spread operation, which inserts a cyclic prefix (CP) into the signal, is used to prevent inter-channel interference.

[0003] The information described above may be provided as relevant technology for the purpose of aiding understanding of this disclosure. No argument or decision is made regarding whether any of the above descriptions can be used as prior art in connection with this disclosure. Summary of the Invention

[0004] [Technical Solution]

[0005] According to one embodiment, the electronic device may include a memory and at least one processing circuit for Orthogonal Frequency Division Multiplexing (OFDM) demodulation to change the domain of a symbol sequence from a first domain to a second domain. The at least one processing circuit may be configured to obtain a first symbol sequence associated with the first domain based on a received signal obtained from an external electronic device. The at least one processing circuit may be configured to obtain a second symbol sequence associated with the second domain by performing a Fast Fourier Transform (FFT) operation using cyclic shift operations on the first symbol sequence. For each Fast Fourier Transform (FFT) index in an FFT index of size corresponding to the second domain, the FFT operation using cyclic shift operations may include changing the value of the most significant bit (MSB) of the bit sequence of the corresponding FFT index from 0 to 1 or from 1 to 0.

[0006] According to one embodiment, a method performed by an electronic device may include obtaining a first symbol sequence associated with a first domain based on a received signal obtained from an external electronic device. The method may include obtaining a second symbol sequence associated with a second domain by performing a Fast Fourier Transform (FFT) operation using cyclic shift operations on the first symbol sequence. For each Fast Fourier Transform (FFT) index in an FFT index of size relative to the second domain, the FFT operation using cyclic shift operations may include changing the value of the most significant bit (MSB) of the bit sequence of the corresponding FFT index from 0 to 1 or from 1 to 0. Attached Figure Description

[0007] Figure 1 A wireless communication system is shown.

[0008] Figure 2a The fronthaul interface is shown.

[0009] Figure 2b The fronthaul interface of the Open (O) Radio Access Network (RAN) is shown.

[0010] Figure 3a The functional configuration of the Distributed Unit (DU) is shown.

[0011] Figure 3b The functional structure of the radio unit (RU) is shown.

[0012] Figure 4 An example of functional division between DU and RU is shown.

[0013] Figure 5a An example of the operation of an orthogonal frequency division multiplexing (OFDM) modulation circuit is shown.

[0014] Figure 5b An example of the operation of an OFDM demodulation circuit is shown.

[0015] Figure 6a An example of cyclic shift operation of OFDM modulation circuit is shown.

[0016] Figure 6b An example of cyclic shift operation in an OFDM demodulation circuit is shown.

[0017] Figure 7 The signal flow graph of the FFT operation in the frequency decimation fast Fourier transform (DIF FFT) structure is shown.

[0018] Figure 8 The signal flow graph of the FFT operation in the time-decimation fast Fourier transform (DIT FFT) structure is shown.

[0019] Figure 9 The signal flow graph of the FFT operation using the cyclic shift operation of the DIT FFT structure is shown.

[0020] Figure 10 An OFDM demodulation circuit is shown for performing FFT operations for cyclic shift and reordering operations.

[0021] Figure 11 A flowchart is shown relating to the operation of an electronic device for performing FFT operations using cyclic shift operations.

[0022] Figure 12 An example of the configuration of the processing device is shown. Detailed Implementation

[0023] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the scope of another embodiment. Singular expressions may include plural expressions unless the context clearly indicates otherwise. The terms used herein (including technical or scientific terms) may have the same meaning as commonly understood by one of ordinary skill in the art as described in this disclosure. Among the terms used in this disclosure, unless expressly defined herein, terms defined in a general dictionary may be interpreted as having the same or similar meaning as in the context of related art and are not to be interpreted as having an ideal or overly formal meaning. In some cases, even terms defined in this disclosure may not be construed as excluding embodiments of this disclosure.

[0024] In the various embodiments of this disclosure described below, hardware methods will be described as examples. However, since the various embodiments of this disclosure include techniques using both hardware and software, software-based methods are not excluded.

[0025] For ease of description, the following description exemplifies terms referring to signals (e.g., signal, information, message, signaling), resources (e.g., symbol, time slot, subframe, radio frame, subcarrier, resource element (RE), resource block (RB), bandwidth portion (BWP), timing), terms used for calculating states (e.g., step, operation, process), data (e.g., packet, user stream, information, bit, symbol, codeword), channels, network entities, and components of devices. Therefore, this disclosure is not limited to the terms described below, and other terms with equivalent technical meanings may be used.

[0026] Furthermore, in this disclosure, the terms "greater than" or "less than" are used to determine whether a particular condition is met or satisfied, but this is merely a description of examples and does not exclude descriptions of "greater than or equal to" or "less than or equal to". A condition described as "greater than or equal to" can be replaced by "greater than", a condition described as "less than or equal to" can be replaced by "less than", and a condition described as "greater than or equal to and less than" can be replaced by "greater than and less than or equal to". Additionally, hereinafter, "A" to "B" refers to at least one of the elements from A (inclusive) to B (inclusive). hereinafter, 'C' and / or 'D' means including at least one of 'C' or 'D', i.e., {'C', 'D', and 'C' and 'D'}.

[0027] Although this disclosure uses terms used in some communication standards (e.g., 3GPP, xRAN, O-RAN) to describe various embodiments, these are merely examples for illustrative purposes. Various embodiments of this disclosure can be readily modified and applied to other communication systems.

[0028] Figure 1 A wireless communication system is shown.

[0029] refer to Figure 1 , Figure 1 Base station 110 and terminal 120 are shown as part of a node utilizing a wireless channel in a wireless communication system. Figure 1 Only one base station is shown, but the wireless communication system may also include another base station that is the same as or similar to base station 110.

[0030] Base station 110 is a network infrastructure that provides wireless access to terminal 120. Base station 110 has a coverage range defined based on the distance at which signals can be transmitted. In addition to "base station", base station 110 may also be referred to as "access point (AP)", "eNodeB (eNB)", "fifth generation node", "next generation nodeB (gNB)", "wireless point", "transmit / receive point (TRP)" or other terms with equivalent technical meanings.

[0031] Terminal 120, used as a user device, communicates with base station 110 via a wireless channel. The link from base station 110 to terminal 120 is called the downlink (DL), and the link from terminal 120 to base station 110 is called the uplink (UL). Additionally, although in Figure 1 Not shown, but terminal 120 and another terminal can communicate with each other via a wireless channel. In this case, the link between terminal 120 and the other terminal (device-to-device link (D2D)) is called a side link, and the side link can be used interchangeably with the PC5 interface. In some other embodiments, terminal 120 can be operated without user intervention. According to embodiments, terminal 120, as a device performing machine-type communication (MTC), may not be carried by the user. Additionally, according to embodiments, terminal 120 can be a narrowband (NB)-Internet of Things (IoT) device.

[0032] In addition to “terminal”, terminal 120 may also be referred to as “user equipment (UE)”, “customer premises equipment (CPE)”, “mobile station”, “subscriber station”, “remote terminal”, “wireless terminal”, “electronic device”, “user equipment” or other terms with equivalent technical meaning.

[0033] Base station 110 can perform beamforming with terminal 120. Base station 110 and terminal 120 can transmit and receive radio signals in relatively low frequency bands (e.g., NR frequency range 1 (FR 1)). Additionally, base station 110 and terminal 120 can transmit and receive radio signals in relatively high frequency bands (e.g., FR 2 (or FR 2-1, FR 2-2, FR 2-3) or FR 3) and millimeter-wave frequency bands (e.g., 28 GHz, 30 GHz, 38 GHz, 60 GHz). Base station 110 and terminal 120 can perform beamforming to improve channel gain. Here, beamforming can include transmit beamforming and receive beamforming. Base station 110 and terminal 120 can provide directionality to the transmitted or received signals. To this end, base station 110 and terminal 120 can select a serving beam through a beam search or beam management process. After selecting a serving beam, subsequent communication can be performed using resources that are in a QCL relationship with the resources of the transmit serving beam.

[0034] If the large-scale characteristics of the channel carrying symbols at the first antenna port can be inferred from the channel carrying symbols at the second antenna port, then the QCL relationship between the first and second antenna ports can be evaluated. For example, large-scale characteristics may include at least one of delay spread, Doppler spread, Doppler shift, average gain, average delay, and spatial receiver parameters.

[0035] although Figure 1 The description states that both base station 110 and terminal 120 perform beamforming, but embodiments of this disclosure are not limited to this. In some embodiments, the terminal may or may not perform beamforming. Furthermore, the base station may or may not perform beamforming. That is, only one of the base station and the terminal may perform beamforming, or both the base station and the terminal may not perform beamforming.

[0036] In this disclosure, a beam refers to a spatial flow of signals in a wireless channel and is formed by one or more antennas (or antenna elements), and the forming process may be referred to as beamforming. Beamforming may include at least one of analog beamforming or digital beamforming (e.g., precoding). Reference signals transmitted based on beamforming may include, for example, demodulation reference signals (DM-RS), channel state information reference signals (CSI-RS), synchronization signal / physical broadcast channel (SS / PBCH), and sounding reference signals (SRS). Additionally, IEs such as CSI-RS resources or SRS resources may be used as configurations for each reference signal, and these configurations may include beam-associated information. The beam-associated information may mean whether the corresponding configuration (e.g., a CSI-RS resource) uses the same spatial domain filter as another configuration (e.g., another CSI-RS resource within the same CSI-RS resource set) or a different spatial domain filter, or which reference signal it is quasi-co-located (QCL) with, and if so, what type it is (e.g., QCL type A, B, C, D).

[0037] Traditionally, in communication systems with relatively large base station cell radii, each base station is installed to include functions of a digital processing unit (or distributed unit (DU)) and a radio frequency (RF) processing unit (or radio unit (RU)). However, with the use of high-frequency bands in fourth-generation (4G) and / or subsequent communication systems (e.g., 5G) and the reduction in cell coverage of base stations, the number of base stations covering a specific area has increased. The installation cost burden for operators has also increased. To minimize the installation cost of base stations, a structure has been proposed where the DU and RU of a base station are separate, one or more RUs are connected to a DU via a wired network, and one or more RUs are deployed geographically to cover a specific area. In the following sections, through... Figure 2a and Figure 2b Describes deployment structures and extended examples of base stations according to various embodiments of this disclosure.

[0038] Figure 2a The fronthaul interface is shown. Unlike the backhaul between the base station and the core network, the fronthaul refers to the link between the wireless LAN and the base station. Figure 2a An example of a fronthaul structure between a DU 210 and an RU 220 is shown, but this is for illustrative purposes only, and the present disclosure is not limited thereto. In other words, embodiments of the present disclosure can also be applied to a fronthaul structure between a DU and multiple RUs. For example, embodiments of the present disclosure can be applied to a fronthaul structure between a DU and two RUs. Additionally, embodiments of the present disclosure can also be applied to a fronthaul structure between a DU and three RUs.

[0039] refer to Figure 2a Base station 110 may include DU 210 and RU 220. Fronthaul 215 between DU 210 and RU 220 can be operated via Fx interface. For operation of fronthaul 215, an interface such as enhanced universal public radio interface (eCPRI) or Ethernet radio (ROE) can be used.

[0040] With the development of communication technology and the increase in mobile data traffic, the bandwidth requirements for fronthaul between digital units and radio units have increased significantly. In deployments such as centralized / cloud radio access networks (C-RAN), DUs can be implemented to perform Packet Data Convergence Protocol (PDCP), Radio Link Control (RLC), Media Access Control (MAC), and Physical (PHY) functions, while RUs can be implemented to perform PHY layer functions in addition to radio frequency (RF) functions.

[0041] DU 210 can be responsible for the upper-layer functions of the wireless network. For example, DU 210 can perform a portion of the functions of the MAC layer and the PHY layer. In this document, "a portion of the PHY layer" refers to functions performed at a higher level within the PHY layer and may include, for example, channel coding (or channel decoding), scrambling (or descrambling), modulation (or demodulation), and layer mapping (or layer demapping). According to embodiments, if DU 210 conforms to the O-RAN standard, it can be referred to as an O-RAN DU (O-DU). As needed, in embodiments of this disclosure, DU 210 can be replaced with and represented as a first network entity for a base station (e.g., a gNB).

[0042] The RU 220 can handle lower-level functions of the wireless network. For example, the RU 220 can perform a portion of the PHY layer and RF functions. Here, "a portion of the PHY layer" refers to functions performed at a relatively lower level than the DU 210 within the PHY layer functionality, and may include, for example, iFFT conversion (or FFT conversion), cyclic prefix (CP) insertion (or CP removal), and digital beamforming. Figure 4 This document describes in detail an example of such a specific functional division. RU 220 may be referred to as an Access Unit (AU), Access Point (AP), Transmit / Receive Point (TRP), Remote Radio Header End (RRH), Radio Unit (RU), or other terms with equivalent technical meanings. According to embodiments, if RU 220 conforms to the O-RAN standard, it may be referred to as an O-RAN RU (O-RU). As needed, in embodiments of this disclosure, RU 220 may be replaced with and represented as a second network entity for a base station (e.g., gNB).

[0043] although Figure 2aBase station 110 is described as including DU 210 and RU 220, but embodiments of this disclosure are not limited thereto. The base station according to embodiments can be implemented in a distributed deployment based on a centralized unit (CU) configured to perform functions of the upper layers of the access network (e.g., Packet Data Convergence Protocol (PDCP), Radio Resource Control (RRC)) and a distributed unit (DU) configured to perform functions of the lower layers. In this case, the distributed unit (DU) may include... Figure 1 The base station consists of a Digital Unit (DU) and a Radio Unit (RU). Between the core network (e.g., a 5G core (5GC) or a Next Generation Core (NGC)) and the Radio Access Network (RAN), the base station can be implemented in a structure where CU, DU, and RU are arranged in sequence. The interface between the CU and the Distributed Unit (DU) can be referred to as the F1 interface.

[0044] A centralized unit (CU) can be connected to one or more distributed units (DUs) to handle functions at higher layers than the DUs. For example, a CU can handle functions at the Radio Resource Control (RRC) and Packet Data Convergence Protocol (PDCP) layers, while DUs and RUs can handle functions at lower layers. A DU can perform some functions at the Radio Link Control (RLC), Media Access Control (MAC), and PHY layers (high PHY), while an RU can perform the remaining functions at the PHY layer (low PHY). Additionally, as an example, depending on the implementation of a distributed deployment of the base station, digital units (DUs) can be included within distributed units (DUs). Hereinafter, unless otherwise defined, the description refers to the operation of digital units (DUs) and RUs; however, various embodiments of this disclosure can be applied to base station arrangements that include CUs or arrangements where DUs are directly connected to the core network (i.e., CUs and DUs are integrated into a base station as a single entity (e.g., an NG-RAN node)).

[0045] Figure 2b The fronthaul interface of an Open (O) Radio Access Network (RAN) is shown. An eNB or gNB is illustrated as a base station 110 according to a distributed deployment.

[0046] refer to Figure 2b Base station 110 may include O-DU 251 and O-RU 253-1, ... and 253-n. In the following text, for ease of explanation, the operation and function of O-RU 253-1 can be understood as a description of each other O-RU (e.g., O-RU 253-n).

[0047] O-DU 251 is included according to what will be described later. Figure 4The O-DU 251 is a logical node that controls the functions of a base station (e.g., eNB, gNB) other than those specifically allocated to the O-RU 253-1. The O-DU 251 can control the operation of O-RU 253-1, ..., and 253-n. The O-DU 251 may be referred to as a Lower Layer Split (LLS) Central Unit (CU). The O-RU 253-1 is included according to the following description... Figure 4 Logical nodes representing a subset of the functions of a base station (e.g., eNB, gNB). Real-time aspects of communication with the O-RU 253-1's control plane (C-plane) and user plane (U-plane) can be controlled by the O-DU 251.

[0048] The O-DU 251 can communicate with the O-RU 253-1 via the LLS interface. The LLS interface corresponds to the fronthaul interface. The LLS interface refers to the logical interface between the O-DU 251 and O-RU 253-1 using lower-level function segmentation (i.e., function segmentation within the PHY). The LLS-C between the O-DU 251 and O-RU 253-1 provides the C-plane through the LLS interface. The LLS-U between the O-DU 251 and O-RU 253-1 provides the U-plane through the LLS interface.

[0049] exist Figure 2b In this document, the entities of base station 110 have been described as O-DU and O-RU to describe O-RAN. However, these designations should not be construed as limiting the embodiments of this disclosure. In the embodiments described below, the operation of DU 210 can also be performed by O-DU 251. The description of DU 210 can be applied to O-DU 251. Similarly, in the embodiments described below, the operation of RU 220 can also be performed by O-RU 253-1. The description of RU 220 can be applied to O-RU 253-1.

[0050] Figure 3a The functional configuration of the Distributed Unit (DU) is shown. Figure 3a The configuration illustrated as part of the base station can be understood as Figure 2a DU 210 (or Figure 2b The configuration of O-DU 251. In the following text, the terms "...unit" and "...device" as used below refer to a unit that performs at least one function or operation, which can be implemented by hardware or software or a combination of hardware and software.

[0051] refer to Figure 3a The DU 210 includes a transceiver 310, a memory 320, and a processor 330.

[0052] Transceiver 310 can perform functions for transmitting and receiving signals in a wired communication environment. Transceiver 310 may include a wired interface for controlling direct device-to-device connections via a transmission medium (e.g., copper wire, optical fiber). For example, transceiver 310 can transmit electrical signals to another device via copper wire, or perform conversion between electrical and optical signals. DU 210 can communicate with a wireless unit (RU) via transceiver 310. DU 210 can connect to a distributed core network or CU via transceiver 310.

[0053] Transceiver 310 can also perform functions for transmitting and receiving signals in a wireless communication environment. For example, transceiver 310 can perform conversion functions between baseband signals and bit strings according to the system's physical layer specifications. For example, when transmitting data, transceiver 310 generates complex-valued symbols by encoding and modulating the transmitted bit string. Additionally, when receiving data, transceiver 310 recovers the received bit string by demodulating and decoding the baseband signal. Furthermore, transceiver 310 may include multiple transmit / receive paths. Additionally, according to embodiments, transceiver 310 may be connected to a core network or other nodes (e.g., integrated access backhaul (IAB)).

[0054] Transceiver 310 can send and receive signals. For example, transceiver 310 can send management plane (M-plane) messages. For example, transceiver 310 can send synchronization plane (S-plane) messages. For example, transceiver 310 can send control plane (C-plane) messages. For example, transceiver 310 can send user plane (U-plane) messages. For example, transceiver 310 can receive U-plane messages. Although in Figure 3a Only transceiver 310 is shown in the figure, but according to another implementation, DU 210 may include two or more transceivers.

[0055] As described above, transceiver 310 transmits and receives signals. Therefore, all or some of transceiver 310 may be referred to as a "communication unit," "transmitting unit," "receiving unit," or "transmitting / receiving unit." Furthermore, in the following description, "transmission and reception performed via a wireless channel" is used to include the meaning of the processing performed by transceiver 310 as described above.

[0056] Although Figure 3a Not shown, but transceiver 310 may also include a backhaul transceiver for connecting to the core network or another base station. The backhaul transceiver provides an interface for performing communication with other nodes in the network. In other words, the backhaul transceiver converts bit strings sent from the base station to another node (such as another access node, another base station, upper-layer nodes, and the core network) into physical signals, and converts physical signals received from another node into bit strings.

[0057] Memory 320 stores basic programs, application programs, and data such as configuration information for the operation of DU 210. Memory 320 may be referred to as a storage unit. Memory 320 may be configured with volatile memory, non-volatile memory, or a combination of volatile and non-volatile memory. Furthermore, memory 320 provides stored data according to requests from processor 330.

[0058] Processor 330 controls the overall operation of DU 210. Processor 380 can be referred to as a control unit. For example, processor 330 sends and receives signals via transceiver 310 (or via a backhaul communication unit). Furthermore, processor 330 writes and reads data from memory 320. Additionally, processor 330 can perform the functions of the protocol stack required in the communication standard. Although in Figure 3a Only processor 330 is shown in the figure, but according to another implementation, DU 210 may include two or more processors.

[0059] Figure 3a The configuration of DU 210 shown is merely an example, and examples of DUs performing embodiments of this disclosure are not limited to. Figure 3a The configuration shown is illustrated. In some embodiments, configurations can be added, deleted, or changed.

[0060] Figure 3b The functional structure of the radio unit (RU) is shown. Figure 3b The configuration illustrated as part of the base station can be understood as Figure 2b RU 220 or Figure 2b The configuration of the O-RU 253-1. In the following text, the terms "...unit" and "...device" refer to a unit that performs at least one function or operation, which can be implemented by hardware or software, or a combination of hardware and software.

[0061] refer to Figure 3b The RU 220 includes an RF transceiver 360, a fronthaul transceiver 365, a memory 370, and a processor 380.

[0062] The RF transceiver 360 performs functions for transmitting and receiving signals via a wireless channel. For example, the RF transceiver 360 up-converts a baseband signal to an RF band signal and then transmits it through an antenna, and down-converts the RF band signal received through the antenna back to a baseband signal. The RF transceiver 360 may include, for example, a transmit filter, a receive filter, an amplifier, a mixer, an oscillator, a DAC, or an ADC.

[0063] RF transceiver 360 may include multiple transmit / receive paths. Furthermore, RF transceiver 360 may include antenna elements. RF transceiver 360 may include at least one antenna array composed of multiple antenna elements. In terms of hardware, RF transceiver 360 may consist of digital and analog circuitry (e.g., radio frequency integrated circuits (RFICs)). Here, the digital and analog circuitry may be implemented in a single package. Furthermore, RF transceiver 360 may include multiple RF chains. RF transceiver 360 may perform beamforming. In order to provide directionality to the signals to be transmitted and received according to the settings of processor 380, RF transceiver 360 may apply beamforming weights to the signals. According to an embodiment, RF transceiver 360 may include a radio frequency (RF) block (or RF unit).

[0064] According to an embodiment, the RF transceiver 360 can transmit and receive signals on a radio access network. For example, the RF transceiver 360 can transmit downlink signals. Downlink signals may include synchronization signals (SS), reference signals (RS) (e.g., cell-specific reference signals (CRS), demodulation (DM)-RS), system information (e.g., MIB, SIB, residual system information (RMSI), other system information (OSI)), configuration messages, control information, or downlink data. Additionally, for example, the RF transceiver 360 can receive uplink signals. Uplink signals may include random access associated signals (e.g., random access preamble (RAP)) (or message 1 (Msg1), message 3 (Msg3)), reference signals (e.g., sounding reference signals (SRS), DM-RS), or power headroom reports (PHR). Although in Figure 3b Only RF transceiver 360 is shown in the figure, but according to another embodiment, RU 220 may include two or more RF transceivers.

[0065] According to an embodiment, RF transceiver 460 can transmit RIM-RS. RF transceiver 460 can transmit a first type of RIM-RS (e.g., 3GPP RIM-RS type 1) to notify of detected remote interference. RF transceiver 460 can transmit a second type of RIM-RS (e.g., 3GPP RIM-RS type 2) to notify of the presence or absence of remote interference.

[0066] The fronthaul transceiver 365 can send and receive signals. According to an embodiment, the fronthaul transceiver 365 can send and receive signals on the fronthaul interface. For example, the fronthaul transceiver 365 can receive management plane (M-plane) messages. For example, the fronthaul transceiver 365 can receive synchronization plane (S-plane) messages. For example, the fronthaul transceiver 365 can receive control plane (C-plane) messages. For example, the fronthaul transceiver 365 can send user plane (U-plane) messages. For example, the fronthaul transceiver 365 can receive U-plane messages. Although in Figure 3b Only the fronthaul transceiver 365 is shown in the figure, but according to another implementation, the RU 220 may include two or more fronthaul transceivers.

[0067] As described above, RF transceiver 360 and fronthaul transceiver 365 transmit and receive signals. Therefore, all or some of RF transceiver 360 and fronthaul transceiver 365 may be referred to as a "communication unit," "transmitting unit," "receiving unit," or "transmit / receive unit." Furthermore, in the following description, "transmission and reception performed via a wireless channel" is used to include the meaning of the processing performed by RF transceiver 360 as described above.

[0068] Memory 370 stores basic programs, application programs, and data such as configuration information for the operation of RU220. Memory 370 may be referred to as a storage unit. Memory 370 may be configured with volatile memory, non-volatile memory, or a combination of volatile and non-volatile memory. Additionally, memory 370 provides stored data upon request from processor 380. According to embodiments, memory 370 may include memory for conditions, commands, or setting values ​​related to the SRS transmission scheme.

[0069] Processor 380 controls the overall operation of RU 220. Processor 380 can be referred to as a control unit. For example, processor 380 transmits and receives signals via RF transceiver 360 or fronthaul transceiver 365. Furthermore, processor 380 writes and reads data from memory 370. Additionally, processor 380 can perform the functions of the protocol stack required by the communication standard. Although in Figure 3b Only processor 380 is shown, but according to another embodiment, RU 220 may include two or more processors. Processor 380, as an instruction set or code stored in memory 370, may be instructions / code that reside at least temporarily in processor 380 or storage space for stored instructions / code, or may be part of the circuitry constituting processor 380. Furthermore, processor 380 may include various modules for performing communications. Processor 380 can control RU 220 to perform operations according to embodiments described later.

[0070] Figure 3b The configuration of RU 220 shown is merely an example, and examples of RUs performing embodiments of this disclosure are not limited to this. Figure 3b The configuration shown is illustrated. In some embodiments, configurations can be added, deleted, or changed.

[0071] Figure 4 An example of functional splitting between a DU and an RU according to an embodiment is shown. With advancements in wireless communication technologies (e.g., the introduction of fifth-generation (5G) communication systems (or new radio (NR) communication systems)), the frequency bands used have further increased. As the cell radius of base stations becomes very small, the number of RUs that need to be installed has further increased. Furthermore, in 5G communication systems, with the amount of data transmitted increasing significantly by more than 10 times, the transmission capacity of wired networks to the fronthaul has increased significantly. Due to the above factors, the installation cost of wired networks in 5G communication systems can increase significantly. Therefore, in order to reduce the transmission capacity of wired networks and reduce the installation cost of wired networks, a “functional split” can be used to reduce the transmission capacity of the fronthaul by transferring some functions of the DU's modem to the RU.

[0072] To alleviate the burden on the DU, the role of the RU, which is currently only responsible for existing RF functions, can be expanded to include some physical layer functions. When the RU performs higher-layer functions, its throughput increases, which can increase transmission bandwidth in the fronthaul while reducing latency constraints due to response processing. On the other hand, when the RU performs higher-layer functions, virtualization gain decreases and the size, weight, and cost of the RU increase. Considering the trade-offs mentioned above, optimal function partitioning is required.

[0073] Reference Figure 4 This illustrates the functional division in the physical layer below the MAC layer. When transmitting signals to the terminal's downlink (DL) via a wireless network, the base station can sequentially perform channel coding / scrambling, modulation, layer mapping, antenna mapping, RE mapping, digital beamforming (e.g., precoding), iFFT conversion / CP insertion, and RF conversion. When receiving signals from the terminal's uplink (UL) via a wireless network, the base station can sequentially perform RF conversion, FFT conversion / CP removal, digital beamforming (pre-combination), RE demapping, channel estimation, layer demapping, demodulation, and decoding / descrambling. Based on these trade-offs, the division of uplink and downlink functions can be defined in various ways depending on the needs of vendors, standards discussions, etc.

[0074] In the first functional partition 405, the RU performs the RF function, and the DU performs the PHY function. This first functional partition essentially prevents the PHY function from being implemented within the RU, and as an example, it can be referred to as Option 8. In the second functional partition 410, the RU performs iFFT transformation / CP insertion in the DL of the PHY function and FFT transformation / CP removal in the UL, while the DU performs the remaining PHY function. As an example, the second functional partition 410 can be referred to as Option 7-1. In the third functional partition 420a, the RU performs iFFT transformation / CP insertion in the DL of the PHY function and FFT transformation / CP removal and digital beamforming in the UL, while the DU performs the remaining PHY function. As an example, the third functional partition 420a can be referred to as Option 7-2x Category A. In the fourth functional partition 420b, the RU performs digital beamforming in both the DL and UL, and the DU performs the upper-layer PHY function after digital beamforming. As an example, the fourth functional partition 420b can be referred to as Option 7-2x Category B. In the fifth functional segment 425, the RU performs RE mapping (or RE demapping) in both DL and UL, and the DU performs upper-layer PHY functions after RE mapping (or RE demapping). As an example, the fifth functional segment 425 can be referred to as Option 7-2. In the sixth functional segment 430, the RU performs up to modulation (or demodulation) in both DL and UL, and the DU performs upper-layer PHY functions after modulation (or demodulation). As an example, the sixth functional segment 430 can be referred to as Option 7-3. In the seventh functional segment 440, the RU performs up to encoding / scrambling (or decoding / descrambling) in both DL and UL, and the DU performs upper-layer PHY functions after modulation (or demodulation). As an example, the seventh functional segment 440 can be referred to as Option 6.

[0075] According to embodiments, in cases where a large amount of signal processing is anticipated, such as in an FR 1 MMU, functional partitioning at relatively higher levels (e.g., fourth functional partition 420b) may be necessary to reduce fronthaul capacity. Additionally, in functional partitioning at very high levels (e.g., sixth functional partition 430), the implementation of the RU may become burdensome due to the increased complexity of the control interface and the inclusion of multiple PHY processing blocks within the RU; therefore, appropriate functional partitioning may be required depending on the arrangement and implementation method of the DU and RU.

[0076] According to an embodiment, when precoding of data received from the DU cannot be processed (i.e., when the precoding capability of the RU is limited), a third functional segmentation 420a or a lower functional segmentation (e.g., a second functional segmentation 410) can be applied. Conversely, when the capability to process precoding of data received from the DU is available, a fourth functional segmentation 420b or a higher functional segmentation (e.g., a sixth functional segmentation 430) can be applied.

[0077] In the following description, unless otherwise stated, embodiments of this disclosure are based on either a third functional segment 420a (which may be referred to as Category A (CAT-A)) or a fourth functional segment 420b (which may be referred to as Category B (CAT-B)) for performing beamforming processing in the RU. In the O-RAN standard, the type of O-RU is distinguished based on whether the precoding function is located at the interface of the O-DU or the interface of the O-RU. O-RUs that do not perform precoding (i.e., low complexity) may be referred to as CAT-A O-RUs. O-RUs that perform precoding may be referred to as CAT-B O-RUs.

[0078] In the following text, the upper-layer PHY refers to the physical layer processing handled in the DU of the fronthaul interface. For example, the upper-layer PHY may include FEC encoding / decoding, scrambling, and modulation / demodulation. In the following text, the lower-layer PHY refers to the physical layer processing handled in the RU of the fronthaul interface. For example, the lower-layer PHY may include FFT / iFFT, digital beamforming, Physical Random Access Channel (PRACH) extraction, and filtering. However, the above standard does not preclude embodiments through other functional divisions. The functional configurations, signaling, or operations of the embodiments can be applied not only to the third functional division 420a or the fourth functional division 420b, but also to other functional divisions.

[0079] Embodiments of this disclosure exemplarily describe when in DU (e.g., Figure 2a DU 210) and RU (e.g., Figure 2a The standard eCPRI and O-RAN are used as fronthaul interfaces when sending messages between RU 220. The Ethernet payload of the message may include an eCPRI header, an O-RAN header, and additional fields. Hereinafter, the standard terminology of eCPRI or O-RAN is used to describe various embodiments of this disclosure; however, other expressions having equivalent meanings to each term may be used instead in various embodiments of this disclosure. The standard terminology of eCPRI or O-RAN is used to describe various embodiments of this disclosure, but is not limited thereto. For example, the CPRI standard may be used as a fronthaul interface in various embodiments of this disclosure.

[0080] Ethernet and eCPRI, which are easily shared with the network, can be used as the transport protocols for the fronthaul. The eCPRI header and O-RAN header can be included in the Ethernet payload. The eCPRI header can be placed before the Ethernet payload. The eCPRI header contains the following:

[0081] 1) eCPRI version (4 bits): This parameter indicates the eCPRI protocol version.

[0082] 2) eCPRI Reserved (3 bits): This parameter is reserved for further use of eCPRI.

[0083] 3) ecpriConcatenation (1 bit): This parameter indicates when to use eCPRI concatenation.

[0084] 4) ecpriMessage (1 byte): This parameter indicates the type of service carried by the message type. For example, the parameter indicates an IQ data message, a real-time control data message, or a transmission network latency measurement message.

[0085] 5) ecpriPayload (2 bytes): This parameter indicates the size of the payload portion of the eCPRI message in bytes.

[0086] 6) ecpriRtcid / ecpriPcid (2 bytes): This parameter is the extended antenna carrier (eAxC) identifier (eAxCID) and identifies the specific data stream associated with each of the C-plane (ecpriRtcid) or U-plane (ecpriPcid) messages.

[0087] 7) ecpriSeqid (2 bytes): This parameter provides a unique message identifier and order at two levels. The first octet is a sequence ID used to identify the message order within the eAxC message stream, and this sequence ID is used to ensure that all messages are received and out-of-order messages are reordered. The second octet is a subsequence ID. When radio transmission level (eCPRI or IEEE-1914.3) segmentation occurs, the subsequence ID is used to verify the order and implement reordering.

[0088] The eAxC identifier (ID) includes the band and sector identifier (“BandSector_ID”), component carrier identifier (“CC_ID”), spatial stream identifier (“RU_Port_ID”), and distributed cell identifier (“DU_Port_ID”). The bit allocation of the eAxC ID can be distinguished as follows.

[0089] 1) DU_port ID: The DU_port ID is used to distinguish processing units in the O-DU (e.g., different baseband cards). It is expected that the O-DU will allocate bits for the DU_port ID, and the O-RU will append the same value to the UL U-plane message carrying the same sectionId data.

[0090] 2) BandSector_ID: Aggregate cell identifier (identifier of frequency bands and sectors supported by O-RU).

[0091] 3) CC_ID: CC_ID identifies the carrier component supported by the O-RU.

[0092] 4) RU_port ID: RU_port ID specifies logical flows such as data layer or space streams, as well as logical flows such as separate parameter sets (e.g., PRACH) or signal channels like SRS which require specific antenna allocation.

[0093] The application protocol of the fronthaul can include the control plane (C plane), user plane (U plane), synchronization plane (S plane), and management plane (M plane).

[0094] The control plane can be configured to provide scheduling and beamforming information via control messages. The control plane signifies real-time control between the DU and RU. The user plane can include IQ sample data transmitted between the DU and RU. The user plane can include the user's downlink data (IQ data or SSB / RS), uplink data (IQ data or SRS / RS), or PRACH data. The weight vector of the aforementioned beamforming information can be multiplied by the user's data. The synchronization plane typically refers to traffic between the DU and RU used for synchronizing the controller (e.g., the IEEE grand master). The synchronization plane can be related to timing and synchronization. The management plane signifies non-real-time control between the DU and RU. The management plane can be related to initial setup, non-real-time reset or resetting, and non-real-time reporting.

[0095] Messages in the control plane (i.e., control plane messages) can be encapsulated using a two-layer header approach. The first layer can be configured with an eCPRI common header or an IEEE 1914.3 common header, which includes fields indicating the message type. The second layer is the application layer, which includes fields required for control and synchronization. In the application layer, characteristics of U-plane data transmitted or received on a beam with a mode ID are partially defined. The segment types supported in the C-plane are as follows.

[0096] Segment types can indicate the purpose of control messages sent in the control plane. For example, the purpose of a segment type is as follows.

[0097] 1) sectionType=0: Used to indicate resource blocks or symbols that are not used in DL or UL.

[0098] 2) sectionType=1: Used for most DL / UL wireless channels. In this document, "most" refers to channels that do not require time or frequency offset, such as those required for hybrid parameter set channels.

[0099] 3) sectionType=2: Reserved for further use

[0100] 4) sectionType=3: PRACH and hybrid parameter set channels. Channels that require time or frequency offsets or differ from the nominal SCS value.

[0101] 5) sectionType=4: Reserved for further use

[0102] 6) sectionType=5: UE scheduling information. Sends UE scheduling information so that the RU can perform real-time BF weight calculation (O-RAN optional BF method).

[0103] 7) sectionType=6: Transmits UE-specific channel information. Periodically transmits UE channel information, enabling the RU to perform real-time BF weight calculation (optional BF method for O-RAN).

[0104] 8) sectionType=7: Used for LAA support

[0105] In the following specifications, electronic devices (e.g., Figure 1 The base station 110 or terminal 120 may include at least one processing circuit for Orthogonal Frequency Division Multiplexing (OFDM) demodulation to change the domain of a symbol sequence from a first domain to a second domain. At least one processing circuit may include a memory (or buffer) for OFDM demodulation. For example, at least one processing circuit may be referred to as an OFDM demodulation circuit. Technical features for minimizing (or optimizing) the memory and delay time of the OFDM demodulation circuit will be described below.

[0106] Figure 5a An example of the operation of an orthogonal frequency division multiplexing (OFDM) modulation circuit is shown.

[0107] Figure 5b An example of the operation of an OFDM demodulation circuit is shown.

[0108] Figure 6a An example of cyclic shift operation of OFDM modulation circuit is shown.

[0109] Figure 6bAn example of cyclic shift operation in an OFDM demodulation circuit is shown.

[0110] Systems based on the New Radio (NR) standard or Long Term Evolution (LTE) standard (e.g., base stations or user equipment (UEs)) may include OFDM modulation circuitry and OFDM demodulation circuitry. Figure 5a The following section will describe an example of an OFDM modulation circuit. Figure 5b The following section will describe an example of an OFDM demodulation circuit.

[0111] refer to Figure 5a The OFDM modulation circuit 510 can transform the domain of a signal (or symbol sequence, symbols) from the frequency domain to the time domain by performing an inverse fast Fourier transform (IFFT) operation. For example, base station 110 (e.g., RU 220) can use the OFDM modulation circuit 510 to transform the domain of the downlink signal from the frequency domain to the time domain. Base station 110 can then transmit the time-domain downlink signal to terminal 120. As an example, terminal 120 can use the OFDM modulation circuit 510 to transform the domain of the uplink signal from the frequency domain to the time domain. Terminal 120 can then transmit the time-domain uplink signal to base station 110.

[0112] According to an embodiment, the OFDM modulation circuit 510 may include a buffer 511, an inverse fast Fourier transform (IFFT) operation circuit 512, and / or a buffer 513.

[0113] For example, buffer 511 can be used for cyclic shift operations. For example, OFDM modulation circuit 510 can perform cyclic shift operations on signals (or symbol sequences, symbols). Cyclic shift operations can be referred to as pre-IFFT operations or IFFT shift operations.

[0114] Reference Figure 6a For cyclic shift operations, a signal (or a sequence of symbols, symbols) can be divided into a first frequency band (e.g., a high-frequency band) signal 601 and a second frequency band (e.g., a low-frequency band) signal 602. For example, the number of pitches associated with the signal can be n. The number of pitches associated with signal 601 can be n / 2. The number of pitches associated with signal 602 can be n / 2.

[0115] The OFDM modulation circuit 510 can change the order of signals 601 and 602. The OFDM modulation circuit 510 can configure signal 601 as the front-end portion of the input for IFFT operations. The OFDM modulation circuit 510 can configure signal 602 as the back-end portion of the input for IFFT operations. The OFDM modulation circuit 510 can configure a guard band between signals 601 and 602. The OFDM modulation circuit 510 can set the input value for the IFFT operation corresponding to the guard band to 0 to configure the guard band. Based on the above process, the OFDM modulation circuit 510 can perform cyclic shift operations. Figure 6a The N_FFT can indicate the FFT size.

[0116] The OFDM modulation circuit 510 can use a buffer 511 to perform a cyclic shift operation. The size of the buffer 511 can be configured to be twice the maximum number of tones of the signal (or the FFT size). For example, a double buffer with a depth twice the maximum number of tones of the signal (or the FFT size) can be used for the buffer 511.

[0117] Return to reference Figure 5a The IFFT operation circuit 512 can be configured as a frequency decision (DIF) FFT structure for the Cooley-Tukey FFT algorithm used in pipelined FFT. When the IFFT operation circuit 512 is configured as a DIF IFFT structure, based on the signal (or symbol sequence, symbol) input to the IFFT operation circuit 512 in its natural bit order (or natural sequence), a signal (or symbol sequence, symbol) in reverse bit order can be output.

[0118] As described above, when the IFFT operation circuit 512 is configured as a DIF IFFT structure, since the signal (or symbol sequence, symbol) with bit-reversed order is output, the OFDM modulation circuit 510 can perform a reordering operation (or function) to change the signal (or symbol sequence, symbol) back to its natural bit order. The reordering operation (or function) can be set as shown in Equation 1 below.

[0119] Equation 1

[0120]

[0121] Referring to Equation 1, x is the natural order index. y is the bit-reversed order index. NFFT is the size of the FFT.

[0122] Buffer 513 can be used for cyclic expansion operations. For example, OFDM modulation circuit 510 can perform cyclic expansion operations on the output signal of IFFT operation circuit 512. For example, OFDM modulation circuit 510 can perform cyclic expansion operations based on inserting a cyclic prefix (CP) into the signal. Cyclic expansion operations can be referred to as CP insertion operations.

[0123] refer to Figure 5b The OFDM demodulation circuit 520 can transform the domain of a signal (or symbol sequence, symbols) from the time domain to the frequency domain based on performing a Fast Fourier Transform (FFT) operation. As an example, base station 110 (e.g., RU 220) can receive uplink signals in the time domain from terminal 120. Base station 110 can transform the domain of the uplink signal from the time domain to the frequency domain by using the OFDM demodulation circuit 520. As an example, terminal 120 can receive downlink signals in the time domain from base station 110. Terminal 120 can transform the domain of the downlink signal from the time domain to the frequency domain by using the OFDM demodulation circuit 520.

[0124] According to an embodiment, the OFDM demodulation circuit 520 may include a buffer 521, a fast Fourier transform (FFT) operation circuit 522, and / or a buffer 523.

[0125] For example, buffer 521 can be used for digital automatic gain control (AGC) operation. Base station 110 (or terminal 120) can receive RF signals using an antenna and obtain signal 531 amplified by radio frequency (RF) automatic gain control (AGC) operation. Since RF AGC operation cannot apply gain to RF signals on a symbol-by-symbol basis, digital AGC operation can be performed in OFDM demodulation circuitry 520. For example, digital AGC operation can obtain power-related average data (e.g., uplink average data or downlink average data) on a bit-by-bit basis by acquiring (or measuring, identifying) the power of all OFDM symbols.

[0126] OFDM demodulation circuit 520 can use buffer 521 to perform digital AGC operations. For example, OFDM demodulation circuit 520 can obtain the power of all OFDM symbols of signal 531 to perform digital AGC operations. Buffer 521 can be used to obtain the power of all OFDM symbols of signal 531. For pipelined FFT, the size of buffer 521 can be configured to be twice the maximum number of tones (or FFT size, FFT point size) of signal 531. For example, for buffer 521, a dual buffer with a depth twice the maximum number of tones (or FFT size) of signal 531 can be used.

[0127] FFT operation circuit 522 can be configured as a frequency decimation (DIF) FFT structure for the Cooley-Tukey FFT algorithm used in pipelined FFT. When FFT operation circuit 522 is configured as a DIF FFT structure, based on the signal (e.g., signal 531) (or symbol sequence, symbol) input to FFT operation circuit 522 in its natural bit order (or natural sequence), a signal (or symbol sequence, symbol) in reverse bit order can be output.

[0128] As described above, when the FFT operation circuit 522 is configured as a DIF FFT structure, since the signal (or symbol sequence, symbol) with bit-reversed order is output, the OFDM demodulation circuit 520 can perform a reordering operation (or function) to change the signal (or symbol sequence, symbol) back to its natural bit order. The reordering operation (or function) can be set as in Equation 1 above.

[0129] Buffer 523 can be used for reordering operations and cyclic shift operations. For example, OFDM demodulation circuit 520 can perform reordering operations and cyclic shift operations on signals (or symbol sequences, symbols). Cyclic shift operations can be referred to as post-FFT operations or FFT shift operations.

[0130] Reference Figure 6b For cyclic shift operations, a signal (or symbol sequence, symbols) can be divided into a first frequency band (e.g., high frequency band) signal 612 and a second frequency band (e.g., low frequency band) signal 611. Signal 611 can be... Figure 6a Signal 601 is related to signal 612. Figure 6a The signal 602 is related to this. For example, the number of tones associated with the signal can be n. The number of tones associated with signal 611 can be n / 2. The number of tones associated with signal 612 can be n / 2.

[0131] The OFDM demodulation circuit 520 can change the order of signals 611 and 612. For example, signal 611 can be the front-end portion of the output of an FFT operation. Signal 612 can be the back-end portion of the output of an FFT operation. A guard band can be configured between signals 611 and 612. The OFDM demodulation circuit 520 can remove the guard band and change the order of signals 611 and 612. The OFDM demodulation circuit 520 can configure signal 612 as the front-end portion of its output. The OFDM demodulation circuit 520 can configure signal 611 as the back-end portion of its output. Figure 6b The N_FFT can indicate the FFT size.

[0132] Return to reference Figure 5bThe OFDM demodulation circuit 520 can use buffer 523 to perform reordering operations and cyclic shift operations. The size of buffer 523 can be configured to be twice the maximum number of tones of the signal (or the FFT size). For example, for buffer 523, a double buffer with a depth twice the maximum number of tones of the signal (or the FFT size) can be used.

[0133] like Figure 5a and Figure 5b As shown, the IFFT operation circuit 512 and the FFT operation circuit 522 can be configured as a DIF FFT structure. For example, the size of the memory used for the FFT operation circuit (or IFFT operation circuit) configured as a DIF FFT structure can be smaller than the size of the memory used for the FFT operation circuit (or IFFT operation circuit) configured as a time-decimation fast Fourier transform (DIT FFT) structure. Therefore, the IFFT operation circuit and the FFT operation circuit can be configured as a DIF FFT structure.

[0134] According to embodiments, in a wireless communication system, multiple antennas can be used for spatial multiplexing, reducing inter-signal interference, diversity, and / or improving reliability. As the number of antennas increases, the FFT point size (or FFT size) may increase due to real-time multi-antenna signal processing and bandwidth expansion. As the FFT point size increases, the amount of hardware resource usage (e.g., memory usage) in the OFDM demodulation circuitry may also increase.

[0135] The increased use of hardware resources, as described above, may lead to increased system latency and decreased response speed. Capital and operating expenses may also increase due to increased power consumption. Furthermore, the size of products used for heat dissipation may increase due to increased heat generation. Therefore, technical features to prevent this in OFDM demodulation circuits may be needed. Technical features for reducing hardware resource usage in OFDM demodulation circuits will be described below. Specifically, technical features for optimizing the memory of OFDM demodulation circuits based on changes in the FFT algorithm will be described below.

[0136] First, the Discrete Fourier Transform (DFT) operation can be configured for the FFT operation as shown in Equation 2.

[0137] Equation 2

[0138]

[0139] Referring to Equation 2, n is the time-domain index, and k is the frequency-domain index. It is the rotation factor.

[0140] For example, the rotation factor can be configured as shown in Equation 3.

[0141] Equation 3

[0142]

[0143] Based on the DFT operations described above, FFT operations can be configured. For FFT operations, for... Given a complex input x(n), a signal flow graph with p stages (or steps) can be configured, and each stage can perform N / 2 butterfly structure operations.

[0144] For ease of description, the 16-point FFT operation will be described below. However, this is for simplicity and the FFT size can be changed according to the embodiment.

[0145] When Equation 2 above is decomposed into binary level, it can be configured as in Equation 4.

[0146] Equation 4

[0147]

[0148] Based on the FFT operation configured as shown in Equation 4, an OFDM demodulation circuit with a DIF FFT structure or a DIT FFT structure can be configured. The FFT operation of the DIF FFT structure or the DIT FFT structure, along with the signal flow graph based on the corresponding FFT operation, will be described below.

[0149] Figure 7 The signal flow graph of the FFT operation in the frequency decimation fast Fourier transform (DIF FFT) structure is shown.

[0150] refer to Figure 7 Equation 4 can be expanded as in Equation 5. According to Equation 4, n1 (i.e., The FFT operation can be configured as shown in Equation 5, by expanding the expression.

[0151] Equation 5

[0152]

[0153] In Equation 5, based on the expansion of n2, n3, and n4, the FFT operation can be configured as in Equation 6.

[0154] Equation 6

[0155]

[0156] Signal flow graph 700 can be configured according to Equation 6. Signal flow graph 700 can illustrate FFT operations. For example, referring to signal flow graph 700, when performing an FFT operation on a sequence of symbols (or symbols) arranged based on natural bit order, a sequence of symbols (or symbols) arranged based on bit reversal order can be output (or obtained). Therefore, in order to arrange the sequence of symbols arranged based on bit reversal order (or arrange the FFT index (time domain index)), all data associated with the symbol sequence can be stored in memory (e.g., Figure 5a The buffer (512) is then used for output.

[0157] According to an embodiment, the signal flow graph 700 may be configured with multiple stages. For example, the signal flow graph 700 may include stages 701, 702, 703, and 704. The OFDM demodulation circuit can perform the operation of Equation 6 by sequentially executing the operations associated with stages 701 to 704.

[0158] According to an embodiment, in an OFDM demodulation circuit (e.g., OFDM demodulation circuit 520), a buffer (e.g., buffer 521) for the input of an FFT operation circuit (e.g., FFT operation circuit 522) can be used for digital AGC operations. When digital AGC operations are not performed, the buffer for the input of the FFT operation circuit can be omitted. However, when digital AGC operations are not performed, it is more efficient to maintain a buffer for the input of the FFT operation circuit in the OFDM demodulation circuit because a wide fixed-bit structure for the FFT is required.

[0159] When the FFT operation circuit is configured as a DIT FFT structure, signals can be output from the FFT operation circuit in natural bit order. When signals are output from the FFT operation circuit in natural bit order, the buffer (e.g., buffer 523) used for the output of the OFDM demodulation circuit can be omitted. For example, although the memory size used for the FFT operation circuit configured as a DIT FFT structure can be larger than the memory size used for the FFT operation circuit (or IFFT operation circuit) configured as a DIF FFT structure, omitting the buffer (e.g., buffer 523) used for the output of the OFDM demodulation circuit can significantly reduce the memory size of the OFDM demodulation circuit.

[0160] Therefore, the structure of an OFDM demodulation circuit will be described below using an FFT operation circuit configured as a DIT FFT structure without including a buffer (e.g., buffer 523) for the output of the OFDM demodulation circuit.

[0161] Figure 8 The signal flow graph of the FFT operation in the time-decimation fast Fourier transform (DIT FFT) structure is shown.

[0162] Figure 9 The signal flow graph of the FFT operation using the cyclic shift operation of the DIT FFT structure is shown.

[0163] refer to Figure 8 Equation 4 above can be expanded into Equation 5 above. In Equation 5, It can be configured as shown in Equation 7.

[0164] Equation 7

[0165]

[0166] Referring to Equation 7, when When it is an even number, The value is 1. When When it is an odd number, The value is -1. This can be determined based on... Determine Is it an even or odd number? Therefore, equation 7 can be modified again as in equation 8. Furthermore, and They can be configured as shown in Equations 9 and 10, respectively.

[0167] Equation 8

[0168]

[0169] Equation 9

[0170]

[0171] Equation 10

[0172]

[0173] By using Equations 8, 9, and 10, Equation 5 can be modified as in Equation 11.

[0174] Equation 11

[0175]

[0176] In Equation 11, based on the expansion of n2, the FFT operation can be configured as in Equation 12.

[0177] Equation 12

[0178]

[0179] In equation 12, It can be configured as shown in Equation 13.

[0180] Equation 13

[0181]

[0182] In equation 12, according to The expansion of FFT operations can be configured as shown in Equation 14.

[0183] Equation 14

[0184]

[0185] In equation 14, It can be configured as shown in Equation 15.

[0186] Equation 15

[0187]

[0188] According to Equation 15, It can be configured as shown in Equation 16.

[0189] Equation 16

[0190]

[0191] According to Equation 16, the FFT operation can be configured as shown in Equation 17.

[0192] Equation 17

[0193]

[0194] In Equation 17, based on the expansion of n3, the FFT operation can be configured as in Equation 18.

[0195] Equation 18

[0196]

[0197] In equation 18, It can be configured as shown in Equation 19.

[0198] Equation 19

[0199]

[0200] According to Equation 19, the FFT operation can be configured as shown in Equation 20.

[0201] Equation 20

[0202]

[0203] In equation 20, It can be configured as shown in Equation 21.

[0204] Equation 21

[0205]

[0206] Based on the expansion of Equations 21 and n4, the FFT operation can be configured as shown in Equation 22.

[0207] Equation 22

[0208]

[0209] Signal flow graph 800 can be configured according to Equation 22. Signal flow graph 800 can illustrate FFT operations.

[0210] According to an embodiment, the signal flow graph 800 may be configured with multiple stages. For example, the signal flow graph 800 may include stages 801, 802, 803, and 804. The OFDM modulation circuit can perform the operation of Equation 22 by sequentially executing the operations associated with stages 801 to 804.

[0211] Referring to signal flow diagram 800, when performing an FFT operation on a symbol sequence (or symbols) configured based on bit reversal order, a symbol sequence (or symbols) configured based on natural bit order can be output (or obtained). When performing an FFT operation, since the symbol sequence (or symbols) is configured based on natural bit order, memory is not required for arranging the symbol sequence (or symbols) (or arranging the FFT index (time domain index)).

[0212] As described above, when the FFT operation circuit is configured as a DIT FFT structure, a sequence (or symbols) based on the natural bit order can be obtained as the output of the FFT operation circuit. Therefore, the OFDM demodulation circuit may not require a memory (or buffer) for reordering operations. However, a memory (or buffer) for cyclic shift operations may be necessary in the OFDM demodulation circuit.

[0213] According to an embodiment, when performing a cyclic shift operation as the output of an FFT circuit and obtaining a sequence (or symbols) based on the natural bit order, a memory (or buffer) for the cyclic shift operation may not be required. See below for further details. Figure 9 Describe the structure of an FFT operation circuit used to perform cyclic shift operations and obtain a sequence (or symbols) based on the natural bit order configuration.

[0214] refer to Figure 9 In order to configure the FFT operation circuit using cyclic shift operations, in Equation 22 above, it can be used that... Instead of k4. For example, k4 could be the MSB of the bit sequence of the FFT index (frequency domain index). For example, it could be configured as shown in Equation 23. .

[0215] Equation 23

[0216]

[0217] Refer to Equation 23, Through the The value obtained by performing a modulo 2 operation.

[0218] When in the above equation 22, replace At this time, the output of the FFT operation circuit can be cyclically shifted by half. The above equation can be applied to a size of The FFT operation. For example, in equation 22 above, using... replace Signal flow graph 900 can be configured.

[0219] Figure 9 The signal flow graph 900 can be configured with multiple stages. For example, the signal flow graph 900 may include stages 901, 902, 903, and 904. The FFT operation circuit (or OFDM demodulation circuit) can sequentially execute the operations associated with stages 901 to 904. For example, stage 904 can be configured by switching (or changing) the sign of the last operation of stage 904, because... Replaced with .

[0220] Referring to signal flow diagram 900 related to the FFT operation circuit, the input data of the FFT operation circuit can be configured with a sequence of symbols (or symbols) arranged based on bit reversal order. The output data of the FFT operation circuit can be configured with a sequence of symbols (or symbols), and cyclic shift operations are applied to the sequence of symbols (or symbols) arranged based on natural bit order.

[0221] Because the output data of the FFT operation circuit is configured with a sequence of symbols (or symbols) that apply cyclic shift operations to a sequence of symbols (or symbols) arranged based on the natural bit order, it eliminates the need for memory (or buffers) for arranging the symbol sequence (or arranging the FFT index (time-domain index)) and for performing the cyclic shift operations. The aforementioned equation transformation may not lead to an increase in system complexity.

[0222] Figure 10 An OFDM demodulation circuit is shown for performing FFT operations for cyclic shift and reordering operations.

[0223] refer to Figure 10 The OFDM demodulation circuit 1000 may include a buffer 1010 and an FFT operation circuit 1020. The FFT operation circuit 1020 may be based on... Figure 9 Configure the signal flow graph 900.

[0224] When based on Figure 9 When the signal flow diagram 900 configures the FFT operation circuit 1020, when the FFT operation is performed on the symbol sequence (or symbols) configured based on the bit reversal order in the FFT operation circuit 1020, the symbol sequence (or symbols) to which the cyclic shift operation is applied to the symbol sequence (or symbols) configured based on the natural bit order can be output (or obtained).

[0225] For example, buffer 1010 can be used to perform digital AGC operations and input a symbol sequence (or symbols) configured based on bit-reversed order to FFT operation circuit 1020. Since the symbol sequence (or symbols) is stored in memory (e.g., buffer 1010) before being input to FFT operation circuit 1020, OFDM demodulation circuit 1000 can output a symbol sequence (or symbols) configured based on natural bit order based on bit-reversed order. As an example, OFDM demodulation circuit 1000 can set the read address for outputting the symbol sequence (or symbols) based on bit-reversed order. The symbol sequence (or symbols) configured according to bit-reversed order can be input to FFT operation circuit 1020.

[0226] The output data of the FFT operation circuit 1020 can be configured to apply a cyclic shift operation of half the size of the FFT to a symbol sequence (or symbols) arranged based on the natural bit order. Therefore, the OFDM demodulation circuit 1000 may not include a memory (or buffer) for arranging the symbol sequence (or symbols) and a memory (or buffer) for performing the cyclic shift operation. For example, since the guard band is located in... Figure 6b In the central region of the symbol sequence, it can therefore be obtained by the OFDM demodulation circuit 1000 without memory. Figure 5a and Figure 5b The output is the same as the output.

[0227] In the above embodiments, an example where the FFT size is set to 16 has been described; however, this is for ease of description, and the FFT size can be set differently. Furthermore, although the above embodiments have been described based on the radix-2 algorithm, this is for ease of description. The technical features according to the above embodiments can be applied to radix-4 and radix-2 algorithms. Various algorithms.

[0228] Figure 11A flowchart is shown relating to the operation of an electronic device for performing FFT operations using cyclic shift operations.

[0229] In operations 1110 and 1120, the electronic device may include at least one processing circuit for OFDM demodulation to change the domain of the symbol sequence from a first domain to a second domain. For example, an example of the electronic device according to operations 1110 to 1120 could be... Figure 10 Example of OFDM demodulation circuit 1000.

[0230] refer to Figure 11 In operation 1110, at least one processing circuit of the electronic device can obtain a first symbol sequence associated with a first domain based on a received signal. For example, at least one processing circuit can obtain the first symbol sequence associated with the first domain based on a received signal obtained from an external electronic device. For example, the first domain can be a time domain. The first domain may include a time domain. The first symbol sequence can be configured based on the time domain.

[0231] For example, when an electronic device corresponds to a base station, an external electronic device can correspond to a terminal.

[0232] For example, at least one processing circuit can obtain a third symbol sequence associated with the first domain from the received signal. At least one processing circuit can store the third symbol sequence associated with the first domain in a second buffer (e.g., Figure 10 The at least one processing circuit can perform automatic gain control operation based on the third symbol sequence. The at least one processing circuit can identify the average power of the third symbol sequence stored in the second buffer and perform automatic gain control operation based on the average power.

[0233] For example, at least one processing circuit can obtain a first symbol sequence based on a third symbol sequence using a second buffer. The third symbol sequence can be configured based on the natural bit order. The first symbol sequence can be configured based on the bit-reversed order. The at least one processing circuit can obtain (or output) the first symbol sequence by changing the output order of the third symbol sequence stored in the second buffer.

[0234] The third symbol sequence, configured based on the natural bit order, can imply a sequential configuration of the FFT index (or frequency domain index). As an example, the first symbol sequence, configured based on the natural bit order, can imply a sequential configuration of the FFT index (or frequency domain index) and... Figure 7 The input of the signal flow graph 700 is configured similarly.

[0235] The first symbol sequence configured based on bit-reversed order can imply configuring the FFT index (or time-domain index) in bit-reversed order. As an example, configuring the first symbol sequence based on bit-reversed order can mean that the FFT index (or time-domain index) is similar to... Figure 9 The signal flow diagram 900 is configured to input the signal flow.

[0236] According to an embodiment, the size of the second buffer can be set based on the size of the FFT operation performed below. For example, the size of the second buffer can be set to twice the size of the FFT.

[0237] In operation 1120, at least one processing circuit can obtain a second symbol sequence associated with the second domain by performing an FFT operation using a cyclic shift operation on the first symbol sequence.

[0238] For example, at least one processing circuit can perform an FFT operation using a cyclic shift operation on the first symbol sequence. As an example, this at least one processing circuit can operate without a first buffer for the cyclic shift operation (e.g., ...). Figure 5b In the case of buffer 523), the FFT operation is performed on the first symbol sequence using the circular shift operation.

[0239] For example, for each FFT index in the FFT index of the FFT size associated with the first field, an FFT operation using cyclic shift operations can include changing the value of the most significant bit (MSB) of the bit sequence of the corresponding FFT index from 0 to 1 or from 1 to 0. For example, an FFT operation using cyclic shift operations can be performed based on a decimation-time (DIT) FFT structure.

[0240] For example, an FFT operation using cyclic shift operations can be performed based on multiple rotation factors. The FFT operation using cyclic shift operations can be configured into multiple steps (or multiple stages) based on multiple rotation factors. These multiple steps may include... Figure 9 The signal flow graph 900 is divided into stages 901 to 904.

[0241] For example, the at least one processing circuit can perform an FFT operation using a cyclic shift on the first symbol sequence without a first buffer for the cyclic shift operation. Since the first symbol sequence is configured based on a bit-reversed order, the bit-reversed first symbol sequence can be input to a circuit configured for the FFT operation (e.g., Figure 10 The FFT operation circuit 1020).

[0242] At least one processing circuit can obtain a second symbol sequence associated with a second domain. For example, at least one processing circuit can obtain the second symbol sequence associated with the second domain based on the result of an FFT operation using a cyclic shift operation. For example, the second domain can be the frequency domain. The second domain can include the frequency domain. The second symbol sequence can be configured based on the frequency domain. The second symbol sequence can be configured based on the natural bit order of performing the cyclic shift operation (or the natural bit order of the cyclic shift). At least one processing circuit may not include a first buffer for the cyclic shift operation. A storage area for the first buffer may not be configured in the electronic device (or at least one processing circuit).

[0243] Configuring the second symbol sequence based on the natural bit order (or the natural bit order after cyclic shifting) of the cyclic shift operation can mean that... Figure 9 The output of the signal flow diagram 900 is similarly configured with an FFT index (or frequency domain index). For example, at least one processing circuit can obtain a second symbol sequence shifted by half the size of the FFT based on an FFT operation using cyclic shift operations.

[0244] Figure 12 An example of the configuration of the processing device is shown.

[0245] refer to Figure 12 The processing device 1200 may be configured with one or more chips. For example, the processing device 1200 may be configured with a field-programmable gate array (FPGA). For example, the processing device 1200 may be configured based on an application-specific integrated circuit (ASIC). For example, an example of the processing device 1200 may be the aforementioned electronic equipment (or OFDM demodulation circuit). For example, the processing device 1200 may perform at least some or all of the functions of the RU. However, it is not limited thereto. The processing device 1200 may perform at least some or all of the functions of the DU.

[0246] For example, processing device 1200 may be controlled by a processor (or at least a portion of a processor). As an example, processing device 1200 may be controlled by... Figure 3b The processor 380 controls the process. For example, the processing device 1200 may be configured with at least a portion of a processor.

[0247] According to an embodiment, the processing device 1200 may include a processing circuit 1210 and a memory 1220.

[0248] For example, the processing circuit 1210 can be Figure 11 An example of at least one processing circuit. The processing circuit 1210 may include at least one component for OFDM demodulation. The processing circuit 1210 may perform FFT operations on a DIT FFT structure (or DIF FFT structure) depending on the configuration of the at least one component.

[0249] The memory 1220 may include multiple storage spaces. The memory 1220 may be divided into multiple storage spaces. For example, the memory 1220 may include a first storage space 1221, a second storage space 1222, and / or a third storage space 1223. As an example, it may be the aforementioned first buffer (e.g., Figure 10 The buffer 1010 allocates a first storage space 1221. According to an embodiment, the memory 1220 may be configured with one memory (or one storage circuit). For example, storage space may be partitioned within a single memory, allowing multiple storage spaces to be configured (e.g., a first storage space 1221, a second storage space 1222, and a third storage space 1223). According to an embodiment, the memory 1220 may be configured with multiple memories (or multiple storage circuits). Among the multiple memories, a first number of memories may be used for the first storage space 1221. Among the multiple memories, a second number of memories may be used for the second storage space 1222. Among the multiple memories, a third number of memories may be used for the third storage space 1223.

[0250] According to one embodiment, an electronic device (e.g., OFDM demodulation circuitry 1000) may include a memory and at least one processing circuit for Orthogonal Frequency Division Multiplexing (OFDM) demodulation to change the domain of a symbol sequence from a first domain to a second domain. The at least one processing circuit may be configured to obtain a first symbol sequence associated with the first domain based on a received signal obtained from an external electronic device. The at least one processing circuit may be configured to obtain a second symbol sequence associated with the second domain by performing a Fast Fourier Transform (FFT) operation using cyclic shift operations on the first symbol sequence. For each Fast Fourier Transform (FFT) index in an FFT index of size corresponding to the second domain, the FFT operation using cyclic shift operations may include changing the value of the most significant bit (MSB) of the bit sequence of the corresponding FFT index from 0 to 1 or from 1 to 0.

[0251] According to an embodiment, the first symbol sequence can be configured based on bit reversal order. The second symbol sequence can be configured based on the natural bit order after performing a cyclic shift operation.

[0252] According to an embodiment, at least one processing circuit can be configured to perform an FFT operation using a cyclic shift operation on a first symbol sequence without a first buffer for the cyclic shift operation.

[0253] According to an embodiment, at least one processing circuit may be configured to store a third symbol sequence related to the first domain obtained from the received signal in a second buffer. At least one processing circuit may be configured to perform automatic gain control operations based on the third symbol sequence.

[0254] According to an embodiment, the third symbol sequence can be configured based on the natural bit order.

[0255] According to an embodiment, at least one processing circuit can be configured to obtain a first symbol sequence using a second buffer based on a third symbol sequence.

[0256] According to an embodiment, the size of the second buffer can be set to twice the size of the FFT.

[0257] According to an embodiment, an FFT operation using cyclic shift operations can be performed based on multiple rotation factors.

[0258] According to an embodiment, at least one processing circuit can be configured to obtain a second symbol sequence shifted by half the size of the FFT based on an FFT operation using cyclic shifting operations.

[0259] According to an embodiment, FFT operations using cyclic shift operations can be performed based on a time-decimation (DIT) FFT structure.

[0260] According to one embodiment, a method performed by an electronic device may include obtaining a first symbol sequence associated with a first domain based on a received signal obtained from an external electronic device. The method may include obtaining a second symbol sequence associated with a second domain by performing a Fast Fourier Transform (FFT) operation using cyclic shift operations on the first symbol sequence. For each Fast Fourier Transform (FFT) index in an FFT index of size relative to the second domain, the FFT operation using cyclic shift operations may include changing the value of the most significant bit (MSB) of the bit sequence of the corresponding FFT index from 0 to 1 or from 1 to 0.

[0261] According to an embodiment, the first symbol sequence can be configured based on bit reversal order. The second symbol sequence can be configured based on the natural bit order after performing a cyclic shift operation.

[0262] According to an embodiment, the method may include: performing an FFT operation on a first symbol sequence using a cyclic shift operation when there is no first buffer for the cyclic shift operation.

[0263] According to an embodiment, the method may include storing a third symbol sequence, obtained from the received signal and associated with a first domain, in a second buffer. The method may also include performing automatic gain control operations based on the third symbol sequence.

[0264] According to an embodiment, the third symbol sequence can be configured based on the natural bit order.

[0265] According to an embodiment, the method may include: obtaining a first symbol sequence using a second buffer based on a third symbol sequence.

[0266] According to an embodiment, the size of the second buffer can be set to twice the size of the FFT.

[0267] According to an embodiment, an FFT operation using cyclic shift operations can be performed based on multiple rotation factors.

[0268] According to an embodiment, the method may include: obtaining a second symbol sequence that is half the size of the shifted FFT based on an FFT operation using cyclic shift operations.

[0269] According to an embodiment, FFT operations using cyclic shift operations can be performed based on a time-decimation (DIT) FFT structure.

[0270] According to one embodiment, an electronic device (e.g., OFDM demodulation circuit 1000) may include a memory comprising one or more storage media storing instructions for Orthogonal Frequency Division Multiplexing (OFDM) demodulation to change the domain of a symbol sequence from a first domain to a second domain, and at least one processing circuit. When the instructions are executed individually or jointly by the at least one processing circuit, the instructions may cause the electronic device to obtain a first symbol sequence associated with the first domain based on a received signal obtained from an external electronic device. When the instructions are executed individually or jointly by the at least one processing circuit, the instructions may cause the electronic device to obtain a second symbol sequence associated with the second domain by performing a Fast Fourier Transform (FFT) operation using cyclic shift operations on the first symbol sequence. For each Fast Fourier Transform (FFT) index in an FFT index of size relative to the second domain, the FFT operation using cyclic shift operations may include changing the value of the most significant bit (MSB) of the bit sequence of the corresponding FFT index from 0 to 1 or from 1 to 0.

[0271] According to an embodiment, the first symbol sequence can be configured based on bit reversal order. The second symbol sequence can be configured based on the natural bit order after performing a cyclic shift operation.

[0272] According to an embodiment, when the instruction is executed individually or jointly by the at least one processing circuit, the electronic device can perform an FFT operation using a cyclic shift operation on a first symbol sequence without a first buffer for the cyclic shift operation.

[0273] According to an embodiment, when the instruction is executed individually or jointly by the at least one processing circuit, the instruction can cause the electronic device to store a third symbol sequence related to the first domain obtained from the received signal in a second buffer. When the instruction is executed individually or jointly by the at least one processing circuit, the instruction can cause the electronic device to perform automatic gain control operation based on the third symbol sequence.

[0274] According to an embodiment, the third symbol sequence can be configured based on the natural bit order.

[0275] According to an embodiment, when the instructions are executed individually or jointly by the at least one processing circuit, the instructions enable the electronic device to perform the following operation: obtain a first symbol sequence based on a third symbol sequence using a second buffer.

[0276] According to an embodiment, the size of the second buffer can be set to twice the size of the FFT.

[0277] According to an embodiment, an FFT operation using cyclic shift operations can be performed based on multiple rotation factors.

[0278] According to an embodiment, when the instructions are executed individually or jointly by the at least one processing circuit, the instructions enable the electronic device to perform the following operation: obtain a second symbol sequence shifted by half the size of the FFT based on an FFT operation using cyclic shifting operations.

[0279] According to an embodiment, FFT operations using cyclic shift operations can be performed based on a time-decimation (DIT) FFT structure.

[0280] According to the above embodiments, an OFDM demodulation circuit that does not include a memory (or buffer) for performing reordering and cyclic shift operations at the output of the FFT operation circuit can be configured. The memory size of an FFT operation circuit (or IFFT operation circuit) configured as a DIF FFT structure can be smaller than the memory size of an FFT operation circuit (or IFFT operation circuit) configured as a DIT FFT structure. However, the FFT operation circuit (e.g., FFT operation circuit 1020) of the OFDM demodulation circuit (e.g., OFDM demodulation circuit 1000) according to the above embodiments can be configured as a DIT FFT structure. Even when the FFT operation circuit (e.g., FFT operation circuit 1020) of the OFDM demodulation circuit (e.g., OFDM demodulation circuit 1000) according to the above embodiments is configured as a DIT FFT structure, memory usage can be reduced because the memory for performing reordering and cyclic shift operations is not configured at the output of the FFT operation circuit. By omitting the storage operation of the output data of the FFT operation circuit, the waiting time of at least OFDM symbols can be reduced, and additional heat generation and power consumption can be reduced.

[0281] According to the above embodiments, the input buffer can be omitted, or the size of the output buffer can be reduced without degrading performance by simply changing the equation. According to the above embodiments, due to the simplified storage process, the number of OFDM symbols or longer delays can be reduced. According to the above embodiments, due to the reduced use of hardware resources, heat generation and power consumption can be reduced. Since IFFT operations need to be performed on each antenna in the OFDM modulation circuit, heat generation and power consumption can be significantly reduced in systems with large bandwidth and many antennas.

[0282] The methods described in the claims or specification of this disclosure can be implemented in hardware, software, or a combination of hardware and software.

[0283] When implemented as software, a computer-readable storage medium may be provided for storing one or more programs (software modules). The one or more programs stored in the computer-readable storage medium are configured to be executed by one or more processors in an electronic device. The one or more programs include instructions to cause the electronic device to perform a method according to the embodiments described in the claims or specification of this disclosure. One or more programs may be included and provided in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., an optical disc read-only memory (CD-ROM)) or via an app store (e.g., the Play Store). TMThis can occur between online distributions (e.g., downloads or uploads) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily generated or at least temporarily stored in a machine-readable storage medium, such as the memory of a manufacturer's server, an app store's server, or a relay server.

[0284] Such programs (software modules, software) can be stored in random access memory, including non-volatile memory such as flash memory, read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), disk storage devices, optical storage devices (e.g., optical disc-ROM, digital versatile disc (DVD), or other formats), or magnetic tape cartridges. Alternatively, it can be stored in a memory configured with some or all of these. Additionally, multiple configuration memories may be included.

[0285] Additionally, the program can be stored in an attachable storage device that can be accessed via a communication network such as the Internet, intranet, local area network (LAN), wide area network (WAN), or storage area network (SAN), or a combination thereof. Such a storage device can be connected to a device executing embodiments of this disclosure via an external port. Furthermore, a separate storage device on the communication network can also be connected to a device executing embodiments of this disclosure.

[0286] In the specific embodiments described above, the components included in this disclosure are represented in a singular or plural form according to the presented embodiments. However, the singular or plural representation may be appropriately chosen for ease of explanation, and this disclosure is not limited to singular or plural components; even components expressed in a plural form may be configured in a singular form, or vice versa.

[0287] According to various embodiments, one or more of the components or operations described above may be omitted, or one or more other components or operations may be added. Alternatively or additionally, multiple components (e.g., modules or programs) may be integrated into a single component. In this case, the integrated component may still perform one or more functions of each of the multiple components in the same or similar manner as the corresponding components in the multiple components before integration. According to various embodiments, operations performed by a module, program, or other component may be performed sequentially, in parallel, repeatedly, or heuristically, or one or more operations may be performed in a different order or omitted, or one or more other operations may be added.

[0288] Furthermore, specific embodiments have been described in detail in this disclosure, and of course, various modifications can be made without departing from the scope of this disclosure.

Claims

1. An electronic device, comprising: The memory includes one or more storage media that store instructions for orthogonal frequency division multiplexing (OFDM) demodulation to change the domain of a symbol sequence from a first domain to a second domain; and At least one processing circuit, The instructions, when executed individually or jointly by the at least one processing circuit, cause the electronic device to: Based on the received signal obtained from an external electronic device, a first symbol sequence associated with the first domain is obtained, and A second symbol sequence associated with the second domain is obtained by performing a Fast Fourier Transform (FFT) operation using cyclic shift operations on the first symbol sequence. Specifically, for each Fast Fourier Transform (FFT) index in the FFT index of the FFT size associated with the second field, the FFT operation using cyclic shifting includes changing the value of the most significant bit (MSB) of the bit sequence of the corresponding FFT index from 0 to 1 or from 1 to 0.

2. The electronic device according to claim 1, wherein, The first symbol sequence is configured based on bit-reversed order, and The second symbol sequence is configured based on the natural bit order in which the cyclic shift operation is performed.

3. The electronic device according to claim 2, wherein, When the instruction is executed individually or jointly by the at least one processing circuit, the electronic device also causes the electronic device to perform an FFT operation on the first symbol sequence using a cyclic shift operation in the absence of a first buffer for the cyclic shift operation.

4. The electronic device according to claim 3, wherein, The instructions, when executed individually or jointly by the at least one processing circuit, further cause the electronic device to: The third symbol sequence related to the first domain obtained from the received signal is stored in a second buffer, and Automatic gain control is performed based on the third symbol sequence.

5. The electronic device according to claim 4, wherein, The third symbol sequence is configured based on the natural bit order.

6. The electronic device according to claim 5, wherein, When the instruction is executed individually or jointly by the at least one processing circuit, it also causes the electronic device to: obtain the first symbol sequence using the second buffer based on the third symbol sequence.

7. The electronic device according to claim 4, wherein, The size of the second buffer is set to twice the size of the FFT.

8. The electronic device according to claim 1, wherein, FFT operations using cyclic shift operations are performed based on multiple rotation factors.

9. The electronic device according to claim 1, wherein, When the instruction is executed individually or jointly by the at least one processing circuit, the electronic device also causes the electronic device to obtain a second symbol sequence shifted by half the size of the FFT based on the FFT operation using the cyclic shift operation.

10. The electronic device according to claim 1, wherein, FFT operations using cyclic shift operations are performed based on a time-decimation DIT FFT structure.

11. A method performed by an electronic device, comprising: Based on the received signal obtained from an external electronic device, a first symbol sequence associated with the first domain is obtained, and A second symbol sequence associated with the second domain is obtained by performing a Fast Fourier Transform (FFT) operation using cyclic shift operations on the first symbol sequence. Specifically, for each Fast Fourier Transform (FFT) index in the FFT index of the FFT size associated with the second field, the FFT operation using cyclic shifting includes changing the value of the most significant bit (MSB) of the bit sequence of the corresponding FFT index from 0 to 1 or from 1 to 0.

12. The method according to claim 11, wherein, The first symbol sequence is configured based on bit reversal order, and The second symbol sequence is configured based on the natural bit order in which the cyclic shift operation is performed.

13. The method according to claim 12, wherein, The method further includes: performing the FFT operation on the first symbol sequence using the cyclic shift operation when there is no first buffer for the cyclic shift operation.

14. The method according to claim 13, wherein, The method further includes: The third symbol sequence related to the first domain obtained from the received signal is stored in a second buffer, and Automatic gain control is performed based on the third symbol sequence.

15. The method according to claim 14, wherein, The third symbol sequence is configured based on the natural bit order.

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