Test sample of semiconductor device, method of preparing the same, and device test method

Abstract

The application provides a test sample of a semiconductor device, a preparation method of the test sample and a device test method. The method comprises the following steps: providing a test substrate, one side surface of the test substrate comprising a tear initiation area and a test area arranged at intervals; forming a first test medium film at the tear initiation area and n second test medium films at the test area by using a predetermined process, the n second test medium films being sequentially stacked on the test substrate, one end of the n second test medium films close to the tear initiation area having a plurality of steps, the predetermined process being a process of forming the first test medium film and the n medium films on the substrate in a preparation process of the semiconductor device; stacking a test passivation film and a first adhesive film on the first test medium film, the n second test medium films and the exposed surface of the test substrate; and removing at least the end of the first test medium film away from the plurality of steps, so that a gap is formed between the test passivation film and the test substrate, thereby obtaining the test sample.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically, to a test sample of a semiconductor device, a method for preparing the sample, and a method for testing the interfacial bonding strength of the semiconductor device. Background Technology

[0002] In semiconductor device manufacturing processes, polyimide is typically used as the top passivation film to protect the underlying structure from chemical corrosion and moisture penetration, while also reducing leakage current and enhancing electrical insulation. The underlying structure is complex, consisting of a combination of various materials and structures, and the interfacial bonding strength between polyimide and this structure is constrained by the specific materials and structures used.

[0003] How to accurately assess the interfacial bonding force between polyimide and the underlying structure of the device is a problem that urgently needs to be solved. Summary of the Invention

[0004] The main objective of this application is to provide a test sample of a semiconductor device, its preparation method, and a test method for the interfacial bonding strength of the semiconductor device, so as to at least solve the problem in the prior art that it is difficult to accurately evaluate the interfacial bonding strength between the passivation film and the underlying structure in a semiconductor device.

[0005] To achieve the above objectives, according to one aspect of this application, a method for preparing a test sample of a semiconductor device is provided. The semiconductor device includes a substrate, n dielectric films, and a passivation film. The n dielectric films are located on the substrate, and the passivation film covers the surfaces of the dielectric films and the substrate, where n is an integer greater than 1. The method includes: providing a test substrate, one side surface of which includes a tear-off region and a test region arranged at intervals; forming a first test dielectric film in the tear-off region and n second test dielectric films in the test region using a predetermined process, wherein the n second test dielectric films are sequentially stacked on the test substrate, and one end of each of the n second test dielectric films near the tear-off region has multiple steps; the predetermined process is the process used in the fabrication of the semiconductor device to form the first test dielectric film and the n dielectric films on the substrate; stacking a test passivation film and a first adhesive film on the exposed surfaces of the first test dielectric film, the n second test dielectric films, and the test substrate; and removing at least the ends of the first test dielectric film away from the multiple steps, thereby forming a gap between the test passivation film and the test substrate to obtain the test sample.

[0006] In some exemplary embodiments, the arrangement direction of the tear-in area and the test area is a first direction, and the direction perpendicular to the first direction is a second direction. At least the ends of the first test dielectric film away from the plurality of steps are removed, creating a gap between the test passivation film and the test substrate to obtain the test sample. This includes: performing wet etching on the test substrate with the first adhesive film formed thereon, at least causing the first test dielectric film to shrink in a third direction, where the third direction is the direction from the edge of the test substrate to the center of the test substrate, forming the gap between the test passivation film and the test substrate to obtain an intermediate sample; performing a first dicing operation on the intermediate sample along the first direction and the second direction, where the depth of the first dicing operation is greater than or equal to the maximum thickness of the intermediate sample to obtain a plurality of test samples. Along the second direction, the width of the portion of the test sample in contact with the test passivation film, the test substrate, and n second test dielectric films remains unchanged, and the first direction is perpendicular to the second direction.

[0007] In some exemplary embodiments, before or after performing a first dicing operation on the intermediate sample, the method includes: performing a second dicing operation on at least the first adhesive film and the test passivation film of the intermediate sample along the first direction to form a plurality of dicing regions extending along the first direction and of equal width along the second direction, each of the dicing regions exposing a portion of the surface of the nth second test dielectric film, wherein the dicing paths along the first direction in the first dicing operation are located one-to-one within the dicing region, and the depth of the second dicing operation is greater than or equal to the sum of the thicknesses of the test passivation film and the first adhesive film, and less than the sum of the thicknesses of the test passivation film, the first adhesive film, and the n second test dielectric films.

[0008] In some exemplary embodiments, the maximum inward distance between the first test medium membrane and the n second test medium membranes in the third direction is less than or equal to 3 mm.

[0009] In some exemplary embodiments, a predetermined process is used to form a first test medium film in the tear-in zone and n second test medium films in the test zone, including: a first formation step, forming a first initial medium film on one side surface of the test substrate and patterning the first initial medium film, with the remaining first initial medium film forming a first second test medium film located in the test zone to obtain an intermediate substrate; or, the remaining first initial medium film forming the first test medium film located in the tear-in zone and the first second test medium film located in the test zone to obtain the intermediate substrate; a second formation step, forming an i-th initial medium film on the exposed surface of the intermediate substrate and patterning the i-th initial medium film, with the remaining first initial medium film forming a first second test medium film located in the test zone to obtain an intermediate substrate; or, if the intermediate substrate includes the first test medium film, the remaining first initial medium film forming a first second test medium film located in the tear-in zone and the first second test medium film located in the test zone to obtain the intermediate substrate; and a second formation step, forming an i-th initial medium film on the exposed surface of the intermediate substrate and patterning the i-th initial medium film, with the remaining first initial medium film forming a first second test medium film located in the test zone to obtain an intermediate substrate. The i-th initial dielectric film forms the i-th second test dielectric film, resulting in a new intermediate substrate; if the intermediate substrate does not include the first test dielectric film, the remaining i-th initial dielectric film forms the i-th second test dielectric film, or the remaining i-th initial dielectric film forms the i-th second test dielectric film and the first test dielectric film located in the tear zone, resulting in a new intermediate substrate, wherein the i-th second test dielectric film is located on a portion of the surface of the (i-1)-th second test dielectric film, i is an integer greater than 1 and the initial value of i is 2; in the first loop step, the count value of i is incremented by 1, and it is determined whether the i after the operation is greater than n. If i ≤ n, the second formation step is executed repeatedly until i > n, resulting in the first test dielectric film and n second test dielectric films.

[0010] In some exemplary embodiments, a predetermined process is used to form a first test medium film in the tear zone and n second test medium films in the test zone, including: a third forming step, forming a first initial medium film on one side surface of the test substrate and patterning the first initial medium film, with the remaining first initial medium film forming the first second test medium film located in the test zone, to obtain an intermediate substrate; a fourth forming step, forming an i-th initial medium film on the exposed surface of the intermediate substrate and patterning the i-th initial medium film, with the remaining i-th initial medium film forming the i-th second test medium film, to obtain a new intermediate substrate, wherein the i-th second test medium film is located in the (i-1)-th second test medium film. On a portion of the surface of the second test medium film, i is an integer greater than 1 and its initial value is 2; in the second loop step, the count value of i is incremented by 1, and it is determined whether the i after the operation is greater than n. If i ≤ n, the fourth formation step is executed repeatedly until i > n, resulting in n second test medium films; in the fifth formation step, an intermediate medium film is formed on one side surface of the test substrate, or on the exposed surface of the intermediate substrate obtained in the third formation step, or on the exposed surface of the intermediate substrate obtained in any of the fourth formation steps, and the intermediate medium film is patterned. The remaining intermediate medium film forms the first test medium film located in the tear zone.

[0011] In some exemplary embodiments, the test substrate is a wafer, the tear-in area is a region including the cut surface of the wafer, and the method further includes: performing a third dicing operation on the test substrate to remove a portion of the test substrate, a portion of the first test dielectric film, a portion of the passivation film, and a portion of the first adhesive film from the exposed surface of the first test dielectric film, n second test dielectric films, and the test substrate before removing at least the ends of the first test dielectric film away from the plurality of steps, after stacking the test passivation film and the first adhesive film on the exposed surface of the test substrate, the test substrate, the n second test dielectric films, and the test substrate.

[0012] In some exemplary embodiments, the test passivation film and the passivation film are both polyimide films.

[0013] According to another aspect of this application, a test sample of a semiconductor device is provided, wherein the test sample of the semiconductor device is prepared using any of the methods for preparing a test sample of a semiconductor device described above.

[0014] According to another aspect of this application, a method for testing the interfacial adhesion of a semiconductor device is provided, comprising: providing a test sample of the semiconductor device and fixing the test sample in a stage of a tensile testing device; attaching a first end of a second adhesive film to a predetermined surface of a first adhesive film of the test sample, and fixing a second end of the second adhesive film to a clamping end of the tensile testing device, wherein the predetermined surface overlaps with a first test dielectric film and a gap in the thickness direction of the test sample; controlling the clamping end to move in a direction parallel to the thickness direction of the test sample and away from the stage, so as to sequentially peel the test passivation film from the test substrate, the first first test dielectric film, ..., and the nth second test dielectric film, obtaining n+1 peeling forces, wherein the n+1 peeling forces characterize the interfacial adhesion between the passivation film and the dielectric film of the semiconductor device.

[0015] Applying the technical solution of this application, firstly, a process step consistent with the fabrication process of a real semiconductor device is adopted to form a first test dielectric film in the tear-off area of ​​the test substrate, and n second test dielectric films with multiple steps at one end are formed in the test area of ​​the test substrate, thereby constructing a stepped interface morphology between the test passivation film and the multilayer second test dielectric films; then, the test passivation film and the first adhesive film are stacked on the surface of the overall test structure, and at least the ends of the first test dielectric film far from the steps are selectively removed to simulate the edge warping morphology of the passivation film, providing a controllable tear-off gap for subsequent testing, and ensuring that the test passivation film can be successfully peeled off during testing. This process fully replicates the interface formation mechanism between the passivation film and the multilayer composite semiconductor dielectric film in a real manufacturing environment. It obtains test sample characterization with interface morphology and stress environment consistent with actual semiconductor devices. Through this test sample, the interfacial adhesion between the passivation film and the multilayer composite semiconductor film can be directly, quantitatively, and repeatably tested. This effectively solves the problem in the prior art where the interfacial adhesion cannot be realistically and accurately evaluated due to the disconnect between the test structure and the actual fabrication process. It achieves the effect of accurately evaluating the key interlayer adhesion performance of the device and supporting the research and development and failure analysis of high-reliability semiconductor processes. Attached Figure Description

[0016] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0017] Figure 1 A schematic flowchart illustrating a method for preparing a test sample of a semiconductor device according to an embodiment of this application is shown.

[0018] Figure 2A schematic flowchart of a method for testing the interfacial adhesion of a semiconductor device according to an embodiment of this application is shown.

[0019] Figure 3 (a) shows a top view schematic diagram of a wafer provided according to an embodiment of this application;

[0020] Figure 3 (b) shows a schematic cross-sectional structure of a wafer provided according to an embodiment of the present application;

[0021] Figure 4 (a) shows a top view of a structure after forming a first test medium film and a first second test medium film according to an embodiment of the present application;

[0022] Figure 4 (b) shows a cross-sectional structural diagram of a first test medium film and a first second test medium film provided according to an embodiment of the present application;

[0023] Figure 5 (a) shows a top view of a structure after forming a third second test medium film according to an embodiment of the present application;

[0024] Figure 5 (b) shows a schematic cross-sectional structure of a third second test medium film provided according to an embodiment of the present application;

[0025] Figure 6 (a) shows a top view of a structure after forming a test passivation film according to an embodiment of the present application;

[0026] Figure 6 (b) shows a schematic cross-sectional structure of a test passivation film provided according to an embodiment of the present application;

[0027] Figure 7 (a) shows a top view of a structure after the formation of a first adhesive film according to an embodiment of the present application;

[0028] Figure 7 (b) shows a schematic cross-sectional structure of a first adhesive film after formation according to an embodiment of the present application;

[0029] Figure 8 (a) shows a top view of the structure after a third slicing operation according to an embodiment of this application;

[0030] Figure 8 (b) shows a schematic cross-sectional structure of a third dicing operation provided according to an embodiment of this application;

[0031] Figure 9 (a) shows a top view of a structure after wet etching according to an embodiment of this application;

[0032] Figure 9 (b) shows a schematic cross-sectional structure of a wet-etched structure according to an embodiment of the present application;

[0033] Figure 10 (a) shows a top view of a first slicing operation and a second slicing operation provided according to an embodiment of the present application;

[0034] Figure 10 (b) shows a schematic cross-sectional structure of a first dicing operation and a second dicing operation provided according to an embodiment of the present application;

[0035] Figure 11 (a) shows a top view of a first adhesive film and a test passivation film after partial removal, according to an embodiment of the present application;

[0036] Figure 11 (b) shows a schematic cross-sectional structure of a first adhesive film and a test passivation film after partial removal, according to an embodiment of the present application;

[0037] Figure 12 A schematic diagram is shown illustrating a test sample of a semiconductor device according to an embodiment of this application.

[0038] The above figures include the following reference numerals:

[0039] 300, Wafer; 301, First test dielectric film; 302, First second test dielectric film; 303, Second second test dielectric film; 304, Third second test dielectric film; 305, Test passivation film; 306, First adhesive film; 307, Void; 400, Test sample; 500, Second adhesive film; 600, Clamping end. Detailed Implementation

[0040] In related technologies, two main methods are used to evaluate the interfacial bonding force between polyimide and the underlying structure: First, independent square polyimide micro-regions are prepared on the surface of the underlying structure using photolithography or dicing processes. These micro-regions are then adhered to the surface with high-viscosity adhesive tape and subsequently peeled off. The number of peeled squares is counted to indirectly assess the bonding force. Second, small rectangular samples containing only a single-component monolayer underlying structure are prepared. Polyimide is spin-coated onto the sample surface, and the polyimide edges of the sample are connected to the peeling device fixture with adhesive tape. The interfacial bonding force is quantified by recording the tensile force during the peeling process. However, in the first method, the area to be peeled off with the tape does not match the polyimide test area, and only a qualitative comparison of the total bonding force can be obtained, not quantitative data on the interfacial bonding force per unit width. Although the second method can output tensile force values, its sample structure is severely out of sync with the actual device structure—it uses only a single-layer homogeneous material and does not reproduce the multilayer thin film stacked structure actually present in semiconductor wafers. This results in the test results failing to accurately reflect the interfacial bonding characteristics under actual device operating conditions. Furthermore, the second method requires the preparation of small-sized samples before thin-film deposition, making it incompatible with mainstream fully or semi-automated process equipment in semiconductor production lines and hindering large-scale parallel verification of multiple process parameters. Additionally, because the tape only adheres to the edge of the polyimide, the tearing force must be transmitted through the peeled area to the interface, making it highly susceptible to breakage due to the insufficient tensile strength of the polyimide itself, leading to test interruptions and data loss. Both of these methods fail to accurately assess the interfacial bonding force between the passivation film and the underlying structure in semiconductor devices.

[0041] To address the above technical problems, embodiments of this application provide a test sample of a semiconductor device, a method for preparing the sample, and a method for testing the interfacial bonding strength of the semiconductor device.

[0042] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0043] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0044] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0045] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0046] This embodiment provides a method for preparing a test sample of a semiconductor device that runs on a mobile terminal, computer terminal, or similar computing device. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Also, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0047] Figure 1 This is a flowchart illustrating a method for preparing a test sample of a semiconductor device according to an embodiment of this application. The semiconductor device includes a substrate, n dielectric films, and a passivation film. The n dielectric films are located on the substrate, and the passivation film covers the surfaces of the dielectric films and the substrate. n is an integer greater than 1. The test sample is used to test the interfacial adhesion between the passivation film and the dielectric film in the semiconductor device. Figure 1 As shown, the method includes the following steps:

[0048] Step S101: Provide a test substrate, wherein one side surface of the test substrate includes tear-in areas and test areas arranged at intervals;

[0049] Optionally, the test substrate can be selected from the same batch as the substrate of the semiconductor device. In this case, the test substrate and the semiconductor device substrate have the same material composition and process path, essentially representing the same type of substrate in different application scenarios. Optionally, the test substrate can also be a dedicated test carrier with the same characteristics (e.g., coefficient of thermal expansion) as the semiconductor device substrate. Specifically, the test substrate can be a wafer, ceramic, or metal substrate, etc.

[0050] Step S102: A first test dielectric film is formed in the tear-in area and n second test dielectric films are formed in the test area using a predetermined process. The n second test dielectric films are stacked sequentially on the test substrate. The n second test dielectric films have multiple steps at the end near the tear-in area. The predetermined process is the process of forming the first test dielectric film and n dielectric films on the substrate during the fabrication of the semiconductor device.

[0051] Optionally, the first test dielectric film can be an intermediate film layer in the semiconductor device fabrication process. That is, the first test dielectric film is formed and then removed during the semiconductor device fabrication process and is not retained in the final structure of the semiconductor device. Optionally, the first test dielectric film can also be formed when replicating the fabrication process of any dielectric film of the semiconductor device. The first test dielectric film and the replicated dielectric film are consistent in material and thickness. That is, during the preparation of the test sample, the first test dielectric film and one of the n dielectric films are formed simultaneously by adjusting the patterned pattern corresponding to one of the n dielectric films. However, the first test dielectric film is not formed during the actual semiconductor device fabrication process.

[0052] Specifically, the multiple steps refer to the stepped height difference structure formed by the n second test dielectric films in the direction perpendicular to the aforementioned first direction. The n second test dielectric films are obtained by replicating the fabrication process of the n dielectric films of the aforementioned semiconductor device. This step completely follows the thin film deposition and patterning process in the semiconductor device fabrication, ensuring that the second test dielectric films and the dielectric films are consistent in material, thickness, number of layers, fabrication process parameters, and fabrication sequence. This provides a truly corresponding multi-component, multi-layer interface for subsequent passivation film interface adhesion testing. It should be noted that the patterned patterns of the n second test dielectric films and the n dielectric films of the aforementioned semiconductor device can be completely identical; some film layers can have the same pattern, or each film layer can have a different pattern.

[0053] Optionally, at least some of the n second test medium films described above are made of different materials. For example, any two adjacent second test medium films are made of different materials.

[0054] Step S103: A test passivation film and a first adhesive film are stacked on the exposed surfaces of the first test medium film, n second test medium films and the test substrate.

[0055] Specifically, the passivation film tested above is a replica of the passivation film used in semiconductor devices. They are identical in material composition and fabrication process, differing only in their application scenarios. The passivation film in these semiconductor devices is used to encapsulate and protect the dielectric film and substrate within the semiconductor device.

[0056] Optionally, the adhesiveness of the first adhesive film is greater than the interfacial bonding force between the test passivation film and other film layers (including each dielectric film and the substrate).

[0057] Step S104: At least the ends of the first test medium film away from the plurality of steps are removed, so that a gap is formed between the test passivation film and the test substrate, and the test sample is obtained.

[0058] Specifically, the gap is formed by removing a portion of the first test dielectric film between the aforementioned test passivation film and the aforementioned test substrate to simulate the edge warping morphology of the passivation film in a semiconductor device.

[0059] Through the above embodiments, this application first adopts process steps consistent with the fabrication process of real semiconductor devices to form a first test dielectric film in the tear-off area of ​​the test substrate, and to form n second test dielectric films with multiple steps at one end in the test area of ​​the test substrate, thereby constructing a stepped interface morphology between the test passivation film and the multilayer second test dielectric films; then, the test passivation film and the first adhesive film are stacked on the surface of the overall test structure, and at least the ends of the first test dielectric film away from the steps are selectively removed to simulate the edge warping morphology of the passivation film, providing a controllable tear-off gap for subsequent testing, and ensuring that the test passivation film can be successfully peeled off during testing. This process fully replicates the interface formation mechanism between the passivation film and the multilayer composite semiconductor dielectric film in a real manufacturing environment. It obtains test sample characterization with interface morphology and stress environment consistent with actual semiconductor devices. Through this test sample, the interfacial adhesion between the passivation film and the multilayer composite semiconductor film can be directly, quantitatively, and repeatably tested. This effectively solves the problem in the prior art where the interfacial adhesion cannot be realistically and accurately evaluated due to the disconnect between the test structure and the actual fabrication process. It achieves the effect of accurately evaluating the key interlayer adhesion performance of the device and supporting the research and development and failure analysis of high-reliability semiconductor processes.

[0060] It should be noted that the structure of n dielectric films on the substrate in a semiconductor device, such as the specific placement of each dielectric film on the substrate and the stacking order of the n dielectric films, is determined by the device design requirements, and this application does not impose any specific limitations on this.

[0061] According to some exemplary embodiments of this application, the arrangement direction of the above-mentioned tear-in area and the above-mentioned test area is a first direction, and the direction perpendicular to the above-mentioned first direction is a second direction. Step S104: at least the ends of the above-mentioned first test medium film away from the plurality of above-mentioned steps are removed, so that a gap is formed between the above-mentioned test passivation film and the above-mentioned test substrate to obtain the above-mentioned test sample. Specifically, it may include the following steps:

[0062] Step S1041: Wet etching is performed on the test substrate on which the first adhesive film is formed, at least causing the first test medium film to shrink in the third direction, where the third direction is the direction from the edge of the test substrate to the center of the test substrate, forming the gap between the test passivation film and the test substrate, to obtain an intermediate sample.

[0063] Specifically, due to the protective covering of the first adhesive film, the wet etching solution can only selectively etch the exposed sidewalls of the first test medium film through the side of the structure, thereby removing the edge portion of the first test medium film and causing the first test medium film to shrink in a controlled manner along a third direction from the edge to the center.

[0064] Optionally, the above-described wet etching process may selectively remove only the first test medium film, or it may selectively remove the first test medium film and at least a portion of the second test medium film.

[0065] Step S1042: Perform a first dicing operation on the intermediate sample along the first direction and the second direction. The depth of the first dicing operation is greater than or equal to the maximum thickness of the intermediate sample, resulting in multiple test samples. Along the second direction, the width of the portion of the test passivation film in the test sample that contacts the test substrate and n second test dielectric films remains unchanged. The first direction is perpendicular to the second direction.

[0066] Specifically, the first dicing operation described above is a deep dicing operation on the intermediate sample, including dicing through the first adhesive film, the test passivation film, the first test dielectric film, and the test substrate in the tear zone, and dicing through the first adhesive film, the test passivation film, the first test dielectric film, n second test dielectric films, and the test substrate in the test zone. Through the first dicing operation along the first and second directions, the intermediate sample is divided into multiple independent test samples. The second direction is perpendicular to the peeling path (also called the tear path) of the test sample in subsequent testing processes.

[0067] Specifically, along the second direction, the width of the portion of the test passivation film in the test sample that contacts the test substrate and the n second test dielectric films remains unchanged. This can include the case where the width of the test passivation film in the test sample remains unchanged in the second direction, or it can include the case where the width of the portion of the test passivation film that contacts the first test dielectric film is not limited, while the width of other portions of the test passivation film in the test sample remains unchanged in the second direction.

[0068] It should be noted that, along the second direction described above, the portion of the test passivation film in contact with the test substrate and the n second test dielectric films in each of the above test samples remains unchanged; for different test samples, the width of the portion of the test passivation film in contact with the test substrate and the n second test dielectric films may be the same or different.

[0069] In the above embodiments, a portion of the first test dielectric film and n portions of the second test dielectric films are selectively removed by a wet etching process. This creates a controllable gap in the tear-off area without damaging the contact interface between the test passivation film and each test dielectric film. This gap allows the test passivation film to form a stress concentration point with natural warping, providing a starting point for the subsequent peeling operation. Then, a deep dicing operation divides the portion of the test passivation film in contact with the test substrate and the n second test dielectric films into multiple test passivation film portions with a constant width in the second direction. This further ensures the uniformity of stress on the test passivation film during the peeling test, accurately defines the shape and size of the test sample, and removes unwanted sample portions, reducing subsequent testing and data analysis errors. This further ensures the accurate testing and analysis of the interfacial bonding force between the passivation film and the multilayer composite semiconductor thin film.

[0070] Because the materials of the first test medium film and the n second test medium films are different, the corrosion shrinkage distances of these test medium films during the wet etching process are also different. In order to save space and maximize the size of the test sample, in some exemplary embodiments, the maximum shrinkage distance of the first test medium film and the n second test medium films in the third direction is less than or equal to 3 mm.

[0071] Furthermore, in this application, the maximum inward distance between the first test medium membrane and the n second test medium membranes in the third direction is greater than or equal to 2 mm, which can ensure the successful initiation of peeling.

[0072] It should be noted that by performing a first scribing operation on the intermediate sample along the first and second directions, in addition to obtaining multiple test samples, the entire edge of the intermediate sample is removed along the first and second directions. The width of the removal is greater than the corrosion width of the wet etching process (i.e., the maximum inward shrinkage distance). This removes sample portions that interfere with the testing process and are detrimental to the test results analysis, reducing testing and data analysis errors, and further ensuring the accurate testing and analysis of interfacial bonding strength.

[0073] In specific applications, the first adhesive film can be selected from UV-curable anti-tack tapes or other high-viscosity tapes resistant to wet etching used in the actual semiconductor device fabrication process. The first adhesive film can serve as a mask for wet etching and dicing operations, and as a medium for transferring peeling force during subsequent testing and peeling processes.

[0074] Experiments revealed that when the passivation film lacks edge warping, even a very high-viscosity adhesive film cannot peel it off the substrate. Therefore, an edge warping structure is needed to test the tear-off initiation of the passivation film during subsequent testing. This application grows a first test dielectric film that can be wet-etched at the edge of the test substrate. The test passivation film is spin-coated and cured onto the entire surface of the test substrate. A high-viscosity first adhesive film is then adhered to the surface of the test passivation film. This serves both to prevent damage to the test passivation film during the subsequent wet etching process and to provide a path for the tear force during the subsequent tear-off process. Finally, a wet etching process is used to remove the portion of the first test dielectric film near the edge of the test substrate that generates edge warping.

[0075] In other embodiments, before or after performing the first dicing operation on the intermediate sample, the method includes: performing a second dicing operation on at least the first adhesive film and the test passivation film of the intermediate sample along the first direction to form a plurality of dicing regions extending along the first direction and of equal width along the second direction, each of the dicing regions exposing a portion of the surface of the nth second test dielectric film, wherein the dicing paths along the first direction in the first dicing operation are located one-to-one within the dicing regions, and the depth of the second dicing operation is greater than or equal to the sum of the thicknesses of the test passivation film and the first adhesive film, and less than the sum of the thicknesses of the test passivation film, the first adhesive film, and the nth second test dielectric films. In this embodiment, a second dicing operation is added before the first dicing operation to define the shape and size of the passivation film. By locally opening windows along the first direction of the first adhesive film and the test passivation film, multiple dicing areas extending along the first direction and of equal width along the second direction are formed, while minimizing damage to the underlying multilayer dielectric film. This partially exposes a portion of the surface of the topmost second test dielectric film and ensures that the dicing path of the subsequent first dicing operation is precisely located within these dicing areas. By removing the first adhesive film and the test passivation film from the dicing areas, while retaining the first adhesive film and the test passivation film in the non-dicing areas, the peeling force is transmitted only through these non-dicing areas. This significantly improves the controllability of the peeling path and the consistency of the starting position during the interface adhesion test, ultimately achieving a highly repeatable and accurate quantitative evaluation of the interface adhesion between the test passivation film and the multilayer semiconductor thin film stepped structure under real wafer fabrication process conditions. Furthermore, the dicing areas formed by the second dicing operation can serve as the clamping area for the stage that fixes the test sample during the subsequent tensile test, avoiding interference from the stage's clamping area on the peeling process.

[0076] Furthermore, in the first slicing operation described above, the distance between the slicing path along the first direction and the two opposite edges of the corresponding slicing area in the second direction is the same.

[0077] Unless otherwise stated, "substantially identical" within the measurement tolerance or manufacturing error range is equivalent to "identical" or "equal" in the description of the embodiments of this application.

[0078] In some applications, the stage of a tensile testing device (also known as a tear tester) used to test the interfacial adhesion of devices can be used to fix the test sample using mechanical means such as clamps. In this case, the intermediate sample needs to undergo the first and second dicing operations mentioned above. By combining deep and shallow dicing operations, the shape and size of the passivation film and the test sample are defined, so that the test sample fits the size requirements of the stage and the clamping position requirements.

[0079] In other applications, the stage of the tensile testing equipment used to test the interfacial bonding strength of devices can also be used to fix the test sample using non-mechanical means such as vacuum adsorption or electrostatic adsorption. In this case, only the first dicing operation can be performed on the intermediate sample, that is, the shape and size of the test sample can be defined only by deep dicing, so that the test sample fits the size requirements of the stage. Of course, a second dicing operation can also be added in this case.

[0080] In some exemplary embodiments, step S102: forming a first test medium film in the tear-in zone and forming n second test medium films in the test zone using a predetermined process may include:

[0081] Step S1021: First forming step, forming a first initial dielectric film on one side surface of the test substrate, and patterning the first initial dielectric film, the remaining first initial dielectric film forming a first second test dielectric film located in the test area, to obtain an intermediate substrate; or, the remaining first initial dielectric film forming a first test dielectric film located in the tear zone and a first second test dielectric film located in the test area, to obtain the intermediate substrate.

[0082] In this embodiment, the first test dielectric film is formed during the replication of the fabrication process of any dielectric film of the semiconductor device. When the replication target of the first test dielectric film is the first second test dielectric film (i.e., the second test dielectric film closest to the test substrate), the first test dielectric film and the first second test dielectric film are formed simultaneously, and their material, thickness, and other characteristics are the same, thereby obtaining an intermediate substrate including the first test dielectric film and the first second test dielectric film. When the replication target of the first test dielectric film is not the first second test dielectric film (i.e., the second test dielectric film closest to the test substrate), this step (i.e., step S1021) only forms the first second test dielectric film located in the test area, resulting in the intermediate substrate with the tear-off area exposed.

[0083] Step S1022: Second forming step, forming an i-th initial dielectric film on the exposed surface of the intermediate substrate, and patterning the i-th initial dielectric film; if the intermediate substrate includes the first test dielectric film, the remaining i-th initial dielectric film forms the i-th second test dielectric film to obtain a new intermediate substrate; if the intermediate substrate does not include the first test dielectric film, the remaining i-th initial dielectric film forms the i-th second test dielectric film, or the remaining i-th initial dielectric film forms the i-th second test dielectric film and the first test dielectric film located in the tear zone to obtain a new intermediate substrate, wherein the i-th second test dielectric film is located on a portion of the surface of the (i-1)-th second test dielectric film, i is an integer greater than 1 and the initial value of i is 2;

[0084] Specifically, step S1022 includes three cases: First, the intermediate substrate formed in step S1021 includes a first test medium film. In this case, an i-th initial medium film is formed on the exposed surface of the test substrate, the exposed surface of the first test medium film, and the exposed surfaces of the stacked first second test medium films, ..., the (i-1)th second test medium films. After patterning, the remaining i-th initial medium film forms the i-th second test medium film, resulting in a new intermediate substrate including the test substrate, the first test medium film, and the sequentially stacked first second test medium films, ..., the i-th second test medium films. Second, the intermediate substrate formed in step S1021 does not include a first test medium film. In this case, an i-th initial medium film is formed on the exposed surface of the test substrate and the exposed surfaces of the stacked first second test medium films, ..., the (i-1)th second test medium films. After patterning, the remaining i-th initial medium film forms the i-th second test medium film, resulting in a new intermediate substrate including the test substrate, the sequentially stacked first second test medium films, ..., the i-th second test medium films. In the third case, the intermediate substrate formed in step S1021 does not include the first test medium film. In this case, the i-th initial medium film is formed on the exposed surface of the test substrate and the exposed surface of the stacked first second test medium film, ..., the (i-1)th second test medium film. After patterning, the remaining i-th initial medium film forms the first test medium film and the i-th second test medium film, resulting in a new intermediate substrate including the test substrate, the first test medium film and the stacked first second test medium film, ..., the i-th second test medium film.

[0085] Step S1023: First loop step, increment the count value of i by 1, and determine whether i after the operation is greater than n. If i ≤ n, repeat the second formation step above until i > n, to obtain the first test medium film and n second test medium films.

[0086] Specifically, through the first cyclic steps described above, the second, third, ..., nth initial dielectric films are sequentially formed on the exposed surface of the intermediate substrate, and through a graphical operation, the first test dielectric film and n second test dielectric films are obtained.

[0087] In the above embodiments, the flexible and variable distributed deposition and patterning process ensures that the preparation process of the test sample is consistent with the actual process and conditions of semiconductor device fabrication, greatly improving the adaptability and compatibility of the process path and enabling the true replication of the deposition sequence of dielectric films in different fabrication schemes. On this basis, by constructing a first test dielectric film located in the tear-off region of the test substrate as the tear-off clamping position for subsequent tests, it is further ensured that the test dielectric film can be stably peeled off from this point during the test, making the test process repeatable and initiable. By constructing n second test dielectric films located in the test region of the test substrate as a stepped test film layer for subsequent tests, each layer represents a dielectric film that actually exists in a real semiconductor device, and the surface morphology and chemical state of each layer are consistent with the device fabrication process. Thus, in one test, the interfacial bonding force of dielectric films of n different materials can be quantitatively tested, which can not only accurately evaluate the interfacial bonding force, but also improve the test efficiency.

[0088] In some exemplary embodiments, step S102: forming a first test medium film in the tear-in zone and forming n second test medium films in the test zone using a predetermined process may include:

[0089] Step S1021': Third forming step, forming a first initial dielectric film on one side surface of the test substrate, and patterning the first initial dielectric film, the remaining first initial dielectric film forming the first second test dielectric film located in the test area, to obtain an intermediate substrate;

[0090] In this embodiment, the first test dielectric film is formed when the preparation process of the intermediate film layer (i.e., not retained in the final structure of the semiconductor device) in the actual wafer fabrication process of the semiconductor device is replicated.

[0091] Step S1022': Fourth forming step, forming the i-th initial dielectric film on the exposed surface of the intermediate substrate, and patterning the i-th initial dielectric film, the remaining i-th initial dielectric film forming the i-th second test dielectric film, to obtain a new intermediate substrate, the i-th second test dielectric film being located on a portion of the surface of the (i-1)-th second test dielectric film, where i is an integer greater than 1 and the initial value of i is 2;

[0092] Step S1023': Second loop step, increment the count value of i by 1, and determine whether i after the operation is greater than n. If i ≤ n, repeat the above fourth forming step until i > n, and obtain n of the above second test medium films.

[0093] Specifically, through the second cyclic step described above, the 2nd, 3rd, ..., nth initial dielectric films are sequentially formed on the exposed surface of the intermediate substrate, and through a patterning operation, n second test dielectric films are obtained.

[0094] Step S1024': Fifth forming step, forming an intermediate dielectric film on one side surface of the test substrate, or forming the intermediate dielectric film on the exposed surface of the intermediate substrate obtained in the third forming step, or forming the intermediate dielectric film on the exposed surface of the intermediate substrate obtained in any of the fourth forming steps, and patterning the intermediate dielectric film, the remaining intermediate dielectric film forming the first test dielectric film located in the tear zone.

[0095] In other words, in this embodiment, the intermediate dielectric film can be formed before or after any second test dielectric film.

[0096] In the above embodiments, the formation of the first test dielectric film is either pre- or post-formed, and its construction process is decoupled from that of the n second test dielectric films. This further ensures a higher degree of compatibility between the test sample and the device fabrication process, while also ensuring process flexibility and applicability. Furthermore, by constructing the first test dielectric film located in the tear-off region of the test substrate as the tear-off clamping position for subsequent tests, it is further ensured that the test dielectric film can be stably peeled off from this point during the test process, making the test process repeatable and initiable. By constructing the n second test dielectric films located in the test region of the test substrate as a stepped test film layer for subsequent tests, each layer represents a dielectric film actually existing in a real semiconductor device, and the surface morphology and chemical state of each layer are consistent with the device fabrication process. Thus, in a single test, the interfacial bonding force of the dielectric films of n different materials can be quantitatively tested, enabling both accurate evaluation of the interfacial bonding force and improved test efficiency.

[0097] To ensure the authenticity of the test results, the preparation order of any test dielectric film in the test sample must be consistent with the preparation order of the corresponding dielectric film during the device fabrication process. Those skilled in the art can determine the material, deposition process, and patterning process of the first test dielectric film based on the actual semiconductor device fabrication process. To simplify the preparation process, those skilled in the art can choose any suitable thin film as the first test dielectric film. For example, when the first test dielectric film is a film layer not formed during the actual semiconductor device fabrication process, and corresponds to a certain second test dielectric film (e.g., the m-th second test dielectric film, where m can be any value from 1 to n), by patterning the m-th initial dielectric film and retaining the m-th initial dielectric film located in the tear-off region and the test region, a first test dielectric film and a m-th second test dielectric film of the same material can be obtained. For example, when the first test dielectric film is an intermediate layer in the actual wafer fabrication process of a semiconductor device (i.e., not retained in the final structure of the semiconductor device), and the formation sequence of the first test dielectric film in the actual wafer fabrication process is before the n dielectric films of the semiconductor device, by graphically representing the first initial dielectric film, only the first test dielectric film located in the tear-off area is retained before proceeding with the subsequent formation steps of the n second test dielectric films. For another example, when the first test dielectric film is an intermediate layer in the actual wafer fabrication process of a semiconductor device, and the formation sequence of the first test dielectric film in the actual wafer fabrication process is after the n dielectric films of the semiconductor device, the formation steps of the n second test dielectric films are performed first, and then by graphically representing the first initial dielectric film, only the first test dielectric film located in the tear-off area is retained. Of course, when the first test dielectric film is an intermediate layer in the actual wafer fabrication process of a semiconductor device, the formation sequence of the first test dielectric film can also be before or after any of the dielectric films of the semiconductor device; the fabrication logic is the same as the embodiments shown above, and will not be repeated here.

[0098] In one optional embodiment, the test substrate is a wafer, the tear-off area is a region including the cut surface of the wafer, and before removing at least the end of the first test dielectric film away from the plurality of steps, after stacking the test passivation film and the first adhesive film on the exposed surfaces of the first test dielectric film, n of the second test dielectric films and the test substrate, the method further includes: performing a third dicing operation on the test substrate to remove a portion of the test substrate, a portion of the first test dielectric film, a portion of the passivation film and a portion of the first adhesive film in the tear-off area. In this embodiment, the test substrate is a wafer, and its tear-in zone includes an irregular rectangular cut surface area of ​​the wafer. After stacking the test passivation film and the first adhesive film and before removing the first test dielectric film away from the step end, a dicing operation is performed on the wafer. This simultaneously removes the portion of the substrate, the first test dielectric film, the test passivation film, and the first adhesive film in the cut surface area that is unrelated to the test. This completely removes redundant material in the cut surface area while preserving the integrity of the stepped structure of the test area, avoiding the problem of uncontrollable effective width of the final test sample. At the same time, it avoids the interference of residual edge structures on void formation, stress transmission path, and tear force measurement, significantly improving the consistency and accuracy of the test sample boundary clarity and interface adhesion test. Ultimately, it achieves a quantitative, continuous, and interference-free reliable evaluation of the interface adhesion between the passivation film and the stepped structure of the multilayer semiconductor thin film under real device fabrication process conditions.

[0099] It should be understood that the depth of the third dicing operation on the aforementioned test substrate is greater than or equal to the maximum thickness of the aforementioned test substrate, the first test dielectric film, the test passivation film, and the first adhesive film.

[0100] In this application, the location of the dicing operation needs to be determined by comprehensively considering the wet etching process and subsequent testing. If the dicing location is far from the wafer edge and close to the patterned edge of the first second test dielectric film, it will result in two issues: firstly, the size of the first second test dielectric film used for subsequent wet etching may be insufficient, and the wet etching solution may penetrate into the interface between the wafer and the test passivation film, thus affecting the accuracy of the test results; secondly, when using the second adhesive film to connect the first adhesive film and the clamping end of the tensile testing equipment, the available connection distance may be too short, potentially causing the second adhesive film to detach during the tearing process, thus interrupting the test. If the dicing location is too close to the wafer edge, the area of ​​the first test dielectric film removed by wet etching may be small, resulting in a smaller gap and a smaller area for initiating the tearing of the passivation film. Ultimately, this may lead to the breakage of the test passivation film during the tearing initiation process, resulting in initiation failure.

[0101] In some exemplary embodiments, the aforementioned test passivation film and the aforementioned passivation film are both polyimide films. As a passivation film, the polyimide film can protect the underlying structure, such as the dielectric film, from chemical corrosion and moisture penetration, while reducing device leakage current and enhancing electrical insulation capabilities.

[0102] In this application, any two adjacent second test medium films are made of different materials.

[0103] Specifically, the number of layers, composition, and thickness of the aforementioned second test dielectric film are determined by the testing requirements and the actual fabrication process of the device. For example, when there are three second test dielectric films, along the direction away from the test substrate, the three second test dielectric films can be a silicon oxide layer, an aluminum metal layer, and a silicon nitride layer, respectively. The aforementioned test substrate can be a silicon carbide substrate or an epitaxial wafer.

[0104] This application also provides an exemplary test sample of a semiconductor device, which is prepared using any of the above-described methods for preparing test samples of semiconductor devices.

[0105] Through the above embodiments, a test sample of a semiconductor device is prepared using any of the above methods. The method first adopts process steps consistent with the fabrication process of a real semiconductor device to form a first test dielectric film in the tear-off area of ​​the test substrate, and to form n second test dielectric films with multiple steps at one end in the test area of ​​the test substrate, thereby constructing a stepped interface morphology between the test passivation film and the multilayer second test dielectric films. Then, the test passivation film and the first adhesive film are stacked on the surface of the overall test structure, and at least the ends of the first test dielectric film away from the steps are selectively removed to simulate the edge warping morphology of the passivation film, providing a controllable tear-off gap for subsequent testing, and ensuring that the test passivation film can be successfully peeled off during testing. This process fully replicates the interface formation mechanism between the passivation film and the multilayer composite semiconductor dielectric film in a real manufacturing environment. It obtains test sample characterization with interface morphology and stress environment consistent with actual semiconductor devices. Through this test sample, the interfacial adhesion between the passivation film and the multilayer composite semiconductor film can be directly, quantitatively, and repeatably tested. This effectively solves the problem in the prior art where the interfacial adhesion cannot be realistically and accurately evaluated due to the disconnect between the test structure and the actual fabrication process. It achieves the effect of accurately evaluating the key interlayer adhesion performance of the device and supporting the research and development and failure analysis of high-reliability semiconductor processes.

[0106] In other embodiments, after forming a first test medium film in the tear-in area and n second test medium films in the test area using a predetermined process, and after the n second test medium films are sequentially stacked on the test substrate, before stacking a test passivation film and a first adhesive film on the exposed surfaces of the first test medium film, the n second test medium films, and the test substrate, the method further includes: forming a microporous structure or a groove structure at the end of the n second test medium films away from the step, wherein the depth direction of the microporous structure or the groove structure is perpendicular to the stacking direction of the n second test medium films. This microporous structure serves as a stress relief window for the n second test medium films.

[0107] This application also provides a method for testing the interface bonding strength of semiconductor devices running on mobile terminals, computer terminals or similar computing devices. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0108] Figure 2 This is a flowchart of a method for testing the interfacial adhesion of a semiconductor device according to an embodiment of this application. Figure 2 As shown, the above method includes:

[0109] Step S201: Provide a test sample of the semiconductor device and fix the test sample in the stage of the tensile testing equipment;

[0110] Step S202: The first end of the second adhesive film is attached to a predetermined surface of the first adhesive film of the test sample, and the second end of the second adhesive film is fixed to the clamping end of the tensile testing device. In the thickness direction of the test sample, the predetermined surface overlaps with the first test medium film and the gap respectively.

[0111] Specifically, the thickness direction of the test sample is perpendicular to the first direction and the second direction, respectively. In the thickness direction, the predetermined surface, the remaining first test medium film, and the gap overlap in pairs, that is, the first test medium film above the gap serves as the tear-in end, and the first end of the second adhesive film is attached to the tear-in end.

[0112] Optionally, in the thickness direction, the predetermined surface overlaps with the remaining first test medium film, and the gap is located in the predetermined surface in the thickness direction. This helps to ensure the consistency of the tear structure at the test substrate surface and the n second test medium film surfaces of the test sample, increasing the accuracy and comparability of test data at different locations.

[0113] Step S203: Control the clamping end to move in a direction parallel to the thickness direction of the test sample and away from the stage, so as to sequentially peel the test passivation film from the test substrate, the first test dielectric film, ..., and the nth second test dielectric film, to obtain n+1 peeling forces. The n+1 peeling forces characterize the interfacial bonding force between the passivation film of the semiconductor device and the dielectric film of the semiconductor device.

[0114] Optionally, the clamping end can move at a constant speed in a direction away from the slide stage.

[0115] In the above embodiments, the test sample of the semiconductor device is first fixed on the stage of the tensile testing equipment; then, a second adhesive film is used to connect the clamping end of the tensile testing equipment to a predetermined surface of the first adhesive film, so that the predetermined surface overlaps with the remaining first test dielectric film and gaps in the thickness direction; finally, the movement of the clamping end realizes the layer-by-layer peeling of the interfacial bonding force between the passivation film and the substrate, and between each layer of dielectric film, and the real-time recording of the force value. This method can acquire n+1 peeling force data corresponding to different interfaces at one time, avoiding the test deviation caused by single structure or discontinuous tearing in traditional methods. At the same time, since the test sample has been constructed through the previous preparation process to have the same interface morphology and stress environment as the actual semiconductor device, it ensures that the peeling force test process is highly consistent with the peeling situation of the passivation film in the real device, thus improving the accuracy of the interfacial bonding force data.

[0116] In one exemplary embodiment, the material of the second adhesive film can be the same as that of the first adhesive film, or an adhesive material different from that of the first adhesive film can be selected as the second adhesive film.

[0117] In another exemplary embodiment, the width of the second adhesive film in the second direction can be set to be the same as the width of the first adhesive film in the second direction. This is beneficial for adjusting the position of the second adhesive film when pasting the test passivation film, and also for adjusting the clamping angle and force uniformity of the second adhesive film when clamping it with the clamping end.

[0118] In practical applications, the aforementioned slide stage can be a slide stage that uses mechanical means such as clamping fixtures to fix the test samples, or it can be a slide stage that uses non-mechanical means such as vacuum adsorption or electrostatic adsorption to fix the test samples.

[0119] The clamping end of the aforementioned tensile testing device integrates a micro-motion platform and a visual feedback device. Before controlling the clamping end to move in a direction parallel to the thickness direction of the test sample and away from the stage, and after fixing the second end of the second adhesive film to the clamping end of the tensile testing device, the testing method further includes: using the visual feedback device to identify in real time the relative position of the tear edge of the first adhesive film and the adhesive line of the second adhesive film, and automatically correcting the clamping angle of the clamping end according to the relative position relationship to ensure that a standard peel angle (such as 90° or 180°) is maintained for each tear. Simultaneously, the clamping end of the aforementioned tensile testing device is embedded with a micro-force sensor and a piezoelectric feedback module. The testing method further includes: performing closed-loop control of the pre-tightening force applied to the second adhesive film by the clamping end to ensure that the pre-tightening force remains within a predetermined force range.

[0120] To enable those skilled in the art to better understand the technical solution of this application, the implementation process of the method for preparing test samples of semiconductor devices of this application will be described in detail below with reference to specific embodiments.

[0121] This embodiment relates to a specific method for preparing a test sample of a semiconductor device and a method for testing the interfacial adhesion of the semiconductor device. The semiconductor device includes a wafer, three dielectric films (a first thin film, a second thin film, and a third thin film) located on the wafer, and a passivation film covering the three dielectric films. The first thin film can be a silicon oxide film, the second thin film can be an aluminum film, and the third thin film can be a silicon nitride film. Figures 3 to 11 As shown, the method for preparing the test sample of this semiconductor device includes the following steps:

[0122] Step S1: Provide wafer 300, such as Figure 3 (a) and Figure 3 As shown in (b).

[0123] Step S2: Fabrication of the multilayer thin film stepped structure to be tested:

[0124] In this embodiment, the first thin film, besides being used for testing the passivation film interface adhesion, also serves as a tear-initiating structure. The first thin film is grown and patterned on wafer 300 using the equipment and process conditions employed in device fabrication, resulting in a first test dielectric film 301 located in the tear-initiating region and a first second test dielectric film 302 located in the test region. Figure 4 (a) and Figure 4 As shown in (b), the tear-in area is the region including the cut surface of wafer 300, and the surface of wafer 300 between the tear-in area and the test area is exposed as a spacer area;

[0125] Other thin films are prepared in the same manner. The number of film layers, composition, and thickness are determined by the testing requirements and the actual fabrication process of the device. The patterning of each film layer needs to be reasonably arranged so that each remaining film layer has sufficient area to contact the test passivation film 305, resulting in multiple second test dielectric films. The specific morphology of the steps in the multiple second test dielectric films is not limited. This embodiment uses a total of three second test dielectric films (the first second test dielectric film 302, the second second test dielectric film 303, and the third second test dielectric film 304) as an example to provide a preparation process and structural schematic diagram, as follows. Figure 5 (a) and Figure 5 As shown in (b).

[0126] Step S3: Testing the preparation of passivation film 305:

[0127] The test passivation film 305 was fabricated on the entire wafer 300. Except for the absence of patterning operations, the other process conditions were the same as those for the corresponding device fabrication steps, resulting in the following... Figure 6 (a) and Figure 6 The structure shown in (b).

[0128] Step S4: Testing the preparation of the tear-off structure of the passivation film 305:

[0129] A high-viscosity first adhesive film 306 is pasted onto the surface of the test passivation film 305. The first adhesive film 306 can be a UV-curable anti-tack tape used in the device fabrication process or other high-viscosity, wet-etch resistant tape. The pasted area is the same as the coverage area of ​​the test passivation film 305, which is the entire wafer 300. The first adhesive film 306 serves as a mask for subsequent wet etching and front-side dicing, as well as a medium for transmitting tear force during the peeling process, resulting in... Figure 7 (a) and Figure 7 As shown in (b);

[0130] At a suitable distance from the edge of the wafer 300, a position is selected at the first test dielectric film 301, which serves as the tear-off structure for the test passivation film 305. A dicing operation is then performed at this position along a direction parallel to the patterned edges of each thin film layer (i.e., the third dicing operation). This dicing process separates the entire wafer 300 along with all the thin films. Only a small portion containing the wafer 300, the first test dielectric film 301, the test passivation film 305, and the first adhesive film 306 is discarded. Figure 8 (a) and Figure 8 As shown in (b), this dicing step prepares for the subsequent wet etching of the first second test dielectric film 302 and the definition of the test sample size. The relative position of the dicing position to the edge of the wafer 300 needs to take into account the compatibility of the test sample size with the stage in the tensile testing equipment, as well as the difficulty of tearing and starting during subsequent tests.

[0131] Next, a wet etching solution suitable for the first test dielectric film 301 is selected to perform wet etching on the entire wafer 300. The purpose is to etch the first test dielectric film 301 inward by an appropriate distance. During the wet etching process, the etching distance of each test dielectric film is different. The first test dielectric film 301 shrinks inward to form a void 307, such as... Figure 9 (a) and Figure 9 As shown in (b). To ensure successful tear-off initiation, save space, and maximize the size of the test sample, the indentation distance is usually set to several millimeters, such as 2 to 3 millimeters.

[0132] Step S5: Definition of test sample size applicable to tensile testing equipment:

[0133] The definition of test sample size mainly aims to achieve the following objectives: 1. To process the entire sample into a shape and size suitable for fixing the stage of the tensile testing equipment; 2. To process the test sample into a shape and size that ensures the test results fall within the test range with the highest mechanical resolution and accuracy of the tensile testing equipment; 3. To eliminate parts that interfere with the testing process, such as eliminating any part of the multilayer thin film stepped structure below the 305 passivation film that has been corroded away; 4. To eliminate parts that are not conducive to the analysis of test results data, such as eliminating non-rectangular irregular shapes; 5. To maximize the number of test samples and the range of testable sizes for each sample.

[0134] To achieve the above objectives, this embodiment primarily employs two size definition methods. The first method is a deep dicing (i.e., the first dicing operation) that completely dices the entire wafer 300 along with all dielectric films, used to define the peripheral shape and dimensions of the entire test sample. The second method is a shallow dicing (i.e., the second dicing operation) that only dices all dielectric films; the shallow dicing stop position is as follows... Figure 10 As shown in (b), the dicing depth is used to define the shape and size of the passivation film to be tested. The shallower the dicing depth, the better, to avoid excessive tearing force during the tear test, which could cause the test sample to break at the shallow dicing point. Deep dicing is used to remove unwanted portions. For a stage that requires mechanical fixation of the test sample, a combination of deep and shallow dicing is needed, with a suitable distance between the two dicings for the stage of the tensile testing equipment to fix the test sample. For a stage that requires fixation of the test sample using non-mechanical means such as vacuum or electrostatic adsorption, only deep dicing is required. Based on previous testing experience, this embodiment uses a single complete dicing process to fully define the shape and size of the test sample, eliminating the need to adjust the sample position after the first dicing and perform a second dicing. The specific dicing scheme is as follows: Figure 10 (a) and Figure 10As shown in (b), four deep scribing operations and six shallow scribing operations are performed along the first direction, and one deep scribing operation and two shallow scribing operations are performed along the second direction. After scribing, only the test sample portion is retained. The first adhesive film 306 between the deep and shallow scribings and the underlying test passivation film 305 are peeled off to avoid interference with the test results, resulting in the following... Figure 11 (a) and Figure 11 The three test samples 400 shown in (b) are discarded, and the other smaller parts are not used.

[0135] Of course, the actual dicing scheme and corresponding dimensions are not limited to the above scheme. Those skilled in the art can determine them based on parameters such as the wafer size of 300 and the requirements of the tensile testing equipment.

[0136] The testing method for the interfacial adhesion of semiconductor devices specifically includes the following steps:

[0137] Step S6: Use a tensile testing device to test and record the interfacial adhesion force of the 305 passivation film during tearing.

[0138] The first adhesive film 306 on the surface of the test passivation film 305 is connected to the clamping end 600 of the tensile testing device using the second adhesive film 500. A tear test is performed at a certain angle and rate, and the applied load is recorded in real time as the interfacial bonding force. Figure 12 As shown. The following two points should be noted: 1. The width of the second adhesive film 500 should ideally match the width of the test passivation film 305 in the test sample. This facilitates adjusting the position of the second adhesive film 500 when pasting the test passivation film 305, and also helps adjust the angle and uniformity of force when clamping the second adhesive film 500 using the clamping end 600. 2. The second adhesive film 500 should ideally only be pasted on the surface of the first adhesive film 306 at the position of the first test dielectric film 301 used for peeling activation. This increases the consistency of the peeling structure at the surface of the wafer 300 of the test sample and the surfaces of the first, second, and third second test dielectric films 304, increasing the accuracy and comparability of test data at different positions.

[0139] The above embodiments of this application optimize the test sample preparation process, make full use of the thin film preparation technology, patterning technology and dicing technology used in the device fabrication process, and realize flexible and reasonable customization of the composition, structure, shape and size of the test sample. Combined with the innovative thin film tearing method, the final result is to ensure high accuracy, high authenticity, high operability, high testing efficiency and high test sample utilization of the characterization method.

[0140] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0141] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0142] As can be seen from the above description, the embodiments of this application achieve the following technical effects:

[0143] (1) This application is beneficial to improving the accuracy of the characterization method of the interfacial bonding force of the passivation film of semiconductor devices, mainly through the following means: First, by peeling the passivation film from the surface of the underlying structure, the tearing force at different positions is recorded in real time, instead of simply judging whether a tape of a certain viscosity can peel the passivation film from the surface of the underlying structure in related technologies, thus realizing quantitative testing and analysis; Second, by using a combination of deep and shallow scribing, the test sample is processed into a shape and size that falls within the test range with the highest resolution and accuracy of the mechanical sensor of the tensile testing equipment, thus realizing accurate measurement of the interfacial bonding force; Third, by actively eliminating sample parts that interfere with the test process and are not conducive to the data analysis of the test results, the test error and data analysis error are reduced, thus realizing accurate recording and data analysis of the interfacial bonding force; Fourth, by selecting the appropriate width and pasting range of the tape used to connect the tensile testing equipment, the uniformity of the force during the tearing process and the consistency of the tearing structure on different test surfaces are improved, thus increasing the accuracy and uniformity of the test process and test results.

[0144] (2) This application is beneficial to improving the authenticity of the characterization method of the passivation film interface bonding force of semiconductor devices, mainly through the following means. By preparing the multi-component multilayer film stepped structure that actually exists in the device structure according to the actual process and process conditions used in the device fabrication, unlike the sample structure prepared simply for characterizing the interface bonding force in related technologies, the test results are closer to the real device state.

[0145] (3) This application is beneficial to improving the operability of the characterization method of the interfacial bonding force of the passivation film of semiconductor devices, mainly through the following means. First, by using high-viscosity tape to cover the polypassivation film as a wet etching mask and a tear force transmission medium, unlike the related technology which directly uses the passivation film as a tear force transmission medium, the breakage of the passivation film during the test can be avoided, and the continuity and operability of the test process can be realized; Second, the entire wafer fabrication process is carried out first and then the test sample shape and size are customized by dicing, unlike the preparation method of preparing samples of specific shape and size first and then carrying out the fabrication process in the related technology. The test sample preparation process of this application is compatible with the existing mainstream fully automatic or semi-automatic semiconductor process equipment, and can realize multi-condition large-batch fabrication process and carry out related experiments, which is more operable.

[0146] (4) This application is beneficial to improving the testing efficiency of the characterization method for the interfacial bonding force of the passivation film of semiconductor devices, mainly through the following means. By preparing test samples with a multi-component multilayer film stepped structure, unlike the single-component single-layer film test sample structure in related technologies, this application can obtain the interfacial bonding force between the passivation film and the test structure with different components and surface states in only one test, which greatly improves the testing efficiency of the characterization method.

[0147] (5) This application is beneficial to improving the test sample utilization rate of the characterization method for the interfacial adhesion of passivation films in semiconductor devices. By optimizing the number of test samples and the testable size range of a single test sample through dicing, the test range and available test data are maximized.

[0148] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for preparing a test sample of a semiconductor device, the semiconductor device comprising a substrate, n dielectric films and a passivation film, wherein the n dielectric films are located on the substrate, and the passivation film covers the surface of the plurality of dielectric films and the substrate, and n is an integer greater than 1, characterized in that, The method includes: A test substrate is provided, one side surface of which includes tear-in areas and test areas arranged at intervals; A first test dielectric film is formed in the tear-in area using a predetermined process, and n second test dielectric films are formed in the test area. The n second test dielectric films are stacked sequentially on the test substrate. The n second test dielectric films have multiple steps at one end near the tear-in area. The predetermined process is the process of forming the first test dielectric film and the n dielectric films on the substrate during the fabrication of the semiconductor device. A test passivation film and a first adhesive film are stacked on the exposed surfaces of the first test medium film, n second test medium films, and the test substrate; At least the ends of the first test medium film away from the plurality of steps are removed, so that a gap is formed between the test passivation film and the test substrate, to obtain the test sample.

2. The method according to claim 1, characterized in that, The arrangement direction of the tear-off area and the test area is a first direction, and the direction perpendicular to the first direction is a second direction. At least the ends of the first test dielectric film away from the plurality of steps are removed, creating a gap between the test passivation film and the test substrate to obtain the test sample, comprising: The test substrate on which the first adhesive film is formed is subjected to wet etching, at least causing the first test medium film to shrink in the third direction, wherein the third direction is the direction from the edge of the test substrate to the center of the test substrate, forming the gap between the test passivation film and the test substrate, to obtain an intermediate sample; A first dicing operation is performed on the intermediate sample along the first direction and the second direction, the depth of the first dicing operation being greater than or equal to the maximum thickness of the intermediate sample, to obtain a plurality of test samples. Along the second direction, the width of the portion of the test passivation film in the test sample that contacts the test substrate and n second test dielectric films remains unchanged. The first direction is perpendicular to the second direction.

3. The method according to claim 2, characterized in that, Before or after performing the first dicing operation on the intermediate sample, the method includes: A second dicing operation is performed on at least the first adhesive film and the test passivation film of the intermediate sample along the first direction to form a plurality of dicing regions extending along the first direction and of equal width along the second direction. Each dicing region exposes a portion of the surface of the nth second test dielectric film. In the first dicing operation, the dicing paths along the first direction are located one-to-one within the dicing region. The depth of the second dicing operation is greater than or equal to the sum of the thicknesses of the test passivation film and the first adhesive film, and less than the sum of the thicknesses of the test passivation film, the first adhesive film, and the n second test dielectric films.

4. The method according to claim 2, characterized in that, The maximum inward distance between the first test medium membrane and the n second test medium membranes in the third direction is less than or equal to 3 mm.

5. The method according to claim 1, characterized in that, The process involves forming a first test medium film in the tear-in zone and forming n second test medium films in the test zone using a predetermined process, including: In the first forming step, a first initial dielectric film is formed on one side surface of the test substrate, and the first initial dielectric film is patterned. The remaining first initial dielectric film is used to form a first second test dielectric film located in the test area to obtain an intermediate substrate. Alternatively, the remaining first initial dielectric film is used to form a first test dielectric film located in the tear zone and a first second test dielectric film located in the test area to obtain the intermediate substrate. In the second forming step, an i-th initial dielectric film is formed on the exposed surface of the intermediate substrate, and the i-th initial dielectric film is patterned. If the intermediate substrate includes the first test dielectric film, the remaining i-th initial dielectric film forms the i-th second test dielectric film to obtain a new intermediate substrate. If the intermediate substrate does not include the first test dielectric film, the remaining i-th initial dielectric film forms the i-th second test dielectric film, or the remaining i-th initial dielectric film forms the i-th second test dielectric film and the first test dielectric film located in the tear zone to obtain a new intermediate substrate. The i-th second test dielectric film is located on a portion of the surface of the (i-1)-th second test dielectric film, where i is an integer greater than 1 and the initial value of i is 2. In the first loop step, the count value of i is incremented by 1, and it is determined whether the i after the operation is greater than n. If i ≤ n, the second formation step is executed repeatedly until i > n, thus obtaining the first test medium film and n second test medium films.

6. The method according to claim 1, characterized in that, The process involves forming a first test medium film in the tear-in zone and forming n second test medium films in the test zone using a predetermined process, including: The third forming step involves forming a first initial dielectric film on one side surface of the test substrate, patterning the first initial dielectric film, and forming the remaining first initial dielectric film into the first second test dielectric film located in the test area, thereby obtaining an intermediate substrate. The fourth forming step involves forming an i-th initial dielectric film on the exposed surface of the intermediate substrate and patterning the i-th initial dielectric film. The remaining i-th initial dielectric film forms the i-th second test dielectric film, resulting in a new intermediate substrate. The i-th second test dielectric film is located on a portion of the surface of the (i-1)-th second test dielectric film, where i is an integer greater than 1 and the initial value of i is 2. In the second loop step, the count value of i is incremented by 1, and it is determined whether i is greater than n after the operation. If i ≤ n, the fourth forming step is executed repeatedly until i > n, and n second test medium films are obtained. The fifth forming step involves forming an intermediate dielectric film on one side surface of the test substrate, or forming the intermediate dielectric film on the exposed surface of the intermediate substrate obtained in the third forming step, or forming the intermediate dielectric film on the exposed surface of the intermediate substrate obtained in any of the fourth forming steps, and patterning the intermediate dielectric film. The remaining intermediate dielectric film forms the first test dielectric film located in the tear zone.

7. The method according to claim 1, characterized in that, The test substrate is a wafer, the tear-off area is the region including the cut surface of the wafer, and the method further includes, before removing at least the ends of the first test dielectric film away from the plurality of steps, stacking a test passivation film and a first adhesive film on the exposed surfaces of the first test dielectric film, n second test dielectric films and the test substrate: A third dicing operation is performed on the test substrate to remove a portion of the test substrate, a portion of the first test medium film, a portion of the passivation film, and a portion of the first adhesive film from the tear-in area.

8. The method according to any one of claims 1 to 7, characterized in that, The test passivation film and the passivation film are both polyimide films.

9. A test sample of a semiconductor device, characterized in that, The test sample of the semiconductor device is prepared by the method for preparing the test sample of the semiconductor device according to any one of claims 1 to 8.

10. A method for testing the interfacial adhesion of a semiconductor device, characterized in that, include: A test sample of the semiconductor device according to claim 9 is provided, and the test sample is fixed in the stage of a tensile testing device; The first end of the second adhesive film is attached to a predetermined surface of the first adhesive film of the test sample, and the second end of the second adhesive film is fixed to the clamping end of the tensile testing device. In the thickness direction of the test sample, the predetermined surface overlaps with the first test medium film and the voids respectively. The clamping end is controlled to move in a direction parallel to the thickness direction of the test sample and away from the stage, so as to sequentially peel the test passivation film from the test substrate, the first first test dielectric film, ..., and the nth second test dielectric film, to obtain n+1 peeling forces. The n+1 peeling forces characterize the interfacial bonding force between the passivation film of the semiconductor device and the dielectric film of the semiconductor device.

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