Chip and method for regulating power consumption of a chip

Abstract

The embodiment of the present application discloses a chip and a method for adjusting the power consumption of the chip, and relates to the field of integrated circuits.The chip comprises a controller and at least one sensor.The at least one sensor is used to collect the running condition parameters of the chip and transmit the running condition parameters to the controller, wherein the running condition parameters comprise at least one of the following: temperature, power consumption, or power supply state.The controller performs chip performance management based on the running condition parameters and preset threshold values corresponding to the running condition parameters.The chip and the method for adjusting the power consumption of the chip provided by the embodiment of the present application can quickly reduce the temperature of the chip or adjust the power consumption of the chip when the temperature or the power consumption of the chip is too high, and can improve the reliability and stability of the chip.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and more particularly to a chip and a method for adjusting chip power consumption. Background Technology

[0002] With the continuous development of electronic technology, users have increasingly higher demands for electronic products. To improve the stability and reliability of electronic products and avoid chip failure due to excessive power consumption or temperature caused by unexpected events (such as maintenance scenarios or power module voltage regulation failure), the industry has proposed various dynamic power management methods for chips in electronic products to control chip overheating or high current. For example, power management units can be set up on each processor core to negotiate power control strategies through interaction between cores; alternatively, system modeling can be used to predict future power consumption and perform proactive power control.

[0003] However, due to the system-level information exchange between the chip and the heat sink, the latency is typically over a second, while the chip's temperature sensitivity is on the order of milliseconds. Similarly, the system-level information exchange latency between the chip and the power supply is typically over a microsecond, while the chip's current sensitivity is on the order of a single clock cycle. This means that existing dynamic energy-saving methods cannot meet the needs of chip heat dissipation or power regulation. To enhance chip reliability or address insufficient power supply and heat dissipation in extreme scenarios, current technologies often increase the specifications of heat dissipation and power supply. This leads to electronic products being in a state of over-power supply and over-heat dissipation during steady-state operation, resulting in increased system design costs and low energy utilization, causing cost and energy waste. Summary of the Invention

[0004] The chip and method for adjusting chip power consumption provided in this application can quickly dissipate heat or suppress power supply, thus protecting chip reliability. To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0005] In a first aspect, embodiments of this application provide a chip, which includes: a controller and at least one sensor; the at least one sensor is used to collect operating status parameters of the chip and transmit the operating status parameters to the controller, wherein the operating status parameters include at least one of the following: temperature, power consumption, or power state; the controller performs chip performance management based on the operating status parameters and preset thresholds corresponding to the operating status parameters. Power consumption can be characterized by current, voltage, or power (the product of current and voltage).

[0006] The chip provided in this application embodiment has a latency that is much lower than the latency of sensing temperature / power consumption exceeding a preset threshold in various areas of the chip. By setting a sensor on the chip, the data collected by the sensor is directly transmitted to the controller, which can quickly detect areas on the chip with excessively high temperature or power supply with excessively high overall current / power consumption. Then, the chip power consumption can be managed by adjusting the chip performance, which can quickly reduce the chip temperature or adjust the chip power consumption. This avoids situations where the heat dissipation components cannot respond in time, resulting in the chip not being able to dissipate heat in time, or the power supply not responding in time, resulting in excessively high / low power consumption. This can prevent the chip from burning out or failing due to excessively high chip temperature, and can also prevent insufficient power supply from causing logic errors in the chip and causing business problems, thereby improving the reliability and stability of the chip.

[0007] Based on the first aspect, in one possible implementation, chip performance management includes at least one of the following: delaying data transmission, discarding at least some data packets, adjusting data flow size, adjusting data flow transmission path, clearing service data, or suppressing data input from the communicating upstream chip.

[0008] Based on the first aspect, in one possible implementation, the chip further includes a performance manager; the controller is specifically used to generate configuration information based on operating status parameters and preset thresholds corresponding to the operating status parameters, and to transmit the configuration information to the performance manager; the performance manager is used to perform chip performance management based on the configuration information.

[0009] Based on the first aspect, in one possible implementation, chip performance management includes adjusting the data flow rate; the controller is specifically used to: generate a data flow rate change based on operating status parameters and preset thresholds corresponding to the operating status parameters; and adjust the data flow rate of the chip in the next operating cycle based on either a preset minimum data flow rate adjustment step size or a data flow rate change, and the data flow rate of the chip in the current operating cycle.

[0010] Based on the first aspect, in one possible implementation, the controller is specifically used to: adjust at least one of the magnitude of the data flow and the transmission path of the data flow in the next working cycle of the chip.

[0011] Based on the first aspect, in one possible implementation, the controller is specifically used to: adjust the data flow of at least one of the chip's buses and interfaces.

[0012] Based on the first aspect, in one possible implementation, at least one sensor includes at least one of the following: a temperature sensor, a power consumption sensor, or a power status sensor. The power consumption sensor may further include a current sensor or a voltage sensor, wherein the power consumption sensor is used to acquire the chip's current, the chip's voltage, or the chip's power (i.e., the product of current and voltage).

[0013] Based on the first aspect, in one possible implementation, at least one sensor further includes a data flow sensor; the data flow sensor is used to collect the data flow of the chip during the current working cycle.

[0014] Based on the first aspect, in one possible implementation, the chip also includes a register that stores the data flow of the chip's current operating cycle.

[0015] Secondly, embodiments of this application provide a method for adjusting chip power consumption. The method includes: receiving chip operating status parameters from at least one sensor on the chip, the operating status parameters including at least one of the following: temperature, power consumption, or power state; and performing chip performance management based on the operating status parameters and preset thresholds corresponding to the operating status parameters.

[0016] Based on the second aspect, in one possible implementation, chip performance management includes at least one of the following: delaying data transmission, discarding at least some data packets, adjusting data traffic size, adjusting data traffic transmission path, clearing service data, or suppressing the input of the previous level data.

[0017] Based on the second aspect, in one possible implementation, chip performance management is performed based on operating status parameters and preset thresholds corresponding to the operating status parameters, including: generating configuration information based on operating status parameters and preset thresholds corresponding to the operating status parameters, and transmitting the configuration information to the performance manager in the chip, wherein the configuration information is used to configure chip performance management parameters.

[0018] Based on the second aspect, in one possible implementation, chip performance management includes adjusting the data flow rate; and performing chip performance management based on operating status parameters and preset thresholds corresponding to the operating status parameters, including: generating a data flow rate change based on the operating status parameters and preset thresholds corresponding to the operating status parameters; and adjusting the data flow rate of the chip in the next operating cycle based on one of a preset minimum data flow rate adjustment step size and a data flow rate change, and the data flow rate of the chip in the current operating cycle.

[0019] Based on the second aspect, in one possible implementation, at least one sensor includes at least one of the following: a temperature sensor, a power consumption sensor, or a power status sensor.

[0020] Based on the second aspect, in one possible implementation, at least one sensor further includes a data flow sensor; the method further includes receiving data flow from the data flow sensor for the current operating cycle of the chip.

[0021] Thirdly, embodiments of this application also provide an apparatus for adjusting chip power consumption, the apparatus comprising: at least one controller, which, when the at least one controller executes program code or instructions, implements the method described in the second aspect above or any possible implementation thereof.

[0022] Optionally, the device for regulating chip power consumption may further include at least one memory for storing the program code or instructions.

[0023] Fourthly, embodiments of this application also provide a computer-readable storage medium for storing a computer program that includes methods for implementing the second aspect described above or any possible implementation thereof.

[0024] Fifthly, embodiments of this application also provide a computer program product containing instructions that, when run on a computer, cause the computer to implement the method described in the second aspect or any possible implementation thereof.

[0025] It should be understood that the second to fifth aspects of this application are consistent with the technical solutions of the first aspect of this application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation are similar, so they will not be described again. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;

[0027] Figure 2 This is a schematic diagram of the structure of a chip provided in an embodiment of this application;

[0028] Figure 3 The embodiments provided in this application are as follows Figure 2 The diagram shows the interaction between the components in the chip.

[0029] Figure 4 The embodiments provided in this application are as follows Figure 2 This is another schematic diagram illustrating the interactions between the components in the chip.

[0030] Figure 5 The embodiments provided in this application are as follows Figure 2 This is another schematic diagram illustrating the interactions between the components in the chip.

[0031] Figure 6This is a flowchart of the control logic executed by the controller provided in the embodiments of this application;

[0032] Figure 7 This is a flowchart of a method for adjusting chip data flow provided in an embodiment of this application;

[0033] Figure 8 This is a schematic diagram of a device for adjusting chip data flow provided in an embodiment of this application. Detailed Implementation

[0034] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the embodiments of this application.

[0035] In this article, the term "and / or" is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0036] The terms "first" and "second," etc., in the specification and drawings of the embodiments of this application are used to distinguish different objects or to distinguish different treatments of the same object, rather than to describe a specific order of objects.

[0037] Furthermore, the terms "comprising" and "having," and any variations thereof, used in the description of the embodiments of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the steps or units listed, but may optionally include other steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0038] It should be noted that in the description of the embodiments of this application, the words "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design scheme described as "exemplarily" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of the words "exemplarily" or "for example" is intended to present the relevant concepts in a specific manner.

[0039] In the description of the embodiments of this application, unless otherwise stated, "a plurality of" means two or more.

[0040] The chip provided in this application embodiment can be applied to various types of electronic devices, which can be electronic devices that perform data processing, data distribution, and routing, such as, but not limited to, server devices, switch devices, router devices, or data processing devices. The chip provided in this application embodiment may include, but is not limited to, switching chips, routing chips, and data processing unit (DPU) chips.

[0041] The chip provided in this application embodiment can be used in electronic devices. Please refer to [reference needed]. Figure 1 , Figure 1 This is a schematic diagram of the architecture of the electronic device 100 provided in an embodiment of this application. For example... Figure 1 As shown, the electronic device 100 may include a chip 10, which can be the chip provided in the embodiments of this application. The chip 10 can realize at least one of data processing, distribution, and exchange. It is understood that the electronic device 100 may include multiple chips 10, which can be arranged in a chipset; for example, when the chip 10 is a switching chip, a switching matrix can be integrated on the chip 10, and multiple chips 10 are arranged in a chipset to form a global switching matrix of the switch, thereby realizing data distribution and exchange. The embodiments of this application describe the electronic device 100 including a single switching chip 10 as an example, but this is not intended to limit the solution. The electronic device 100 may also include a power supply 11, which can be connected to the chip 10 to supply power to the various components running in the chip 10. The power supply 11 may include, for example, a battery or a charging adapter. It is understood that the electronic device 100 provided in the embodiments of this application may also include more or fewer processors or processing modules, such as a display module, etc., and the embodiments of this application do not make specific limitations.

[0042] The electronic device 100 may also include one or more other components, such as memory 12. Memory 12 may exemplary include volatile memory, which may be random access memory (RAM) used as an external cache. Exemplarily, the RAM may be static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and double data rate synchronous dynamic random access memory (DDR SDRAM), etc. Memory 12 may store software programs for chip 10, including but not limited to: operating system programs, application programs, instruction code and data required for operation, etc. Furthermore, the electronic device 100 may also include interface circuitry, etc. Chip 10 performs performance management by loading programs and instructions, acquiring data, and controlling at least one of the following: chip 10 temperature and power consumption.

[0043] It is understandable that, such as Figure 1 The illustrated electronic device 100 may also include other devices, including but not limited to input / output devices (such as screens, keyboards, and mice) and sensors (such as power temperature sensors and power status sensors). The input / output devices and sensors can be connected to the chip 10 respectively. Users interact with the chip 10 through the input / output devices to set various parameters in the chip 10. Users can also store data in and retrieve data from the memory 12 through the input / output devices. Sensors can collect data (e.g., power temperature sensors collect power temperature data, and power status sensors collect power status data), storing the collected data in the memory 12 or directly providing it to the chip 10. The chip 10 can perform power consumption management or temperature management based on the data collected in the memory 12 and the data collected by the various sensors on the chip 10. It should be noted that, as Figure 1 The electronic device 100 shown may also include more or fewer devices or equipment, and this application embodiment does not specifically limit this.

[0044] based on Figure 1 Please refer to the structure of the electronic device 100 shown. Figure 2 , Figure 2 The embodiments provided in this application are as follows Figure 1 A schematic diagram of the structure of chip 10 is shown. Figure 2As shown, chip 10 includes a controller 101, sensors, and a data flow manager 102. The sensors include, but are not limited to, one or more of the following: a temperature sensor 104, a power consumption sensor 105, or a data flow sensor 106. Furthermore, chip 10 may include one or more interfaces for receiving data from a higher-level chip or device and transmitting the received data to a lower-level chip or device. These interfaces may include, for example, input interfaces and output interfaces. The interface type can be set based on the type of electronic device and the bus protocol followed, for example, including but not limited to TCP protocol interfaces or IP protocol interfaces. Communication is possible between controller 101 and data manager 102, and between controller 101 and each sensor, for data and signal exchange. In addition, chip 10 may include other components, such as registers or buffers.

[0045] In one possible implementation of this application, each sensor can be disposed at a local location of the chip 10 to collect operating status parameters of the local location of the chip 10. In another possible implementation, multiple sensors of the same type can be included, and these multiple sensors of the same type can be disposed in multiple areas of the chip 10 to collect operating status parameters of multiple areas or the global area of ​​the chip 10. The operating status parameters may include, but are not limited to, at least one of the following: temperature, power consumption, or power status. Taking temperature sensor 104 as an example, temperature sensor 104 can be disposed near the power management unit 107 of the chip 10 to collect the temperature of the area of ​​the power management unit 107; in addition, temperature sensor 104 can also be disposed near the data manager 102 on the chip 10 to collect the temperature near the data manager 102. The aforementioned power consumption sensor 105 can be disposed, for example, on the power supply line of the power management unit 107 to collect the power consumption of the power management unit 107; in addition, power consumption sensor 105 can also be disposed, for example, on the voltage transmission path of the data manager 102 to collect the power consumption of power consumption sensor 105. The aforementioned data flow sensor 106 can be disposed, for example, at the interface of the chip 10, on the bus, and / or on the data manager 102, to acquire data flow in the aforementioned areas. It should be noted that the positions of the sensors on the chip 10 described above are illustrative; the positions of each sensor on the chip 10 can be set according to the needs of the actual scenario, and this application embodiment does not impose specific limitations. The aforementioned sensors are used to collect the chip's operating status parameters and transmit the collected operating status parameters to the controller 101. For example, the temperature sensor 104 transmits the collected temperature parameters to the controller 101; the power consumption sensor 105 transmits the collected power consumption parameters to the controller 101; and the data flow sensor 106 transmits the collected data flow parameters to the controller 101.

[0046] The controller 101 can be implemented in various ways. In one possible implementation, the controller 101 can be a hardware circuit, which may include, but is not limited to, adders, multipliers, comparators, and various logic gates. In another possible implementation, the controller 101 can also be a programmable logic device. The controller 101 may include logic computing units and registers, etc., for loading programs and executing instructions. The integration of these components can also be called a core; that is, the controller 101 can be a processor core. When the controller 101 is a processor core, the memory 102 can store the instruction program and data required for the operation of the controller 101. In this embodiment, the controller 101 can perform performance management on the chip 10 based on the information transmitted by the sensors. Performance management includes at least one of the following: delaying data transmission, discarding at least some data packets, adjusting the data flow rate, adjusting the data flow transmission path, clearing service data, or suppressing data input from the communicating upstream chip. Specifically, controller 101 can generate configuration information for configuring performance management parameters; then, controller 101 can provide the configuration information to performance manager 102.

[0047] The performance manager 102 may include various types of managers, such as a traffic manager. Furthermore, the traffic manager may also include a traffic size manager and a traffic path manager. The performance manager 102 can perform at least one of the aforementioned performance management functions based on the performance management parameters indicated by the configuration information. Taking data traffic adjustment as an example, the performance manager 102 can use at least one of a traffic size manager and a traffic path manager to control the data traffic. In addition, the performance manager 102 may also include components such as registers, into which the aforementioned configuration information can be written.

[0048] In this embodiment, the controller 101 adjusts the data flow of the chip 10 based on the operating status parameters transmitted by each sensor as an example. The specific adjustment method of the data flow by the controller 101 can be user-configurable. When the user sets it to adjust the data flow size, the controller 101 can adjust the data flow size when at least one of temperature and power consumption exceeds a preset threshold; when the user sets it to adjust the data flow transmission path, the controller 101 can adjust the data flow transmission path when at least one of temperature and power consumption exceeds a preset threshold; when the user sets it to adjust both the data flow size and the data flow transmission path simultaneously, the controller 101 can adjust both the data flow size and the data flow transmission path simultaneously when at least one of temperature and power consumption exceeds a preset threshold. In an optional implementation, after the user sets the flow adjustment method, if the flow adjustment method includes adjusting the data flow size, the user can further set the data flow size adjustment method (e.g., including but not limited to: flow balancing method, port scheduling strategy adjustment method, or priority adjustment method); if the flow adjustment method includes the data flow transmission path, the user can further set the specific routing method (e.g., including but not limited to XY routing algorithm, Direct Direction routing algorithm, etc.). Furthermore, when the temperature sensor 104 and power consumption sensor 105 are respectively located at local positions on the chip 10, the user can also configure whether to reconstruct the acquired temperature or power consumption to obtain the temperature or power consumption distribution across the entire chip. The chip 10 can also include a configuration register, where the user's configuration of the data flow adjustment method and whether to perform data reconstruction can be generated and stored. The chip 10 can read this configuration register during startup or runtime to obtain the data flow adjustment method.

[0049] The following is from the following Figures 3 to 5 The various possible implementations shown provide a more detailed description of how the controller 101 adjusts the data flow.

[0050] In one possible implementation, the controller 101 can adjust the data flow based on temperature. Specifically, this can include methods one through three.

[0051] Method 1: Adjusting data flow rate based on temperature. Controller 101 can adjust the data flow rate when the temperature of chip 10 exceeds a preset threshold, such as... Figure 3 As shown below, in conjunction with Figure 3A detailed description follows. Temperature sensor 104 transmits the temperature T1 of chip 10 to controller 101. Controller 101 can store a preset temperature threshold for chip 10. Controller 101 detects whether temperature T1 exceeds the preset temperature threshold. When temperature T1 exceeds the preset temperature threshold, it can read the data flow Q1 of chip 10 from data flow sensor 106. Then, based on temperature T1 and the preset temperature threshold, controller 101 generates a data flow change ΔQ, which indicates a decrease of ΔQ from the aforementioned data flow. Then, controller 101 can generate configuration information I1 based on data flow Q1 and data flow change ΔQ. Configuration information I1 instructs chip 10 to adjust to data flow Q2 (i.e., data flow Q1 - data flow change ΔQ). Finally, controller 101 can send configuration information I1 to data manager 102. Embodiments of this application can generate the aforementioned data flow change ΔQ in various ways.

[0052] In a first possible implementation, the controller 101 may be configured with a mapping relationship between temperature change and data flow change. The controller 101 may first determine the temperature change based on temperature T1 and a preset temperature threshold; then, it may compare the temperature change with the above mapping relationship to determine the data flow change corresponding to the temperature change, which is the data flow change ΔQ.

[0053] In a second possible implementation, the controller 101 may also store a control coefficient matrix for the chip 10. This control coefficient matrix reflects the chip 10's response time to over-temperature conditions; it can also be understood as reflecting the chip 10's sensitivity. The more sensitive the chip 10, the shorter its response time to over-temperature, and the easier it is for the chip to burn out under over-temperature conditions. For example, if the chip 10's over-temperature response is 9ms, it may burn out after 9ms; if the response time is 10ms, it may burn out after 10ms. The control coefficient matrix can be generated during chip design and performance testing based on the chip 10's process technology, control cycle, and power density. Based on the chip's control coefficient matrix, chips can be categorized as sensitive or non-sensitive chips. Furthermore, the controller 10 can also be configured with a sensitivity coefficient and a global coefficient. When the chip 10 is a sensitive chip, the controller 101 can generate a flow control quantity △Q1 based on the control coefficient matrix, the sensitivity coefficient, temperature T1, and a preset temperature threshold. When the chip 10 is a non-sensitive chip, the controller 101 can generate a flow control quantity △Q1 based on the global coefficient, temperature T1, and a preset temperature threshold. This flow control quantity △Q1 is the aforementioned data flow change quantity △Q. In this second possible implementation, the controller 101 can also generate a data flow change quantity △Q based on three temperatures: temperature T0, temperature T1, and a preset temperature threshold. Specifically, when the chip 10 is a sensitive chip, the controller 101 can generate a flow control quantity △Q1 based on the control coefficient matrix, the sensitivity coefficient, temperature T0, temperature T1, and a preset temperature threshold; when the chip 10 is a non-sensitive chip, the controller 101 can generate a flow control quantity △Q1 based on the global coefficient, temperature T0, temperature T1, and a preset temperature threshold. Here, temperature T0 is the temperature of the chip 10 in the previous cycle.

[0054] In the three possible implementations, the controller 101 can be configured with a data flow rate change step size l (also known as a data flow rate adjustment percentage), which can be user-defined. Specifically, the controller 101 can also be configured with a mapping relationship between temperature and a minimum data flow rate change step size l0, which can also be called a minimum data flow rate adjustment percentage. The mapping relationship between temperature and the minimum data flow rate change step size l0 can be generated based on simulation and testing of the chip 10. The controller 101 can... Figure 1The processor 11 shown provides the user with the minimum data flow rate change step size l0 at various temperatures, allowing the user to set the data flow rate change step size. The user-set data flow rate change step size l is not less than the minimum data flow rate change step size l0. The controller 101 can save the user-set data flow rate change step size l. When the temperature T1 exceeds a preset temperature threshold, the controller 101 can generate a flow control quantity ΔQ1 using the same method as the second possible implementation described above. Then, the controller 101 can multiply the data flow rate change step size l by the data flow rate Q1 to obtain a data flow rate change quantity ΔQ2. The controller 101 compares the flow control quantity ΔQ1 and the data flow rate change quantity ΔQ2. When the flow control quantity ΔQ1 is higher than the data flow rate change quantity ΔQ2, the data flow rate change quantity ΔQ2 can be used as the data flow rate change quantity ΔQ; when the flow control quantity ΔQ1 is lower than the data flow rate change quantity ΔQ2, the flow control quantity ΔQ1 can be used as the data flow rate change quantity ΔQ.

[0055] Figure 3 In the illustrated embodiment, when the temperature of the chip 10 exceeds a preset threshold, the controller 101 acquires the data flow rate Q1 and the data flow rate change ΔQ through the data flow sensor 106 to generate the data flow rate Q2 to be adjusted. In another possible implementation, when the temperature of the chip 10 exceeds the preset threshold, the controller 101 can acquire a pre-stored flow control value from the performance manager 102, and generate the data flow rate Q3 to be adjusted based on the flow control value and the data flow rate change ΔQ. The flow control value stored in the performance manager 102 is variable. Initially, the flow control value can be a preset value; if the chip 10 runs for a period of time, and during this running period, the temperature of the chip 10 exceeds the preset threshold and then decreases, the flow control value will be lower than the preset threshold. Furthermore, when the flow control mode in the performance manager 102 is token bucket mode, the above flow control value can be the token bucket amount; when the flow control mode in the performance manager 102 is shaping mode, the above flow control value can be the flow rate. The above-mentioned data flow Q3 to be adjusted is generated based on the flow control value and the data flow change ΔQ. Specifically, the data flow Q3 can be obtained by subtracting the data flow change ΔQ from the flow control value. Then, the controller 101 sends configuration information I1 to the performance manager 102 to instruct the chip 10 to adjust to data flow Q3.

[0056] Method 2: Adjusting the data flow transmission path based on temperature. The controller 101 can adjust the data flow transmission path when the temperature of the chip 10 exceeds a preset threshold, such as... Figure 4As shown. Temperature sensor 104 transmits the temperature T1 of chip 10 to controller 101. Controller 101 detects whether temperature T1 exceeds a preset temperature threshold. When temperature T1 exceeds the preset temperature threshold, based on the area on chip 101 where the temperature exceeds the preset temperature threshold, data flow sensor 105 located in that area collects data flow Q1 on the data flow transmission path (e.g., including bus, interface, or hardware electronic circuitry) in that area. Then, controller 101 generates a data flow change ΔQ based on temperature T1 and the preset temperature threshold. This data flow change ΔQ indicates the data flow to be diverted to other transmission paths. Next, a transmission path to be diverted can be selected based on a pre-set data flow transmission path algorithm (e.g., XY algorithm). Finally, controller 101 can generate configuration information I2 and send it to data manager 102. Configuration information I2 indicates the diverted data flow transmission path and the size of the diverted data flow. The method for determining the data flow change ΔQ is similar to... Figure 3 The method for determining the data flow change ΔQ shown is the same; please refer to the relevant description for details, which will not be repeated here.

[0057] Method 3: Adjusting both data flow rate and data flow transmission path based on temperature. In this method, controller 101 generates a data flow rate change ΔQ when the temperature collected by sensor 104 exceeds a preset threshold. Then, a portion of the data flow rate change ΔQ is diverted to other transmission paths, while simultaneously reducing the data flow rate on the data transmission path in the area where temperature sensor 104 is located. Finally, controller 101 generates configuration information I3 and sends it to data manager 102. This configuration information I3 indicates the diverted data flow transmission path, the diverted data flow rate, and the current data flow rate on the transmission path.

[0058] above Figure 3 The illustrated embodiment schematically demonstrates data flow adjustment based on the temperature of chip 10. In one possible implementation of this application embodiment, data flow can also be adjusted based on the power consumption of chip 10, such as... Figure 4As shown. The method for adjusting data flow based on power consumption is similar to the method for adjusting data flow based on temperature. The difference is that in the power consumption-based data flow adjustment, the controller 101 collects data from the power consumption sensor 105 (power consumption P1) or the power status sensor. When the power consumption P1 exceeds a preset power consumption threshold, or when the power status indicates overload, a data flow change ΔQ can be generated. Then, based on the data flow Q2 collected by the data flow sensor 106 and the data flow change ΔQ, configuration information I2 is generated and transmitted to the performance manager 102. The performance manager 102 adjusts at least one of the following based on the configuration information I2: the data flow size and the data flow transmission path. The aforementioned power status sensor is used to collect the status information of the power management unit. This status information can indicate whether the power management unit is overloaded. When the power output of the power management unit exceeds a preset threshold, it can be considered that the power management unit is overloaded. Furthermore, the method for generating the data flow change ΔQ, and the method for adjusting the data flow based on the data flow change ΔQ, are the same as the method for adjusting the data flow based on temperature mentioned above. Please refer to the relevant descriptions for details, and they will not be repeated here.

[0059] Furthermore, in one possible implementation of this application embodiment, the controller 101 can also adjust the data flow of the chip 10 simultaneously based on the temperature and power consumption of the chip 10. In this implementation, the data flow of the chip 10 can be adjusted first based on the power consumption of the chip 10; after adjusting the data flow based on the power consumption of the chip 10, if the temperature of the chip 10 still exceeds a preset threshold, the data flow of the chip 10 can be further adjusted based on the temperature of the chip 10, so as to achieve the purpose of simultaneously reducing the power consumption and temperature of the chip 10. A specific implementation is as follows: Figure 5 As shown, Figure 5The process includes five steps, S501 to S507. S501, during period t1, power consumption sensor 105 transmits power consumption P2 to controller 101; S502, during period T1, data flow sensor 106 transmits data flow Q3 to controller 101; S503, when power consumption P2 exceeds a preset power consumption threshold, controller 101 generates a data flow change ΔQ based on power consumption P2 and the preset power consumption threshold; based on data flow Q3 and the data flow change ΔQ, it generates configuration information I3; S504, controller 101 transmits the configuration information I3... The data flow is transmitted to the performance manager 102; S505, the data flow manager adjusts the data flow based on the configuration information I3; S506, in period t2, the temperature sensor 104 transmits the temperature T2 to the controller 101; S507, when the temperature T2 is greater than the preset temperature threshold, the controller 101 generates a data flow change ΔQ based on the temperature T2 and the preset temperature threshold; and generates configuration information I4 based on the data flow Q4 and the data flow change ΔQ; S508, the configuration information I4 is transmitted to the performance manager 102. Here, the data flow Q4 is generated by the controller 104 based on the data flow Q3 and the data flow change ΔQ in S503. The method of adjusting the data flow based on the power consumption of chip 10 is similar to... Figure 4 The method for adjusting data flow based on the temperature of chip 10 is the same as the embodiment shown. Figure 3 The embodiments shown are the same, and will not be repeated hereafter with reference to the relevant descriptions.

[0060] The above has been approved. Figures 3 to 5 As can be seen, the chip 10 provided in this application embodiment, by setting a sensor on the chip, the data collected by the sensor is directly transmitted to the controller 101. The controller 101 can quickly detect areas on the chip 10 with excessively high temperature or excessively high power consumption, and then quickly reduce the temperature or power consumption of the chip 10 by adjusting the data flow (e.g., reducing the data flow). This avoids the situation where the chip 10 cannot dissipate heat in time due to the heat dissipation components not responding in time, and thus avoids the situation where the chip 10 is burned or fails due to excessively high temperature, or the chip has logic errors / power failure due to insufficient power supply.

[0061] The above has been approved. Figures 3 to 5 This schematically illustrates how controller 101 adjusts the data flow of chip 10 based on at least one of temperature and power consumption. The following example illustrates how controller 101 controls the data flow of chip 10 based on temperature. Figure 6 The flowchart shown describes in detail the control logic executed by the controller 101.

[0062] Step 601: Read the temperature data of the temperature sensor 105 in chip 101 during the ti cycle.

[0063] Step 602: Based on the indication information F1 set by the user, determine whether the temperature of chip 101 needs to be reconstructed. When the indication information F1 indicates that the temperature of chip 101 needs to be reconstructed, proceed to step 603; when the indication information F1 indicates that the temperature of chip 101 does not need to be reconstructed, proceed to step 604.

[0064] Step 603 involves reconstructing the temperature of chip 101 and determining the temperature of each region of chip 101. Temperature sensor 105 may be located locally on chip 101; therefore, the temperature data collected by temperature sensor 105 may be local temperature data of chip 101. To obtain temperature data for the entire region of chip 101, the temperature of chip 101 can be reconstructed using interpolation or other methods based on the reconstruction coefficients of chip 101, thereby generating temperature data for a wider area (e.g., the entire region of chip 101).

[0065] Step 604: Based on the temperature of one or more regions, determine the region with the highest temperature, which can be denoted as (Tj_max, Ni), where Tj_max is the highest temperature data among the temperature data of multiple regions, and Ni is the identifier of the region with the highest temperature.

[0066] Step 605: Detect whether Tj_max exceeds the preset temperature threshold. If Tj_max does not exceed the preset threshold, proceed to step 606; if Tj_max exceeds the preset threshold, proceed to step 607.

[0067] Step 606: Reset the flow control value in Performance Manager 102.

[0068] Step 607: Based on the control coefficient matrix K of chip 101, determine whether chip 101 is sensitive. If chip 101 is not sensitive, execute steps 608, 610, and 611; if chip 101 is sensitive, execute steps 609-611.

[0069] Step 608: Based on the global coefficient of chip 101, the temperature of the Ni region in period ti-1, and the preset temperature threshold, generate the flow change ΔQ of the Ni region in period ti+1.

[0070] Step 609: Based on the control coefficient matrix K, the sensitivity coefficient of chip 101, Tj_max, the temperature of the Ni region in period ti-1, and the preset temperature threshold, the flow change ΔQ of the Ni region in period ti+1 is generated.

[0071] Step 610: Based on either the minimum adjustment change k or the flow rate change ΔQ, and the data flow data collected by the data flow sensor 107, configuration information is generated. This configuration information indicates the configuration of data flow for at least one of the ports and buses in the Ni region of chip 101. In this step, the minimum adjustment change can be obtained through simulation, testing, or integration testing of chip 101. The user can set the adjustment method used. If the user chooses to use the minimum adjustment change k for data flow adjustment, the controller 101 can reduce the minimum adjustment change k based on the measured data flow to generate the data flow size for the next cycle. If the user chooses to use the flow rate change ΔQ for data flow adjustment, the controller 101 can reduce the flow rate change ΔQ based on the measured data flow to generate the data flow size for the next cycle. This data flow size can be written into the configuration information.

[0072] Step 611: Send the configuration information to Performance Manager 102.

[0073] Based on the same inventive concept, embodiments of this application also provide a method for adjusting chip power consumption, which is applied to, for example... Figure 2 The chip shown. Please continue reading. Figure 7 This document illustrates a process 700 for a method of adjusting chip power consumption provided in an embodiment of this application. The process 700 for adjusting chip power consumption can be executed by a controller 101 and includes the following steps: Step 701: Receive chip operating status parameters from at least one sensor on the chip, the operating status parameters including at least one of the following: temperature, power consumption, or power state; Step 702: Perform chip performance management based on the operating status parameters and preset thresholds corresponding to the operating status parameters.

[0074] In one possible implementation, chip performance management includes at least one of the following: delaying data transmission, discarding at least some data packets, adjusting data flow size, adjusting data flow transmission path, clearing service data, or suppressing data input from the previous level.

[0075] In one possible implementation, chip performance management is performed based on operating status parameters and preset thresholds corresponding to the operating status parameters, including: generating configuration information based on the operating status parameters and preset thresholds corresponding to the operating status parameters, and transmitting the configuration information to the performance manager in the chip, wherein the configuration information is used to configure chip performance management parameters.

[0076] In one possible implementation, chip performance management includes adjusting the data flow rate; and performing chip performance management based on operating status parameters and preset thresholds corresponding to the operating status parameters, including: generating a data flow rate change based on the operating status parameters and preset thresholds corresponding to the operating status parameters; and adjusting the data flow rate of the chip in the next operating cycle based on either a preset minimum data flow rate adjustment step size or a data flow rate change, and the data flow rate of the chip in the current operating cycle.

[0077] In one possible implementation, at least one sensor includes at least one of the following: a temperature sensor, a power consumption sensor, or a power status sensor.

[0078] In one possible implementation, at least one sensor further includes a data flow sensor; the method further includes receiving data flow from the data flow sensor for the current operating cycle of the chip.

[0079] In one possible implementation, the chip also includes registers where the data flow of the chip's current working cycle is stored.

[0080] It is understood that, in order to achieve the above-mentioned functions, controller 101 includes hardware and / or software modules corresponding to the execution of each function. Based on the steps of the various examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in a manner that drives hardware or computer software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in conjunction with the embodiments, but such implementation should not be considered beyond the scope of this application.

[0081] This embodiment can divide the controller 101 into functional modules according to the above method example. For example, different functional modules can be divided for each function, or two or more functions can be integrated into one processing module. The integrated modules can be implemented in hardware. It should be noted that the module division in this embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0082] When dividing each function into modules according to its corresponding function. Figure 8 This diagram illustrates a possible schematic of the device 800 for regulating chip power consumption involved in the above embodiments. The aforementioned device can be further extended, for example... Figure 8The corresponding device 800 for adjusting chip power consumption can be a software device running on the controller 101, or it can be a combination of software and hardware embedded in the controller 101. For example... Figure 8 As shown, the device 800 for adjusting chip power consumption may include: a first receiving module 801, for receiving chip operating status parameters from at least one sensor on the chip, the operating status parameters including at least one of the following: temperature, power consumption, or power status; and a management module 802, for performing chip performance management based on the operating status parameters and preset thresholds corresponding to the operating status parameters.

[0083] In one possible implementation, chip performance management includes at least one of the following: delaying data transmission, discarding at least some data packets, adjusting data flow size, adjusting data flow transmission path, clearing service data, or suppressing data input from the previous level.

[0084] In one possible implementation, the management module 802 is specifically used to: generate configuration information based on operating status parameters and preset thresholds corresponding to the operating status parameters, and transmit the configuration information to the performance manager in the chip, wherein the configuration information is used to configure chip performance management parameters.

[0085] In one possible implementation, chip performance management includes adjusting the data flow rate; the management module 802 is specifically used to: generate a data flow rate change based on operating status parameters and preset thresholds corresponding to the operating status parameters; and adjust the data flow rate of the chip in the next operating cycle based on either a preset minimum data flow rate adjustment step size or a data flow rate change, and the data flow rate of the chip in the current operating cycle.

[0086] In one possible implementation, at least one sensor includes at least one of the following: a temperature sensor, a power consumption sensor, or a power status sensor.

[0087] In one possible implementation, at least one sensor further includes a data flow sensor; the device 800 for regulating chip power consumption further includes a second receiving module (not shown) for receiving data flow from the data flow sensor for the current operating cycle of the chip.

[0088] The device 800 for adjusting chip data flow provided in this embodiment is used to execute the method for adjusting chip data flow executed by the controller 101, and can achieve the same effect as the above-described method or device. Specifically, the above... Figure 8Each module can be implemented using software, hardware, or a combination of both. For example, each module can be implemented in software to drive the controller 101. Alternatively, each module can include a corresponding processor and corresponding driver software, i.e., implemented using a combination of software and hardware.

[0089] Exemplarily, the controller 101 may further include at least one processor and a memory. The at least one processor can invoke all or part of the computer program stored in the memory to control and manage the operation of the controller 101, for example, it can be used to support the controller 101 in executing the steps performed by the various modules described above. The memory can be used to support the controller 101 in executing stored program code and data, and the memory includes, but is not limited to, cache, registers, or at least a portion of the storage space of the memory 13 described above. The controller 101 can implement or execute various exemplary multiple logic modules described in conjunction with the disclosure of this application, which may be a combination of one or more microprocessors implementing computing functions. Furthermore, the controller 101 may also include other programmable logic devices, transistor logic devices, or discrete hardware components.

[0090] This application also provides an apparatus for adjusting chip power consumption, the apparatus comprising: a controller and a memory; the controller is configured to execute a program or instructions stored in the memory, so that the apparatus for adjusting chip power consumption performs the aforementioned related method steps, thereby implementing the method for adjusting chip power consumption in the above embodiments.

[0091] This application also provides a computer storage medium storing computer instructions. When the computer instructions are executed on a computer or controller, the computer or controller performs the aforementioned method steps to implement the method for adjusting chip power consumption in the above embodiments.

[0092] This application also provides a computer program product containing instructions; when the instructions are executed on a computer or controller, the computer or processor performs the aforementioned related steps to implement the method for adjusting chip power consumption in the above embodiments.

[0093] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0094] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0095] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0096] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed between the units may be through some interfaces; the indirect coupling or communication connection between the apparatuses or units may be electrical, mechanical, or other forms.

[0097] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0098] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0099] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause electronic devices (which may be personal computers, servers, or network devices, etc.), integrated circuits, or... Figure 2The chip 10 shown executes all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0100] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A chip, characterized in that, Includes a controller and at least one sensor; The at least one sensor is used to collect the operating status parameters of the chip and transmit the operating status parameters to the controller, wherein the operating status parameters include at least one of the following: temperature, power consumption, or power status; The controller performs chip performance management based on the operating status parameters and the preset thresholds corresponding to the operating status parameters.

2. The chip according to claim 1, characterized in that, The chip performance management includes at least one of the following: delaying data transmission, discarding at least some data packets, adjusting data traffic size, adjusting data traffic transmission path, clearing service data, or suppressing data input from the communicating upstream chip.

3. The chip according to claim 2, characterized in that, The chip performance management includes adjusting the data flow rate; The controller is specifically used to: generate a data flow change based on the operating status parameters and a preset threshold corresponding to the operating status parameters; and adjust the data flow of the chip in the next operating cycle based on one of the preset minimum adjustment step size of the data flow and the data flow change, as well as the data flow of the chip in the current operating cycle.

4. The chip according to any one of claims 1 to 3, characterized in that, The chip also includes a performance manager; The controller is specifically used to: generate configuration information based on operating status parameters and preset thresholds corresponding to the operating status parameters, and transmit the configuration information to the traffic manager; The performance manager is used to perform chip performance management based on configuration information.

5. The chip according to any one of claims 1 to 4, characterized in that, The at least one sensor includes at least one of the following: a temperature sensor, a power consumption sensor, or a power status sensor.

6. The chip according to claim 5, characterized in that, The at least one sensor also includes a data flow sensor; the data flow sensor is used to collect the data flow of the chip during the current working cycle.

7. The chip according to claim 3, characterized in that, The chip also includes a register that stores the data flow of the chip in the current working cycle.

8. A method for adjusting chip power consumption, characterized in that, include: The chip receives operating status parameters from at least one sensor on the chip, the operating status parameters including at least one of the following: temperature, power consumption, or power status; Chip performance management is performed based on the operating status parameters and the preset thresholds corresponding to the operating status parameters.

9. The method according to claim 8, characterized in that, The chip performance management includes at least one of the following: delaying data transmission, discarding at least some data packets, adjusting data traffic size, adjusting data traffic transmission path, clearing service data, or suppressing the input of data from the previous level.

10. The method according to claim 8 or 9, characterized in that, The chip performance management based on operating status parameters and corresponding preset thresholds includes: Based on the operating status parameters and the preset thresholds corresponding to the operating status parameters, configuration information is generated. The configuration information is transmitted to the performance manager in the chip, whereby the configuration information is used to configure the chip's performance management parameters.

11. The method according to any one of claims 8 to 10, characterized in that, The chip performance management includes adjusting the data flow rate; The chip performance management based on operating status parameters and corresponding preset thresholds includes: Based on the operating status parameters and the preset thresholds corresponding to the operating status parameters, the data flow change is generated; The data flow of the chip in the next working cycle is adjusted based on either the preset minimum adjustment step size of the data flow or the change in data flow, as well as the data flow of the chip in the current working cycle.

12. A device for regulating chip power consumption, comprising at least one controller and a memory, characterized in that, The at least one controller executes a program or instructions stored in a memory to cause the device for regulating chip power consumption to implement the method of any one of claims 8 to 11.

13. A computer-readable storage medium for storing a computer program, characterized in that, When the computer program is run on a computer or controller, it causes the computer or controller to perform the method of any one of claims 8 to 11.

14. A computer program product, the computer program product comprising instructions, characterized in that, When the instructions are executed on a computer or controller, the computer or controller performs the method of any one of claims 8 to 11.

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