A method of modeling a semiconductor device
By simulating the working state of semiconductor devices under simulated conditions, obtaining characteristic parameters, and constructing a target simulation model, the problem of accurate simulation of IGCT devices under all working conditions is solved. This achieves accurate simulation of IGCT devices under actual working conditions, improving the safety and design accuracy of the converter valve.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- TSINGHUA UNIVERSITY
- Filing Date
- 2026-02-12
- Publication Date
- 2026-06-05
Smart Images
Figure CN122154185A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor technology, and more particularly to a modeling method for semiconductor devices. Background Technology
[0002] In recent years, with the rapid development of high-voltage direct current (HVDC) transmission technology, the integrated gate-commutated thyristor (IGCT), the core power device of converter valves, faces complex electrical stress problems in actual operation. These problems pose significant risks to the safe operation and precise design of converter valves. Therefore, how to accurately simulate IGCT devices under all operating conditions to simulate all dynamic behaviors of IGCT devices in actual operation has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0003] To solve the above-mentioned technical problems, or at least partially solve them, this disclosure provides a modeling method for semiconductor devices, which can obtain the target parameters of the working state of semiconductor devices under actual working conditions through simulation, thereby constructing a target simulation model that can simulate all dynamic behaviors of semiconductor devices in actual operation.
[0004] This disclosure provides a modeling method for semiconductor devices, the modeling method including: Under simulation conditions, the operating state of the semiconductor device is set, and the characteristic parameters of the semiconductor device under the operating state are obtained. Establish the objective function of the semiconductor device under the working state based on the characteristic parameters; Based on the objective function of semiconductor devices, calculate the target parameters of semiconductor devices in their operating state; Based on the target parameters, a target simulation model of the semiconductor device is constructed.
[0005] Optionally, the operating state includes the blocking state; Under simulation conditions, the operating states of the semiconductor device are set, and the characteristic parameters of the semiconductor device under each operating state are obtained. Based on the characteristic parameters, objective functions for the semiconductor device under multiple operating states are established, including: Under simulation conditions, the semiconductor device is set to operate in a blocking state, and the first characteristic parameter of the semiconductor device in the blocking state is obtained; wherein, the first characteristic parameter includes the phase frequency characteristic parameter; Based on phase frequency characteristic parameters, a wideband model is used to establish the blocking objective function of the semiconductor device in the blocking state; The broadband model includes a first resistor, a first inductor, and a first capacitor connected in series.
[0006] Optionally, the first characteristic parameter may also include an amplitude-frequency characteristic parameter; Based on the objective function of the semiconductor device, the target parameters of the semiconductor device under operating conditions are calculated, including: Based on the blocking objective function, phase frequency characteristic parameters, and amplitude frequency characteristic parameters, calculate the blocking objective parameters under the preset condition that the blocking objective function satisfies the blocking objective function; The preset condition is to prevent the objective function from reaching its minimum value.
[0007] Optionally, the working states include active shutdown state and reverse recovery state; Under simulation conditions, the operating state of the semiconductor device is set, and the characteristic parameters of the semiconductor device under the operating state are obtained, including: Obtain the oscillation test model of the semiconductor device; Under simulation conditions, the semiconductor device is set to operate in reverse recovery state based on the oscillation test model, and the second characteristic parameter of the semiconductor device in reverse recovery state is obtained. Furthermore, under simulation conditions, the semiconductor device is set to operate in an active shutdown state based on an oscillation test model, and the third characteristic parameter of the semiconductor device in the active shutdown state is obtained. The oscillation test model includes a second inductor, a third inductor, a second capacitor, a charging branch, a discharging branch, and a protection branch. Both the charging branch and the discharging branch are connected in parallel with the second capacitor. The charging branch is used to charge the second capacitor, and the discharging branch is used to discharge the second capacitor. The first terminal of the semiconductor device is connected to the first terminal of the second capacitor through the second inductor, and the second terminal of the semiconductor device is connected to the second terminal of the second capacitor through the third inductor. The semiconductor device is connected in parallel with the protection branch.
[0008] Optionally, an objective function for the semiconductor device under operating conditions is established based on the characteristic parameters; based on the objective function of the semiconductor device, the objective parameters of the semiconductor device under operating conditions are calculated, including: Based on the second characteristic parameter, a forward current peak objective function is established by linear fitting, and a reverse recovery current objective function is established by using a secant function; wherein, the second characteristic parameter includes the total reverse recovery charge and the rate of change of current at the current zero crossing; Based on the objective function of the forward current peak and the objective function of the reverse recovery current, the reverse recovery objective parameters of the semiconductor device in the reverse recovery state are calculated.
[0009] Optionally, the objective function for the peak forward current is: Among them, I RM1 This represents the peak value of the forward current when the circuit is turned on. Let I be the rate of change of current at the moment the current crosses zero, Q be the total amount of reverse recovery charge, and I be the current rate of change at the moment the current crosses zero. RM2 This represents the peak value of the reverse recovery current. The objective function for reverse recovery current is: Among them, i r (t) is the inverse recovery objective function, sech() is the secant function, and t A tB is the moment when the current crosses zero, tT is the moment when the reverse recovery current reaches its peak value, and τ is the moment when the reverse recovery current reaches its target value. a and τ b This is for the reverse recovery of the target parameters.
[0010] Optionally, an objective function for the semiconductor device under operating conditions is established based on the characteristic parameters; based on the objective function of the semiconductor device, the objective parameters of the semiconductor device under operating conditions are calculated, including: Based on the third feature parameter, a linear fitting is used to establish the active shutdown objective function; Based on the active shutdown objective function, the active shutdown objective parameters of the semiconductor device are calculated to construct the active shutdown model of the semiconductor device. Among them, the active shutdown model is used to realize the active shutdown state of the target simulation model.
[0011] Optionally, the third characteristic parameter includes a first time interval from the moment of the turn-off trigger pulse to the moment when the cathode current crosses zero, and the turn-off current value; The objective function for active shutdown is: △t is the first time interval, and I1 is the value of the turn-off current.
[0012] Optionally, the operating state includes the on state; Obtain the characteristic parameters of the semiconductor device under simulated operating conditions, including: Obtain the fourth characteristic parameter corresponding to the conduction state of the semiconductor device under simulation conditions.
[0013] Optionally, the working states include the on state, the blocking state, the active off state, and the reverse recovery state; Based on the target parameters, a target simulation model of the semiconductor device is constructed, including: Based on the fourth characteristic parameter of the conduction state, the blocking target parameter of the blocking state, the reverse recovery target parameter of the reverse recovery state, and the active turn-off target parameter of the active turn-off state, a target simulation model of the semiconductor device is constructed. Among them, the fourth characteristic parameter of the conduction state is the target parameter of the conduction state.
[0014] This disclosure provides a modeling method for semiconductor devices. The modeling method includes: setting the operating state of the semiconductor device under simulation conditions and obtaining the characteristic parameters of the semiconductor device under the operating state; establishing an objective function of the semiconductor device under the operating state based on the characteristic parameters; calculating the target parameters of the semiconductor device under the operating state based on the objective function; and constructing a target simulation model of the semiconductor device based on the target parameters. This disclosure simulates the operating state of the semiconductor device under actual operating conditions and obtains the characteristic parameters of the semiconductor device under the operating state. Since the characteristic parameters are obtained by simulating the operating state of the semiconductor device under actual operating conditions, the objective function established based on the characteristic parameters and the target parameters calculated based on the objective function can reflect the performance characteristics of the semiconductor device under actual operating conditions. Furthermore, a target simulation model of the semiconductor device is constructed based on the target parameters, so that the final target simulation model can accurately simulate the performance of the semiconductor device under different operating states under actual operating conditions. Therefore, this disclosure can obtain the target parameters of the semiconductor device under actual operating conditions through simulation, thereby constructing a target simulation model that can simulate all dynamic behaviors of the semiconductor device in actual operation. Attached Figure Description
[0015] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0016] Figure 1 This is a schematic flowchart of a semiconductor device modeling method provided in an embodiment of the present disclosure.
[0017] Figure 2 This is a schematic diagram of a phase frequency response curve provided in an embodiment of the present disclosure.
[0018] Figure 3 This is a schematic diagram of the structure of a broadband model provided in an embodiment of this disclosure.
[0019] Figure 4 This is a schematic diagram of the structure of an oscillation test model provided in an embodiment of this disclosure.
[0020] Figure 5 This is a schematic diagram of the structure of an active shutdown model provided in an embodiment of this disclosure.
[0021] Figure 6 This is a schematic diagram of the structure of a target simulation model provided in an embodiment of the present disclosure. Detailed Implementation
[0022] The features and exemplary embodiments of various aspects of this application will now be described in detail. Numerous specific details are set forth in the following detailed description in order to provide a comprehensive understanding of this application. However, it will be apparent to those skilled in the art that this application can be implemented without some of these specific details. The following description of embodiments is merely intended to provide a better understanding of this application by illustrating examples thereof.
[0023] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The embodiments will now be described in detail with reference to the accompanying drawings.
[0024] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.
[0025] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.
[0026] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.
[0027] In the embodiments of this application, the term "electrical connection" can refer to a direct electrical connection between two components, or it can refer to an electrical connection between two components via one or more other components.
[0028] In the embodiments of this application, the first node, the second node, and the third node are defined only for the convenience of describing the circuit structure, and the first node, the second node, and the third node are not actual circuit units.
[0029] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.
[0030] In recent years, with the rapid development of high-voltage direct current (HVDC) transmission technology, the integrated gate-commutated thyristor (IGCT), the core power device of converter valves, faces complex electrical stress problems in actual operation. These problems pose significant risks to the safe operation and precise design of converter valves. Therefore, how to accurately simulate IGCT devices under all operating conditions to simulate all dynamic behaviors of IGCT devices in actual operation has become a technical problem that urgently needs to be solved by those skilled in the art.
[0031] Therefore, this disclosure provides a modeling method for semiconductor devices. By simulating the operating state of a semiconductor device under actual operating conditions, the characteristic parameters of the semiconductor device under these conditions are obtained. Since the characteristic parameters are collected by simulating the operating state of the semiconductor device under actual operating conditions, the objective function established based on the characteristic parameters, and the target parameters calculated based on the objective function, can reflect the performance characteristics of the semiconductor device under actual operating conditions. A target simulation model of the semiconductor device is then constructed based on the target parameters, ensuring that the final target simulation model can accurately simulate the performance of the semiconductor device under different operating conditions in actual operation. Therefore, this disclosure can obtain the target parameters of the semiconductor device's operating state under actual operating conditions through simulation, thereby constructing a target simulation model capable of simulating all dynamic behaviors of the semiconductor device in actual operation.
[0032] The embodiments will now be described in detail with reference to the accompanying drawings.
[0033] Figure 1 This is a flowchart illustrating a modeling method for a semiconductor device provided in an embodiment of this disclosure, as shown below. Figure 1 As shown, the modeling methods include: S110-S140.
[0034] S110. Set the operating state of the semiconductor device under simulation conditions and obtain the characteristic parameters of the semiconductor device under the operating state.
[0035] For example, the semiconductor device can be an IGCT, which has four operating states: on, off, active off, and reverse recovery. This disclosure sets the operating states of the semiconductor device in a simulation environment to simulate the actual operating conditions of the semiconductor device and obtains the characteristic parameters of the semiconductor device in the set operating states. For example, if the semiconductor device operates in the on state, the characteristic parameters of the semiconductor device in the on state are obtained. Thus, this disclosure obtains the characteristic parameters corresponding to the actual operating states of the semiconductor device by simulating the operating states of the semiconductor device under actual operating conditions, thereby making the target simulation model obtained through subsequent steps more consistent with the actual device parameters of the semiconductor device.
[0036] S120. Establish the objective function of the semiconductor device under operating conditions based on the characteristic parameters.
[0037] S130. Based on the objective function of the semiconductor device, calculate the target parameters of the semiconductor device under operating conditions.
[0038] For example, objective functions are constructed for each operating state based on the characteristic parameters of the semiconductor device under various operating conditions. Since the characteristic parameters are obtained by simulating the semiconductor device's operation under actual conditions, the constructed objective functions can also reflect the performance characteristics of the semiconductor device under actual conditions. Then, based on the objective functions of the semiconductor device, the target parameters of the semiconductor device are calculated. These target parameters are those determined by the objective functions and best reflect the performance characteristics of the semiconductor device under actual conditions.
[0039] S140. Based on the target parameters, construct the target simulation model of the semiconductor device.
[0040] For example, a target simulation model of the semiconductor device is constructed based on the characteristic parameters collected under simulation conditions and the calculated target parameters. Since the characteristic parameters are collected by simulating the working state of the semiconductor device under actual operating conditions, and the target parameters are also derived and calculated based on the characteristic parameters, the final target simulation model can accurately simulate the performance of the semiconductor device under different working states in actual operating conditions.
[0041] This disclosure simulates the operating state of a semiconductor device under actual operating conditions and obtains its characteristic parameters under these conditions. Since these characteristic parameters are acquired by simulating the semiconductor device's operation under actual conditions, the objective function established based on these parameters, and the target parameters calculated from the objective function, both reflect the performance characteristics of the semiconductor device under actual operating conditions. A target simulation model of the semiconductor device is then constructed based on these target parameters, ensuring that the final target simulation model accurately simulates the performance of the semiconductor device under different operating conditions in actual operation. Therefore, this disclosure can obtain the target parameters of the semiconductor device's operating state under actual conditions through simulation, thereby constructing a target simulation model capable of simulating all dynamic behaviors of the semiconductor device in actual operation.
[0042] In some embodiments, the operating state includes a blocking state.
[0043] S110 includes: setting the semiconductor device to operate in a blocking state under simulation conditions, and obtaining the first characteristic parameter of the semiconductor device in the blocking state.
[0044] S120 includes: establishing a blocking objective function for a semiconductor device in a blocking state based on a wideband model using phase frequency characteristic parameters.
[0045] The first characteristic parameter includes the phase frequency characteristic parameter.
[0046] For example, in a simulation, the semiconductor device is set to operate in a blocking state, and an impedance analyzer is used to measure and obtain the phase frequency characteristic parameters of the semiconductor device operating in the blocking state, wherein the phase frequency characteristic parameters include the phase frequency characteristic curve. Figure 2 This is a schematic diagram of a phase-frequency response curve provided in an embodiment of the present disclosure, based on... Figure 2 The phase frequency response curve shown determines the capacitive characteristics of the semiconductor device's phase frequency response at low frequencies. Then, by using a wideband model, the blocking objective function of the semiconductor device in the blocking state can be established.
[0047] The blocking objective function is: Where obj0 is the blocking objective function, and N is the total number of frequency points measured using an impedance analyzer. The modulus immunity value of the semiconductor device measured at the nth frequency point. Let be the absolute value of the phase angle of the semiconductor device measured at the nth frequency point. This represents the modulus resistance value fitted to the broadband model at the nth frequency point. This represents the absolute value of the phase angle fitted to the broadband model at the nth frequency point.
[0048] in, Figure 3 This is a schematic diagram of the structure of a broadband model provided in an embodiment of this disclosure, as shown below. Figure 3 As shown, the broadband model includes a first resistor R1, a first inductor L1, and a first capacitor C1 connected in series. Based on the capacitive characteristics of the phase frequency response of the semiconductor device at low frequencies and the broadband model, it is possible to equivalently represent a semiconductor device operating in a blocking state.
[0049] In some embodiments, the first characteristic parameter further includes an amplitude-frequency characteristic parameter.
[0050] S130 includes: calculating the blocking target parameters based on the blocking objective function, phase frequency characteristic parameters, and amplitude frequency characteristic parameters, under the condition that the blocking objective function satisfies a preset condition.
[0051] For example, the preset condition is that the blocking objective function reaches its minimum value. Based on the blocking objective function, phase frequency characteristic parameters, and amplitude frequency characteristic parameters, through multiple calculations and optimizations, the phase frequency characteristic parameters and amplitude frequency characteristic parameters that minimize the blocking objective function are determined as the blocking objective parameters of the semiconductor device. Finally, the blocking objective parameters determined through calculation can be used to construct a blocking simulation model in the target simulation model, used to simulate the blocking state of the semiconductor device under actual operating conditions.
[0052] This disclosure simulates the blocking state of a semiconductor device under actual operating conditions in a simulation environment and obtains the first characteristic parameters of the semiconductor device under the blocking state. Since the first characteristic parameters are obtained by simulating the blocking state of the semiconductor device under actual operating conditions, the blocking objective function established based on the first characteristic parameters, and the blocking objective parameters calculated based on the blocking objective function, can both reflect the performance characteristics of the semiconductor device when operating in the blocking state under actual operating conditions. Furthermore, based on the phase frequency characteristic parameters and amplitude frequency characteristic parameters that minimize the blocking objective function, a target simulation model of the semiconductor device is constructed, ensuring that the final target simulation model accurately simulates the performance of the semiconductor device operating in the blocking state under actual operating conditions. Therefore, this disclosure can simulate the blocking objective parameters of a semiconductor device under actual operating conditions through simulation, thereby constructing a blocking simulation model capable of simulating the blocking state of a semiconductor device in actual operation.
[0053] In some embodiments, the working state includes an active shutdown state and a reverse recovery state; S110 includes: acquiring an oscillation test model for a semiconductor device.
[0054] Under simulation conditions, the semiconductor device is set to operate in reverse recovery state based on the oscillation test model, and the second characteristic parameter of the semiconductor device in reverse recovery state is obtained.
[0055] Furthermore, under simulation conditions, the semiconductor device is set to operate in an active shutdown state based on an oscillation test model, and the third characteristic parameter of the semiconductor device in the active shutdown state is obtained.
[0056] For example, Figure 4 This is a schematic diagram of the structure of an oscillation test model provided in an embodiment of the present disclosure, as shown below. Figure 4 As shown, the oscillation test model includes a second inductor L2, a third inductor L3, a second capacitor C2, a charging branch 21, a discharging branch 22, and a protection branch 23.
[0057] Both the charging branch 21 and the discharging branch 22 are connected in parallel with the second capacitor C2. The charging branch 21 is used to charge the second capacitor C2, and the discharging branch 22 is used to discharge the second capacitor C2. The first terminal of the semiconductor device 20 is connected to the first terminal of the second capacitor C2 through the second inductor L2, and the second terminal of the semiconductor device 20 is connected to the second terminal of the second capacitor C2 through the third inductor L3. The semiconductor device 20 is connected in parallel with the protection branch 23.
[0058] Semiconductor device 20 is placed in the oscillation test model. First, the second capacitor C2 is pre-charged through charging branch 21 until the voltage across the second capacitor C2 reaches a specified voltage. At this point, charging branch 21 is disconnected, allowing the oscillation test model to simulate the reverse recovery state and active shutdown state of semiconductor device 20. After simulating the reverse recovery state and active shutdown state of semiconductor device 20, discharge branch 22 is turned on to discharge the second capacitor C2. The protection branch 23 includes a surge arrester MOV and a buffer module consisting of a second resistor R2 and a third capacitor C3 connected in series. The protection branch 23 protects semiconductor device 20 from high-voltage breakdown.
[0059] The oscillation test model can simulate the natural turn-off condition of semiconductor device 20 when the current crosses zero, thus simulating the reverse recovery state of semiconductor device 20. Therefore, under simulation conditions, semiconductor device 20 is set to operate in the reverse recovery state based on the oscillation test model, and the second characteristic parameter is obtained by measuring multiple sets of natural turn-off waveforms of semiconductor device 20 operating in the reverse recovery state.
[0060] Furthermore, the oscillation test model can simulate the active shutdown condition of the semiconductor device 20 when the current reaches the positive peak value and a shutdown pulse is applied, thus simulating the active shutdown state of the semiconductor device. Therefore, under simulation conditions, the semiconductor device 20 is set to operate in the active shutdown state based on the oscillation test model, and multiple sets of active shutdown waveforms of the semiconductor device 20 operating in the active shutdown state are measured to obtain the third characteristic parameter.
[0061] This disclosure uses an oscillation test model to simulate the reverse recovery state and active shutdown state of the semiconductor device 20 under actual operating conditions, thereby obtaining the second characteristic parameter corresponding to the reverse recovery state of the semiconductor device under actual operating conditions and the third characteristic parameter corresponding to the active shutdown state, so that the target simulation model obtained through subsequent steps is more consistent with the actual device parameters of the semiconductor device.
[0062] In some embodiments, S120 includes: establishing a forward current peak objective function based on a second characteristic parameter using linear fitting, and establishing a reverse recovery current objective function using a secant function.
[0063] S130 includes: calculating the reverse recovery target parameters of the semiconductor device in the reverse recovery state based on the forward current peak objective function and the reverse recovery current objective function.
[0064] The second characteristic parameter includes the total amount of reverse recovery charge and the rate of change of current at the moment the current crosses zero.
[0065] For example, the objective function for the peak forward current is: Among them, I RM1 This represents the peak value of the forward current when the circuit is turned on. Let I be the rate of change of current at the moment the current crosses zero, Q be the total amount of reverse recovery charge, and I be the current rate of change at the moment the current crosses zero. RM2 The peak value of the reverse recovery current is given by k1, k2, k3, and k4, which are constants obtained from linear fitting.
[0066] Based on the total reverse recovery charge and the rate of change of current at the moment of current zero crossing, a target function for the peak forward current is established by linear fitting. The peak forward current when conducting can be calculated from this function. The peak reverse recovery current can also be calculated from the target function for the peak forward current.
[0067] Then, based on the zero-crossing time of the current in the second characteristic parameter and the peak value of the reverse recovery current calculated from the objective function of the peak forward current, the objective function of the reverse recovery current is established using the secant function.
[0068] The objective function for reverse recovery current is: Among them, i r (t) is the inverse recovery objective function, sech() is the secant function, and t A tB is the moment when the current crosses zero, tT is the moment when the reverse recovery current reaches its peak value, and τ is the moment when the reverse recovery current reaches its target value. a and τ b This is for the reverse recovery of the target parameters.
[0069] The target value for the reverse recovery current can be, for example, 0.9 times the peak value of the reverse recovery current. Therefore, the target parameters for the reverse recovery current can be calculated based on the objective function for the reverse recovery current.
[0070] The reverse recovery target parameter is: e^|arcsech(0.9)| -e^(-|arcsech(0.9)| ) In some embodiments, S120 includes: establishing an active shutdown objective function based on a third feature parameter through linear fitting.
[0071] For example, the third characteristic parameter includes a first time interval from the moment of the turn-off trigger pulse to the moment the cathode current crosses zero, and a turn-off current value. Based on the first time interval and the turn-off current value, an active turn-off objective function is established using linear fitting.
[0072] The objective function for active shutdown is: Where Δt is the first time interval and I1 is the value of the turn-off current.
[0073] S130 includes: calculating the active shutdown target parameters of the semiconductor device based on the active shutdown objective function, so as to construct the active shutdown model of the semiconductor device.
[0074] For example, the semiconductor device can be an IGCT, a thyristor-like device with three PN junctions. The three PN junctions of the IGCT, from anode to cathode, are J1, J2, and J3, with J3 being the PN junction closest to the gate. Based on the active turn-off objective function, the time interval between the moment the turn-off trigger pulse is provided and the moment the current of the J3 junction logic switch crosses zero can be calculated, thus achieving an equivalent NPN transistor in the active turn-off model. Furthermore, the PNP transistor in the active turn-off model can be equivalently represented by two diodes connected in series in reverse.
[0075] Figure 5This is a schematic diagram of the structure of an active shutdown model provided in an embodiment of this disclosure, as shown below. Figure 5 As shown, the active turn-off model can be, for example, an M-2T-3R-C circuit model, which includes two MOSFET transistors, three resistors, and one capacitor. The active turn-off model includes two IGCT rings 31, two switching circuits 32, two delay circuits 33, and two parasitic circuits 34.
[0076] The switching circuit 32 includes a MOSFET transistor Q1 and a third resistor R3, the delay circuit 33 includes a fourth resistor R4 and a fourth capacitor C4, and the parasitic circuit 34 includes a fifth resistor R5 and a fourth inductor L4.
[0077] The IGCT ring 31 includes a PNP transistor Q2, an NPN transistor Q3, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a fifth capacitor C5.
[0078] In the active turn-off model, the gate G is connected to the first terminal of the fourth resistor R4. The second terminal of the fourth resistor R4 is connected to the first terminal of the fourth capacitor C4 and the second terminal of the MOSFET transistor Q1. The gate of the MOSFET transistor Q1, the second terminal of the fourth inductor L4, and the second terminal of the fourth capacitor C4 are all connected to the cathode K of the active turn-off model. The first terminal of the MOSFET transistor Q1 is connected to the base of the NPN transistor Q3 through the third resistor R3, and the first terminal of the fourth inductor L4 is connected to the second terminal of the NPN transistor Q3 through the fifth resistor R5.
[0079] The first terminal of the sixth resistor R6 is connected to the base of NPN transistor Q3, the second terminal of PNP transistor Q2, the first terminal of the seventh resistor R7, and the first terminal of the fifth capacitor C5. The second terminal of the sixth resistor R6 is connected to the second terminal of NPN transistor Q3. The first terminal of NPN transistor Q3 is connected to the second terminal of the seventh resistor R7, the second terminal of the fifth capacitor C5, the base of PNP transistor Q2, and the second terminal of the eighth resistor R8. The first terminal of PNP transistor Q2 and the first terminal of the eighth resistor R8 are both connected to the anode A of the active turn-off model.
[0080] This disclosure calculates the time interval between the moment the turn-off trigger pulse is provided and the moment the current of the J3 junction logic switch crosses zero, based on the active turn-off objective function. This is equivalent to the NPN transistor Q3 in the model, thus enabling the final active turn-off model to realize the active turn-off state of the semiconductor device in the target simulation model. In this active turn-off model, the J3 junction logic switch is used to simulate the turn-off behavior of the semiconductor device. The state of the J3 junction logic switch is determined by both the gate drive signal and the main current condition, thereby precisely controlling the switching of the carrier transport path in the model. This method can physically reproduce the carrier extraction process during semiconductor device turn-off, thus accurately reproducing the steep tailing characteristics of the turn-off current and the establishment waveform of the turn-off voltage, overcoming the drawbacks of traditional models that rely on bipolar transistor models.
[0081] In some embodiments, the operating state includes an ON state.
[0082] S110 includes: acquiring the fourth characteristic parameter corresponding to the conduction state of the semiconductor device under simulation conditions.
[0083] For example, based on the simulation condition of the semiconductor device operating in the conduction state in the simulation software, the fourth characteristic parameter corresponding to the conduction state is obtained. The fourth characteristic parameter is the parasitic parameter of the semiconductor device in the conduction state.
[0084] In some embodiments, the operating states include an on state, a blocking state, an active off state, and a reverse recovery state.
[0085] S140 includes: a fourth characteristic parameter based on the conduction state, a blocking target parameter for the blocking state, a reverse recovery target parameter for the reverse recovery state, and an active shutdown target parameter for the active shutdown state, to construct a target simulation model of the semiconductor device.
[0086] For example, the fourth characteristic parameter of the on-state is the target parameter of the on-state. Based on the fourth characteristic parameter of the on-state, a conduction model is constructed to realize the on-state of the semiconductor device; based on the blocking target parameter of the blocking state, a blocking model is constructed to realize the blocking state of the semiconductor device; based on the reverse recovery target parameter of the reverse recovery state, a reverse recovery model is constructed using a controlled current source to realize the reverse recovery state of the semiconductor device; and based on the active turn-off target parameter of the active turn-off state, an active turn-off model is constructed to realize the active turn-off state of the semiconductor device. Then, based on the on-state model, blocking model, reverse recovery model, and active turn-off model, a target simulation model of the semiconductor device is constructed.
[0087] Figure 6 This is a schematic diagram of the structure of a target simulation model provided in an embodiment of the present disclosure, such as... Figure 6As shown, the target simulation model includes a conduction model 41, a blocking model 42, a reverse recovery model 43, and an active shutdown model 44. The conduction model 41, the blocking model 42, the reverse recovery model 43, and the active shutdown model 44 are connected in parallel to each other in a power supply module 45, which provides current to the semiconductor device under simulation conditions.
[0088] First, the conduction model 41 is triggered to simulate the conduction state of the semiconductor device. When the current of the conduction model 41 crosses zero, the reverse recovery model 43 is triggered. When du / dt=0 and i=0, the blocking model 42 is triggered. When a fault occurs in the semiconductor device in the conduction state, for example, when the triggering time of the conduction model 41 reaches 6.67ms and di / dt>0, the active turn-off model 44 is triggered. When du / dt=0 and i=0, the blocking model 42 is triggered.
[0089] This disclosure simulates the operating state of a semiconductor device under actual operating conditions and obtains its characteristic parameters under these conditions. Since these characteristic parameters are obtained by simulating the semiconductor device's operation under actual conditions, the objective function established based on these parameters, and the target parameters calculated from the objective function, both reflect the performance characteristics of the semiconductor device under actual operating conditions. A target simulation model of the semiconductor device is then constructed based on these target parameters, ensuring that the final target simulation model accurately simulates the performance of the semiconductor device under different operating conditions in actual operation. Therefore, this disclosure can obtain the target parameters of the semiconductor device's operating state under actual conditions through simulation, thereby constructing a target simulation model that can accurately simulate all dynamic behaviors of the semiconductor device during actual operation.
[0090] The above are merely specific embodiments of this disclosure, enabling those skilled in the art to understand or implement this disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not to be limited to these embodiments, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A method for modeling semiconductor devices, characterized in that, The method includes: Under simulation conditions, the operating state of the semiconductor device is set, and the characteristic parameters of the semiconductor device corresponding to the operating state are obtained; Based on the characteristic parameters, establish the objective function of the semiconductor device in the operating state; Based on the objective function of the semiconductor device, calculate the target parameters of the semiconductor device in the operating state; Based on the target parameters, a target simulation model of the semiconductor device is constructed.
2. The modeling method according to claim 1, characterized in that, The operating state includes the blocking state; The process involves setting the operating state of the semiconductor device under simulation conditions and obtaining the characteristic parameters of the semiconductor device corresponding to the operating state. based on The characteristic parameters respectively establish the objective function of the semiconductor device in multiple operating states, including: Under simulation conditions, the semiconductor device is set to operate in the blocking state, and the first characteristic parameter of the semiconductor device in the blocking state is obtained; wherein, the first characteristic parameter includes a phase frequency characteristic parameter; Based on the phase frequency characteristic parameters, a broadband model is used to establish the blocking objective function of the semiconductor device under the blocking state; The broadband model includes a first resistor, a first inductor, and a first capacitor connected in series.
3. The modeling method according to claim 2, characterized in that, The first feature parameter also includes amplitude-frequency feature parameters; The calculation of the target parameters of the semiconductor device in the operating state based on the objective function of the semiconductor device includes: Based on the blocking objective function, the phase frequency characteristic parameters, and the amplitude frequency characteristic parameters, calculate the blocking objective parameters under the preset condition that the blocking objective function satisfies the blocking objective function; The preset condition is that the blocking objective function reaches its minimum value.
4. The modeling method according to claim 1, characterized in that, The operating states include active shutdown state and reverse recovery state; The step of setting the operating state of the semiconductor device under simulation conditions and obtaining the characteristic parameters of the semiconductor device corresponding to the operating state includes: Obtain the oscillation test model of the semiconductor device; Under simulation conditions, the semiconductor device is set to operate in the reverse recovery state based on the oscillation test model, and the second characteristic parameter of the semiconductor device in the reverse recovery state is obtained; Furthermore, under simulation conditions, the semiconductor device is set to operate in the active shutdown state based on the oscillation test model, and the third characteristic parameter of the semiconductor device corresponding to the active shutdown state is obtained. The oscillation test model includes a second inductor, a third inductor, a second capacitor, a charging branch, a discharging branch, and a protection branch. Both the charging branch and the discharging branch are connected in parallel with the second capacitor. The charging branch is used to charge the second capacitor, and the discharging branch is used to discharge the second capacitor. The first terminal of the semiconductor device is connected to the first terminal of the second capacitor through the second inductor, and the second terminal of the semiconductor device is connected to the second terminal of the second capacitor through the third inductor. The semiconductor device is connected in parallel with the protection branch.
5. The modeling method according to claim 4, characterized in that, The objective function of the semiconductor device under the operating state is established based on the characteristic parameters; Based on the objective function of the semiconductor device, the target parameters of the semiconductor device in the operating state are calculated, including: Based on the second characteristic parameter, a forward current peak objective function is established by linear fitting, and a reverse recovery current objective function is established by using a secant function; wherein, the second characteristic parameter includes the total reverse recovery charge and the rate of change of current at the current zero crossing; Based on the forward current peak objective function and the reverse recovery current objective function, the reverse recovery objective parameters of the semiconductor device in the reverse recovery state are calculated.
6. The modeling method according to claim 5, characterized in that, The objective function for the peak forward current is: Among them, I RM1 This represents the peak value of the forward current when the circuit is turned on. Let I be the rate of change of current at the moment the current crosses zero, Q be the total amount of reverse recovery charge, and I be the current rate of change at the moment the current crosses zero. RM2 This represents the peak value of the reverse recovery current. The objective function for the reverse recovery current is: Among them, i r (t) is the inverse recovery objective function, sech() is the secant function, and t A tB is the time when the current crosses zero, tT is the time when the reverse recovery current reaches its peak value, and tT is the time when the reverse recovery current reaches its target value. a and τ b The reverse recovery target parameter is defined as follows.
7. The modeling method according to claim 4, characterized in that, The objective function of the semiconductor device under the operating state is established based on the characteristic parameters; Based on the objective function of the semiconductor device, the target parameters of the semiconductor device in the operating state are calculated, including: Based on the third feature parameter, an active shutdown objective function is established by linear fitting; Based on the active shutdown objective function, the active shutdown objective parameters of the semiconductor device are calculated to construct the active shutdown model of the semiconductor device. The active shutdown model is used to realize the active shutdown state of the target simulation model.
8. The modeling method according to claim 7, characterized in that, The third characteristic parameter includes a first time interval from the moment of the turn-off trigger pulse to the moment when the cathode current crosses zero, and the value of the turn-off current; The active shutdown objective function is: △t is the first time interval, and I1 is the value of the turn-off current.
9. The modeling method according to claim 1, characterized in that, The operating state includes the on state; The acquisition of characteristic parameters corresponding to the operating state of the semiconductor device under simulation conditions includes: Obtain the fourth characteristic parameter corresponding to the conduction state of the semiconductor device under simulation conditions.
10. The modeling method according to claim 1, characterized in that, The operating states include the on state, the blocking state, the active off state, and the reverse recovery state. The construction of the target simulation model of the semiconductor device based on the target parameters includes: Based on the fourth characteristic parameter of the conduction state, the blocking target parameter of the blocking state, the reverse recovery target parameter of the reverse recovery state, and the active shutdown target parameter of the active shutdown state, a target simulation model of the semiconductor device is constructed. The fourth characteristic parameter of the conduction state is the target parameter of the conduction state.