Plasmonic-enhanced phototransistor structure, detection array and photodetection method

Abstract

The application provides a kind of plasmonic enhancement phototransistor structure, detection array and photoelectric detection method, the phototransistor structure includes thin film transistor and the Schottky photodiode with localized surface plasmon effect being arranged on the gate dielectric layer of thin film transistor;Wherein, photodiode includes receiving layer, first insulating layer, transparent gate electrode layer is formed on the first insulating layer and N super surface groove structure is formed in transparent gate electrode layer.The Schottky photodiode with localized surface plasmon effect is arranged on the gate dielectric layer of thin film transistor, can utilize the hot carrier generated by photodiode under localized surface plasmon effect to change the potential distribution in the channel layer of thin film transistor and gate voltage, to realize the exponential amplification of weak hot carrier signal generated by surface plasmon effect, effectively improve the sensitivity and signal-to-noise ratio of plasmonic photodetector.

Description

Technical Field

[0001] This invention relates to the field of photoelectric detection technology, and in particular to a plasmonic-enhanced phototransistor structure, a detection array, and a photoelectric detection method. Background Technology

[0002] Surface plasmons are electromagnetic oscillations generated by the interaction of incident photons with free electrons on the surface of a material. They can localize electromagnetic field energy in a region much smaller than the wavelength, thereby significantly enhancing the interaction between light and matter.

[0003] Photodetection based on hot carriers (hot electrons or hot holes) generated by surface plasmon decay is an important technological approach in recent years to overcome the bandgap limitation of semiconductors and achieve wide-spectrum (especially infrared) detection. Traditional plasmon hot carrier detectors typically employ a metal-semiconductor (Schottky) diode structure. However, existing plasmon photodetectors based on Schottky diode structures face significant challenges in practical applications, mainly in the following aspects: 1. Low photoelectric conversion efficiency: The generation, transmission and emission of hot carriers have large losses, and in reality, the number of carriers that can successfully cross the potential barrier and be collected is small, resulting in a low quantum efficiency of the device (less than 1%).

[0004] 2. Poor signal-to-noise ratio: Since the collected photocurrent signal is relatively weak, a high-precision external amplification circuit is required for reading. This not only increases the complexity of the system, but also easily introduces additional circuit noise, limiting the device's ability to detect weak light signals.

[0005] 3. Lack of internal gain mechanism: Traditional diode structures are merely passive collectors of charge carriers and cannot amplify signals in situ.

[0006] Therefore, how to retain the advantage of plasmonic detectors in breaking the bandgap limitation while effectively amplifying weak hot carrier signals to improve the sensitivity and signal-to-noise ratio of plasmonic detectors has become a technical problem that the industry urgently needs to solve. Summary of the Invention

[0007] In view of the above problems, the present invention provides a plasmonic-enhanced phototransistor structure, a detector array, and a photodetector method, which can effectively amplify weak hot carrier signals to improve the sensitivity and signal-to-noise ratio of the plasmonic detector, and is easy to integrate on a large scale to achieve high-density, low-power, and fast-response photodetector.

[0008] According to a first aspect of the present invention, a plasmonic-enhanced phototransistor structure is provided, comprising: Thin-film transistor, the thin-film transistor comprising a substrate layer and a channel layer, a source / drain electrode layer, a gate dielectric layer, and a transparent gate electrode layer sequentially formed on the substrate layer; and A photodiode is disposed on the gate dielectric layer; the photodiode exhibits localized surface plasmon resonance (FSPR) effect; wherein, the photodiode comprises: A receiving layer is formed on the gate dielectric layer and is in contact with the gate dielectric layer; A first insulating layer is formed on the receiving layer, and N first grooves are provided in the first insulating layer, each first groove penetrating the first insulating layer; the N first grooves are distributed in an array on the receiving layer; The transparent gate electrode layer is formed on the first insulating layer and fills the N first grooves; the thickness of the transparent gate electrode layer filling each first groove is less than the depth of the corresponding first groove, so as to form N second grooves in the transparent gate electrode layer, the N second grooves being metasurface groove structures; and the transparent gate electrode layer in each first groove forms a Schottky contact with the receiving layer; where N is a positive integer.

[0009] Optionally, the metasurface groove structure is parallel to the cross-section of the channel layer and has a planar geometric shape or a periodic array pattern.

[0010] Optionally, the photodiode further includes a reflective layer formed between the receiving layer and the gate dielectric layer.

[0011] Optionally, the reflective layer is a metallic reflective layer or a Bragg reflective stack.

[0012] Optionally, the material of the receiving layer is at least one or a combination of elemental semiconductor materials, oxide semiconductor materials, compound semiconductor materials, two-dimensional materials, and organic semiconductor materials.

[0013] Optionally, the material of the first insulating layer is at least one or a combination of SiO2, Si3N4, Al2O3, HfO2, ZrO2, Ta2O5, and Y2O3.

[0014] Optionally, the material of the transparent gate electrode layer is a transparent conductive material; the transparent conductive material includes at least one or a combination of transparent conductive oxide materials, thin-layer nanomaterials, and conductive polymer materials.

[0015] Optionally, a second insulating layer is further included between the substrate layer and the channel layer; the material of the second insulating layer is at least one or a combination of SiO2, Si3N4, Al2O3, HfO2, ZrO2, Ta2O5, and Y2O3.

[0016] According to a second aspect of the present invention, a detection array is also provided, the detection array comprising M plasmon-enhanced phototransistor structures as described in the first aspect above, wherein M≥2, all plasmon-enhanced phototransistor structures are connected along the X direction, Y direction or X / Y direction of a two-dimensional plane to form an array of plasmon-enhanced phototransistor structures in m rows and n columns, wherein m and n are positive integers; the source of the plasmon-enhanced phototransistor structure in each row is connected in series with the drain of the adjacent plasmon-enhanced phototransistor structure to form a row of bit signal lines; the gates of all plasmon-enhanced phototransistor structures in each column are connected in series to form a column of word signal lines.

[0017] According to a third aspect of the present invention, a photoelectric detection method is also provided, which uses a detection array as described in the second aspect above for photoelectric detection, comprising: A first voltage is applied to all word signal lines in the detector array under background light illumination to turn on and keep all plasmon-enhanced phototransistor structures in the detector array in the on state. A second voltage is applied to all bit signal lines in the probe array to generate source-drain current in each row of bit signal lines; A third voltage is applied to the word signal line corresponding to the plasmon-enhanced phototransistor structure to be selected in the detection array, so that the plasmon-enhanced phototransistor structure to be selected is in the subthreshold operating region, and the source-drain current value in the bit signal line corresponding to the plasmon-enhanced phototransistor structure to be selected is read as the first current value. Under the illumination of the probe light, the source and drain current values ​​in the corresponding bit signal lines of the plasmon-enhanced phototransistor structure to be selected are read as the second current value. The difference between the first current value and the second current value is calculated to obtain the photodetector signal of the desired gating plasmon-enhanced phototransistor structure.

[0018] The plasmon-enhanced phototransistor structure provided by this invention includes a thin-film transistor (TFT). The TFT includes a substrate layer and a channel layer, a source / drain electrode layer, a gate dielectric layer, and a transparent gate electrode layer sequentially formed thereon. A Schottky photodiode exhibiting a localized surface plasmon resonance (SPR) effect is further disposed on the gate dielectric layer of the TFT. The photodiode includes a receiving layer and a first insulating layer. The transparent gate electrode layer is formed on the first insulating layer and has N metasurface groove structures. By disposing a Schottky photodiode with a localized surface plasmon resonance effect on the gate dielectric layer of the TFT, the hot carriers generated by the photodiode under the localized surface plasmon resonance effect can be used to change the potential distribution and gate voltage in the channel layer of the TFT, thereby achieving exponential amplification of the weak hot carrier signal generated by the surface plasmon resonance effect, effectively improving the sensitivity and signal-to-noise ratio of the plasmon photodetector. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a top view schematic diagram of a plasmonic-enhanced phototransistor structure provided in an embodiment of the present invention; Figure 2 , Figure 3 It corresponds Figure 1 A schematic diagram of the cross-sectional structure of a plasmon-enhanced phototransistor with section A-A'. Figure 4 This is an example set of cross-sectional patterns of the metasurface groove structure array parallel to the channel layer of the plasmon-enhanced phototransistor structure provided in the embodiments of the present invention; Figure 5 This is a schematic diagram of a plasmonic enhanced phototransistor structure including a reflective layer provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of a plasmonic enhanced phototransistor structure including a second insulating layer provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of the equivalent circuit of a detection array provided in an embodiment of the present invention; Figure 8 This is a top view schematic diagram of the detection array provided in an embodiment of the present invention; Figure 9 This is a schematic flowchart of a photoelectric detection method provided in an embodiment of the present invention.

[0021] Explanation of reference numerals in the attached figures: 101 - Substrate layer; 102 - Channel layer; 103 - Gate dielectric layer; 1041 - Source electrode layer; 1042 - Drain electrode layer; 105 - Transparent gate electrode layer; 106 - Second insulating layer; 20 - Photodiode; 201 - Receiver Layer; 202 - First insulating layer; 203 - First groove; 204 - Second groove; 205 - Reflective layer. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0024] As described in the background section, existing plasmonic photodetectors based on Schottky diode structures face significant challenges in practical applications, including low photoelectric conversion efficiency, poor signal-to-noise ratio, and lack of internal gain mechanisms.

[0025] In view of this, the present invention provides a plasmonic enhancement phototransistor structure, including a thin-film transistor (TFT). The TFT includes a substrate layer and a channel layer, a source / drain electrode layer, a gate dielectric layer, and a transparent gate electrode layer sequentially formed thereon. A Schottky photodiode with localized surface plasmon resonance (SPR) effect is further disposed on the gate dielectric layer of the TFT. The photodiode includes a receiving layer and a first insulating layer. The transparent gate electrode layer is formed on the first insulating layer and has N metasurface groove structures. By disposing a Schottky photodiode with localized surface plasmon resonance (SPR) effect on the gate dielectric layer of the TFT, the hot carriers generated by the Schottky photodiode under the localized surface plasmon resonance effect can be used to change the potential distribution in the channel layer of the TFT, thereby controlling the gate voltage of the TFT. This converts the optical signal in situ into the gate voltage signal of the TFT, achieving exponential amplification of the weak hot carrier signal generated by the surface plasmon resonance effect, and effectively improving the sensitivity and signal-to-noise ratio of the plasmonic photodetector.

[0026] Please refer to Figures 1-3 The plasmon-enhanced phototransistor structure provided in one embodiment of the present invention includes: A thin-film transistor includes a substrate 101 and a channel layer 102, a source electrode layer 1041, a drain electrode layer 1042, a gate dielectric layer 103, and a transparent gate electrode layer 105 sequentially formed on the substrate 101.

[0027] In one specific implementation, the substrate 101 can be made of, for example, single-crystal silicon or single-crystal germanium. In a preferred embodiment, the substrate 101 can be made of, for example, intrinsic silicon or germanium, or high-resistivity silicon or germanium, to effectively reduce the parasitic leakage current of the substrate and improve the detection sensitivity of the plasmon-enhanced phototransistor structure. Of course, this invention is not limited to these methods; other types of substrate materials, such as silicon carbide and gallium nitride, are also within the scope of this invention.

[0028] As an example, the material of the channel layer 102 can be, for example, an elemental semiconductor material, such as single-crystal, polycrystalline, or amorphous Si or Ge; an alloy semiconductor material, such as SiGe, AlGaAs, AlInAs, GaAsP, GaInP, GaInAs, and GaInAsP; a compound semiconductor material, such as SiC, GaN, GaAs, GaP, InP, and InAs; or a two-dimensional semiconductor, such as MoS2 or graphene. Of course, this invention is not limited to these types of materials; other types of channel layer 102 materials, such as oxide semiconductor materials, organic semiconductor materials, or combinations thereof, are also within the scope of protection of this invention.

[0029] As an example, the material of the gate dielectric layer 103 may be an oxide or nitride composed of at least one of the elements Si, Al, Hf, Zr, Ba, Ti, Ta, and Y. Of course, this invention is not limited thereto, and other types of oxide or nitride gate dielectric layer materials are also within the scope of protection of this invention.

[0030] As a specific implementation, the source electrode layer 1041 and the drain electrode layer 1042 can be made of a single metal material, such as Mg, Al, Ti, Mn, Ni, Cu, Zn, Ga, Zr, Nb, Mo, Pd, Ag, In, Sn, Ta, W, Pt, Au, Co, etc.; or binary or multi-element alloy materials, oxides and nitrides of the above metals.

[0031] As one specific implementation, the material of the transparent gate electrode layer 105 can be, for example, a transparent conductive material; the transparent conductive material may include at least one or a combination of transparent conductive oxide materials, thin-layer nanomaterials, and conductive polymer materials. Of course, the present invention is not limited thereto, and other types of materials for the transparent gate electrode layer 105 are also within the scope of protection of the present invention.

[0032] In a preferred embodiment, a second insulating layer 106 is further included between the substrate layer 101 and the channel layer 102, such as... Figure 6 As shown. The material of the second insulating layer 106 can be at least one or a combination of SiO2, Si3N4, Al2O3, HfO2, ZrO2, Ta2O5, and Y2O3. By providing the second insulating layer 106 between the substrate layer 101 and the channel layer 102, the parasitic leakage current channel between the channel layer 102 and the substrate layer 101 can be effectively isolated, thereby effectively reducing the parasitic leakage current of the substrate and improving the detection sensitivity of the plasmonic enhancement phototransistor structure. At the same time, because of the isolation effect of the second insulating layer 106 on parasitic leakage current, the requirements of the substrate layer for the plasmonic enhancement phototransistor structure can be relatively reduced. It is not necessary to use an intrinsic substrate or a high-resistivity substrate to achieve good leakage current suppression, thereby effectively reducing the fabrication cost of the plasmonic enhancement phototransistor structure.

[0033] A photodiode 20 exhibiting localized surface plasmon resonance (FSRP) effect is further disposed above the gate dielectric layer 103 of the thin-film transistor. The photodiode 20 includes: The receiving layer 201 is formed on the gate dielectric layer 103 and is in contact with the gate dielectric layer 103.

[0034] In one specific implementation, the material of the receiving layer 201 may be at least one or a combination of elemental semiconductor materials, oxide semiconductor materials, compound semiconductor materials, two-dimensional semiconductor materials, and organic semiconductor materials.

[0035] The first insulating layer 202 is formed on the receiving layer 201, and N first grooves 203 are provided in the first insulating layer 202, each of the first grooves 203 penetrating the first insulating layer 202; the N first grooves are distributed in an array on the receiving layer 201.

[0036] As a specific implementation method, for example... Figure 2 As shown, N equals 3. Three first grooves 203 are provided in the first insulating layer 202. Each first groove 203 penetrates the first insulating layer 202, and the bottom of the first groove 203 stops at the upper surface of the receiving layer 201.

[0037] As an example, the material of the first insulating layer 202 may be at least one or a combination of SiO2, Si3N4, Al2O3, HfO2, ZrO2, Ta2O5, and Y2O3.

[0038] A transparent gate electrode layer 105 is formed on the first insulating layer 202 and fills N first grooves 203. The thickness of the transparent gate electrode layer 105 filling each first groove 203 is less than the depth of the corresponding first groove 203, so as to form N second grooves 204 in the transparent gate electrode layer 105. The N second grooves 204 are metasurface groove structures. Each transparent gate electrode layer 105 in each first groove 203 forms a Schottky contact with the receiving layer 201. N is a positive integer. The receiving layer 201, the first insulating layer 202, and the second grooves 204 together constitute a Schottky photodiode with localized surface plasmon resonance (LSPR). The first insulating layer 202 separates the metasurface groove structures, thereby preventing the failure to generate LPR when the metasurface groove structures are connected together.

[0039] As a specific implementation method, for example... Figure 2 As shown, N equals 3, and the transparent gate electrode layer 105 fills each first groove 203 to form three second grooves 204 in the transparent gate electrode layer 105. Each second groove 204 is a metasurface groove structure; and the transparent gate electrode layer 105 at the bottom of each first groove 203 forms a Schottky contact with the receiving layer 201.

[0040] In one specific implementation, the cross-section of the second groove 204 parallel to the channel layer 102 is a planar geometric shape or a periodic array pattern; wherein, the planar geometric shape can be, for example, a circle, square, rectangle, cross, double ellipse, etc.; the periodic array pattern can be, for example, a grating array pattern, etc. As an example, an example diagram of the cross-sectional pattern of the second groove 204 parallel to the channel layer 102 is shown below. Figure 4As shown. Of course, the present invention is not limited thereto, and other types of second grooves 204 that can generate surface plasmon resonance effects and have cross-sectional patterns parallel to the channel layer 102 are also within the scope of protection of the present invention.

[0041] As a specific implementation, the second groove 204 can control the surface plasmon resonance response by adjusting the size, depth, distribution period, duty cycle, and material carrier concentration of the groove.

[0042] By setting an array of N intermittent, non-connected metasurface groove structures (nanoscale) on the surface of the receiving layer, when incident light waves irradiate the array of metasurface groove structures: The alternating electric field of the incident light acts on the free carriers (electrons or holes) in the metasurface groove structure, causing them to deviate from their equilibrium positions and form collective coherent oscillations. Since the metasurface groove structure is a discrete, discontinuous nanoscale unit, the electron oscillations are strongly constrained by the structural boundaries and cannot propagate, but are confined to the interior of the metasurface groove structure and the near-field region. When the frequency of the incident light matches the oscillation frequency (incident light frequency = collective oscillation frequency of free carriers on the surface of the metasurface groove structure), localized surface plasmon resonance (LSPR) is excited. Subsequently, when the plasmons undergo Landau damping or electron scattering through the nonradiative relaxation channel, they directly convert the resonance energy into high-energy electrons or holes, i.e., high-energy hot carriers. If the energy of the high-energy hot carriers is higher than the Schottky barrier height of the second groove-receiver layer interface, they can overcome the Schottky barrier of the second groove-receiver layer interface and be injected into the receiver layer, forming a photocurrent.

[0043] In one specific implementation, for example, the channel layer of the thin-film transistor is a depletion-type N-type channel, and the hot carrier type generated by the local surface plasmon resonance effect in the photodiode is hot electron type. When the thin-film transistor is working, a zero bias voltage or a small negative bias voltage is applied to the transparent gate electrode layer, so that the thin-film transistor is in the on or subthreshold on state. After illumination, the metasurface groove structure generates a local surface plasmon resonance effect and generates hot electrons. The hot electrons cross the Schottky barrier at the interface of the metasurface groove structure and the receiving layer, reach the receiving layer, and form a thermal current, thereby changing the potential of the channel layer of the thin-film transistor, which is equivalent to reducing the gate voltage of the thin-film transistor, turning off the channel layer, and causing the source drain current to decrease exponentially. Thus, by measuring the change in the source drain current, the intensity of the incident light can be detected. This realizes the in-situ conversion of the optical signal into the gate voltage signal of the thin-film transistor. The weak hot carrier signal generated by the surface plasmon resonance effect can be exponentially amplified without the introduction of an external amplification circuit, thereby effectively improving the sensitivity and signal-to-noise ratio of the plasmonic photodetector.

[0044] Meanwhile, the plasmonic enhancement phototransistor structure provided by the present invention does not require the introduction of additional materials to form metasurface units. Instead, it can form metasurface units (metasurface groove structures) using the transparent gate electrode layer of thin-film transistors. After forming Schottky contacts with the receiving layer, it constitutes a Schottky photodiode, thereby effectively simplifying the fabrication process of plasmonic enhancement phototransistors and reducing the manufacturing cost.

[0045] Of course, this invention is not limited thereto. The detection method of the plasmon-enhanced phototransistor structure can be flexibly adjusted according to the different types of hot carriers and channel layers generated by the local surface plasmon effect of the photodiode, as well as the type of thin film transistor operating state changed by the hot carriers. For example, the channel layer of the thin film transistor is an enhancement-type N-channel, and the type of hot carriers generated by the local surface plasmon effect of the photodiode is hot electron type. When the thin film transistor is working, a positive bias voltage or a small positive bias voltage is applied to the transparent gate electrode layer, so that the thin film transistor is in the on or subthreshold on state. After illumination, the hot electrons generated by the photodiode cause the thin film transistor to enter the subthreshold state or the off state. Or, for example, the channel layer of the thin film transistor is a P-type channel, and the type of hot carriers generated by the local surface plasmon effect of the photodiode is hot hole type, and other combinations of detection methods are also within the protection scope of this invention.

[0046] As a preferred embodiment, for example, Figure 3 As shown, the first groove 203 penetrates the first insulating layer 202 and extends into the receiving layer 201. The second groove 204 formed by the transparent gate electrode layer 105 filling the first groove 202 also extends into the receiving layer 201. The bottom of each second groove 204 and part of the sidewall of the transparent gate electrode layer 105 form a Schottky contact with the receiving layer.

[0047] In a preferred embodiment, by increasing the depth of the first groove, both the first groove and the second groove extend into the receiving layer, thereby effectively increasing the Schottky contact area between the second groove and the receiving layer, increasing the number of charge carriers, and further improving the sensitivity of the plasmonic photodetector.

[0048] In a preferred embodiment, the photodiode 20 further includes a reflective layer 205, such as... Figure 5 As shown, the reflective layer 205 is formed between the receiving layer 201 and the gate dielectric layer 103.

[0049] In a preferred embodiment, by providing a reflective layer 205 between the receiving layer 201 and the gate dielectric layer 103, the incident light can be reflected back to the second groove, further enhancing the local surface plasmon effect of the second groove, increasing the concentration of hot carriers, and thus effectively improving the sensitivity of the plasmon photodetector.

[0050] In one specific implementation, the reflective layer 205 can be, for example, a metal reflective layer or a Bragg reflective stack. The metal reflective layer can be, for example, a high-reflectivity elemental metal reflective layer, such as an Al or Ag reflective layer, or a high-reflectivity alloy reflective layer, such as an AlCu or AgAu reflective layer; the Bragg reflective stack can be, for example, a stack of Si3N4 / SiO2 or SiO2 / Si3N4 / SiO2 materials. Of course, the present invention is not limited to these, and other types of reflective layers are also within the scope of protection of the present invention.

[0051] According to an embodiment of the present invention, a detection array is also provided, comprising M plasmonic enhancement phototransistor structures as described in the first aspect of the present invention, wherein M≥2, all plasmonic enhancement phototransistor structures are connected along the X direction, Y direction or X / Y direction of a two-dimensional plane to form an array of m rows and n columns of plasmonic enhancement phototransistor structures, wherein m and n are positive integers; the source of each plasmonic enhancement phototransistor structure in each row is connected in series with the drain of the adjacent plasmonic enhancement phototransistor structure to form a row of bit signal lines; the gates of all plasmonic enhancement phototransistor structures in each column are connected in series to form a column of word signal lines.

[0052] As a specific implementation method, such as Figure 7 , Figure 8 As shown, the detection array consists of M plasmonic-enhanced phototransistor structures as described in the first aspect of this invention, connected in series along the X / Y direction of a two-dimensional plane, forming an array of m rows and n columns of plasmonic-enhanced phototransistor structures, where m and n are positive integers. The direction of the rows is parallel to the channel direction of the phototransistors, and the direction of the columns is perpendicular to the channel direction of the phototransistors. The source of each plasmonic-enhanced phototransistor structure in each row is connected in series with the drain of the adjacent plasmonic-enhanced phototransistor structure, forming a row of bit signal lines. The source of the phototransistor at the end of each row of bit signal lines is grounded. The gates of all plasmonic-enhanced phototransistor structures in each column are connected in series, forming a column of word signal lines. This achieves large-scale integration of plasmonic-enhanced phototransistor structures to meet the requirements of high-density, low-power, and fast-response photoelectric detection and imaging.

[0053] According to an embodiment of the present invention, a photoelectric detection method is also provided, which uses a detection array as described in the second aspect of the present invention for photoelectric detection, such as... Figure 9 As shown, the photoelectric detection method may include: S1: Apply a first voltage to all word signal lines in the detector array under background light illumination to turn on and keep all plasmon-enhanced phototransistor structures in the detector array on.

[0054] As a specific implementation, for example, the channel type of the thin film transistor is a depletion-type N-channel, and the hot carrier type generated by the photodiode due to the local surface plasmon effect is hot electron type. The first voltage value is a positive bias voltage, and the first voltage value is greater than the threshold voltage value of the thin film transistor to ensure that all plasmon-enhanced phototransistor structures in the detection array are turned on and remain in the on state. Due to the application of the positive bias voltage, most of the hot electrons generated by the photodiode under the background light are absorbed by the transparent electrode of the thin film transistor and are difficult to reach the receiving layer, thereby shielding the interference of the surface plasmon effect on the non-gated unit.

[0055] S2: Apply a second voltage to all bit signal lines in the probe array to generate source-drain current in each row bit signal line.

[0056] In one specific implementation, the second voltage is, for example, less than the difference between the first voltage and the thin-film transistor threshold voltage, which causes the plasmon-enhanced phototransistor structure in the detector array to operate in the linear region.

[0057] S3: Apply a third voltage to the word signal line corresponding to the plasmon-enhanced phototransistor structure to be selected in the detector array, so that the plasmon-enhanced phototransistor structure to be selected is in the subthreshold operating region, and read the source-drain current value in the bit signal line corresponding to the plasmon-enhanced phototransistor structure to be selected as the first current value.

[0058] In one specific implementation, the third voltage is, for example, zero bias or a small negative bias, so that the desired gating plasmon-enhanced phototransistor structure is in the subthreshold operating region.

[0059] S4: Under the illumination of the probe light, read the source and drain current values ​​in the corresponding bit signal lines of the plasmon-enhanced phototransistor structure to be selected as the second current value.

[0060] In one specific implementation, under the illumination of the probe light, a localized surface plasmon effect is generated in the second groove of the desired plasmon-enhanced phototransistor structure, and hot electrons are generated. The hot electrons cross the Schottky barrier at the interface between the second groove and the receiving layer, reach the receiving layer, and form a thermal current, thereby changing the potential of the corresponding thin-film transistor channel layer, causing the channel layer to turn off, and thus the source and drain current of the bit signal line corresponding to the desired plasmon-enhanced phototransistor structure decreases exponentially.

[0061] S5: Calculate the difference between the first current value and the second current value to obtain the photodetector signal of the desired gating plasmon-enhanced phototransistor structure.

[0062] As an example, calculating the difference between the first current value and the second current value can be done by calculating the difference or ratio between the first current and the second current. Of course, this invention is not limited to this, and other methods for calculating the difference between the first current value and the second current value are also within the scope of this invention.

[0063] Those skilled in the art will understand that the embodiments provided by the present invention can be provided as methods, apparatus, or electronic devices. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects.

[0064] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A plasmonic-enhanced phototransistor structure, characterized in that, include: A thin-film transistor, the thin-film transistor comprising a substrate layer and a channel layer, a source / drain electrode layer, a gate dielectric layer and a transparent gate electrode layer sequentially formed on the substrate layer; as well as A photodiode is disposed on the gate dielectric layer; The photodiode exhibits a localized surface plasmon resonance effect; wherein, the photodiode comprises: A receiving layer is formed on the gate dielectric layer and is in contact with the gate dielectric layer; A first insulating layer is formed on the receiving layer, and N first grooves are provided in the first insulating layer, each first groove penetrating the first insulating layer; the N first grooves are distributed in an array on the receiving layer; The transparent gate electrode layer is formed on the first insulating layer and fills the N first grooves; the thickness of the transparent gate electrode layer filling each first groove is less than the depth of the corresponding first groove, so as to form N second grooves in the transparent gate electrode layer, the N second grooves being metasurface groove structures; and the transparent gate electrode layer in each first groove forms a Schottky contact with the receiving layer; where N is a positive integer.

2. The plasmon-enhanced phototransistor structure according to claim 1, characterized in that, The metasurface groove structure is parallel to the cross-section of the channel layer and has a planar geometric shape or a periodic array pattern.

3. The plasmon-enhanced phototransistor structure according to claim 1, characterized in that, The photodiode further includes a reflective layer formed between the receiving layer and the gate dielectric layer.

4. The plasmon-enhanced phototransistor structure according to claim 3, characterized in that, The reflective layer is a metallic reflective layer or a Bragg reflective stack.

5. The plasmon-enhanced phototransistor structure according to claim 1, characterized in that, The material of the receiving layer is at least one or a combination of elemental semiconductor materials, oxide semiconductor materials, compound semiconductor materials, two-dimensional materials, and organic semiconductor materials.

6. The plasmon-enhanced phototransistor structure according to claim 1, characterized in that, The material of the first insulating layer is at least one or a combination of SiO2, Si3N4, Al2O3, HfO2, ZrO2, Ta2O5, and Y2O3.

7. The plasmon-enhanced phototransistor structure according to claim 1, characterized in that, The material of the transparent gate electrode layer is a transparent conductive material; the transparent conductive material includes at least one or a combination of transparent conductive oxide materials, thin-layer nanomaterials, and conductive polymer materials.

8. The plasmon-enhanced phototransistor structure according to claim 1, characterized in that, The substrate layer and the channel layer further include a second insulating layer; the material of the second insulating layer is at least one or a combination of SiO2, Si3N4, Al2O3, HfO2, ZrO2, Ta2O5, and Y2O3.

9. A detection array, characterized in that, The detection array includes M plasmonic-enhanced phototransistor structures as described in any one of claims 1 to 8, wherein M ≥ 2, and all plasmonic-enhanced phototransistor structures are connected along the X direction, Y direction, or X / Y direction of a two-dimensional plane to form an array of plasmonic-enhanced phototransistor structures in m rows and n columns, where m and n are positive integers; the source of each plasmonic-enhanced phototransistor structure in each row is connected in series with the drain of the adjacent plasmonic-enhanced phototransistor structure to form a row of bit signal lines; the gates of all plasmonic-enhanced phototransistor structures in each column are connected in series to form a column of word signal lines.

10. A photoelectric detection method, characterized in that, Photoelectric detection using the detector array as described in claim 9 includes: A first voltage is applied to all word signal lines in the detector array under background light illumination to turn on and keep all plasmon-enhanced phototransistor structures in the detector array in the on state. A second voltage is applied to all bit signal lines in the probe array to generate source-drain current in each row of bit signal lines; A third voltage is applied to the word signal line corresponding to the plasmon-enhanced phototransistor structure to be selected in the detection array, so that the plasmon-enhanced phototransistor structure to be selected is in the subthreshold operating region, and the source-drain current value in the bit signal line corresponding to the plasmon-enhanced phototransistor structure to be selected is read as the first current value. Under the illumination of the probe light, the source and drain current values ​​in the corresponding bit signal lines of the plasmon-enhanced phototransistor structure to be selected are read as the second current value. The difference between the first current value and the second current value is calculated to obtain the photodetector signal of the desired gating plasmon-enhanced phototransistor structure.

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