Flyback converter and control circuit and control method thereof

Abstract

The application provides a flyback converter and a control circuit and a control method thereof. In a DCM mode, by adjusting the driving signals of the first switch tube and the second switch tube in the flyback converter, the driving signals of the first switch tube and the second switch tube each include at least two pulses in each switching cycle, so that the first switch tube and the second switch tube are turned on at least once additionally in each switching cycle. The application can ensure that the system can realize zero-voltage turn-on of the main switch tube under light load, reduce turn-on loss, and is also conducive to reducing the rectification stress of the secondary side.

Description

Technical Field

[0001] This application relates to the field of electronic technology, specifically to a flyback converter and its control circuit and control method. Background Technology

[0002] With the rapid development of power electronics, switching converters are being used more and more widely, especially with increasing demands for high power density, high reliability, and small size. Traditional low-power switching converters typically employ flyback topologies, which offer advantages such as simple structure and low cost. Currently, common flyback converters include the asymmetric half-bridge converter (AHB) and the active clamp flyback converter (ACF).

[0003] The asymmetric half-bridge converter (AHB) has the added advantage of isolation, and can achieve zero-voltage switching (ZVS) of the two switches while having a similar number and complexity of components as a conventional flyback converter. It can also recover leakage inductance energy and easily achieve self-driven synchronous rectification, effectively improving efficiency while reducing transformer size. Figure 1a and 1b A schematic diagram of a conventional asymmetric half-bridge flyback converter is shown, such as... Figure 1a and 1b As shown, the asymmetric half-bridge flyback converter includes: a transformer TR containing a primary winding Np and a secondary winding Ns, switching transistors Q1 and Q2, a resonant capacitor Cr, a rectifier diode D1, an output capacitor Co, and a control circuit (not shown). Figure 1a The upper switch Q2 is the second switch, also known as the auxiliary switch, and the lower switch Q1 is the first switch, also known as the main switch. Figure 1b The upper switch Q1 is the first switch, also known as the main switch, and the lower switch Q2 is the second switch, also known as the auxiliary switch. The two circuits work on the same principle, only the winding positions are different.

[0004] Active clamp flyback converters (ACFs) achieve zero-voltage turn-on of the primary-side power transistor and zero-current turn-off of the secondary-side rectifier diodes across the entire load range, thus achieving higher efficiency, lower EMI, higher operating frequency, and a wider input range. The active clamp flyback converter evolved from the traditional flyback converter. By replacing the passive clamping circuit in the traditional flyback converter with a clamping switch Q2 and a clamping capacitor C1, the active clamp flyback converter is obtained, as shown below. Figure 1c As shown.

[0005] The flyback converters described above typically operate in a complementary state between the two switches under heavy loads, while under light loads, they generally reduce the switching frequency to decrease conduction losses, thus entering discontinuous conduction mode (DCM mode). Typically, DCM mode incurs additional turn-on losses, and these losses increase with higher switching frequencies. Summary of the Invention

[0006] In view of the above-mentioned technical problems, the purpose of this application is to provide a flyback converter and its control circuit and control method, wherein the drive signals of the first and second switching transistors in the flyback converter are adjusted to control the first and second switching transistors to be turned on at least once in each switching cycle in the discontinuous conduction mode (DCM mode) and at least once in each hiccup cycle in the hiccup mode, so as to ensure that the system can achieve zero-voltage turn-on of the main switching transistor in the whole range, reduce turn-on losses, and also help to reduce the SR (Synchronous Rectification) stress on the secondary side.

[0007] According to a first aspect of this application, a control method for a flyback converter is provided, the flyback converter comprising: a first switch and a second switch connected in series between an input voltage terminal and a reference ground, and a resonant capacitor.

[0008] The control method includes:

[0009] A first drive signal is generated to drive the first switching transistor;

[0010] A second drive signal is generated to drive the second switching transistor;

[0011] When the flyback converter operates in discontinuous conduction mode, in each switching cycle, the first drive signal includes an inductor energy storage pulse and a capacitor energy storage pulse following the inductor energy storage pulse, and the second drive signal includes a freewheeling pulse, at least one precharge pulse following the freewheeling pulse, and a zero-voltage turn-on pulse following the at least one precharge pulse.

[0012] Optionally, when the flyback converter operates in hiccup mode, the flyback converter uses M switching cycles as one hiccup cycle, where M is an integer greater than 1;

[0013] In each hiccup cycle, the first drive signal includes M inductor energy storage pulses and a capacitor energy storage pulse following the Mth inductor energy storage pulse, and the second drive signal includes M freewheeling pulses, at least one precharge pulse following the Mth freewheeling pulse, and a zero-voltage turn-on pulse following the at least one precharge pulse.

[0014] Optionally, the conduction time of the capacitor energy storage pulse is shorter than the conduction time of the inductor energy storage pulse.

[0015] Optionally, the conduction time of the zero-voltage turn-on pulse is shorter than the conduction time of the freewheeling pulse.

[0016] Optionally, the control method further includes:

[0017] In each cycle, a first pause time is set after the end of the capacitor energy storage pulse, and the at least one pre-charge pulse is started after the first pause time.

[0018] Optionally, when the flyback converter switches from intermittent conduction mode to hiccup mode, the control method further includes performing at least one of the following:

[0019] Reduce the first pause time;

[0020] Increase M;

[0021] The peak current of the excitation current of the flyback converter is increased, and the flyback converter determines the end time of the inductor energy storage pulse based on the peak current.

[0022] Optionally, the flyback converter includes: an asymmetric half-bridge flyback converter or an active clamp flyback converter.

[0023] According to a second aspect of this application, a control circuit for a flyback converter is provided. The flyback converter includes: a first switch and a second switch connected in series between an input voltage terminal and a reference ground, and a resonant capacitor. The control circuit is used to generate a first drive signal and a second drive signal to drive the first switch and the second switch, respectively.

[0024] When the flyback converter operates in discontinuous conduction mode, the first drive signal generated by the control circuit includes an inductor energy storage pulse and a capacitor energy storage pulse following the inductor energy storage pulse. The second drive signal generated by the control circuit includes a freewheeling pulse, at least one precharge pulse following the freewheeling pulse, and a zero-voltage turn-on pulse following the at least one precharge pulse.

[0025] Optionally, when the flyback converter operates in hiccup mode, the flyback converter uses M switching cycles as one hiccup cycle, where M is an integer greater than 1;

[0026] In each hiccup cycle, the first drive signal includes M inductor energy storage pulses and a capacitor energy storage pulse following the Mth inductor energy storage pulse, and the second drive signal includes M freewheeling pulses, at least one precharge pulse following the Mth freewheeling pulse, and a zero-voltage turn-on pulse following the at least one precharge pulse.

[0027] Optionally, the conduction time of the capacitor energy storage pulse is less than the conduction time of the inductor energy storage pulse.

[0028] Optionally, the conduction time of the zero-voltage turn-on pulse is shorter than the conduction time of the freewheeling pulse.

[0029] According to a third aspect of this application, a flyback converter is provided, comprising:

[0030] transformer;

[0031] The first and second switching transistors are connected in series between the input voltage terminal and the reference ground;

[0032] A resonant capacitor is used to form a resonant circuit of the flyback converter with the leakage inductance of the transformer when the second switch is turned on.

[0033] And, as disclosed in any embodiment of this application, the control circuit.

[0034] The beneficial effects of this application include at least the following:

[0035] The flyback converter and its control circuit and method provided in this application adjust the drive signals of the first and second switching transistors in the flyback converter so that, in DCM mode, the drive signal of the first switching transistor includes at least two turn-on pulses in each switching cycle (e.g., including an inductor energy storage pulse and a capacitor energy storage pulse following the inductor energy storage pulse), and the drive signal of the second switching transistor includes at least three turn-on pulses in each switching cycle (e.g., including a freewheeling pulse, at least one pre-charge pulse following the freewheeling pulse, and a zero-voltage turn-on pulse following at least one pre-charge pulse). This allows the first switching transistor to be turned on at least once additionally in each switching cycle, and the second switching transistor to be turned on at least twice additionally in each switching cycle. This ensures that the system can also achieve zero-voltage turn-on of the main switching transistor (i.e., the first switching transistor) under light load, reducing turn-on losses and also helping to reduce the rectifier stress on the secondary side of the system.

[0036] In a further preferred embodiment, by adjusting the drive signals of the first and second switches in the flyback converter, in hiccup mode, the drive signal of the first switch includes at least one additional turn-on pulse in each hiccup cycle (one hiccup cycle includes M switching cycles, where M is an integer greater than 1). (For example, in each hiccup cycle, the first drive signal of the first switch includes M inductor energy storage pulses and a capacitor energy storage pulse following the Mth inductor energy storage pulse). The drive signal of the second switch includes at least two additional turn-on pulses in each hiccup cycle. For example, the second drive signal of the second switch includes not only M freewheeling pulses, but also at least one precharge pulse after the Mth freewheeling pulse and a zero-voltage turn-on pulse after the at least one precharge pulse. This allows the first and second switches to be turned on at least once more in each hiccup cycle, ensuring that the system can achieve zero-voltage turn-on of the main switch (i.e., the first switch) even under heavy load, while increasing the system output power. This reduces turn-on losses and facilitates zero-voltage turn-on of the main switch across the entire load range.

[0037] It should be noted that the above general description and the following detailed description are merely exemplary and explanatory, and do not limit this application. Attached Figure Description

[0038] Figure 1a and 1b A schematic diagram of a conventional asymmetric half-bridge flyback converter is shown.

[0039] Figure 1c A schematic diagram of a conventional active clamp flyback converter is shown.

[0040] Figure 2 This diagram shows a structural block diagram of a flyback converter provided according to an embodiment of this application;

[0041] Figure 3 Show Figure 2 Schematic diagram of the control unit;

[0042] Figure 4 Show Figure 2 A schematic diagram of a timing waveform of some signals in a flyback converter;

[0043] Figure 5 Show Figure 2 Another time-series waveform diagram of some signals in a flyback converter;

[0044] Figure 6 A flowchart illustrating the control method for a flyback converter according to an embodiment of this application is shown. Detailed Implementation

[0045] The preferred embodiments of this disclosure are described in detail below with reference to the accompanying drawings, but this disclosure is not limited to these embodiments. This disclosure covers any alternatives, modifications, equivalent methods, and solutions made within the spirit and scope of this disclosure.

[0046] In order to provide the public with a thorough understanding of this disclosure, specific details are described in detail in the following preferred embodiments of this disclosure, but those skilled in the art can fully understand this disclosure without these details.

[0047] The present disclosure is described in more detail below by way of example with reference to the accompanying drawings. It should be noted that the drawings are in a simplified form and use non-precise scales, and are only used to facilitate and clarify the illustration of the embodiments of the present disclosure.

[0048] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application may be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of this application.

[0049] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0050] In the description of this application, words such as "exemplary" or "for example" are used to indicate that they are examples, illustrations, or descriptions. Any embodiment described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments. The term "and / or" in this document describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. "Multiple" refers to two or more. Furthermore, to facilitate a clear description of the technical solutions of the embodiments of this application, the terms "first," "second," etc., are used to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first," "second," etc., do not limit the quantity or execution order, and that "first," "second," etc., do not necessarily imply differences.

[0051] In addition, the same reference numerals in the figures indicate the same or similar structures, so repeated descriptions of them will be omitted. That is, the various parts in this specification are described in a combination of parallel and progressive manner. Each part focuses on the differences from other parts, and the same or similar parts between the various parts can be referred to each other.

[0052] Figure 2 A structural block diagram of the flyback converter provided in an embodiment of this application is shown. It should be noted that... Figure 2 The technical solution disclosed herein is merely an illustrative example of the asymmetric half-bridge flyback converter, but the technical solution disclosed herein can also be applied to other types of flyback converters, such as active clamp flyback converters.

[0053] exist Figure 2 In the illustrated embodiment, the flyback converter 100 includes: a transformer TR comprising a primary winding Np, a secondary winding Ns, and an auxiliary winding Na; a first switch Q1 (corresponding to the main switch in the flyback converter 100, hereinafter referred to as switch Q1); a second switch Q2 (corresponding to the auxiliary switch in the flyback converter, hereinafter referred to as switch Q2); a resonant capacitor Cr; a rectifier diode (such as a diode) D1; an output capacitor Co; and a control circuit 110. Figure 2 The transformer TR, switch Q1, switch Q2, and capacitor Cr in the flyback converter 100 shown are illustrated as follows: Figure 1b The structure is connected as shown in the diagram. However, it is understood that in other embodiments of this application, the transformer TR, switch Q1, switch Q2, and capacitor Cr can also be connected as shown in the diagram. Figure 1a or Figure 1c Connect the structures in the code.

[0054] Figure 2In this configuration, transistors Q1 and Q2 are connected in series between the input voltage terminal and the reference ground. The drain of transistor Q1 is connected to the input voltage Vin, and the gate of transistor Q1 is connected to the control circuit 110. The drain of transistor Q2 is connected to the source of transistor Q1, and the source of transistor Q2 is connected to the reference ground through a sampling resistor Rcs. The gate of transistor Q2 is connected to the control circuit 110. Capacitors C1 and C2 are the junction capacitances of transistors Q1 and Q2, respectively. During the same switching cycle, transistors Q1 and Q2 are turned on in a time-division multiplexing manner to transfer the input voltage Vin from the primary side to the secondary side of the flyback converter. In one possible embodiment, transistors Q1 and Q2 are both NMOS field-effect transistors or GAN devices.

[0055] The magnetizing inductance and leakage inductance of the primary winding Np are equivalent to inductances Lm and Lk, respectively, and together with the resonant capacitor Cr and the switching transistor Q2, they form a resonant circuit when the switching transistor Q2 is turned on.

[0056] The secondary side of the flyback converter 100 includes a rectifier diode (such as a diode) D1 and an output capacitor Co. The anode of the rectifier diode D1 is connected to the secondary winding Ns, and the cathode of the rectifier diode D1 is connected to the output terminal of the flyback converter. The positive terminal of the output capacitor Co is connected to the output terminal of the flyback converter, and the negative terminal of the output capacitor Co is connected to ground. Simultaneously, the corresponding terminal of the secondary winding Ns is also connected to ground. Furthermore, the output terminal of the flyback converter is connected to a load that receives the electrical energy (e.g., voltage and current) converted by the flyback converter. In some other embodiments, the rectifier diode D1 may also be configured to be coupled to ground.

[0057] In this embodiment, the control circuit 110 generates drive signals Vgs1 and Vgs2 to drive switches Q1 and Q2 respectively. When the flyback converter 100 operates in discontinuous conduction mode (DCM mode), the drive signal Vgs1 provided by the control circuit 110 includes at least two pulses in each switching cycle of the DCM mode, and the drive signal Vgs2 provided by the control circuit 110 includes at least three pulses in each switching cycle of the DCM mode. This allows control to ensure that switch Q1 is turned on at least once additionally in each switching cycle of the DCM mode, and that switch Q2 is turned on at least twice additionally in each switching cycle of the DCM mode, i.e., control to turn on switch Q1 at least twice in each switching cycle and control to turn on switch Q2 at least three times in each switching cycle. When the flyback converter 100 operates in hiccup mode, the drive signal Vgs1 provided by the control circuit 110 includes at least one additional pulse in each hiccup cycle of the hiccup mode (one hiccup cycle includes M switching cycles, where M is an integer greater than 1), in addition to the M main pulses. The drive signal Vgs2 provided by the control circuit 110 also includes at least two additional pulses in each hiccup cycle of the hiccup mode (one hiccup cycle includes M switching cycles, where M is an integer greater than 1). This allows the switch Q1 to be turned on at least once additionally in each hiccup cycle of the hiccup mode, and the switch Q2 to be turned on at least twice additionally in each hiccup cycle of the hiccup mode. This ensures that the main switch can achieve zero-voltage turn-on across the entire load range, reducing system turn-on losses and also helping to reduce the rectifier stress (such as diode rectifier stress or SR stress) on the secondary side of the system.

[0058] Specifically, when the flyback converter 100 operates in discontinuous conduction mode, in each switching cycle of the DCM mode, the reference... Figure 4In some embodiments, the drive signal Vgs1 generated by the control circuit 110 includes: an inductor energy storage pulse 1 and a capacitor energy storage pulse 3 located after the inductor energy storage pulse 1. The drive signal Vgs2 generated by the control circuit 110 includes: a freewheeling pulse 2, at least one precharge pulse 4 located after the freewheeling pulse 2, and a zero-voltage turn-on pulse 5 located after at least one precharge pulse 4. Among them, inductor energy storage pulse 1 is used to store energy in transformer TR, capacitor energy storage pulse 3 is used to store energy in resonant capacitor Cr, freewheeling pulse 2 is used to enable freewheeling in transformer TR, zero-voltage turn-on pulse 5 is used to enable zero-voltage turn-on of switch Q1 in the next switching cycle, and pre-charge pulse 4 is used to control switch Q2 to turn on at least once when switch Q2 is on the low side, that is, when one of the transmission poles of switch Q2 is connected to the reference ground or connected to the reference ground through sampling resistor Rcs, so as to pull down the potential at the common connection node SW of switch Q1 and switch Q2, and pre-charge the driver 130 of switch Q1 (that is, use the power supply of driver 140 of switch Q2 to perform bootstrap charging of driver 130 of switch Q1), thereby preventing the driver 130 of switch Q1 from failing to conduct due to power failure, and effectively ensuring zero-voltage turn-on of switch Q1 in the next switching cycle.

[0059] Figure 4 Although only one pre-charge pulse 4 is shown in the diagram, in practical applications, the number of pre-charge pulses 4 within one switching cycle can be set to N to achieve intermittent pre-charging of N small pulses, where N is an integer greater than 1. Similarly, the number of capacitor energy storage pulses 3 of the drive signal Vgs1 within one switching cycle can also be set to multiple.

[0060] When the flyback converter 100 operates in hiccup mode, the flyback converter 100 uses M switching cycles as one hiccup cycle, where M is an integer greater than 1. In each hiccup cycle of hiccup mode, the reference... Figure 5 , Figure 5The example uses M=3, but in practical applications, M can also be other values. In some embodiments, the drive signal Vgs1 generated by the control circuit 110 includes: M inductor energy storage pulses 1 and capacitor energy storage pulses 3 located after the Mth inductor energy storage pulse 1. The drive signal Vgs2 generated by the control circuit 110 includes: M freewheeling pulses 2, at least one precharge pulse 4 located after the Mth freewheeling pulse 2, and zero-voltage turn-on pulse 5 located after at least one precharge pulse 4. In this process, each inductor energy storage pulse 1 is used to store energy in the transformer TR, the capacitor energy storage pulse 3 is used to store energy in the resonant capacitor Cr, each freewheeling pulse 2 is used to enable freewheeling in the transformer TR, the zero-voltage turn-on pulse 5 is used to enable zero-voltage turn-on of the switch Q1 in the next hiccup cycle, and the pre-charge pulse 4 is used to control the switch Q2 to turn on at least once when the switch Q2 is on the low side, i.e., when one of the transmission terminals of the switch Q2 is connected to the reference ground or connected to the reference ground through the sampling resistor Rcs, so as to pull down the potential at the common connection node SW of the switch Q1 and the switch Q2, and pre-charge the driver 130 of the switch Q1 (i.e., use the power supply of the driver 140 of the switch Q2 to perform bootstrap charging of the driver 130 of the switch Q1), thereby preventing the switch Q1 from failing to conduct due to the power failure of the driver 130 of the switch Q1, and effectively ensuring the zero-voltage turn-on of the switch Q1 in the next switching cycle.

[0061] Figure 5 Although only one pre-charge pulse 4 is shown in the diagram, in practical applications, the number of pre-charge pulses 4 in the drive signal Vgs2 within one hiccup cycle can also be set to N, to achieve intermittent pre-charging of N small pulses of the switching transistor Q2, where N is an integer greater than 1. Similarly, the number of capacitor energy storage pulses 3 in the drive signal Vgs1 within one hiccup cycle can also be set to multiple.

[0062] Preferably, in each switching cycle or each hiccup cycle, the on-time of the capacitor energy storage pulse 3 (e.g., the high-level time of the capacitor energy storage pulse 3) is less than the on-time of each inductor energy storage pulse 1 in that cycle (e.g., the high-level time of the inductor energy storage pulse 1), so as to prevent excessive resonant current when the switching transistor Q2 is turned on based on the pre-charge pulse 4 and the zero-voltage turn-on pulse 5.

[0063] Preferably, in each switching cycle or each hiccup cycle, the conduction time of the zero-voltage turn-on pulse 5 (e.g., the high-level time of the zero-voltage turn-on pulse 5) is less than the conduction time of each freewheeling pulse 2 in that cycle (e.g., the high-level time of the freewheeling pulse 2), so as to better achieve zero-voltage turn-on control of the switching transistor Q1.

[0064] When working, refer to Figure 4During one switching cycle in DCM mode, the control circuit 110 first controls the switch Q1 to turn on based on the inductor energy storage pulse 1. At this time, the input voltage Vin charges the magnetizing inductance Lm and leakage inductance Lk of the primary winding Np based on the turned-on switch Q1, and simultaneously charges the resonant capacitor Cr. The transformer TR stores energy, and the magnetizing current i on the magnetizing inductance Lm... Lm The current rises; after switch Q1 is turned off, switch Q2 is turned on again based on freewheeling pulse 2. The magnetizing inductance Lm and leakage inductance Lk of the primary winding Np are freewheeled based on the turned-on switch Q2, so that the energy stored in transformer TR is released to the secondary side of flyback converter 100, and the magnetizing current i on magnetizing inductance Lm increases. Lm The flyback converter 100 enters a pause period after switch Q2 is turned off. During this period, both switches Q1 and Q2 are off, and the magnetizing inductor Lm resonates with the sum of the junction capacitance C1 of switch Q1 and the junction capacitance C2 of switch Q2. After the pause period ends, the control circuit 110 intermittently precharges switch Q2 based on at least one precharge pulse 4 to ensure that the driver 130 of switch Q1 can be accurately powered. During the turn-on period of switch Q2 based on the zero-voltage turn-on pulse 5, a reverse magnetizing current i is formed on the magnetizing inductor Lm. Lm After switch Q2 is turned off, the reverse magnetizing current iLm formed on the magnetizing inductor Lm discharges the parasitic capacitance C1 of switch Q1, thereby reducing the drain-source voltage V when switch Q1 is turned on in the next switching cycle. DS_Q1 After a certain dead time, the drain-source voltage V of the switching transistor Q1... DS_Q1 The voltage is reduced to zero or near zero, and simultaneously, the inductor energy storage pulse 1 of the next switching cycle of the drive signal Vgs1 arrives, achieving zero-voltage turn-on of the switch Q1 in the next switching cycle. The flyback converter 100 and its control circuit disclosed in this application embodiment ensure that the main switch (switch Q1) can achieve zero-voltage turn-on under light load, with lower turn-on losses, and also reduces the rectifier stress on the secondary side of the system.

[0065] When working, refer to Figure 5 During one hiccup cycle of the hiccup mode, the control circuit 110 first controls the switch Q1 to turn on based on the inductor energy storage pulse 1 in the first switching cycle of the hiccup cycle. At this time, the input voltage Vin charges the magnetizing inductance Lm and leakage inductance Lk of the primary winding Np based on the turned-on switch Q1, and simultaneously charges the resonant capacitor Cr. The transformer TR stores energy, and the magnetizing current i on the magnetizing inductance Lm... LmThe current rises; after switch Q1 is turned off, switch Q2 is turned on again based on freewheeling pulse 2. The magnetizing inductance Lm and leakage inductance Lk of the primary winding Np are freewheeled based on the turned-on switch Q2, so that the energy stored in transformer TR is released to the secondary side of flyback converter 100, and the magnetizing current i on magnetizing inductance Lm increases. Lm The process begins with a decrease in switching power. After switch Q2 turns off, the flyback converter 100 enters the second switching cycle of the hiccup cycle. Control circuit 110 first controls switch Q1 to turn on based on inductor energy storage pulse 1.1, and after switch Q1 turns off, it controls switch Q2 to turn on based on freewheeling pulse 2.1. This process continues until switch Q2 turns off at some point, after which the flyback converter 100 enters the last (i.e., the Mth) switching cycle of the hiccup cycle. At this time, control circuit 110 first controls switch Q1 to turn on based on inductor energy storage pulse 1.2, and after switch Q1 turns off, it controls switch Q2 to turn on based on freewheeling pulse 2.2. When switch Q2 is turned on, the flyback converter 100 enters a pause period after switch Q2 is turned off. During this time, both switches Q1 and Q2 are off, and the magnetizing inductor Lm resonates with the sum of the junction capacitance C1 of switch Q1 and the junction capacitance C2 of switch Q2. After the pause period ends, the control circuit 110 intermittently precharges switch Q2 based on at least one precharge pulse 4 to ensure that the driver 130 of switch Q1 can be accurately powered. During the turn-on period of switch Q2 based on the zero-voltage turn-on pulse 5, a reverse magnetizing current i is formed on the magnetizing inductor Lm. Lm After switch Q2 is turned off, the reverse magnetizing current iLm formed on the magnetizing inductor Lm discharges the parasitic capacitance C1 of switch Q1, thereby reducing the drain-source voltage V when switch Q1 is turned on in the next hiccup cycle. DS_Q1 After a certain dead time, the drain-source voltage V of the switching transistor Q1... DS_Q1 The voltage is reduced to zero or near zero, and simultaneously, the inductor energy storage pulse 1 of the next hiccup cycle of the drive signal Vgs1 arrives, achieving zero-voltage turn-on of the switch Q1 in the next hiccup cycle. The flyback converter 100 and its control circuit disclosed in this application embodiment ensure that the main switch (switch Q1) can achieve zero-voltage turn-on under heavy load, with lower turn-on losses, and also reduces the rectifier stress on the secondary side of the system.

[0066] By configuring different drive signals Vgs1 and Vgs2 for the flyback converter 100 in different modes, zero-voltage turn-on of the main switch can be achieved in the full load range.

[0067] In specific implementation, the control circuit 110 obtains the characterization of the excitation current i through the sampling resistor Rcs. LmThe sampling signal Vcs is used to obtain a voltage detection signal Vs characterizing the output voltage Vout through the auxiliary winding Na. The control circuit 110 further includes a control unit 120, a driver 130, and a driver 140. The control circuit 120 generates a first control signal and a second control signal based on the sampling signal Vcs and the voltage detection signal Vs. The driver 130 converts the first control signal to generate a drive signal Vgs1, and the driver 140 converts the second control signal to generate a drive signal Vgs2.

[0068] In some embodiments, the control circuit 120 further includes a mode detection circuit, which is used to detect the current load range of the flyback converter 100 based on the output signal of the flyback converter 100, and generate a mode selection signal based on the detection result. The mode selection signal is used to configure the operating mode of the flyback converter 100.

[0069] Further, refer to Figure 3 , Figure 3 It shows Figure 2 A schematic diagram of the structure of the control unit 120. Figure 3 The control unit 120 further includes: an error amplifier circuit 131, a current threshold setting circuit 132, a first comparison circuit 133, a frequency limiting threshold setting circuit 134, a second comparison circuit 135, and a logic circuit 136. The error amplifier circuit 131 generates an error compensation signal Vcomp based on the voltage detection signal Vs of the output voltage Vout; the current threshold setting circuit 132 generates an excitation current i representing the flyback converter 100 based on the error compensation signal Vcomp. Lm The reference voltage Vpeak of the peak current; the first comparator circuit 133 is used to compare the reference voltage Vpeak output by the current threshold setting circuit 132 and the excitation current i. Lm The sampling signal Vcs is compared with the reference voltage Vpeak, and the first turn-off time of the switch Q1 is determined when the sampling signal Vcs reaches the reference voltage Vpeak, that is, the end time of the inductor energy storage pulse 1 is determined; the frequency limiting threshold setting circuit 134 is used to generate a reference signal f_ref characterizing the frequency limiting threshold of the flyback converter 100 according to the error compensation signal Vcomp; the second comparison circuit 135 is used to compare the reference signal f_ref output by the frequency limiting threshold setting circuit 134 with the frequency detection signal fs characterizing the switching frequency of the flyback converter 100 to determine the start time of the inductor energy storage pulse 1; the logic circuit 136 is used to generate a first control signal and a second control signal according to the output signal of the first comparison circuit 133 and the output signal of the second comparison circuit 134.

[0070] In some embodiments, the logic circuit 136 includes a first pulse generation unit, a second pulse generation unit, and a third pulse generation unit. Specifically, in DCM mode, the first pulse generation unit generates a capacitor energy storage pulse 3 with a first conduction time after a first delay following the switching transistor Q2 being turned off based on freewheeling pulse 2 or the switching transistor Q2 being turned off based on freewheeling pulse 2; or, in hiccup mode, the first pulse generation unit generates a capacitor energy storage pulse 3 with a first conduction time after a first delay following the switching transistor Q2 being turned off based on the last freewheeling pulse of each hiccup cycle or the switching transistor Q2 being turned off based on the last freewheeling pulse of each hiccup cycle. The second pulse generation unit generates at least one pre-charge pulse 4 with a second conduction time after a first pause following the end of the capacitor energy storage pulse 3. The third pulse generation unit generates a zero-voltage turn-on pulse 5 with a third conduction time after a second pause following the end of the capacitor energy storage pulse 3, or after a predetermined time following the end of at least one pre-charge pulse 4. The first turn-on / turn-off logic of the switch Q2 (i.e. the generation logic of freewheeling pulse 2) can be understood with reference to existing technical solutions.

[0071] More preferably, the current threshold setting circuit 132 is also used to adjust the excitation current i of the flyback converter 100 according to the change in the operating mode of the flyback converter 100. Lm The peak current (or the adjustment of the excitation current i characterizing the flyback converter 100) Lm The reference voltage Vpeak for the peak current. For example, when the flyback converter 100 switches from DCM mode to hiccup mode, the excitation current i is increased. Lm The peak current (or reference voltage Vpeak) is increased to enhance output power; conversely, the magnetizing current i is reduced when the flyback converter 100 switches from hiccup mode to DCM mode. Lm The peak current (or reference voltage Vpeak) is reduced to decrease the output power. Optionally, the mode detection circuit generates a mode selection signal, for example, by detecting an error compensation signal Vcomp. In this case, the current threshold setting circuit 132 adjusts the excitation current i according to changes in the magnitude or range of the error compensation signal Vcomp. Lm The peak current (or reference voltage Vpeak); or, the current threshold setting circuit 132 is used to adjust the excitation current i according to the change of the mode selection signal. Lm The peak current (or reference voltage Vpeak).

[0072] More preferably, the second pulse generation unit is also used to adjust the first pause time according to the change in the operating mode of the flyback converter 100. For example, when the flyback converter 100 switches from DCM mode to hiccup mode, the first pause time is reduced to increase the output power; conversely, when the flyback converter 100 switches from hiccup mode to DCM mode, the first pause time is increased to decrease the output power. Optionally, the mode detection circuit generates a mode selection signal, for example, by detecting the error compensation signal Vcomp. In this case, the second pulse generation unit is used to adjust the first pause time according to the change in the magnitude or range of the error compensation signal Vcomp; or, the second pulse generation unit is used to adjust the first pause time according to the change in the mode selection signal.

[0073] Further preferably, the logic circuit 136 also includes a main pulse group number determination unit. This main pulse group number determination unit is used to adjust the number of main pulse groups, i.e., M, in the drive signals Vgs1 and Vgs2 according to the target output power of the flyback converter 100 when the flyback converter 100 is operating in hiccup mode. For example, M is increased when the target output power increases to increase the actual output power of the flyback converter 100; conversely, M is decreased when the target output power decreases to decrease the actual output power of the flyback converter 100. Optionally, the main pulse group number determination unit is used to adjust M according to changes in the load size or the magnitude or range of the error compensation signal Vcomp.

[0074] In these preferred embodiments, when the flyback converter 100 switches between intermittent conduction mode and hiccup mode, the first pause time and the excitation current i are adjusted accordingly. Lm At least one of the peak current and the number of main pulse groups M (each main pulse group includes: an inductor energy storage pulse and a freewheeling pulse) contained in each cycle (such as the switching cycle in DCM mode or the hiccup cycle in hiccup mode) of the drive signals of switching transistors Q1 and Q2 can be used to flexibly adjust the output power of the flyback converter 100, which is beneficial to achieving zero-voltage turn-on of the flyback converter 100 across the entire load range. For example, when it is necessary to increase the output power (such as when the flyback converter 100 switches from intermittent conduction mode to hiccup mode), it can be achieved by performing at least one of the following: reducing the first pause time; increasing the excitation current i Lm Peak current; increase the number of main pulse groups M contained in each cycle (such as the switching cycle in DCM mode, or the hiccup cycle in hiccup mode) of the drive signals of switching transistors Q1 and Q2; etc.

[0075] Furthermore, this application also provides a control method for a flyback converter, which can be applied to the flyback converter 100 and its control circuit 110 disclosed in any of the foregoing embodiments. In specific implementation, as follows... Figure 6 As shown, the control method includes performing the following steps:

[0076] Step 610: Generate a first drive signal to drive the first switch transistor, wherein when the flyback converter operates in intermittent conduction mode, the first drive signal includes an inductor energy storage pulse and a capacitor energy storage pulse located after the inductor energy storage pulse.

[0077] Step 620: Generate a second drive signal to drive the second switch, wherein when the flyback converter operates in discontinuous conduction mode, the second drive signal includes a freewheeling pulse, at least one precharge pulse following the freewheeling pulse, and a zero-voltage turn-on pulse following at least one precharge pulse.

[0078] Specifically, refer to Figure 2 and Figure 4 When the flyback converter 100 operates in discontinuous conduction mode, in each switching cycle of the DCM mode, in some embodiments, the drive signal Vgs1 generated by the control circuit 110 includes: an inductor energy storage pulse 1 and a capacitor energy storage pulse 3 following the inductor energy storage pulse 1. The drive signal Vgs2 generated by the control circuit 110 includes: a freewheeling pulse 2, at least one precharge pulse 4 following the freewheeling pulse 2, and a zero-voltage turn-on pulse 5 following at least one precharge pulse 4. Among them, inductor energy storage pulse 1 is used to store energy in transformer TR, capacitor energy storage pulse 3 is used to store energy in resonant capacitor Cr, freewheeling pulse 2 is used to enable freewheeling in transformer TR, zero-voltage turn-on pulse 5 is used to enable zero-voltage turn-on of switch Q1 in the next switching cycle, and pre-charge pulse 4 is used to control switch Q2 to turn on at least once when switch Q2 is on the low side, that is, when one of the transmission poles of switch Q2 is connected to the reference ground or connected to the reference ground through sampling resistor Rcs, so as to pull down the potential at the common connection node SW of switch Q1 and switch Q2, and pre-charge the driver 130 of switch Q1 (that is, use the power supply of driver 140 of switch Q2 to perform bootstrap charging of driver 130 of switch Q1), thereby preventing the driver 130 of switch Q1 from failing to conduct due to power failure, and effectively ensuring zero-voltage turn-on of switch Q1 in the next switching cycle.

[0079] Figure 4 Although only one pre-charge pulse 4 is shown in the diagram, in practical applications, the number of pre-charge pulses 4 within one switching cycle can be set to N to achieve intermittent pre-charging of N small pulses, where N is an integer greater than 1. Similarly, the number of capacitor energy storage pulses 3 of the drive signal Vgs1 within one switching cycle can also be set to multiple.

[0080] When the flyback converter 100 operates in hiccup mode, the flyback converter 100 uses M switching cycles as one hiccup cycle, where M is an integer greater than 1. (Reference) Figure 2 and Figure 5 In each hiccup cycle of the hiccup pattern, Figure 5 The example uses M=3, but in practical applications, M can also be other values. In some embodiments, the drive signal Vgs1 generated by the control circuit 110 includes: M inductor energy storage pulses 1 and capacitor energy storage pulses 3 located after the Mth inductor energy storage pulse 1. The drive signal Vgs2 generated by the control circuit 110 includes: M freewheeling pulses 2, at least one precharge pulse 4 located after the Mth freewheeling pulse 2, and zero-voltage turn-on pulse 5 located after at least one precharge pulse 4. In this process, each inductor energy storage pulse 1 is used to store energy in the transformer TR, the capacitor energy storage pulse 3 is used to store energy in the resonant capacitor Cr, each freewheeling pulse 2 is used to enable freewheeling in the transformer TR, the zero-voltage turn-on pulse 5 is used to enable zero-voltage turn-on of the switch Q1 in the next hiccup cycle, and the pre-charge pulse 4 is used to control the switch Q2 to turn on at least once when the switch Q2 is on the low side, i.e., when one of the transmission terminals of the switch Q2 is connected to the reference ground or connected to the reference ground through the sampling resistor Rcs, so as to pull down the potential at the common connection node SW of the switch Q1 and the switch Q2, and pre-charge the driver 130 of the switch Q1 (i.e., use the power supply of the driver 140 of the switch Q2 to perform bootstrap charging of the driver 130 of the switch Q1), thereby preventing the switch Q1 from failing to conduct due to the power failure of the driver 130 of the switch Q1, and effectively ensuring the zero-voltage turn-on of the switch Q1 in the next switching cycle.

[0081] Figure 5 Although only one pre-charge pulse 4 is shown in the diagram, in practical applications, the number of pre-charge pulses 4 in the drive signal Vgs2 within one hiccup cycle can also be set to N, to achieve intermittent pre-charging of N small pulses of the switching transistor Q2, where N is an integer greater than 1. Similarly, the number of capacitor energy storage pulses 3 in the drive signal Vgs1 within one hiccup cycle can also be set to multiple.

[0082] In some embodiments, in each switching cycle, the on-time (e.g., high-level time) of the capacitor energy storage pulse 3 is less than the on-time (e.g., high-level time) of the inductor energy storage pulse 1. This prevents excessive resonant current when the switch Q2 is turned on based on the pre-charge pulse 4 and the zero-voltage turn-on pulse 5.

[0083] In some embodiments, in each switching cycle, the on-time (e.g., high-level time) of the zero-voltage turn-on pulse 5 is less than the on-time (e.g., high-level time) of the freewheeling pulse 2. This allows for better zero-voltage turn-on control of the switching transistor Q1.

[0084] Furthermore, the control method also includes: in each cycle (such as the switching cycle in DCM mode or the hiccup cycle in hiccup mode), setting a first pause time after the end of the capacitor energy storage pulse, and starting at least one pre-charge pulse after the first pause time.

[0085] More preferably, when the flyback converter switches from intermittent conduction mode to hiccup mode, the control method further includes performing at least one of the following: reducing the first pause time; increasing the excitation current i Lm The peak current; increasing the number of main pulse groups M contained in each cycle (such as the switching cycle in DCM mode, or the hiccup cycle in hiccup mode) of the drive signals of switching transistors Q1 and Q2; etc., in order to increase the output power and achieve zero-voltage turn-on of the flyback converter across the full load range.

[0086] In practice, the specific implementation of each step in the control method of the flyback converter described above and the technical effects that can be achieved after implementation can be found in the relevant content of the flyback converter and its control circuit described in the foregoing embodiments, which will not be repeated here.

[0087] In summary, the flyback converter and its control circuit and method provided in this application, by adjusting the drive signals of the first and second switching transistors in the flyback converter, ensure that in DCM mode, the drive signal of the first switching transistor includes at least two turn-on pulses in each switching cycle (e.g., including an inductor energy storage pulse and a capacitor energy storage pulse following the inductor energy storage pulse), and the drive signal of the second switching transistor includes at least three turn-on pulses in each switching cycle (e.g., including a freewheeling pulse, at least one pre-charge pulse following the freewheeling pulse, and a zero-voltage turn-on pulse following at least one pre-charge pulse). This allows the first switching transistor to be turned on at least once additionally in each switching cycle, and the second switching transistor to be turned on at least twice additionally in each switching cycle. This ensures that the system can also achieve zero-voltage turn-on of the main switching transistor (i.e., the first switching transistor) under light load, reducing turn-on losses and also helping to reduce the rectifier stress on the secondary side of the system.

[0088] In a further preferred embodiment, by adjusting the drive signals of the first and second switches in the flyback converter, in hiccup mode, the drive signal of the first switch includes at least one additional turn-on pulse in each hiccup cycle (one hiccup cycle includes M switching cycles, where M is an integer greater than 1). (For example, the first drive signal of the first switch includes M inductor energy storage pulses and a capacitor energy storage pulse following the Mth inductor energy storage pulse in each hiccup cycle). The drive signal of the second switch includes at least two additional turn-on pulses in each hiccup cycle. In addition to the M freewheeling pulses, the signal also includes at least one precharge pulse following the Mth freewheeling pulse and a zero-voltage turn-on pulse following the at least one precharge pulse. This allows the first and second switching transistors to be turned on at least once more in each hiccup cycle, and even the second switching transistor to be turned on at least twice more in each hiccup cycle. This ensures that the system can achieve zero-voltage turn-on of the main switching transistor (i.e., the first switching transistor) even under heavy load, while increasing the system output power. This reduces turn-on losses and facilitates zero-voltage turn-on of the main switching transistor across the entire load range.

[0089] Finally, it should be noted that the above embodiments are merely examples for clearly illustrating this application and are not intended to limit the implementation. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A control method for a flyback converter, the flyback converter comprising: A first and a second switch, connected in series between the input voltage terminal and the reference ground, and a resonant capacitor. The control method includes: A first drive signal is generated to drive the first switching transistor; A second drive signal is generated to drive the second switching transistor; When the flyback converter operates in discontinuous conduction mode, in each switching cycle, the first drive signal includes an inductor energy storage pulse and a capacitor energy storage pulse following the inductor energy storage pulse, and the second drive signal includes a freewheeling pulse, at least one precharge pulse following the freewheeling pulse, and a zero-voltage turn-on pulse following the at least one precharge pulse.

2. The control method according to claim 1, wherein, When the flyback converter operates in hiccup mode, the flyback converter uses M switching cycles as one hiccup cycle, where M is an integer greater than 1; In each hiccup cycle, the first drive signal includes M inductor energy storage pulses and a capacitor energy storage pulse following the Mth inductor energy storage pulse, and the second drive signal includes M freewheeling pulses, at least one precharge pulse following the Mth freewheeling pulse, and a zero-voltage turn-on pulse following the at least one precharge pulse.

3. The control method according to claim 1 or 2, wherein, The conduction time of the capacitor energy storage pulse is shorter than that of the inductor energy storage pulse.

4. The control method according to claim 1 or 2, wherein, The conduction time of the zero-voltage turn-on pulse is less than the conduction time of the freewheeling pulse.

5. The control method according to claim 2, wherein, The control method further includes: In each cycle, a first pause time is set after the end of the capacitor energy storage pulse, and the at least one pre-charge pulse is started after the first pause time.

6. The control method according to claim 5, wherein, When the flyback converter switches from intermittent conduction mode to hiccup mode, the control method further includes performing at least one of the following: Reduce the first pause time; Increase M; The peak current of the excitation current of the flyback converter is increased, and the flyback converter determines the end time of the inductor energy storage pulse based on the peak current.

7. A control circuit for a flyback converter, the flyback converter comprising: A first and a second switch are connected in series between the input voltage terminal and a reference ground, along with a resonant capacitor. The control circuit generates a first drive signal and a second drive signal to drive the first and second switches, respectively. When the flyback converter operates in discontinuous conduction mode, the first drive signal generated by the control circuit includes an inductor energy storage pulse and a capacitor energy storage pulse following the inductor energy storage pulse. The second drive signal generated by the control circuit includes a freewheeling pulse, at least one precharge pulse following the freewheeling pulse, and a zero-voltage turn-on pulse following the at least one precharge pulse.

8. The control circuit according to claim 7, wherein, When the flyback converter operates in hiccup mode, the flyback converter uses M switching cycles as one hiccup cycle, where M is an integer greater than 1; In each hiccup cycle, the first drive signal includes M inductor energy storage pulses and a capacitor energy storage pulse following the Mth inductor energy storage pulse, and the second drive signal includes M freewheeling pulses, at least one precharge pulse following the Mth freewheeling pulse, and a zero-voltage turn-on pulse following the at least one precharge pulse.

9. The control circuit according to claim 7 or 8, wherein, The conduction time of the capacitor energy storage pulse is shorter than that of the inductor energy storage pulse.

10. The control circuit according to claim 7 or 8, wherein, The conduction time of the zero-voltage turn-on pulse is less than the conduction time of the freewheeling pulse.

11. A flyback converter, comprising: transformer; The first and second switching transistors are connected in series between the input voltage terminal and the reference ground; A resonant capacitor is used to form a resonant circuit of the flyback converter with the leakage inductance of the transformer when the second switch is turned on. And, as in any one of claims 7-10 of this application, the control circuit.

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