Low-voltage full-integrated intelligent power module and electronic device

Abstract

This invention provides a low-voltage fully integrated intelligent power module and an electronic device. The module includes: a metal frame; a first base island, a second base island, a third base island, and a fourth base island spaced apart along a first direction; the first and fourth base islands, and the second and third base islands spaced apart along a second direction; and terminals disposed on the outer periphery of each base island; a control unit and a low-voltage drive unit disposed on the first base island; a first and fourth low-voltage power transistor disposed on the second base island; a second and fifth low-voltage power transistor disposed on the third base island; and a third and sixth low-voltage power transistor disposed on the fourth base island; wherein each unit, each low-voltage power transistor, and each terminal are electrically interconnected; and a plastic encapsulation body, at least disposed on the metal frame, to encapsulate the control unit, the low-voltage drive unit, and each low-voltage power transistor. This invention solves the problems of high manufacturing difficulty, high cost, and low power density in existing modules.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor devices, and in particular relates to a low-voltage fully integrated intelligent power module and electronic device. Background Technology

[0002] Fully integrated intelligent power modules are modular products that integrate control, drive, and power functions into one unit, belonging to the category of intelligent power modules (IPMs). Currently, most fully integrated intelligent power modules on the market are high-voltage, while low-voltage fully integrated intelligent power modules are relatively rare.

[0003] Existing low-voltage fully integrated intelligent power modules are mainly implemented using a single-chip solution, that is, integrating control, drive, and power into a single chip. This approach suffers from high manufacturing difficulty, high cost, and low power density. With technological innovation, electronic products are increasingly pursuing miniaturization and high power density, making existing low-voltage fully integrated intelligent power modules unable to meet current application demands.

[0004] It should be noted that the above description of the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of the present invention and facilitating understanding by those skilled in the art. It should not be assumed that the above technical solutions are known to those skilled in the art simply because they have been described in the background section of this invention. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a low-voltage fully integrated intelligent power module and electronic device to solve the problems of high manufacturing difficulty, high cost and low power density of existing low-voltage fully integrated intelligent power modules.

[0006] To achieve the above and other related objectives, the present invention provides a low-voltage fully integrated intelligent power module, comprising:

[0007] Metal frame, control unit, low-voltage drive unit, first low-voltage power transistor, second low-voltage power transistor, third low-voltage power transistor, fourth low-voltage power transistor, fifth low-voltage power transistor, sixth low-voltage power transistor, and encapsulation.

[0008] The metal frame includes a first base island, a second base island, a third base island, a fourth base island, a plurality of signal terminals, and a plurality of power terminals. The first base island, the second base island, the third base island, and the fourth base island are spaced apart along a first direction, and the first base island, the fourth base island, the second base island, and the third base island are spaced apart along a second direction. Each signal terminal and each power terminal is disposed on the outer periphery of each base island.

[0009] The control unit and the low-voltage drive unit are disposed on the first base island, the first low-voltage power transistor and the fourth low-voltage power transistor are disposed on the second base island, the second low-voltage power transistor and the fifth low-voltage power transistor are disposed on the third base island, and the third low-voltage power transistor and the sixth low-voltage power transistor are disposed on the fourth base island. The control unit, the low-voltage drive unit and each signal terminal are electrically interconnected, and the low-voltage drive unit, each low-voltage power transistor and each power terminal are electrically interconnected.

[0010] The encapsulation body is disposed at least on the metal frame to encapsulate the control unit, the low-voltage drive unit, and each low-voltage power transistor.

[0011] Optionally, the metal frame further includes a fifth base island disposed between the first region and the second region, wherein the first region is the region where the first base island and the second base island are located, and the second region is the region where the third base island and the fourth base island are located.

[0012] Optionally, there is a first spacing between adjacent base islands and a second spacing between a corresponding base island and a corresponding terminal, wherein the first spacing is greater than or equal to 0.8 times the thickness of the metal frame, and the second spacing is greater than or equal to 0.8 times the thickness of the metal frame.

[0013] Optionally, the bottom surface of the metal frame is flush with the bottom surface of the molding compound to expose the bottom surface of each base island.

[0014] Optionally, during electrical interconnection, the control unit and the low-voltage drive unit, the control unit and the corresponding signal terminal, the low-voltage drive unit and the corresponding signal terminal, the low-voltage drive unit and the gate of each low-voltage power transistor, and the source of each low-voltage power transistor and the corresponding power terminal are all electrically interconnected by metal wire bonding, and the drain of each low-voltage power transistor and the corresponding power terminal are electrically interconnected by conductive adhesive.

[0015] Optionally, the control unit and the low-voltage drive unit are located in different chips, or the control unit and the low-voltage drive unit are integrated in the same chip.

[0016] Optionally, the control unit includes a microcontroller unit or an application-specific integrated circuit (ASIC).

[0017] Optionally, the first low-voltage power transistor and the fourth low-voltage power transistor are respectively in different chips, or the first low-voltage power transistor and the fourth low-voltage power transistor are integrated in the same chip; the second low-voltage power transistor and the fifth low-voltage power transistor are respectively in different chips, or the second low-voltage power transistor and the fifth low-voltage power transistor are integrated in the same chip; the third low-voltage power transistor and the sixth low-voltage power transistor are respectively in different chips, or the third low-voltage power transistor and the sixth low-voltage power transistor are integrated in the same chip.

[0018] Optionally, the low-voltage fully integrated smart power module adopts a quad flat leadless package.

[0019] The present invention also provides an electronic device, comprising: a low-voltage fully integrated intelligent power module as described in any of the above claims.

[0020] As described above, the low-voltage fully integrated intelligent power module and electronic device of the present invention are manufactured by chip packaging, which has low process difficulty, high process maturity, low cost, compact structure, small size, high power density, and high reliability; when designed and applied, the peripheral circuit is simple. Attached Figure Description

[0021] Figure 1 The diagram shown is an equivalent circuit diagram of a low-voltage fully integrated intelligent power module in an embodiment of the present invention.

[0022] Figure 2 The diagram shown is a structural schematic of a low-voltage fully integrated intelligent power module in an embodiment of the present invention.

[0023] Figure 3 The diagram shown is a structural schematic of the metal frame in an embodiment of the present invention.

[0024] Figure 4 The diagram shown is a front view of the low-voltage fully integrated smart power module with a plastic encapsulation, as described in an embodiment of the present invention.

[0025] Figure 5 The diagram shown is a schematic diagram of the back structure of a low-voltage fully integrated intelligent power module with a plastic encapsulation in an embodiment of the present invention.

[0026] Component designation explanation

[0027] 1 Low-voltage fully integrated intelligent power module

[0028] 10 Metal Frame

[0029] 10a Base Island Area

[0030] 10b First Area

[0031] 10c Second Region

[0032] 101 First Base Island

[0033] 102 Second Base Island

[0034] 103 Third Base Island

[0035] 104 Fourth Base Island

[0036] 105 signal terminal

[0037] 106 power terminals

[0038] 107 Fifth Base Island

[0039] 11 Control Unit

[0040] 12 Low-voltage drive units

[0041] 13 First low-voltage power transistor

[0042] 14 Second low-voltage power transistor

[0043] 15 Third low-voltage power transistor

[0044] 16 Fourth low-voltage power transistor

[0045] 17. Fifth low-voltage power transistor

[0046] 18. Sixth low-voltage power transistor

[0047] 19. Molded body Detailed Implementation

[0048] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0049] Please see Figures 1 to 5 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the shape, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0050] like Figures 1 to 5As shown, this embodiment provides a low-voltage fully integrated intelligent power module 1, including a metal frame 10, a control unit 11, a low-voltage drive unit 12, a first low-voltage power transistor 13, a second low-voltage power transistor 14, a third low-voltage power transistor 15, a fourth low-voltage power transistor 16, a fifth low-voltage power transistor 17, a sixth low-voltage power transistor 18, and a plastic encapsulation 19.

[0051] like Figures 2 to 5 As shown, the metal frame 10 includes a first base island 101, a second base island 102, a third base island 103, a fourth base island 104, a plurality of signal terminals 105, and a plurality of power terminals 106. The plurality of signal terminals 105 and the plurality of power terminals 106 are collectively referred to as pin terminals. In this embodiment, the pin terminals that are electrically interconnected with the control unit 11 and the low-voltage drive unit 12 are referred to as signal terminals, and the pin terminals that are electrically interconnected with each low-voltage power transistor are referred to as power terminals.

[0052] First base island 101 and second base island 102 are spaced apart along a first direction, and third base island 103 and fourth base island 104 are also spaced apart along the first direction. Furthermore, first base island 101 and fourth base island 104 are spaced apart along a second direction, and second base island 102 and third base island 103 are also spaced apart along the second direction. This optimizes spatial layout and minimizes module volume. In practical applications, the first and second directions are perpendicular to each other; in one implementation, the first direction is horizontal and the second direction is vertical. It should be noted that the lengths of each base island in the first direction and the lengths of each base island in the second direction should be designed according to specific requirements, and there are no restrictions on this. Figures 2 to 5 Taking the metal frame 10 shown as an example, but not limited thereto, let the lengths of the first base island 101, the second base island 102, the third base island 103 and the fourth base island 104 in the first direction be denoted as the first length, the second length, the third length and the fourth length, respectively. Let the lengths of the first base island 101, the second base island 102, the third base island 103 and the fourth base island 104 in the second direction be denoted as the fifth length, the sixth length, the seventh length and the eighth length, respectively. Then, the first length > the fourth length > the third length > the second length, and the fifth length = the sixth length > the seventh length = the eighth length.

[0053] Each pin terminal is located on the outer periphery of each base island; that is, each signal terminal 105 and each power terminal 106 is located on the outer periphery of each base island. The area where each base island is located is defined as base island region 10a, and each pin terminal is located around the periphery of base island region 10a. In practical applications, each pin terminal is of equal size and is evenly distributed around the periphery of base island region 10a. In this case, the number of pin terminals on each side of base island region 10a is equal, and the spacing between adjacent pin terminals is also equal. It should be noted that the number of signal terminals 105 and the number of power terminals 106 should be designed according to specific requirements, and there is no limitation on them; Figures 2 to 5 Taking the metal frame 10 shown as an example, but not limited thereto, there are 17 signal terminals 105 and 23 power terminals 106, for a total of 40 pin terminals, 10 on each side. Among them, there is one pin terminal that is electrically interconnected with both the control unit 11 and the low-voltage power transistor. This pin terminal is still called a power terminal. Of course, it is also possible to call this pin terminal a signal terminal.

[0054] Furthermore, such as Figures 2 to 5 As shown, the metal frame 10 also includes a fifth base island 107. The area where the first base island 101 and the second base island 102 are located is defined as the first region 10b, and the area where the third base island 103 and the fourth base island 104 are located is defined as the second region 10c. The fifth base island 107 is located between the first region 10b and the second region 10c. The fifth base island 107 does not have any components on it, but is only used for electrical interconnection of the power supply.

[0055] In practical applications, adjacent base islands have a first spacing. For example, there is a first spacing between the first base island 101 and the second base island 102, between the first base island 101 and the fifth base island 107, between the second base island 102 and the fifth base island 107, between the third base island 103 and the fourth base island 104, between the third base island 103 and the fifth base island 107, and between the fourth base island 104 and the fifth base island 107. These first spacings can be equal or unequal; there is no restriction on this. Furthermore, corresponding base islands and corresponding... A second spacing exists between the terminals. For example, a second spacing exists between the first base island 101 and its corresponding terminal, the second base island 102 and its corresponding terminal, the third base island 103 and its corresponding terminal, the fourth base island 104 and its corresponding terminal, and the fifth base island 107 and its corresponding terminal. The second spacings may be equal or unequal, and this is not limited. In one embodiment, the first spacing is greater than or equal to 0.8 times the thickness of the metal frame 10, and the second spacing is greater than or equal to 0.8 times the thickness of the metal frame 10. It should be noted that the metal frame 10 is a copper frame, and its thickness should be designed according to specific requirements, and this is not limited.

[0056] like Figure 1 and Figure 2As shown, the control unit 11 and the low-voltage drive unit 12 are disposed on the first base island 101. The control unit 11 includes a microcontroller unit (MCU) or an application-specific integrated circuit (ASIC). Of course, the control unit 11 may also include other functional circuits depending on specific requirements, such as operational amplifier circuits, analog-to-digital converter circuits, serial port circuits, etc. The low-voltage drive unit 12 includes a low-voltage three-phase PN drive circuit. Of course, the low-voltage drive unit 12 may also include other functional circuits depending on specific requirements, such as overvoltage protection circuits, linear regulator circuits, etc. In one embodiment, the control unit 11 and the low-voltage drive unit 12 are respectively located on different chips; that is, the control unit 11 is integrated on one chip, and the low-voltage drive unit 12 is integrated on another chip. The two chips are respectively disposed on the first base island 101. For example, one chip integrating the control unit 11 is disposed on the left side of the first base island 101, and the other chip integrating the low-voltage drive unit 12 is disposed on the upper right side of the first base island 101. Figure 2 As shown. In another embodiment, the control unit 11 and the low-voltage drive unit 12 are integrated into the same chip, which is disposed on the first base island 101; wherein, the chip can be a packaged chip or an unpackaged chip, without limitation.

[0057] like Figure 1 and Figure 2 As shown, the first low-voltage power transistor 13 and the fourth low-voltage power transistor 16 are disposed on the second base island 102; wherein, the first low-voltage power transistor 13 is an N-type low-voltage power transistor, such as an NMOS transistor, and the fourth low-voltage power transistor 16 is a P-type low-voltage power transistor, such as a PMOS transistor. In one embodiment, the first low-voltage power transistor 13 and the fourth low-voltage power transistor 16 are respectively in different chips, that is, the first low-voltage power transistor 13 is integrated on one chip, and the fourth low-voltage power transistor 16 is integrated on another chip, and the two chips are respectively disposed on the second base island 102. For example, the chip integrating the first low-voltage power transistor 13 is disposed above the second base island 102, and the other chip integrating the fourth low-voltage power transistor 16 is disposed below the second base island 102. Figure 2 As shown. In another embodiment, the first low-voltage power transistor 13 and the fourth low-voltage power transistor 16 are integrated into the same chip, which is disposed on the second base island 102; wherein, the chip can be a packaged chip or an unpackaged chip, without limitation.

[0058] like Figure 1 and Figure 2As shown, the second low-voltage power transistor 14 and the fifth low-voltage power transistor 17 are disposed on the third base island 103; wherein, the second low-voltage power transistor 14 is an N-type low-voltage power transistor, such as an NMOS transistor, and the fifth low-voltage power transistor 17 is a P-type low-voltage power transistor, such as a PMOS transistor. In one embodiment, the second low-voltage power transistor 14 and the fifth low-voltage power transistor 17 are respectively in different chips, that is, the second low-voltage power transistor 14 is integrated on one chip, and the fifth low-voltage power transistor 17 is integrated on another chip, and the two chips are respectively disposed on the third base island 103. For example, one chip integrating the second low-voltage power transistor 14 is disposed on the left side of the third base island 103, and the other chip integrating the fifth low-voltage power transistor 17 is disposed on the right side of the third base island 103, as shown. Figure 2 As shown. In another embodiment, the second low-voltage power transistor 14 and the fifth low-voltage power transistor 17 are integrated into the same chip, which is disposed on the third base island 103; wherein, the chip can be a packaged chip or an unpackaged chip, without limitation.

[0059] like Figure 1 and Figure 2 As shown, the third low-voltage power transistor 15 and the sixth low-voltage power transistor 18 are disposed on the fourth base island 104; wherein, the third low-voltage power transistor 15 is an N-type low-voltage power transistor, such as an NMOS transistor, and the sixth low-voltage power transistor 18 is a P-type low-voltage power transistor, such as a PMOS transistor. In one embodiment, the third low-voltage power transistor 15 and the sixth low-voltage power transistor 18 are respectively in different chips, that is, the third low-voltage power transistor 15 is integrated on one chip, and the sixth low-voltage power transistor 18 is integrated on another chip, and the two chips are respectively disposed on the fourth base island 104. For example, one chip integrating the third low-voltage power transistor 15 is disposed on the left side of the fourth base island 104, and the other chip integrating the sixth low-voltage power transistor 18 is disposed on the right side of the fourth base island 104, as shown. Figure 2 As shown. In another embodiment, the third low-voltage power transistor 15 and the sixth low-voltage power transistor 18 are integrated into the same chip, which is disposed on the fourth base island 104; wherein, the chip can be a packaged chip or an unpackaged chip, without limitation.

[0060] In practical applications, the control unit 11, the low-voltage drive unit 12, and each signal terminal 105 are electrically interconnected; the low-voltage drive unit 12, each low-voltage power transistor, and each power terminal 106 are electrically interconnected. In one embodiment, the control unit 11 and the low-voltage drive unit 12, the control unit 11 and the corresponding signal terminal 105, and the low-voltage drive unit 12 and the corresponding signal terminal 105 are all electrically interconnected via metal wire bonding. The low-voltage drive unit 12 and the gates of each low-voltage power transistor are electrically interconnected via metal wire bonding; the sources of each low-voltage power transistor and the corresponding power terminal 106 are electrically interconnected via metal wire bonding; and the drains of each low-voltage power transistor and the corresponding power terminal 106 are electrically interconnected via conductive adhesive. It should be noted that the above electrical interconnection method is applicable not only to situations where the units and low-voltage power transistors are on different chips, but also to situations where related units and related low-voltage power transistors are integrated on the same chip, only with partial electrical interconnection implemented within the chip. Furthermore, after electrical interconnection, the equivalent circuit of the module in this embodiment is as follows: Figure 1 As shown, the low-voltage drive unit 12 is controlled by the control unit 11 to drive each low-voltage power transistor to perform switching operations.

[0061] by Figure 2 For example, the bottom right pin is pin 1. All pins are arranged in a counter-clockwise direction. Based on this, the electrical interconnection of each unit and each low-voltage power transistor will be explained:

[0062] The positive input, negative input, and output terminals of the first operational amplifier in control unit 11 are electrically interconnected with pins 22 to 24 via metal wire bonding. The positive input, negative input, and output terminals of the second operational amplifier in control unit 11 are electrically interconnected with pins 27 to 29 via metal wire bonding. The positive input, negative input, and output terminals of the comparator in control unit 11 are electrically interconnected with pins 30, 32, and 33 via metal wire bonding. The serial port programming terminals of control unit 11 are electrically interconnected with pins 34, 35, 36, and 37 via metal wire bonding. The 35th pin terminal is electrically interconnected. The power supply terminal of the control unit 11 is electrically interconnected with the 36th pin terminal via a metal wire. The ground terminal of the control unit 11 is electrically interconnected with the 26th, 31st, and 37th pin terminals via metal wires. The three low-side control terminals of the control unit 11 are electrically interconnected with the three low-side drive input terminals of the low-voltage drive unit 12 via metal wires. The three high-side control terminals of the control unit 11 are electrically interconnected with the three high-side drive input terminals of the low-voltage drive unit 12 via metal wires.

[0063] The first power supply terminal of the low-voltage drive unit 12 is electrically interconnected with the 40th pin terminal through a metal wire bonding. The second power supply terminal of the low-voltage drive unit 12 is electrically interconnected with the 39th pin terminal through a metal wire bonding. The regulated output terminal of the low-voltage drive unit 12 is electrically interconnected with the 38th pin terminal through a metal wire bonding. The ground terminal of the low-voltage drive unit 12 is electrically interconnected with the 37th pin terminal through a metal wire bonding. The three low-side drive output terminals of the low-voltage drive unit 12 are electrically interconnected with the gates of the first low-voltage power transistor 13, the second low-voltage power transistor 14, and the third low-voltage power transistor 15 through metal wire bonding, respectively. The three high-side drive output terminals of the low-voltage drive unit 12 are electrically interconnected with the gates of the fourth low-voltage power transistor 16, the fifth low-voltage power transistor 17, and the sixth low-voltage power transistor 18 through metal wire bonding, respectively.

[0064] The drain of the first low-voltage power transistor 13 is electrically interconnected with pins 1 to 4 via conductive adhesive (not shown in the figure), and the source of the first low-voltage power transistor 13 is electrically interconnected with pin 7 via metal wire bonding; the drain of the second low-voltage power transistor 14 is electrically interconnected with pins 8 to 14 via conductive adhesive (not shown in the figure), and the source of the second low-voltage power transistor 14 is electrically interconnected with pin 15 via metal wire bonding; the drain of the third low-voltage power transistor 15 is electrically interconnected with pins 16 to 20 via conductive adhesive (not shown in the figure), and the source of the third low-voltage power transistor 15 is electrically interconnected with pin 21 via metal wire bonding; the drain of the fourth low-voltage power transistor 16 is electrically interconnected with pins 1 to 20 via conductive adhesive (not shown in the figure), and the source of the third low-voltage power transistor 15 is electrically interconnected with pin 21 via metal wire bonding; the drain of the fourth low-voltage power transistor 16 is electrically interconnected with pins 1 to 4 via conductive adhesive (not shown in the figure), and the source of the fourth low-voltage power transistor 16 is electrically interconnected with pins 1 to 4 via conductive adhesive (not shown in the figure), and the source of the fourth low-voltage power transistor 16 is electrically interconnected with pin 21 ... The conductive adhesive is electrically interconnected with pins 1 to 4 (not shown in the figure). The source of the fourth low-voltage power transistor 16 is electrically interconnected with pins 5, 6, 25, and 40 via metal wire bonding. The drain of the fifth low-voltage power transistor 17 is electrically interconnected with pins 8 to 14 via conductive adhesive (not shown in the figure). The source of the fifth low-voltage power transistor 17 is electrically interconnected with pins 5, 6, 25, and 40 via metal wire bonding. The drain of the sixth low-voltage power transistor 18 is electrically interconnected with pins 16 to 20 via conductive adhesive (not shown in the figure). The source of the sixth low-voltage power transistor 18 is electrically interconnected with pins 5, 6, 25, and 40 via metal wire bonding.

[0065] like Figure 4 and Figure 5 As shown, the encapsulation body 19 is at least disposed on the metal frame 10 to encapsulate the control unit 11, the low-voltage drive unit 12, and each low-voltage power transistor; of course, the encapsulation body 19 is also disposed within the metal frame 10. In one embodiment, the bottom surface of the metal frame 10 is flush with the bottom surface of the encapsulation body 19 to expose the bottom surface of each base island for heat dissipation; of course, the encapsulation body 19 can also insulate each base island.

[0066] The low-voltage fully integrated smart power module 1 of this embodiment adopts a quad flat no-lead (QFN) package for packaging to reduce its size. In fact, the low-voltage fully integrated smart power module 1 of this embodiment is a packaged chip. By using the QFN package, the size can be minimized, and it can even be smaller than a single-chip implementation.

[0067] Accordingly, this embodiment also provides an electronic device, including a low-voltage fully integrated intelligent power module 1; wherein the low-voltage fully integrated intelligent power module 1 is implemented using the module structure described above. In one embodiment, the electronic device is a small electronic product based on motor control. In this case, the electronic device also includes a motor module. Of course, the electronic device may also include other functional modules, which is determined by the application requirements and is not limited thereto.

[0068] In summary, the low-voltage fully integrated intelligent power module and electronic device of the present invention are manufactured using a chip-packaged method. This method offers advantages such as low manufacturing difficulty, high process maturity, low cost, compact structure, small size, high power density, and high reliability. Furthermore, the peripheral circuitry is simple when designing and applying this device. Therefore, the present invention effectively overcomes the various shortcomings of existing technologies and possesses high industrial applicability.

[0069] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A low voltage full- integrated intelligent power module, characterized by, include: Metal frame, control unit, low-voltage drive unit, first low-voltage power transistor, second low-voltage power transistor, third low-voltage power transistor, fourth low-voltage power transistor, fifth low-voltage power transistor, sixth low-voltage power transistor, and encapsulation. The metal frame includes a first base island, a second base island, a third base island, a fourth base island, a plurality of signal terminals, and a plurality of power terminals. The first base island, the second base island, the third base island, and the fourth base island are spaced apart along a first direction, and the first base island, the fourth base island, the second base island, and the third base island are spaced apart along a second direction. Each signal terminal and each power terminal is disposed on the outer periphery of each base island. The control unit and the low-voltage drive unit are disposed on the first base island, the first low-voltage power transistor and the fourth low-voltage power transistor are disposed on the second base island, the second low-voltage power transistor and the fifth low-voltage power transistor are disposed on the third base island, and the third low-voltage power transistor and the sixth low-voltage power transistor are disposed on the fourth base island. The control unit, the low-voltage drive unit and each signal terminal are electrically interconnected, and the low-voltage drive unit, each low-voltage power transistor and each power terminal are electrically interconnected. The encapsulation body is disposed at least on the metal frame to encapsulate the control unit, the low-voltage drive unit, and each low-voltage power transistor.

2. The low-voltage fully-integrated intelligent power module according to claim 1, characterized in that, The metal frame also includes a fifth base island, disposed between the first region and the second region, wherein the first region is the region where the first base island and the second base island are located, and the second region is the region where the third base island and the fourth base island are located.

3. The low-voltage fully integrated intelligent power module according to claim 1 or 2, characterized in that, There is a first spacing between adjacent base islands and a second spacing between a corresponding base island and a corresponding terminal, wherein the first spacing is greater than or equal to 0.8 times the thickness of the metal frame and the second spacing is greater than or equal to 0.8 times the thickness of the metal frame.

4. The low-voltage fully integrated intelligent power module according to claim 1, characterized in that, The bottom surface of the metal frame is flush with the bottom surface of the molding compound to expose the bottom surface of each base island.

5. The low-voltage fully integrated intelligent power module according to claim 1, characterized in that, During electrical interconnection, the control unit and the low-voltage drive unit, the control unit and the corresponding signal terminal, the low-voltage drive unit and the corresponding signal terminal, the low-voltage drive unit and the gate of each low-voltage power transistor, and the source of each low-voltage power transistor and the corresponding power terminal are all electrically interconnected by metal wire bonding. The drain of each low-voltage power transistor and the corresponding power terminal are electrically interconnected by conductive adhesive.

6. The low-voltage fully integrated intelligent power module according to claim 1, characterized in that, The control unit and the low-voltage drive unit are located in different chips, or the control unit and the low-voltage drive unit are integrated into the same chip.

7. The low-voltage fully integrated intelligent power module according to claim 1 or 6, characterized in that, The control unit includes a microcontroller unit or an application-specific integrated circuit.

8. The low-voltage fully integrated intelligent power module according to claim 1, characterized in that, The first low-voltage power transistor and the fourth low-voltage power transistor are respectively in different chips, or the first low-voltage power transistor and the fourth low-voltage power transistor are integrated in the same chip; The second low-voltage power transistor and the fifth low-voltage power transistor are respectively in different chips, or the second low-voltage power transistor and the fifth low-voltage power transistor are integrated in the same chip; The third low-voltage power transistor and the sixth low-voltage power transistor are respectively in different chips, or the third low-voltage power transistor and the sixth low-voltage power transistor are integrated in the same chip.

9. The low-voltage fully integrated intelligent power module according to claim 1, characterized in that, The low-voltage fully integrated intelligent power module adopts a square flat leadless package.

10. An electronic device, characterized in that, include: The low-voltage fully integrated intelligent power module as described in any one of claims 1 to 9.

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