Method of manufacturing a semiconductor device

By employing step-by-step etching and selective etching, the problems of large etching depth and poor step structure in existing technologies have been solved, enabling efficient formation of through holes in SOI devices and improving process accuracy and yield.

CN122180377APending Publication Date: 2026-06-09MAXSCEND SEMICONDUCTOR LAKEVIEW CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
MAXSCEND SEMICONDUCTOR LAKEVIEW CO LTD
Filing Date
2026-02-05
Publication Date
2026-06-09

AI Technical Summary

Technical Problem

In existing dual damasceral etching processes, the etching depth of the via structure is large and there are step differences. It is difficult to ensure sufficient etching amount in the areas with large etching depth while avoiding the metal layer being etched through. Especially for SOI devices, the existing integrated etching process has process damage and yield problems.

Method used

A step-by-step etching process is adopted. First, the third mask layer is used as a mask to etch the first dielectric layer, the anti-reflective dielectric layer and the metal layer respectively. By controlling the rate ratio of different etching processes, through holes are formed on the metal layers at different heights, and through-holes are avoided, thereby improving process accuracy and yield.

Benefits of technology

This technology enables the simultaneous formation of through-holes on metal layers of different heights, reducing process damage, improving process accuracy and yield, and ensuring the uniformity and reliability of etching.

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Abstract

The application provides a preparation method of a semiconductor device, and belongs to the technical field of semiconductors. The preparation method comprises the following steps: taking a third mask layer as a mask, etching a first dielectric layer by using a first etching process and stopping on a first mask layer and a second mask layer, etching the first mask layer and the second mask layer by using a second etching process with high selectivity and stopping on an anti-reflection dielectric layer, and etching the anti-reflection dielectric layer by using a third etching process with high selectivity and stopping on a second metal layer. Through step-by-step etching and etching selectivity control, a through hole is formed on metal layers with different heights at the same time, the etching amount on the first metal layer is sufficient, the second metal layer cannot be etched through, process damage is reduced, and process precision and yield are improved.
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